WO2019031298A1 - Display panel - Google Patents
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- WO2019031298A1 WO2019031298A1 PCT/JP2018/028545 JP2018028545W WO2019031298A1 WO 2019031298 A1 WO2019031298 A1 WO 2019031298A1 JP 2018028545 W JP2018028545 W JP 2018028545W WO 2019031298 A1 WO2019031298 A1 WO 2019031298A1
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- WIPO (PCT)
- Prior art keywords
- wiring
- disposed
- display area
- position detection
- common signal
- Prior art date
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
- G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
Definitions
- the present invention relates to a display panel.
- the display panel described in Patent Document 1 includes a plurality of position detection electrodes (touch electrodes) formed on a substrate, a plurality of pixel electrodes (pixel electrodes), and a source drive touch sensing IC (common signal supply unit). Equipped with The position detection electrode is connected to the source drive touch sensing IC via a wire (touch routing wire). Also, the plurality of position detection electrodes constitute a common electrode.
- the source drive touch sensing IC supplies a drive voltage to the gate line when the display panel is driven in the display mode, supplies display data to the data line, and outputs a common signal (common signal) to the position detection electrode (common electrode). Supply.
- the source drive touch sensing IC supplies a touch drive voltage to the position detection electrode during touch drive, scans a change in capacitance of the touch electrode before and after the touch, and detects the position of the position detection electrode where the touch is performed. judge.
- the length of the wiring for supplying the common signal is different between the position detection electrode relatively close to the source drive touch sensing IC which is the common signal supply unit and the position detection electrode relatively far. . If the wiring is long, the bluntness of the common signal becomes large, so that the timing at which the predetermined potential is reached varies in the position detection electrode close to the common signal supply unit and the position detection electrode far therefrom. As a result, the display quality may be degraded.
- the present invention has been completed based on the above circumstances, and it is an object of the present invention to provide a display panel capable of further enhancing the display quality.
- the display panel of the present invention comprises a substrate divided into a display area capable of displaying an image and a non-display area surrounding the display area, and a plurality of pixel electrodes arranged in the display area.
- a plurality of position detection electrodes and one of a pair of portions arranged to sandwich the display area in the non-display area can be arranged to supply a common signal to the position detection electrodes
- a common signal supply unit, a first trunk wiring disposed in the one portion and to which a common signal is supplied from the common signal supply unit, and a second trunk disposed in the other of the pair of portions Wiring and the display area A first wiring connected to the common signal supply unit and the second main wiring and connected to the position detection electrode at an intermediate part in the extending direction, and the display area being passed through And a plurality of second wirings which are arranged in the same layer as the first wiring and connect the first main wiring and the second main wiring.
- the common signal supplied from the common signal supply unit is transmitted to the position detection electrode from the end on the common signal supply unit side of the first wiring. Further, the common signal supplied to the first main wiring is transmitted to the second main wiring through the second wiring, and is transmitted to the position detection electrode from the end on the second main wiring side of the first wiring.
- a configuration in which the common signal is supplied only from the common signal supply unit side by supplying the common signal to one position detection electrode from both ends (both sides sandwiching the display area) of one position detection electrode as described above Compared to the above, it is possible to suppress the occurrence of variations in the potentials of the position detection electrodes due to the distance between the common signal supply unit and the position detection electrodes, and to improve the display quality.
- Sectional view schematically showing a liquid crystal panel according to Embodiment 1 of the present invention Top view schematically showing the wiring configuration of the array substrate constituting the liquid crystal panel Plan view showing the vicinity of the first main wiring on the array substrate Plan view showing the vicinity of the pixel electrode on the array substrate Top view showing the vicinity of the second main wiring on the array substrate
- a cross sectional view showing an array substrate (corresponding to a view cut along the line VI-VI in FIG. 5)
- a plan view schematically showing a wiring configuration of an array substrate according to a second embodiment The top view which shows the 2nd trunk wiring vicinity in the array substrate which concerns on Embodiment 2.
- a liquid crystal panel 10 (display panel) having a touch panel function (position input function) in addition to the display function is exemplified.
- X-axis, Y-axis, and Z-axis are shown in a part of each drawing, and it is drawn so that each axis direction may turn into the direction shown in each drawing.
- the upper side of FIG. 1 is referred to as the front side and the lower side of FIG.
- the liquid crystal panel 10 displays an image using illumination light emitted from a backlight device (illumination device) not shown.
- the liquid crystal panel 10 is provided between a pair of substantially transparent and excellent light transmitting glass substrates 11 and 12 and plate surfaces facing each other on both the substrates 11 and 12. It comprises at least a liquid crystal layer 13 containing liquid crystal molecules, which is a substance disposed in the internal space S1 and whose optical characteristics change with application of an electric field, and a seal member 14.
- the front side front side
- the CF substrate 11 counter substrate
- the back side back side
- the array substrate 12 wiring substrate, active matrix substrate
- Each of the CF substrate 11 and the array substrate 12 is formed by laminating various films on the inner surface side of a glass substrate.
- the CF substrate 11 is disposed to face the array substrate 12 via the liquid crystal layer 13.
- the seal member 14 is made of, for example, a photocurable resin material such as an ultraviolet curable resin material.
- the seal member 14 has a rectangular frame shape, is disposed so as to surround the internal space S1 between the array substrate 12 and the CF substrate 11, and seals the liquid crystal layer 13.
- the polarizing plate which is not shown in figure is stuck on the outer surface side of both board
- the liquid crystal panel 10 (and consequently the array substrate 12 and the glass substrate 29) is divided into a display area AA capable of displaying an image and a non-display area NAA in which no image is displayed.
- the display area AA has a rectangular shape as shown by a dot-and-dash line in FIG. 2 and is disposed at the center side portion of the liquid crystal panel 10.
- the non-display area NAA is a frame-like outer peripheral portion surrounding the display area AA. As shown in FIG. 1, a part of the array substrate 12 protrudes laterally with respect to the CF substrate 11, and various signals related to the display function and the touch panel function are formed on the protruding portion (non-display area NAA).
- the driver 25 and the flexible substrate 26 are mounted as components for supplying the
- the flexible substrate 26 is connected at one end to the array substrate 12 and at the other end to a control substrate (not shown).
- Various signals supplied from the control substrate are transmitted to the liquid crystal panel 10 through the flexible substrate 26 and processed by the driver 25 in the non-display area NAA and output toward the display area AA.
- a plurality of TFTs 15 and pixel electrodes 16 are arranged along the X axis direction and the Y axis direction. It is provided in a matrix form (matrix form).
- a gate wiring 20 and a source wiring 22 having a substantially lattice shape are disposed around the TFT 15 and the pixel electrode 16 so as to surround the same. While gate interconnection 20 extends substantially straight along the X-axis direction, source interconnection 22 extends generally along the Y-axis direction, and a portion thereof extends in the Y-axis direction. And extend along an oblique direction.
- the gate wiring 20 is connected to the gate electrode of the TFT 15, and the source wiring 22 is connected to the source electrode of the TFT 15.
- the pixel electrode 16 is connected to the drain electrode of the TFT 15. That is, the source wiring 22 (pixel wiring) is connected to the pixel electrode 16 via the TFT 15.
- a material of the semiconductor film forming the TFT 15 although an amorphous silicon or an In-Ga-Zn-O-based semiconductor (indium gallium zinc oxide) or the like can be exemplified, it is not limited thereto.
- the pixel wiring connected to the pixel electrode 16 also includes the pixel wiring connected to the pixel electrode 16 via the TFT 15.
- the TFT 15 is driven based on various signals supplied to the gate wiring 20 and the source wiring 22, and the supply of the potential to the pixel electrode 16 is controlled along with the driving.
- the pixel electrode 16 has a substantially parallelogram whose plan shape is vertically long, and the source wiring 22 is interposed between the pixel electrode 16 adjacent in the X-axis direction and the pixel electrode 16 adjacent in the Y-axis direction.
- the gate wiring 20 is interposed between them.
- the CF substrate 11 is provided with three color filters (not shown) exhibiting red (R), green (G) and blue (B).
- the pixel portion PX is configured by facing one pixel electrode 16 and one color filter. That is, the liquid crystal panel 10 includes the pixel units PX of three colors corresponding to the color filters of three colors.
- a common electrode 19 is formed on the glass substrate 29 (substrate) so as to overlap all the pixel electrodes 16.
- the common electrode 19 is disposed on the upper layer side (the front side in FIG. 4) of the pixel electrode 16. Note that, in FIGS. 3 to 5, basically, the component formed in the layer on the front side of the layer in which the source wiring 22 is formed is indicated by a two-dot chain line, and the component on the back side The components formed in the layer of are shown in broken lines.
- the common electrode 19 is supplied with a common signal (a signal for setting the common electrode 19 to a constant reference potential), and extends over substantially the entire display area AA.
- a plurality of pixel overlapping openings 17 are formed in a portion overlapping with the pixel electrode 16.
- the pixel overlapping opening 17 extends along the obliquely extending portion 21 of the source wiring 22.
- the operation mode is set to an FFS (Fringe Field Switching) mode. Further, in FIG.
- the light shielding portion 24 formed in the display area AA on the inner surface side of the CF substrate 11 is indicated by a two-dot chain line.
- the light shielding portion 24 has a substantially lattice shape, and has a pixel opening 23 for transmitting light at a position overlapping with most of the pixel electrode 16.
- the light shielding portion 24 has a function of preventing color mixing between the pixel portions PX exhibiting different colors.
- the pixel electrode 16 and the common electrode 19 are made of a transparent electrode material (for example, ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide)).
- the liquid crystal panel 10 has a display function for displaying an image and a touch panel function (position input function) for detecting a position (input position) input by the user based on the displayed image.
- the touch panel pattern for exhibiting the touch panel function is integrated (in-cell).
- the touch panel pattern is a so-called projected capacitive system, and its detection system is a self-capacitive system.
- the touch panel pattern is composed of a plurality of position detection electrodes 27 arranged in a matrix (matrix) on the surface of the glass substrate 29.
- the position detection electrode 27 is disposed in the display area AA.
- the common electrode 19 described above is configured of a plurality of position detection electrodes 27.
- gate drivers 28 to which the gate wirings 20 are connected are respectively provided at both end portions in the X-axis direction.
- the gate driver 28 has an elongated shape in the Y-axis direction, and is formed monolithically on a glass substrate 29, for example.
- one gate line 20 is connected to one of the pair of gate drivers 28 and 28, and the gate line 20 connected to the gate driver 28 on the left side of FIG.
- the gate wirings 20 connected to the gate driver 28 on the right side of FIG. 2 are alternately arranged in the Y-axis direction. Further, a plurality of wirings 45 are connected to the gate driver 28.
- a terminal portion 46 is provided at the tip of each wire 45, and a control substrate is connected to the terminal portion 46 via the flexible substrate 26.
- Drive signals (a clock signal, a low potential signal, a scan start signal, etc.) are supplied to the gate driver 28 through the respective wires 45.
- the wire 47 for supplying a scan start signal to the gate driver 28 is denoted by reference numeral 47.
- the driver 25 (common signal supply unit) is disposed in one of the parts A1 and A2 disposed in a form sandwiching the display area AA. .
- the driver 25 has a function of supplying an image signal to each source wiring 22, a function of supplying a position detection signal (touch signal) to each position detection electrode 27 through each first wiring 35 (described later), and each position detection electrode 27 has a function of supplying a common signal (common signal).
- a first trunk wiring 31 extending along the X-axis direction is disposed. Both ends of the first main wiring 31 are connected to the driver 25, and the driver 25 supplies the common signal to the first main wiring 31.
- a second trunk wiring 32 extending along the X-axis direction is disposed in the other portion A2 of the non-display area NAA. Further, on the glass substrate 29, a first wiring 35 (touch sensor line) for connecting the driver 25 and the second trunk wiring 32 in a manner of passing through the display area AA is disposed. A plurality of first wires 35 are provided corresponding to each of the plurality of position detection electrodes 27. The first wiring 35 is connected to the position detection electrode 27 via the contact hole C1 at an intermediate portion in the extending direction (Y-axis direction) with respect to the position detection electrode 27.
- the portion from the driver 25 to the position detection electrode 27 in the first wiring 35 is referred to as a first extension portion 36
- the portion from the second trunk wiring 32 to the position detection electrode 27 is a second It is called the extending portion 37.
- the first extending portion 36 is illustrated as a thick line with respect to the second extending portion 37.
- the second main wiring 32 and the end of the second extended portion 37 on the second main wiring 32 side are connected via the TFT 38 (switching element). It is connected.
- the middle portion in the extending direction of the first wiring 35 referred to here is a portion between both end portions of the first wiring 35.
- a wire 39 for switching the TFTs 38 collectively is connected to the gate electrode of each TFT 38.
- the wires 39 extend in the X-axis direction, and the lead wires 41 drawn to one portion A1 in the non-display area NAA are connected to both ends of the wires 39, respectively.
- the lead wire 41 passes outside the gate driver 28 on the glass substrate 29, and a terminal portion 40 is provided at the tip thereof.
- a control substrate is connected to the terminal portion 40 via the flexible substrate 26.
- a signal for turning on the TFT 38 is supplied to the wiring 39 in a data writing period (a period for writing a signal for display to each pixel portion PX), and a signal for turning off the TFT 38 is supplied in a sensing period.
- openings 33 and 34 are respectively formed in portions of the second main wiring 32 and the wiring 39 overlapping the source wiring 22. Thereby, parasitic capacitance that may occur between the second main wiring 32 (or the wiring 39) and the source wiring 22 is reduced.
- a second wiring 42 (common line) for connecting the first main wiring 31 and the second main wiring 32 so as to pass through the display area AA is arranged.
- the total number of position detection electrodes 27 is smaller than the total number of pixel electrodes 16.
- the number of arrangement of position detection electrodes 27 is smaller than the number of arrangement of pixel electrodes 16 (pixel portion PX) in both the X-axis direction (arrangement direction of the plurality of source wirings 22) and the Y-axis direction. It has become. That is, the number of first wires 35 is smaller than the number of source wires 22.
- the first wiring 35 and the second wiring 42 are disposed in the same layer as the source wiring 22.
- a space S2 is provided between the source line 22 and the pixel electrode 16 in which the first line 35 or the second line 42 is disposed.
- the space S2 is provided for each of the three pixel units PX aligned in the X-axis direction.
- the first wiring 35 and the second wiring 42 extend in such a manner as to be adjacent to different source wirings 22 respectively, and one first wiring 35 is arranged for every two second wirings 42 in the X-axis direction. ing.
- the size of the position detection electrodes 27 is larger than the size of the pixel unit PX.
- the width in the X-axis direction and the width in the Y-axis direction of the pixel portion PX are several tens ⁇ m to one hundred and several tens ⁇ m, respectively, the position detection electrode 27 has a side dimension of several mm (for example, about 2 mm to 5 mm). Further, as shown in FIG.
- the position detection electrode 27 (common electrode 19) has an opening 18 overlapping at least a part of the first wiring 35, and the opening 18 makes the first wiring 35
- the parasitic capacitance that may occur between the first wiring 35 and the position detection electrode 27 that is not connected is reduced. Thereby, the detection sensitivity at the time of detecting the input position is improved.
- the opening 18 is also provided so as to overlap at least a part of the second wiring 42.
- the first wiring 35 (not shown in FIG. 6), the second wiring 42, and the source wiring 22 are formed on the glass substrate 29 via the gate insulating film 43.
- the position detection electrode 27 is formed on the upper layer thereof via the interlayer insulating film 44.
- metal materials such as Al, Mo, Ti, W, and Cu, can be used as the source wiring 22, the first wiring 35, and the second wiring 42, for example, the invention is not limited thereto.
- the common signal supplied from the driver 25 is transmitted from the end of the first wiring 35 on the driver 25 side to the position detection electrode 27 through the first extending portion 36.
- the common signal supplied from the driver 25 to the first trunk wiring 31 is transmitted to the second trunk wiring 32 through each second wiring 42, and from the end of the first wiring 35 on the second trunk wiring 32 side, The signal is transmitted to the position detection electrode 27 through the second extending portion 37.
- the TFT 38 is on.
- the common signal is supplied to one position detection electrode 27 from both end portions (both sides sandwiching the display area AA) of the first wiring 35 so that the common signal is supplied only from the driver 25 side.
- the supply of the common signal from the second main wiring 32 to the position detection electrode 27 can be stopped.
- the detection accuracy of the input position by the position input body can be further enhanced by stopping the supply of the common signal.
- the source wiring 22, the first wiring 35, and the second wiring 42 are disposed in the same layer. Therefore, the source wiring 22, the first wiring 35, and the second wiring 42 can be formed in the same process.
- the number of arrangement of the position detection electrodes 27 (the number of first wirings 35) is smaller than the number of arrangement of the pixel electrodes 16 (the number of source wirings). For this reason, the source wiring 22 in which the first wiring 35 is not adjacent (in other words, an extra space S2 in which the first wiring 35 is not disposed) is generated.
- the second wiring 42 is arranged adjacent to the source wiring 22 not adjacent to the first wiring 35 (arranged in the surplus space S2), in the X axis direction (arrangement direction), A situation in which the width of the array substrate 12 is increased can be suppressed. Further, if the second wiring 42 is disposed in the non-display area NAA, the frame becomes large. In the present embodiment, since the second wiring 42 is disposed in the display area AA, the frame can be narrowed.
- Second Embodiment Embodiment 2 of the present invention will be described with reference to FIGS. 7 to 8.
- the same parts as those of the above-described embodiment are denoted by the same reference numerals, and redundant description will be omitted.
- the second main wiring 32 and each first wiring 35 are connected via the TFT 138 or the TFT 141.
- a wire 139 extending in the X-axis direction is connected to the gate electrode of each TFT 138, and a wire 140 extending in the X-axis direction is connected to the gate electrode of each TFT 141.
- the wire 139 is connected to a wire 47 for supplying a scan start signal to the gate driver 28 on the right side in FIG.
- the wiring 140 is connected to a wiring 47 for supplying a scan start signal to the gate driver 28 on the left side in FIG. 7. That is, the TFT 138 is electrically connected to the gate driver 28 on the right side, and the TFT 141 is electrically connected to the gate driver 28 on the left side.
- the TFTs 138 and the TFTs 141 electrically connected to the wiring 47 are configured to be turned on when a scanning start signal is input to the wiring 47 (as a result, the gate driver 28).
- the dedicated wiring for switching the TFT 138 and the TFT 141 (lead wire 41 of Embodiment 1; see FIG. 2) is eliminated. Therefore, the frame area can be made smaller in the X-axis direction.
- the present invention since the pair of the TFT and the wiring is provided because the pair of left and right gate drivers 28 is provided, the present invention is not limited to this.
- One set or three or more sets of TFTs and wirings may be provided.
- the TFTs 138 and 141 may be turned on using another signal (for example, a clock signal or the like) supplied to the gate driver 28.
- the TFTs 138 and 141 may be turned on using a signal for resetting a specific node in the shift register of the gate driver 28.
- the gate driver 28 may have a dummy shift register stage (shift register stage not connected to the gate wiring 20), and the output signal from the shift register stage is used to turn on the TFTs 138 and 141. It is also good.
- Embodiment 3 Embodiment 3 of the present invention will be described with reference to FIG. The same parts as those of the above-described embodiment are denoted by the same reference numerals, and redundant description will be omitted.
- an inspection circuit portion 213 for inspecting the source wiring 22 and the like is provided on the glass substrate 29. Each source wire 22 is electrically connected to the test circuit unit 213.
- the inspection circuit portion 213 is monolithically formed on the array substrate 212 based on the same semiconductor film as the TFT.
- the inspection circuit portion 213 has a long shape in the X-axis direction, and a wiring 215 having a terminal portion 214 for inspection is connected to both ends thereof.
- the inspection circuit unit 213 is formed in the mounting area of the driver 25, but the arrangement location can be changed as appropriate. For example, the inspection circuit unit 213 is between the driver 25 and the display area AA. It may be located at
- the third wiring 233 connected to both the first main wiring 31 and the second main wiring 32 is provided.
- the third wiring 233 extends along the Y-axis direction, and is disposed between the gate driver 28 and the position detection electrode 27.
- the third wire 233 has a terminal portion 234 disposed in one portion A1.
- the flexible substrate 26 is connected to the terminal portion 234, and a common signal is input from an external signal supply source (for example, a driver mounted on the flexible substrate 26) via the flexible substrate 26. That is, in the present embodiment, the terminal unit 234 and the driver 25 constitute a common signal supply unit capable of supplying a common signal to the position detection electrode 27.
- the second main wiring 32 is provided with the terminal portion 236 and the wiring 235 capable of supplying a common signal from an external signal supply source.
- the wiring 235 extends along the Y-axis direction, and is disposed, for example, outside the wiring 47 for supplying a scan start signal to the gate driver 28.
- the frame becomes large by arranging the wiring 235 and the third wiring 233 in the non-display area NAA, the dullness of the common signal can be reduced by providing the second wiring 42, so that the wiring can be reduced.
- the line width of the H.235 and the third wiring 233 can be made relatively small.
- each wiring is performed by inputting a signal for inspection to each terminal portion provided on the glass substrate 29. It can be inspected.
- this inspection procedure will be described.
- the light source (backlight) and the polarizing plate are disposed on the back of the liquid crystal panel 10, and the polarizing plate is disposed on the front side (observer) side.
- the gate driver 28 is driven to supply, to the gate wiring 20, a signal that turns on the TFT 15 of each pixel section PX in the display area.
- a signal for example, a constant potential of 15 V
- a signal for example, a constant potential of 5 V
- a signal for example, a constant potential of 5 V
- a signal is supplied such that the TFTs 138 and 141 are in an on state for a certain period.
- a test signal (for example, 0 to 5 V) is input to at least one of the terminal portion 234 and the terminal portion 236.
- the display (gradation change) of the pixel portion PX related to the position detection electrode 27 connected to the first wiring 35 is different from that of the other pixel portions PX. It will be a different display.
- the disconnection of the first wiring 35 can be detected by the observer visually confirming the display abnormality.
- disconnection of the gate wiring 20 and the source wiring 22 can also be detected by the observer visually checking the display abnormality.
- the present invention is not limited to the embodiments described above with reference to the drawings.
- the following embodiments are also included in the technical scope of the present invention.
- the liquid crystal panel is illustrated as the display panel.
- the present technology can be applied to other types of display panels.
- the touch panel pattern is a self-capacitance system.
- the touch panel patterns may be a mutual capacitance system.
- the specific planar shapes of the pixel electrode, the gate wiring, the source wiring, the TFT and the like are not limited to those exemplified in the above embodiment, and can be appropriately changed.
- the gate driver 28 is formed monolithically on the glass substrate 29.
- the gate driver 28 is configured in the form of a driver chip and mounted on the glass substrate 29. It is also good.
- the shape of the pixel overlap opening 17 formed in the common electrode 19 can be changed as appropriate, and may be V-shaped, for example. In addition, the number of pixel overlapping openings 17 overlapping with each pixel electrode 16 may not be plural, and may be at least one.
- the first wiring 35, the second wiring 42, and the source wiring 22 are arranged in the same layer, they may not necessarily be formed of the same material.
- the first wiring 35 may be formed by laminating the material forming the source wiring 22 and the material forming the pixel electrode 16.
- the common signal is supplied from the driver 25.
- the common signal is supplied from the driver 25 and the terminal portion (the terminal portion 234 or the terminal portion 236).
- the common signal may be supplied only from the terminal unit. That is, the common signal supply unit may be configured only by the terminal unit. Further, the common signal may be supplied from the terminal portion 234 only to the first main wiring 31. Further, the number of drivers 25 can be changed as appropriate. (8) In the above embodiment, even if a driver having a function of supplying an image signal to the source wiring 22 and a driver having a function of supplying a touch signal (position detection signal) to the position detection electrode 27 are separately provided. Good.
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Abstract
This display panel is characterized by being provided with: a plurality of position detection electrodes 27 that form common electrodes 19 which are disposed so as to be superimposed over a plurality of pixel electrodes 16 disposed in a display region AA; a driver 25 that is disposed in one portion A1 of a pair of portions which are disposed in a non-display region NAA so as to sandwich the display region AA, and that is capable of supplying a common signal to the position detection electrodes 27; a first trunk wiring 31 which is disposed in said one portion A1 and to which a common signal is supplied; a second trunk wiring 32 disposed in the other portion A2; a first wiring 35 that is disposed so as to pass through the display region AA, that connects between the driver 25 and the second trunk wiring 32, and that is connected, at a midpoint in the extension direction thereof, to the position detection electrodes 27; and a plurality of second wirings 42 that are disposed so as to pass through the display region AA and disposed on the same layer as the first wiring 35, and that connect between the first trunk wiring 31 and the second trunk wiring 32.
Description
本発明は、表示パネルに関する。
The present invention relates to a display panel.
従来、タッチパネル機能を備える表示パネルの一例として下記特許文献1に記載されたものが知られている。特許文献1に記載された表示パネルは、基板上に形成された複数の位置検出電極(タッチ電極)と、複数の画素電極(ピクセル電極)と、ソース駆動タッチセンシングIC(共通信号供給部)とを備える。位置検出電極は、配線(タッチルーティング配線)を介して、ソース駆動タッチセンシングICと接続されている。また、複数の位置検出電極は、共通電極を構成するものとされる。ソース駆動タッチセンシングICは、表示パネルがディスプレイモードとして駆動されているときにはゲートラインに駆動電圧を供給し、データラインに表示データを供給し、位置検出電極(共通電極)に共通信号(コモン信号)を供給する。また、ソース駆動タッチセンシングICは、タッチ駆動時には位置検出電極にタッチ駆動電圧を供給し、タッチ前後のタッチ電極の静電容量の変化をスキャンして、タッチが実行された位置検出電極の位置を判定する。
DESCRIPTION OF RELATED ART Conventionally, what was described in following patent document 1 as an example of a display panel provided with a touch-panel function is known. The display panel described in Patent Document 1 includes a plurality of position detection electrodes (touch electrodes) formed on a substrate, a plurality of pixel electrodes (pixel electrodes), and a source drive touch sensing IC (common signal supply unit). Equipped with The position detection electrode is connected to the source drive touch sensing IC via a wire (touch routing wire). Also, the plurality of position detection electrodes constitute a common electrode. The source drive touch sensing IC supplies a drive voltage to the gate line when the display panel is driven in the display mode, supplies display data to the data line, and outputs a common signal (common signal) to the position detection electrode (common electrode). Supply. In addition, the source drive touch sensing IC supplies a touch drive voltage to the position detection electrode during touch drive, scans a change in capacitance of the touch electrode before and after the touch, and detects the position of the position detection electrode where the touch is performed. judge.
(発明が解決しようとする課題)
上記構成では、共通信号供給部であるソース駆動タッチセンシングICに対して相対的に近い位置検出電極と、相対的に遠い位置検出電極では、共通信号を供給するための配線の長さが相違する。配線が長いと共通信号の鈍りが大きくなることから、共通信号供給部に近い位置検出電極と遠い位置検出電極では、既定の電位に到達するタイミングにバラツキが生じる。この結果、表示品位が低下する事態が懸念される。 (Problems to be solved by the invention)
In the above configuration, the length of the wiring for supplying the common signal is different between the position detection electrode relatively close to the source drive touch sensing IC which is the common signal supply unit and the position detection electrode relatively far. . If the wiring is long, the bluntness of the common signal becomes large, so that the timing at which the predetermined potential is reached varies in the position detection electrode close to the common signal supply unit and the position detection electrode far therefrom. As a result, the display quality may be degraded.
上記構成では、共通信号供給部であるソース駆動タッチセンシングICに対して相対的に近い位置検出電極と、相対的に遠い位置検出電極では、共通信号を供給するための配線の長さが相違する。配線が長いと共通信号の鈍りが大きくなることから、共通信号供給部に近い位置検出電極と遠い位置検出電極では、既定の電位に到達するタイミングにバラツキが生じる。この結果、表示品位が低下する事態が懸念される。 (Problems to be solved by the invention)
In the above configuration, the length of the wiring for supplying the common signal is different between the position detection electrode relatively close to the source drive touch sensing IC which is the common signal supply unit and the position detection electrode relatively far. . If the wiring is long, the bluntness of the common signal becomes large, so that the timing at which the predetermined potential is reached varies in the position detection electrode close to the common signal supply unit and the position detection electrode far therefrom. As a result, the display quality may be degraded.
本発明は上記のような事情に基づいて完成されたものであって、表示品位をより高くすることが可能な表示パネルを提供することを目的とする。
The present invention has been completed based on the above circumstances, and it is an object of the present invention to provide a display panel capable of further enhancing the display quality.
(課題を解決するための手段)
上記課題を解決するために、本発明の表示パネルは、画像を表示可能な表示領域と前記表示領域を取り囲む非表示領域とに区分される基板と、前記表示領域に配される複数の画素電極と、前記表示領域において行列状に配され、位置入力体による入力位置を検出する複数の位置検出電極であって、前記複数の画素電極に対して重畳する形で配される共通電極を構成する複数の位置検出電極と、前記非表示領域において、前記表示領域を挟む形で配された一対の部分のうち一方の部分に配され、前記位置検出電極に対して共通信号を供給することが可能な共通信号供給部と、前記一方の部分に配されると共に前記共通信号供給部から共通信号が供給される第1幹配線と、前記一対の部分のうち他方の部分に配される第2幹配線と、前記表示領域を通過する形で配され、前記共通信号供給部と前記第2幹配線とを接続し、延設方向の中間部において前記位置検出電極に接続される第1配線と、前記表示領域を通過する形で配されると共に前記第1配線と同じ層に配され、前記第1幹配線と前記第2幹配線とを接続する複数の第2配線と、を備えることに特徴を有する。 (Means to solve the problem)
In order to solve the above problems, the display panel of the present invention comprises a substrate divided into a display area capable of displaying an image and a non-display area surrounding the display area, and a plurality of pixel electrodes arranged in the display area. And a plurality of position detection electrodes arranged in a matrix in the display area to detect an input position by the position input body, and constituting a common electrode disposed in a superimposed manner on the plurality of pixel electrodes A plurality of position detection electrodes and one of a pair of portions arranged to sandwich the display area in the non-display area can be arranged to supply a common signal to the position detection electrodes A common signal supply unit, a first trunk wiring disposed in the one portion and to which a common signal is supplied from the common signal supply unit, and a second trunk disposed in the other of the pair of portions Wiring and the display area A first wiring connected to the common signal supply unit and the second main wiring and connected to the position detection electrode at an intermediate part in the extending direction, and the display area being passed through And a plurality of second wirings which are arranged in the same layer as the first wiring and connect the first main wiring and the second main wiring.
上記課題を解決するために、本発明の表示パネルは、画像を表示可能な表示領域と前記表示領域を取り囲む非表示領域とに区分される基板と、前記表示領域に配される複数の画素電極と、前記表示領域において行列状に配され、位置入力体による入力位置を検出する複数の位置検出電極であって、前記複数の画素電極に対して重畳する形で配される共通電極を構成する複数の位置検出電極と、前記非表示領域において、前記表示領域を挟む形で配された一対の部分のうち一方の部分に配され、前記位置検出電極に対して共通信号を供給することが可能な共通信号供給部と、前記一方の部分に配されると共に前記共通信号供給部から共通信号が供給される第1幹配線と、前記一対の部分のうち他方の部分に配される第2幹配線と、前記表示領域を通過する形で配され、前記共通信号供給部と前記第2幹配線とを接続し、延設方向の中間部において前記位置検出電極に接続される第1配線と、前記表示領域を通過する形で配されると共に前記第1配線と同じ層に配され、前記第1幹配線と前記第2幹配線とを接続する複数の第2配線と、を備えることに特徴を有する。 (Means to solve the problem)
In order to solve the above problems, the display panel of the present invention comprises a substrate divided into a display area capable of displaying an image and a non-display area surrounding the display area, and a plurality of pixel electrodes arranged in the display area. And a plurality of position detection electrodes arranged in a matrix in the display area to detect an input position by the position input body, and constituting a common electrode disposed in a superimposed manner on the plurality of pixel electrodes A plurality of position detection electrodes and one of a pair of portions arranged to sandwich the display area in the non-display area can be arranged to supply a common signal to the position detection electrodes A common signal supply unit, a first trunk wiring disposed in the one portion and to which a common signal is supplied from the common signal supply unit, and a second trunk disposed in the other of the pair of portions Wiring and the display area A first wiring connected to the common signal supply unit and the second main wiring and connected to the position detection electrode at an intermediate part in the extending direction, and the display area being passed through And a plurality of second wirings which are arranged in the same layer as the first wiring and connect the first main wiring and the second main wiring.
共通信号供給部から供給された共通信号は、第1配線における共通信号供給部側の端部から、位置検出電極に伝送される。また、第1幹配線に供給された共通信号は、第2配線を通じて、第2幹配線に伝送され、第1配線における第2幹配線側の端部から、位置検出電極に伝送される。上記のように1つの位置検出電極に対して、第1配線の両端部(表示領域を挟む両側)から、それぞれ共通信号を供給することで、共通信号供給部側からのみ共通信号を供給する構成と比べて、共通信号供給部と位置検出電極の距離に起因して各位置検出電極の電位にバラツキが生じる事態を抑制でき、表示品位をより高くすることができる。
The common signal supplied from the common signal supply unit is transmitted to the position detection electrode from the end on the common signal supply unit side of the first wiring. Further, the common signal supplied to the first main wiring is transmitted to the second main wiring through the second wiring, and is transmitted to the position detection electrode from the end on the second main wiring side of the first wiring. A configuration in which the common signal is supplied only from the common signal supply unit side by supplying the common signal to one position detection electrode from both ends (both sides sandwiching the display area) of one position detection electrode as described above Compared to the above, it is possible to suppress the occurrence of variations in the potentials of the position detection electrodes due to the distance between the common signal supply unit and the position detection electrodes, and to improve the display quality.
(発明の効果)
本発明によれば、表示品位をより高くすることが可能な表示パネルを提供することができる。 (Effect of the invention)
According to the present invention, it is possible to provide a display panel capable of further enhancing the display quality.
本発明によれば、表示品位をより高くすることが可能な表示パネルを提供することができる。 (Effect of the invention)
According to the present invention, it is possible to provide a display panel capable of further enhancing the display quality.
<実施形態1>
本発明の実施形態1を図1から図6によって説明する。本実施形態では、表示機能に加えてタッチパネル機能(位置入力機能)を備えた液晶パネル10(表示パネル)を例示する。なお、各図面の一部にはX軸、Y軸及びZ軸を示しており、各軸方向が各図面で示した方向となるように描かれている。また、上下方向については、図1を基準とし、且つ同図上側を表側とするとともに同図下側を裏側とする。液晶パネル10は、図示しないバックライト装置(照明装置)から照射される照明光を利用して画像を表示するものである。 First Embodiment
Embodiment 1 of the present invention will be described with reference to FIGS. 1 to 6. In the present embodiment, a liquid crystal panel 10 (display panel) having a touch panel function (position input function) in addition to the display function is exemplified. In addition, X-axis, Y-axis, and Z-axis are shown in a part of each drawing, and it is drawn so that each axis direction may turn into the direction shown in each drawing. Further, in the vertical direction, the upper side of FIG. 1 is referred to as the front side and the lower side of FIG. Theliquid crystal panel 10 displays an image using illumination light emitted from a backlight device (illumination device) not shown.
本発明の実施形態1を図1から図6によって説明する。本実施形態では、表示機能に加えてタッチパネル機能(位置入力機能)を備えた液晶パネル10(表示パネル)を例示する。なお、各図面の一部にはX軸、Y軸及びZ軸を示しており、各軸方向が各図面で示した方向となるように描かれている。また、上下方向については、図1を基準とし、且つ同図上側を表側とするとともに同図下側を裏側とする。液晶パネル10は、図示しないバックライト装置(照明装置)から照射される照明光を利用して画像を表示するものである。 First Embodiment
Embodiment 1 of the present invention will be described with reference to FIGS. 1 to 6. In the present embodiment, a liquid crystal panel 10 (display panel) having a touch panel function (position input function) in addition to the display function is exemplified. In addition, X-axis, Y-axis, and Z-axis are shown in a part of each drawing, and it is drawn so that each axis direction may turn into the direction shown in each drawing. Further, in the vertical direction, the upper side of FIG. 1 is referred to as the front side and the lower side of FIG. The
液晶パネル10は、図1に示すように、ほぼ透明で優れた透光性を有するガラス製の一対の基板11,12と、両基板11,12において互いに対向する板面の間に有される内部空間S1に配されて電界印加に伴って光学特性が変化する物質である液晶分子を含む液晶層13と、シール部材14と、を少なくとも備える。液晶パネル10を構成する一対の基板11,12のうち表側(正面側)がCF基板11(対向基板)とされ、裏側(背面側)がアレイ基板12(配線基板、アクティブマトリクス基板)とされる。CF基板11及びアレイ基板12は、いずれもガラス基板の内面側に各種の膜が積層形成されてなるものとされる。
As shown in FIG. 1, the liquid crystal panel 10 is provided between a pair of substantially transparent and excellent light transmitting glass substrates 11 and 12 and plate surfaces facing each other on both the substrates 11 and 12. It comprises at least a liquid crystal layer 13 containing liquid crystal molecules, which is a substance disposed in the internal space S1 and whose optical characteristics change with application of an electric field, and a seal member 14. Of the pair of substrates 11 and 12 constituting the liquid crystal panel 10, the front side (front side) is the CF substrate 11 (counter substrate), and the back side (back side) is the array substrate 12 (wiring substrate, active matrix substrate) . Each of the CF substrate 11 and the array substrate 12 is formed by laminating various films on the inner surface side of a glass substrate.
CF基板11は、アレイ基板12に対して液晶層13を介して対向する形で配される。シール部材14は、例えば紫外線硬化性樹脂材料などの光硬化性樹脂材料からなる。シール部材14は、方形枠状をなし、アレイ基板12及びCF基板11の間の内部空間S1を取り囲む形で配され、液晶層13をシールする構成となっている。なお、両基板11,12の外面側には、それぞれ図示しない偏光板が貼り付けられている。
The CF substrate 11 is disposed to face the array substrate 12 via the liquid crystal layer 13. The seal member 14 is made of, for example, a photocurable resin material such as an ultraviolet curable resin material. The seal member 14 has a rectangular frame shape, is disposed so as to surround the internal space S1 between the array substrate 12 and the CF substrate 11, and seals the liquid crystal layer 13. In addition, the polarizing plate which is not shown in figure is stuck on the outer surface side of both board | substrates 11 and 12, respectively.
液晶パネル10(ひいてはアレイ基板12及びガラス基板29)は、画像を表示可能な表示領域AAと画像が表示されない非表示領域NAAとに区分される。表示領域AAは、図2の1点鎖線に示すように、方形状をなし、液晶パネル10における中央側部分に配される。非表示領域NAAは、表示領域AAを取り囲む額縁状の外周側部分とされる。アレイ基板12は、図1に示すように、その一部がCF基板11に対して側方に突き出しており、その突き出し部分(非表示領域NAA)には、表示機能やタッチパネル機能に係る各種信号を供給するための部品としてドライバ25及びフレキシブル基板26が実装されている。フレキシブル基板26は、その一端側がアレイ基板12に、他端側が図示しないコントロール基板に、それぞれ接続されている。コントロール基板から供給される各種信号は、フレキシブル基板26を介して液晶パネル10に伝送され、非表示領域NAAにおいてドライバ25による処理を経て表示領域AAへ向けて出力される。
The liquid crystal panel 10 (and consequently the array substrate 12 and the glass substrate 29) is divided into a display area AA capable of displaying an image and a non-display area NAA in which no image is displayed. The display area AA has a rectangular shape as shown by a dot-and-dash line in FIG. 2 and is disposed at the center side portion of the liquid crystal panel 10. The non-display area NAA is a frame-like outer peripheral portion surrounding the display area AA. As shown in FIG. 1, a part of the array substrate 12 protrudes laterally with respect to the CF substrate 11, and various signals related to the display function and the touch panel function are formed on the protruding portion (non-display area NAA). The driver 25 and the flexible substrate 26 are mounted as components for supplying the The flexible substrate 26 is connected at one end to the array substrate 12 and at the other end to a control substrate (not shown). Various signals supplied from the control substrate are transmitted to the liquid crystal panel 10 through the flexible substrate 26 and processed by the driver 25 in the non-display area NAA and output toward the display area AA.
アレイ基板12を構成するガラス基板29の表示領域AAにおける内面側には、図3及び図4に示すように、TFT15及び画素電極16が複数個ずつX軸方向及びY軸方向に沿って並んでマトリクス状(行列状)に設けられている。また、TFT15及び画素電極16の周りには、略格子状をなすゲート配線20及びソース配線22が取り囲むようにして配設されている。ゲート配線20は、X軸方向に沿ってほぼ真っ直ぐに延在しているのに対し、ソース配線22は、概ねY軸方向に沿って延在しており、その一部がY軸方向に対して斜め方向に沿って延在されている。ゲート配線20は、TFT15のゲート電極と接続され、ソース配線22は、TFT15のソース電極と接続されている。また、画素電極16は、TFT15のドレイン電極に接続されている。つまり、ソース配線22(画素配線)は、TFT15を介して画素電極16に接続されている。なお、TFT15を構成する半導体膜の材料としては、アモルファスシリコンやIn-Ga-Zn-O系の半導体(酸化インジウムガリウム亜鉛)などを例示することができるが、これに限定されない。なお、画素電極16に接続される画素配線とは、TFT15を介して画素電極16と接続される画素配線も含むものとする。
On the inner surface side of the display area AA of the glass substrate 29 constituting the array substrate 12, as shown in FIGS. 3 and 4, a plurality of TFTs 15 and pixel electrodes 16 are arranged along the X axis direction and the Y axis direction. It is provided in a matrix form (matrix form). In addition, a gate wiring 20 and a source wiring 22 having a substantially lattice shape are disposed around the TFT 15 and the pixel electrode 16 so as to surround the same. While gate interconnection 20 extends substantially straight along the X-axis direction, source interconnection 22 extends generally along the Y-axis direction, and a portion thereof extends in the Y-axis direction. And extend along an oblique direction. The gate wiring 20 is connected to the gate electrode of the TFT 15, and the source wiring 22 is connected to the source electrode of the TFT 15. Also, the pixel electrode 16 is connected to the drain electrode of the TFT 15. That is, the source wiring 22 (pixel wiring) is connected to the pixel electrode 16 via the TFT 15. In addition, as a material of the semiconductor film forming the TFT 15, although an amorphous silicon or an In-Ga-Zn-O-based semiconductor (indium gallium zinc oxide) or the like can be exemplified, it is not limited thereto. The pixel wiring connected to the pixel electrode 16 also includes the pixel wiring connected to the pixel electrode 16 via the TFT 15.
TFT15は、ゲート配線20及びソース配線22にそれぞれ供給される各種信号に基づいて駆動され、その駆動に伴って画素電極16への電位の供給が制御されるようになっている。画素電極16は、平面形状が縦長の略平行四辺形とされており、X軸方向について隣り合う画素電極16との間にソース配線22が介在され、Y軸方向について隣り合う画素電極16との間にゲート配線20が介在されている。また、CF基板11には、赤色(R),緑色(G),青色(B)を呈する3色のカラーフィルタ(図示せず)が設けられている。液晶パネル10においては、1つの画素電極16と1色のカラーフィルタが対向することで画素部PXが構成されている。つまり、液晶パネル10は、3色のカラーフィルタに対応する3色の画素部PXを備える。
The TFT 15 is driven based on various signals supplied to the gate wiring 20 and the source wiring 22, and the supply of the potential to the pixel electrode 16 is controlled along with the driving. The pixel electrode 16 has a substantially parallelogram whose plan shape is vertically long, and the source wiring 22 is interposed between the pixel electrode 16 adjacent in the X-axis direction and the pixel electrode 16 adjacent in the Y-axis direction. The gate wiring 20 is interposed between them. Further, the CF substrate 11 is provided with three color filters (not shown) exhibiting red (R), green (G) and blue (B). In the liquid crystal panel 10, the pixel portion PX is configured by facing one pixel electrode 16 and one color filter. That is, the liquid crystal panel 10 includes the pixel units PX of three colors corresponding to the color filters of three colors.
ガラス基板29(基板)には、全ての画素電極16と重畳する形で共通電極19が形成されている。共通電極19は、画素電極16よりも上層側(図4の手前側)に配されている。なお、図3から図5では、基本的にはソース配線22が形成される層よりも表側の層に形成された構成部品を2点鎖線で示し、ソース配線22が形成される層よりも裏側の層に形成された構成部品を破線で示している。共通電極19は、共通信号(共通電極19を一定の基準電位にするため信号)が供給されるものであり、表示領域AAのほぼ全域にわたって延在されている。共通電極19において、画素電極16と重畳する部分には、画素重畳開口部17が複数ずつ開口形成されている。画素重畳開口部17は、ソース配線22の斜め延在部21に沿って延在している。
A common electrode 19 is formed on the glass substrate 29 (substrate) so as to overlap all the pixel electrodes 16. The common electrode 19 is disposed on the upper layer side (the front side in FIG. 4) of the pixel electrode 16. Note that, in FIGS. 3 to 5, basically, the component formed in the layer on the front side of the layer in which the source wiring 22 is formed is indicated by a two-dot chain line, and the component on the back side The components formed in the layer of are shown in broken lines. The common electrode 19 is supplied with a common signal (a signal for setting the common electrode 19 to a constant reference potential), and extends over substantially the entire display area AA. In the common electrode 19, a plurality of pixel overlapping openings 17 are formed in a portion overlapping with the pixel electrode 16. The pixel overlapping opening 17 extends along the obliquely extending portion 21 of the source wiring 22.
互いに重畳する画素電極16と共通電極19との間に画素電極16が充電されるのに伴って電位差が生じると、画素重畳開口部17の開口縁と画素電極16との間には、アレイ基板12の板面に沿う成分に加えて、アレイ基板12の板面に対する法線方向の成分を含むフリンジ電界(斜め電界)が生じるので、そのフリンジ電界を利用して液晶層13に含まれる液晶分子の配向状態を制御することができる。つまり、本実施形態に係る液晶パネル10は、動作モードがFFS(Fringe Field Switching)モードとされている。また、図4では、CF基板11の内面側における表示領域AAに形成された遮光部24を2点鎖線で示している。遮光部24は、略格子状をなしており、画素電極16の大部分と重畳する位置に光を透過する画素開口部23を有している。遮光部24は、異なる色を呈する画素部PX間の混色を防ぐ機能を担っている。画素電極16及び共通電極19は、透明電極材料(例えばITO(Indium Tin Oxide)やIZO(Indium Zinc Oxide)など)によって構成されている。
When a potential difference is generated as the pixel electrode 16 is charged between the pixel electrode 16 and the common electrode 19 overlapping each other, an array substrate is formed between the opening edge of the pixel overlapping opening 17 and the pixel electrode 16. Since a fringe electric field (oblique electric field) including a component in the direction normal to the plate surface of the array substrate 12 is generated in addition to the components along the plate surface of 12, the liquid crystal molecules contained in the liquid crystal layer 13 using the fringe electric field It is possible to control the orientation state of. That is, in the liquid crystal panel 10 according to the present embodiment, the operation mode is set to an FFS (Fringe Field Switching) mode. Further, in FIG. 4, the light shielding portion 24 formed in the display area AA on the inner surface side of the CF substrate 11 is indicated by a two-dot chain line. The light shielding portion 24 has a substantially lattice shape, and has a pixel opening 23 for transmitting light at a position overlapping with most of the pixel electrode 16. The light shielding portion 24 has a function of preventing color mixing between the pixel portions PX exhibiting different colors. The pixel electrode 16 and the common electrode 19 are made of a transparent electrode material (for example, ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide)).
本実施形態に係る液晶パネル10は、画像を表示する表示機能と、表示される画像に基づいて使用者が入力する位置(入力位置)を検出するタッチパネル機能(位置入力機能)と、を併有しており、このうちのタッチパネル機能を発揮するためのタッチパネルパターンを一体化(インセル化)している。このタッチパネルパターンは、いわゆる投影型静電容量方式とされており、その検出方式が自己容量方式とされる。タッチパネルパターンは、図2に示すように、ガラス基板29の板面内にマトリクス状(行列状)に並んで配される複数の位置検出電極27から構成されている。位置検出電極27は、表示領域AAに配されている。液晶パネル10の使用者は、液晶パネル10の表面(表示面)に導電体である図示しない指(位置入力体)を近づけると、その指と位置検出電極27との間で静電容量が形成されることになる。これにより、指の近くにある位置検出電極27にて検出される静電容量には指が近づくのに伴って変化が生じ、指から遠くにある位置検出電極27とは静電容量が異なるものとなるので、それに基づいて指による入力位置を検出することが可能となる。そして、上述した共通電極19は、複数の位置検出電極27によって構成されている。
The liquid crystal panel 10 according to the present embodiment has a display function for displaying an image and a touch panel function (position input function) for detecting a position (input position) input by the user based on the displayed image. Of these, the touch panel pattern for exhibiting the touch panel function is integrated (in-cell). The touch panel pattern is a so-called projected capacitive system, and its detection system is a self-capacitive system. As shown in FIG. 2, the touch panel pattern is composed of a plurality of position detection electrodes 27 arranged in a matrix (matrix) on the surface of the glass substrate 29. The position detection electrode 27 is disposed in the display area AA. When the user of the liquid crystal panel 10 brings a finger (position input member) (not shown) as a conductor close to the surface (display surface) of the liquid crystal panel 10, a capacitance is formed between the finger and the position detection electrode 27 It will be done. As a result, the capacitance detected by the position detection electrode 27 near the finger changes as the finger approaches, and the capacitance is different from that of the position detection electrode 27 far from the finger Since it becomes, it becomes possible to detect the input position by a finger based on it. The common electrode 19 described above is configured of a plurality of position detection electrodes 27.
また、図2に示すように、アレイ基板12を構成するガラス基板29において、X軸方向の両端部には、各ゲート配線20が接続されるゲートドライバ28がそれぞれ設けられている。ゲートドライバ28は、Y軸方向に長い形状をなしており、例えば、ガラス基板29上にモノリシックに形成されている。なお、本実施形態では、1本のゲート配線20が、一対のゲートドライバ28,28のうち、いずれかに接続されており、図2の左側のゲートドライバ28に接続されたゲート配線20と、図2の右側のゲートドライバ28に接続されたゲート配線20とが、Y軸方向について交互に並ぶ構成となっている。また、ゲートドライバ28には、複数の配線45が接続されている。各配線45の先端には、端子部46が設けられ、端子部46には、フレキシブル基板26を介して、コントロール基板が接続される。ゲートドライバ28には、各配線45を介して、駆動信号(クロック信号や低電位信号や走査開始信号等)が供給される。なお、図2においては、複数の配線45のうち、ゲートドライバ28に走査開始信号を供給するための配線に符号47を付す。
Further, as shown in FIG. 2, in the glass substrate 29 constituting the array substrate 12, gate drivers 28 to which the gate wirings 20 are connected are respectively provided at both end portions in the X-axis direction. The gate driver 28 has an elongated shape in the Y-axis direction, and is formed monolithically on a glass substrate 29, for example. In the present embodiment, one gate line 20 is connected to one of the pair of gate drivers 28 and 28, and the gate line 20 connected to the gate driver 28 on the left side of FIG. The gate wirings 20 connected to the gate driver 28 on the right side of FIG. 2 are alternately arranged in the Y-axis direction. Further, a plurality of wirings 45 are connected to the gate driver 28. A terminal portion 46 is provided at the tip of each wire 45, and a control substrate is connected to the terminal portion 46 via the flexible substrate 26. Drive signals (a clock signal, a low potential signal, a scan start signal, etc.) are supplied to the gate driver 28 through the respective wires 45. Note that in FIG. 2, among the plurality of wires 45, the wire 47 for supplying a scan start signal to the gate driver 28 is denoted by reference numeral 47.
図2に示すように、ドライバ25(共通信号供給部)は、非表示領域NAAにおいて、表示領域AAを挟む形で配された一対の部分A1,A2のうち一方の部分A1に配されている。ドライバ25は、各ソース配線22へ画像信号を供給する機能、各第1配線35(後述)を介して各位置検出電極27へ位置検出信号(タッチ信号)を供給する機能、及び各位置検出電極27へ共通信号(コモン信号)を供給する機能を有する。また、非表示領域NAAにおける一方の部分A1には、X軸方向に沿って延びる第1幹配線31が配されている。第1幹配線31の両端部は、ドライバ25に接続されており、ドライバ25から第1幹配線31に共通信号が供給される構成となっている。
As shown in FIG. 2, in the non-display area NAA, the driver 25 (common signal supply unit) is disposed in one of the parts A1 and A2 disposed in a form sandwiching the display area AA. . The driver 25 has a function of supplying an image signal to each source wiring 22, a function of supplying a position detection signal (touch signal) to each position detection electrode 27 through each first wiring 35 (described later), and each position detection electrode 27 has a function of supplying a common signal (common signal). Further, in one portion A1 in the non-display area NAA, a first trunk wiring 31 extending along the X-axis direction is disposed. Both ends of the first main wiring 31 are connected to the driver 25, and the driver 25 supplies the common signal to the first main wiring 31.
非表示領域NAAにおける他方の部分A2には、X軸方向に沿って延びる第2幹配線32が配されている。また、ガラス基板29上には、表示領域AAを通過する形でドライバ25と第2幹配線32とを接続する第1配線35(タッチセンサ線)が配されている。第1配線35は、複数の位置検出電極27の各々に対応して複数本設けられている。第1配線35は、位置検出電極27に対して、延設方向(Y軸方向)の中間部において、コンタクトホールC1を介して、位置検出電極27に接続されている。なお、以下の説明では、第1配線35のうち、ドライバ25から位置検出電極27までの部分を第1延設部36と呼び、第2幹配線32から位置検出電極27までの部分を第2延設部37と呼ぶ。なお、図2では、第1延設部36は、第2延設部37に対して、太い線で図示している。また、第2幹配線32と、第2延設部37における第2幹配線32側の端部(第1配線における第2幹配線側の端部)とは、TFT38(スイッチング素子)を介して接続されている。なお、ここで言う第1配線35の延設方向における中間部とは、第1配線35における両端部の間の部分のことである。
In the other portion A2 of the non-display area NAA, a second trunk wiring 32 extending along the X-axis direction is disposed. Further, on the glass substrate 29, a first wiring 35 (touch sensor line) for connecting the driver 25 and the second trunk wiring 32 in a manner of passing through the display area AA is disposed. A plurality of first wires 35 are provided corresponding to each of the plurality of position detection electrodes 27. The first wiring 35 is connected to the position detection electrode 27 via the contact hole C1 at an intermediate portion in the extending direction (Y-axis direction) with respect to the position detection electrode 27. In the following description, the portion from the driver 25 to the position detection electrode 27 in the first wiring 35 is referred to as a first extension portion 36, and the portion from the second trunk wiring 32 to the position detection electrode 27 is a second It is called the extending portion 37. In FIG. 2, the first extending portion 36 is illustrated as a thick line with respect to the second extending portion 37. Further, the second main wiring 32 and the end of the second extended portion 37 on the second main wiring 32 side (the end of the first wiring on the second main wiring side) are connected via the TFT 38 (switching element). It is connected. Here, the middle portion in the extending direction of the first wiring 35 referred to here is a portion between both end portions of the first wiring 35.
図2及び図5に示すように、各TFT38のゲート電極には、TFT38を一括してスイッチングするための配線39が接続されている。配線39は、X軸方向に延びており、配線39の両端部には、非表示領域NAAにおける一方の部分A1まで引き出された引き出し線41がそれぞれ接続されている。引き出し線41は、ガラス基板29上においてゲートドライバ28の外側を通過し、その先端には端子部40が設けられている。この端子部40には、フレキシブル基板26を介して、コントロール基板が接続される。配線39には、例えば、データ書き込み期間(表示用の信号を各画素部PXに書き込む期間)では、TFT38をオンにする信号が供給され、センシング期間では、TFT38をオフにする信号が供給される。また、図5に示すように、第2幹配線32と配線39において、ソース配線22と重畳する部分には、開口部33,34がそれぞれ形成されている。これにより、第2幹配線32(又は配線39)とソース配線22との間に生じ得る寄生容量が軽減される。
As shown in FIGS. 2 and 5, a wire 39 for switching the TFTs 38 collectively is connected to the gate electrode of each TFT 38. As shown in FIG. The wires 39 extend in the X-axis direction, and the lead wires 41 drawn to one portion A1 in the non-display area NAA are connected to both ends of the wires 39, respectively. The lead wire 41 passes outside the gate driver 28 on the glass substrate 29, and a terminal portion 40 is provided at the tip thereof. A control substrate is connected to the terminal portion 40 via the flexible substrate 26. For example, a signal for turning on the TFT 38 is supplied to the wiring 39 in a data writing period (a period for writing a signal for display to each pixel portion PX), and a signal for turning off the TFT 38 is supplied in a sensing period. . Further, as shown in FIG. 5, openings 33 and 34 are respectively formed in portions of the second main wiring 32 and the wiring 39 overlapping the source wiring 22. Thereby, parasitic capacitance that may occur between the second main wiring 32 (or the wiring 39) and the source wiring 22 is reduced.
また、図2に示すように、ガラス基板29上には、表示領域AAを通過する形で第1幹配線31と第2幹配線32とを接続する第2配線42(コモン線)が配されている。本実施形態では、位置検出電極27の総数は、画素電極16の総数よりも少ないものとされる。具体的には、X軸方向(複数のソース配線22の配列方向)及びY軸方向の両方向において、位置検出電極27の配列数は、画素電極16(画素部PX)の配列数よりも少ないものとなっている。つまり、第1配線35の本数は、ソース配線22の本数よりも少ないものとされる。本実施形態では、図3に示すように、第1配線35及び第2配線42は、ソース配線22と同じ層に配されている。ソース配線22と画素電極16との間には、第1配線35又は第2配線42が配置されるスペースS2が設けられている。このスペースS2は、X軸方向に並ぶ3つの画素部PX毎に設けられている。第1配線35及び第2配線42は、それぞれ異なるソース配線22に隣接する形で延びており、X軸方向においては、2本の第2配線42毎に1本の第1配線35が配されている。
Further, as shown in FIG. 2, on the glass substrate 29, a second wiring 42 (common line) for connecting the first main wiring 31 and the second main wiring 32 so as to pass through the display area AA is arranged. ing. In the present embodiment, the total number of position detection electrodes 27 is smaller than the total number of pixel electrodes 16. Specifically, the number of arrangement of position detection electrodes 27 is smaller than the number of arrangement of pixel electrodes 16 (pixel portion PX) in both the X-axis direction (arrangement direction of the plurality of source wirings 22) and the Y-axis direction. It has become. That is, the number of first wires 35 is smaller than the number of source wires 22. In the present embodiment, as shown in FIG. 3, the first wiring 35 and the second wiring 42 are disposed in the same layer as the source wiring 22. A space S2 is provided between the source line 22 and the pixel electrode 16 in which the first line 35 or the second line 42 is disposed. The space S2 is provided for each of the three pixel units PX aligned in the X-axis direction. The first wiring 35 and the second wiring 42 extend in such a manner as to be adjacent to different source wirings 22 respectively, and one first wiring 35 is arranged for every two second wirings 42 in the X-axis direction. ing.
なお、上記の通り、位置検出電極27の配列数は、画素電極16(画素部PX)の配列数よりも少ないため、画素部PXの大きさより、位置検出電極27の大きさは大きい。例えば、画素部PXのX軸方向の幅及びY軸方向の幅は、それぞれ数十μm~百数十μmであるのに対して、位置検出電極27は、一辺の寸法が数mm(例えば約2mm~5mm)程度の略方形状である。また、位置検出電極27(共通電極19)は、図3に示すように、第1配線35の少なくとも一部と重畳する開口部18を有しており、この開口部18によって第1配線35と、その第1配線35とは非接続とされる位置検出電極27との間に生じ得る寄生容量が軽減される。これにより、入力位置を検出する際の検出感度が良好なものとなる。また、開口部18は、第2配線42の少なくとも一部と重畳する形でも設けられている。なお、図6に示すように、本実施形態では、ガラス基板29上にゲート絶縁膜43を介して、第1配線35(図6では図示せず)、第2配線42及びソース配線22が形成され、さらにその上層には層間絶縁膜44を介して、位置検出電極27が形成されている。なお、ソース配線22、第1配線35、第2配線42としては、例えばAl,Mo,Ti,W,Cu等の金属材料を用いることができるが、これに限定されない。
As described above, since the number of arrangement of the position detection electrodes 27 is smaller than the number of arrangement of the pixel electrodes 16 (pixel units PX), the size of the position detection electrodes 27 is larger than the size of the pixel unit PX. For example, while the width in the X-axis direction and the width in the Y-axis direction of the pixel portion PX are several tens μm to one hundred and several tens μm, respectively, the position detection electrode 27 has a side dimension of several mm (for example, about 2 mm to 5 mm). Further, as shown in FIG. 3, the position detection electrode 27 (common electrode 19) has an opening 18 overlapping at least a part of the first wiring 35, and the opening 18 makes the first wiring 35 The parasitic capacitance that may occur between the first wiring 35 and the position detection electrode 27 that is not connected is reduced. Thereby, the detection sensitivity at the time of detecting the input position is improved. Further, the opening 18 is also provided so as to overlap at least a part of the second wiring 42. As shown in FIG. 6, in the present embodiment, the first wiring 35 (not shown in FIG. 6), the second wiring 42, and the source wiring 22 are formed on the glass substrate 29 via the gate insulating film 43. Further, the position detection electrode 27 is formed on the upper layer thereof via the interlayer insulating film 44. Although metal materials, such as Al, Mo, Ti, W, and Cu, can be used as the source wiring 22, the first wiring 35, and the second wiring 42, for example, the invention is not limited thereto.
次に本実施形態の効果について説明する。本実施形態において、ドライバ25から供給された共通信号は、第1配線35におけるドライバ25側の端部から、第1延設部36を通じて位置検出電極27に伝送される。また、ドライバ25から第1幹配線31に供給された共通信号は、各第2配線42を通じて、第2幹配線32に伝送され、第1配線35における第2幹配線32側の端部から、第2延設部37を通じて位置検出電極27に伝送される。なお、共通信号を位置検出電極27に供給する際(データ書き込み期間)には、TFT38はオンになっている。上記のように1つの位置検出電極27に対して、第1配線35の両端部(表示領域AAを挟む両側)から、それぞれ共通信号を供給することで、ドライバ25側からのみ共通信号を供給する構成と比べて、ドライバ25と位置検出電極27の距離に起因して各位置検出電極27の電位にバラツキが生じる事態を抑制でき、表示品位をより高くすることができる。
Next, the effects of this embodiment will be described. In the present embodiment, the common signal supplied from the driver 25 is transmitted from the end of the first wiring 35 on the driver 25 side to the position detection electrode 27 through the first extending portion 36. In addition, the common signal supplied from the driver 25 to the first trunk wiring 31 is transmitted to the second trunk wiring 32 through each second wiring 42, and from the end of the first wiring 35 on the second trunk wiring 32 side, The signal is transmitted to the position detection electrode 27 through the second extending portion 37. When the common signal is supplied to the position detection electrode 27 (data write period), the TFT 38 is on. As described above, the common signal is supplied to one position detection electrode 27 from both end portions (both sides sandwiching the display area AA) of the first wiring 35 so that the common signal is supplied only from the driver 25 side. Compared to the configuration, it is possible to suppress the occurrence of variations in the potentials of the position detection electrodes 27 due to the distance between the driver 25 and the position detection electrodes 27, and to improve the display quality.
また、TFT38をオフにすることで、第2幹配線32から位置検出電極27に対する共通信号の供給を停止させることができる。これにより、位置検出電極27を駆動させる際(センシング期間)には、共通信号の供給を停止させることで、位置入力体による入力位置の検出精度をより高くすることができる。
Further, by turning off the TFT 38, the supply of the common signal from the second main wiring 32 to the position detection electrode 27 can be stopped. Thereby, when driving the position detection electrode 27 (sensing period), the detection accuracy of the input position by the position input body can be further enhanced by stopping the supply of the common signal.
また、ソース配線22、第1配線35、第2配線42は、同じ層に配されている。このため、ソース配線22、第1配線35、第2配線42を同じ工程で成形することができる。また、位置検出電極27の配列数(第1配線35の本数)は、画素電極16の配列数(ソース配線の本数)よりも少ないものとされる。このため、第1配線35が隣接されていないソース配線22(言い換えると第1配線35が配されていない余剰のスペースS2)が生じる。そこで、第2配線42を、第1配線35が隣接されていないソース配線22と隣接する形で配する(余剰のスペースS2に配置する)構成とすれば、X軸方向(配列方向)において、アレイ基板12の幅が大きくなる事態を抑制することができる。また、仮に第2配線42を非表示領域NAAに配した場合には、額縁が大きくなってしまう。本実施形態では、第2配線42を表示領域AAに配しているため、狭額縁化を図ることが可能となる。
The source wiring 22, the first wiring 35, and the second wiring 42 are disposed in the same layer. Therefore, the source wiring 22, the first wiring 35, and the second wiring 42 can be formed in the same process. In addition, the number of arrangement of the position detection electrodes 27 (the number of first wirings 35) is smaller than the number of arrangement of the pixel electrodes 16 (the number of source wirings). For this reason, the source wiring 22 in which the first wiring 35 is not adjacent (in other words, an extra space S2 in which the first wiring 35 is not disposed) is generated. Therefore, if the second wiring 42 is arranged adjacent to the source wiring 22 not adjacent to the first wiring 35 (arranged in the surplus space S2), in the X axis direction (arrangement direction), A situation in which the width of the array substrate 12 is increased can be suppressed. Further, if the second wiring 42 is disposed in the non-display area NAA, the frame becomes large. In the present embodiment, since the second wiring 42 is disposed in the display area AA, the frame can be narrowed.
<実施形態2>
本発明の実施形態2を図7から図8によって説明する。上記実施形態と同一部分には、同一符号を付して重複する説明を省略する。本実施形態のアレイ基板112では、図7及び図8に示すように、第2幹配線32と各第1配線35とが、TFT138又はTFT141を介して接続されている。各TFT138のゲート電極には、X軸方向に延びる配線139が接続され、各TFT141のゲート電極には、X軸方向に延びる配線140が接続されている。そして、配線139は、図7における右側のゲートドライバ28に走査開始信号を供給するための配線47と接続されている。また、配線140は、図7における左側のゲートドライバ28に走査開始信号を供給するための配線47と接続されている。つまり、TFT138は、右側のゲートドライバ28と電気的に接続されており、TFT141は、左側のゲートドライバ28と電気的に接続されている。 Second Embodiment
Embodiment 2 of the present invention will be described with reference to FIGS. 7 to 8. The same parts as those of the above-described embodiment are denoted by the same reference numerals, and redundant description will be omitted. In the array substrate 112 of the present embodiment, as shown in FIGS. 7 and 8, the second main wiring 32 and each first wiring 35 are connected via the TFT 138 or the TFT 141. A wire 139 extending in the X-axis direction is connected to the gate electrode of each TFT 138, and a wire 140 extending in the X-axis direction is connected to the gate electrode of each TFT 141. The wire 139 is connected to a wire 47 for supplying a scan start signal to the gate driver 28 on the right side in FIG. Further, the wiring 140 is connected to a wiring 47 for supplying a scan start signal to the gate driver 28 on the left side in FIG. 7. That is, the TFT 138 is electrically connected to the gate driver 28 on the right side, and the TFT 141 is electrically connected to the gate driver 28 on the left side.
本発明の実施形態2を図7から図8によって説明する。上記実施形態と同一部分には、同一符号を付して重複する説明を省略する。本実施形態のアレイ基板112では、図7及び図8に示すように、第2幹配線32と各第1配線35とが、TFT138又はTFT141を介して接続されている。各TFT138のゲート電極には、X軸方向に延びる配線139が接続され、各TFT141のゲート電極には、X軸方向に延びる配線140が接続されている。そして、配線139は、図7における右側のゲートドライバ28に走査開始信号を供給するための配線47と接続されている。また、配線140は、図7における左側のゲートドライバ28に走査開始信号を供給するための配線47と接続されている。つまり、TFT138は、右側のゲートドライバ28と電気的に接続されており、TFT141は、左側のゲートドライバ28と電気的に接続されている。 Second Embodiment
配線47と電気的に接続されている各TFT138及び各TFT141は、配線47(ひいてはゲートドライバ28)に対して走査開始信号が入力された際にオン状態となる構成となっている。このように、走査開始信号を用いて、TFT138又はTFT141をオンさせる構成とすれば、TFT138及びTFT141をスイッチングするための専用の配線(実施形態1の引き出し線41、図2参照)を廃止することができるので、X軸方向において額縁領域をより小さくすることができる。なお、本実施形態では、左右一対のゲートドライバ28を備えることから、TFT及び配線を2組設ける構成を例示したが、これに限定されない。TFT及び配線を1組又は3組以上備えていてもよい。また、ゲートドライバ28に供給される他の信号(例えば、クロック信号等)を用いて、TFT138,141をオンさせる構成としてもよい。また、ゲートドライバ28のシフトレジスタにおける特定のノードをリセットするための信号を用いて、TFT138,141をオンさせる構成としてもよい。また、ゲートドライバ28がダミーのシフトレジスタ段(ゲート配線20に接続されないシフトレジスタ段)を有していてもよく、そのシフトレジスタ段からの出力信号を用いて、TFT138,141をオンさせる構成としてもよい。
The TFTs 138 and the TFTs 141 electrically connected to the wiring 47 are configured to be turned on when a scanning start signal is input to the wiring 47 (as a result, the gate driver 28). As described above, when the TFT 138 or the TFT 141 is configured to be turned on by using the scan start signal, the dedicated wiring for switching the TFT 138 and the TFT 141 (lead wire 41 of Embodiment 1; see FIG. 2) is eliminated. Therefore, the frame area can be made smaller in the X-axis direction. In the present embodiment, since the pair of the TFT and the wiring is provided because the pair of left and right gate drivers 28 is provided, the present invention is not limited to this. One set or three or more sets of TFTs and wirings may be provided. In addition, the TFTs 138 and 141 may be turned on using another signal (for example, a clock signal or the like) supplied to the gate driver 28. The TFTs 138 and 141 may be turned on using a signal for resetting a specific node in the shift register of the gate driver 28. In addition, the gate driver 28 may have a dummy shift register stage (shift register stage not connected to the gate wiring 20), and the output signal from the shift register stage is used to turn on the TFTs 138 and 141. It is also good.
<実施形態3>
本発明の実施形態3を図9によって説明する。上記実施形態と同一部分には、同一符号を付して重複する説明を省略する。本実施形態のアレイ基板212においては、図9に示すように、ガラス基板29上に、ソース配線22などを検査するための検査回路部213が設けられている。各ソース配線22は、検査回路部213に対して電気的に接続されている。検査回路部213は、TFTと同じ半導体膜をベースとしてアレイ基板212上にモノリシックに形成されている。検査回路部213は、X軸方向に長い形状をなし、その両端部には、検査用の端子部214を有する配線215が接続されている。なお、本実施形態では、検査回路部213は、ドライバ25の実装領域に形成されているが、その配置箇所は適宜変更可能であり、例えば、検査回路部213をドライバ25と表示領域AAの間に配置してもよい。 Embodiment 3
Embodiment 3 of the present invention will be described with reference to FIG. The same parts as those of the above-described embodiment are denoted by the same reference numerals, and redundant description will be omitted. In thearray substrate 212 of the present embodiment, as shown in FIG. 9, an inspection circuit portion 213 for inspecting the source wiring 22 and the like is provided on the glass substrate 29. Each source wire 22 is electrically connected to the test circuit unit 213. The inspection circuit portion 213 is monolithically formed on the array substrate 212 based on the same semiconductor film as the TFT. The inspection circuit portion 213 has a long shape in the X-axis direction, and a wiring 215 having a terminal portion 214 for inspection is connected to both ends thereof. In the present embodiment, the inspection circuit unit 213 is formed in the mounting area of the driver 25, but the arrangement location can be changed as appropriate. For example, the inspection circuit unit 213 is between the driver 25 and the display area AA. It may be located at
本発明の実施形態3を図9によって説明する。上記実施形態と同一部分には、同一符号を付して重複する説明を省略する。本実施形態のアレイ基板212においては、図9に示すように、ガラス基板29上に、ソース配線22などを検査するための検査回路部213が設けられている。各ソース配線22は、検査回路部213に対して電気的に接続されている。検査回路部213は、TFTと同じ半導体膜をベースとしてアレイ基板212上にモノリシックに形成されている。検査回路部213は、X軸方向に長い形状をなし、その両端部には、検査用の端子部214を有する配線215が接続されている。なお、本実施形態では、検査回路部213は、ドライバ25の実装領域に形成されているが、その配置箇所は適宜変更可能であり、例えば、検査回路部213をドライバ25と表示領域AAの間に配置してもよい。 Embodiment 3
Embodiment 3 of the present invention will be described with reference to FIG. The same parts as those of the above-described embodiment are denoted by the same reference numerals, and redundant description will be omitted. In the
また、本実施形態では、第1幹配線31及び第2幹配線32の双方に接続される第3配線233を備える。第3配線233は、Y軸方向に沿って延び、ゲートドライバ28と位置検出電極27の間に配されている。第3配線233は、一方の部分A1に配される端子部234を有する。端子部234には、フレキシブル基板26が接続され、フレキシブル基板26を介して、外部の信号供給源(例えば、フレキシブル基板26に実装されたドライバなど)から共通信号が入力される。つまり、本実施形態では、端子部234及びドライバ25が、位置検出電極27に対して共通信号を供給することが可能な共通信号供給部を構成している。また、本実施形態では、第2幹配線32に外部の信号供給源から共通信号を供給することが可能な端子部236及び配線235を備える。配線235は、Y軸方向に沿って延び、例えば、ゲートドライバ28に走査開始信号を供給するための配線47の外側に配されている。なお、配線235や第3配線233を非表示領域NAAに配することで、額縁は大きくなってしまうものの、第2配線42を備えることで、共通信号の鈍りを低減することができるため、配線235や第3配線233の線幅は比較的小さくすることができる。
Further, in the present embodiment, the third wiring 233 connected to both the first main wiring 31 and the second main wiring 32 is provided. The third wiring 233 extends along the Y-axis direction, and is disposed between the gate driver 28 and the position detection electrode 27. The third wire 233 has a terminal portion 234 disposed in one portion A1. The flexible substrate 26 is connected to the terminal portion 234, and a common signal is input from an external signal supply source (for example, a driver mounted on the flexible substrate 26) via the flexible substrate 26. That is, in the present embodiment, the terminal unit 234 and the driver 25 constitute a common signal supply unit capable of supplying a common signal to the position detection electrode 27. Further, in the present embodiment, the second main wiring 32 is provided with the terminal portion 236 and the wiring 235 capable of supplying a common signal from an external signal supply source. The wiring 235 extends along the Y-axis direction, and is disposed, for example, outside the wiring 47 for supplying a scan start signal to the gate driver 28. Although the frame becomes large by arranging the wiring 235 and the third wiring 233 in the non-display area NAA, the dullness of the common signal can be reduced by providing the second wiring 42, so that the wiring can be reduced. The line width of the H.235 and the third wiring 233 can be made relatively small.
本実施形態では、ガラス基板29上に設けられた各端子部に検査用の信号を入力することで、各配線(第1幹配線31、第2幹配線32、第1配線35)の断線を検査することができる。次に、この検査手順について説明する。まず、液晶パネル10の背面に光源(バックライト)と偏光板を配置し、表側(観察者)側にも偏光板を配置する。この状態で、ゲートドライバ28を駆動して、表示領域の各画素部PXのTFT15がオン状態になる信号をゲート配線20に供給する。具体的には、例えば、各端子部46に、TFT15がオン状態になる信号(例えば15Vの定電位)を供給する。また、検査用の端子部214から検査回路部213を経由して、ソース配線22に信号(例えば5Vの定電位)を入力する。
In the present embodiment, disconnection of each wiring (the first trunk wiring 31, the second trunk wiring 32, the first wiring 35) is performed by inputting a signal for inspection to each terminal portion provided on the glass substrate 29. It can be inspected. Next, this inspection procedure will be described. First, the light source (backlight) and the polarizing plate are disposed on the back of the liquid crystal panel 10, and the polarizing plate is disposed on the front side (observer) side. In this state, the gate driver 28 is driven to supply, to the gate wiring 20, a signal that turns on the TFT 15 of each pixel section PX in the display area. Specifically, for example, a signal (for example, a constant potential of 15 V) for turning on the TFT 15 is supplied to each of the terminal portions 46. Further, a signal (for example, a constant potential of 5 V) is input to the source wiring 22 from the inspection terminal unit 214 via the inspection circuit unit 213.
さらに、配線139,140と接続された各端子部46には、TFT138,141が一定期間オン状態になるような信号を供給する。そして、端子部234又は端子部236の少なくともいずれか一方に検査用の信号(例えば0~5V)を入力する。このようにすれば、仮に、第1配線35に断線が有る場合、その第1配線35に接続される位置検出電極27に係る画素部PXの表示(階調変化)が他の画素部PXと異なる表示となる。この結果、観察者がその表示の異常を目視で確認することで、第1配線35の断線を検出することができる。また、ゲート配線20やソース配線22の断線についても、観察者がその表示の異常を目視で確認することによって、検出することができる。
Further, to each terminal portion 46 connected to the wires 139 and 140, a signal is supplied such that the TFTs 138 and 141 are in an on state for a certain period. Then, a test signal (for example, 0 to 5 V) is input to at least one of the terminal portion 234 and the terminal portion 236. In this way, if there is a break in the first wiring 35, the display (gradation change) of the pixel portion PX related to the position detection electrode 27 connected to the first wiring 35 is different from that of the other pixel portions PX. It will be a different display. As a result, the disconnection of the first wiring 35 can be detected by the observer visually confirming the display abnormality. Further, disconnection of the gate wiring 20 and the source wiring 22 can also be detected by the observer visually checking the display abnormality.
<他の実施形態>
本発明は上記記述及び図面によって説明した実施形態に限定されるものではなく、例えば次のような実施形態も本発明の技術的範囲に含まれる。
(1)上記各実施形態では、表示パネルとして液晶パネルを例示したが、他の種類の表示パネルについても、本技術を適用することができる。
(2)上記した各実施形態では、タッチパネルパターンが自己容量方式とされる場合を示したが、タッチパネルパターンが相互容量方式であっても構わない。
(3)画素電極、ゲート配線、ソース配線、TFTなどの具体的な平面形状は、上記実施形態で例示したものに限定されず、適宜変更可能である。
(4)上記実施形態では、ゲートドライバ28がガラス基板29上にモノリシックに形成されている構成を例示したが、ゲートドライバ28がドライバチップの形態で構成され、ガラス基板29上に実装されていてもよい。
(5)共通電極19に形成された画素重畳開口部17の形状は、適宜変更可能であり、例えば、V字状をなしていてもよい。また、各画素電極16と重畳する画素重畳開口部17は、複数でなくてもよく、少なくとも1つあればよい。
(6)第1配線35、第2配線42、ソース配線22は同じ層に配されているが、必ずしも同じ材料で形成されていなくてもよい。例えば、第1配線35を、ソース配線22を形成する材料と画素電極16を形成する材料とを積層して形成してもよい。
(7)上記実施形態1では、共通信号がドライバ25から供給される構成を例示し、上記実施形態3では、共通信号がドライバ25及び端子部(端子部234又は端子部236)から供給される構成を例示したが、これに限定されない。例えば、共通信号が端子部のみから供給されてもよい。つまり、共通信号供給部が端子部のみによって構成されていてもよい。また、端子部234から第1幹配線31のみに共通信号が供給される構成であってもよい。また、ドライバ25の個数は適宜変更可能である。
(8)上記実施形態において、ソース配線22へ画像信号を供給する機能を有するドライバと、位置検出電極27へタッチ信号(位置検出信号)を供給する機能を有するドライバが個別に設けられていてもよい。 Other Embodiments
The present invention is not limited to the embodiments described above with reference to the drawings. For example, the following embodiments are also included in the technical scope of the present invention.
(1) In the above embodiments, the liquid crystal panel is illustrated as the display panel. However, the present technology can be applied to other types of display panels.
(2) In the above-described embodiments, the touch panel pattern is a self-capacitance system. However, the touch panel patterns may be a mutual capacitance system.
(3) The specific planar shapes of the pixel electrode, the gate wiring, the source wiring, the TFT and the like are not limited to those exemplified in the above embodiment, and can be appropriately changed.
(4) In the above embodiment, thegate driver 28 is formed monolithically on the glass substrate 29. However, the gate driver 28 is configured in the form of a driver chip and mounted on the glass substrate 29. It is also good.
(5) The shape of the pixel overlap opening 17 formed in thecommon electrode 19 can be changed as appropriate, and may be V-shaped, for example. In addition, the number of pixel overlapping openings 17 overlapping with each pixel electrode 16 may not be plural, and may be at least one.
(6) Although thefirst wiring 35, the second wiring 42, and the source wiring 22 are arranged in the same layer, they may not necessarily be formed of the same material. For example, the first wiring 35 may be formed by laminating the material forming the source wiring 22 and the material forming the pixel electrode 16.
(7) In the first embodiment, the common signal is supplied from thedriver 25. In the third embodiment, the common signal is supplied from the driver 25 and the terminal portion (the terminal portion 234 or the terminal portion 236). Although the configuration is illustrated, it is not limited thereto. For example, the common signal may be supplied only from the terminal unit. That is, the common signal supply unit may be configured only by the terminal unit. Further, the common signal may be supplied from the terminal portion 234 only to the first main wiring 31. Further, the number of drivers 25 can be changed as appropriate.
(8) In the above embodiment, even if a driver having a function of supplying an image signal to thesource wiring 22 and a driver having a function of supplying a touch signal (position detection signal) to the position detection electrode 27 are separately provided. Good.
本発明は上記記述及び図面によって説明した実施形態に限定されるものではなく、例えば次のような実施形態も本発明の技術的範囲に含まれる。
(1)上記各実施形態では、表示パネルとして液晶パネルを例示したが、他の種類の表示パネルについても、本技術を適用することができる。
(2)上記した各実施形態では、タッチパネルパターンが自己容量方式とされる場合を示したが、タッチパネルパターンが相互容量方式であっても構わない。
(3)画素電極、ゲート配線、ソース配線、TFTなどの具体的な平面形状は、上記実施形態で例示したものに限定されず、適宜変更可能である。
(4)上記実施形態では、ゲートドライバ28がガラス基板29上にモノリシックに形成されている構成を例示したが、ゲートドライバ28がドライバチップの形態で構成され、ガラス基板29上に実装されていてもよい。
(5)共通電極19に形成された画素重畳開口部17の形状は、適宜変更可能であり、例えば、V字状をなしていてもよい。また、各画素電極16と重畳する画素重畳開口部17は、複数でなくてもよく、少なくとも1つあればよい。
(6)第1配線35、第2配線42、ソース配線22は同じ層に配されているが、必ずしも同じ材料で形成されていなくてもよい。例えば、第1配線35を、ソース配線22を形成する材料と画素電極16を形成する材料とを積層して形成してもよい。
(7)上記実施形態1では、共通信号がドライバ25から供給される構成を例示し、上記実施形態3では、共通信号がドライバ25及び端子部(端子部234又は端子部236)から供給される構成を例示したが、これに限定されない。例えば、共通信号が端子部のみから供給されてもよい。つまり、共通信号供給部が端子部のみによって構成されていてもよい。また、端子部234から第1幹配線31のみに共通信号が供給される構成であってもよい。また、ドライバ25の個数は適宜変更可能である。
(8)上記実施形態において、ソース配線22へ画像信号を供給する機能を有するドライバと、位置検出電極27へタッチ信号(位置検出信号)を供給する機能を有するドライバが個別に設けられていてもよい。 Other Embodiments
The present invention is not limited to the embodiments described above with reference to the drawings. For example, the following embodiments are also included in the technical scope of the present invention.
(1) In the above embodiments, the liquid crystal panel is illustrated as the display panel. However, the present technology can be applied to other types of display panels.
(2) In the above-described embodiments, the touch panel pattern is a self-capacitance system. However, the touch panel patterns may be a mutual capacitance system.
(3) The specific planar shapes of the pixel electrode, the gate wiring, the source wiring, the TFT and the like are not limited to those exemplified in the above embodiment, and can be appropriately changed.
(4) In the above embodiment, the
(5) The shape of the pixel overlap opening 17 formed in the
(6) Although the
(7) In the first embodiment, the common signal is supplied from the
(8) In the above embodiment, even if a driver having a function of supplying an image signal to the
10…液晶パネル(表示パネル)、16…画素電極、19…共通電極、20…ゲート配線、22…ソース配線、25…ドライバ(共通信号供給部)、27…位置検出電極、28…ゲートドライバ、29…ガラス基板(基板)、31…第1幹配線、32…第2幹配線、35…第1配線、38…TFT(スイッチング素子)、42…第2配線、234…一方の部分に配される端子部(共通信号供給部)、233…第3配線、AA…表示領域、NAA…非表示領域、A1…一対の部分のうち一方の部分、A2…一対の部分のうち他方の部分
DESCRIPTION OF SYMBOLS 10 liquid crystal panel (display panel) 16 pixel electrode 19 common electrode 20 gate wiring 22 source wiring 25 driver (common signal supply part) 27 position detection electrode 28 gate driver 29: glass substrate (substrate), 31: first trunk wiring, 32: second trunk wiring, 35: first wiring, 38: TFT (switching element), 42: second wiring, 234: arranged in one part Terminal portion (common signal supply portion), 233 ... third wiring, AA ... display area, NAA ... non-display area, A1 ... one of a pair of parts, A2 ... the other of a pair of parts
Claims (7)
- 画像を表示可能な表示領域と前記表示領域を取り囲む非表示領域とに区分される基板と、
前記表示領域に配される複数の画素電極と、
前記表示領域において行列状に配され、位置入力体による入力位置を検出する複数の位置検出電極であって、前記複数の画素電極に対して重畳する形で配される共通電極を構成する複数の位置検出電極と、
前記非表示領域において、前記表示領域を挟む形で配された一対の部分のうち一方の部分に配され、前記位置検出電極に対して共通信号を供給することが可能な共通信号供給部と、
前記一方の部分に配されると共に前記共通信号供給部から共通信号が供給される第1幹配線と、
前記一対の部分のうち他方の部分に配される第2幹配線と、
前記表示領域を通過する形で配され、前記共通信号供給部と前記第2幹配線とを接続し、延設方向の中間部において前記位置検出電極に接続される第1配線と、
前記表示領域を通過する形で配されると共に前記第1配線と同じ層に配され、前記第1幹配線と前記第2幹配線とを接続する複数の第2配線と、を備える表示パネル。 A substrate divided into a display area capable of displaying an image and a non-display area surrounding the display area;
A plurality of pixel electrodes disposed in the display area;
A plurality of position detection electrodes which are arranged in a matrix in the display area and detect an input position by a position input body, and which constitute a plurality of common electrodes arranged to overlap with the plurality of pixel electrodes Position detection electrode,
A common signal supply unit which is disposed in one of a pair of portions disposed so as to sandwich the display area in the non-display area, and which can supply a common signal to the position detection electrode;
A first main wire disposed in the one portion and supplied with a common signal from the common signal supply unit;
A second trunk wire disposed in the other of the pair of parts;
A first wiring which is disposed to pass through the display area, connects the common signal supply unit and the second main wiring, and is connected to the position detection electrode at an intermediate portion in the extending direction;
A display panel comprising: a plurality of second wirings disposed so as to pass through the display area and disposed in the same layer as the first wiring and connecting the first trunk wiring and the second trunk wiring. - 前記共通信号供給部は、複数の前記第1配線の各々を介して前記複数の位置検出電極の各々に共通信号を供給する機能、及び複数の前記第1配線の各々を介して前記複数の位置検出電極の各々に位置検出信号を供給する機能を有する請求項1に記載の表示パネル。 The common signal supply unit has a function of supplying a common signal to each of the plurality of position detection electrodes through each of the plurality of first wirings, and the plurality of positions through each of the plurality of first wirings. The display panel according to claim 1, having a function of supplying a position detection signal to each of the detection electrodes.
- 前記第2幹配線と、前記第1配線における前記第2幹配線側の端部とは、スイッチング素子を介して接続されている請求項1又は2に記載の表示パネル。 The display panel according to claim 1, wherein the second main wiring and an end of the first wiring on the second main wiring side are connected via a switching element.
- 前記表示領域に配され、前記画素電極と接続されるゲート配線と、
前記非表示領域に配され、前記ゲート配線と電気的に接続されるゲートドライバと、を備え、
前記スイッチング素子は、前記ゲートドライバと電気的に接続されている請求項3に記載の表示パネル。 A gate line disposed in the display area and connected to the pixel electrode;
And a gate driver disposed in the non-display area and electrically connected to the gate wiring.
The display panel according to claim 3, wherein the switching element is electrically connected to the gate driver. - 前記スイッチング素子は、前記ゲートドライバに走査開始信号を供給するための配線と電気的に接続されている請求項4に記載の表示パネル。 5. The display panel according to claim 4, wherein the switching element is electrically connected to a wire for supplying a scan start signal to the gate driver.
- 前記表示領域に配され、前記画素電極と接続されるソース配線を備え、
複数の前記ソース配線の配列方向における前記位置検出電極の配列数は、前記配列方向における前記画素電極の配列数よりも少ないものとされ、
前記第1配線は、前記ソース配線と同じ層に配されると共に、前記ソース配線に隣接する形で延び、
前記第2配線は、前記ソース配線と同じ層に配されると共に、前記第1配線が隣接されていない前記ソース配線と隣接する形で延びている請求項1から請求項5のいずれか1項に記載の表示パネル。 A source line disposed in the display area and connected to the pixel electrode;
The arrangement number of the position detection electrodes in the arrangement direction of the plurality of source wirings is smaller than the arrangement number of the pixel electrodes in the arrangement direction,
The first wire is disposed in the same layer as the source wire, and extends adjacent to the source wire,
The second wiring is disposed in the same layer as the source wiring, and the first wiring extends adjacent to the source wiring which is not adjacent to the first wiring. Display panel described in. - 前記一方の部分に配される端子部を有すると共に前記第1幹配線及び前記第2幹配線の双方に接続される第3配線を備える請求項1から請求項6のいずれか1項に記載の表示パネル。 The terminal according to any one of claims 1 to 6, further comprising a third wiring connected to both the first main wiring and the second main wiring while having a terminal portion disposed in the one portion. Display panel.
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