WO2017195339A1 - Display device - Google Patents

Display device Download PDF

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Publication number
WO2017195339A1
WO2017195339A1 PCT/JP2016/064205 JP2016064205W WO2017195339A1 WO 2017195339 A1 WO2017195339 A1 WO 2017195339A1 JP 2016064205 W JP2016064205 W JP 2016064205W WO 2017195339 A1 WO2017195339 A1 WO 2017195339A1
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WO
WIPO (PCT)
Prior art keywords
layer
liquid crystal
display device
wiring
touch sensing
Prior art date
Application number
PCT/JP2016/064205
Other languages
French (fr)
Japanese (ja)
Inventor
幸弘 木村
福吉 健蔵
伊藤 大
Original Assignee
凸版印刷株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 凸版印刷株式会社 filed Critical 凸版印刷株式会社
Priority to PCT/JP2016/064205 priority Critical patent/WO2017195339A1/en
Priority to CN201680085270.4A priority patent/CN109073925B/en
Priority to KR1020187032390A priority patent/KR102051879B1/en
Priority to JP2016561032A priority patent/JP6252689B1/en
Publication of WO2017195339A1 publication Critical patent/WO2017195339A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/13338Input devices, e.g. touch panels
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0445Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer

Definitions

  • the present invention relates to a display device capable of stable touch sensing and having high touch sensing sensitivity.
  • Display devices having a display function layer are used for large displays such as televisions, tablets, smartphones, and the like.
  • a liquid crystal display device using liquid crystal as a display functional layer has a configuration in which a liquid crystal layer is sandwiched between two transparent substrates such as glass.
  • the main liquid crystal driving method in such a liquid crystal display device is a VA (Vertical Alignment) mode known as a vertical electric field method, an IPS (In-Plane Switching) mode known as a horizontal electric field method, or fringe electric field switching.
  • FFS Frringe Field Switching
  • Organic EL devices OLEDs: Organic Light Emitting Diodes
  • OLEDs Organic Light Emitting Diodes
  • EMS Electro Mechanical System
  • a MEMS Micro-Electro-Mechanical System
  • MEMS includes an optical component such as an actuator, a transducer, a sensor, a micromirror, a MEMS switch, and an optical film, and an interferometric modulator (IMOD).
  • MEMS Micro-Electro-Mechanical System
  • MEMS Micro-Electro-Mechanical System
  • MEMS Micro-Electro-Mechanical System
  • MEMS Micro-Electro-Mechanical System
  • MEMS Micro-Electro-Mechanical System
  • MEMS Micro-Electro-Mechanical System
  • liquid crystal driving is performed by horizontally aligning liquid crystal molecules with respect to the substrate surface of the liquid crystal display device and applying an electric field to the liquid crystal molecules in a direction substantially parallel to the substrate surface.
  • the IPS mode or the FFS mode is a liquid crystal driving method used in a liquid crystal display device having a wide viewing angle.
  • a liquid crystal display device adopting the FFS mode has a great merit that a liquid crystal can be driven at high speed by using a fringe electric field.
  • polarity inversion drive (AC inversion drive) is performed to invert the voltage applied to the liquid crystal layer after a predetermined video display period has elapsed.
  • the polarity inversion driving method includes dot inversion driving that individually inverts the polarity of each of a plurality of pixels, and a horizontal line that inverts the polarity of each pixel in a row in which a plurality of pixels are arranged along the horizontal direction of the screen.
  • Inversion driving column inversion driving to invert the polarity of pixels in a column unit in which a plurality of pixels are arranged along the vertical direction of the screen, inversion of pixel polarity in units of one screen, or screen in a plurality of blocks Frame inversion driving or the like that partitions and inverts the polarity of pixels in units of blocks is known.
  • Such liquid crystal driving techniques are described or suggested in, for example, Patent Documents 1 to 5 and 7.
  • a liquid crystal display device having a touch sensing function provided with means for detecting capacitance has recently been used.
  • a touch sensing method a change in capacitance that occurs when a pointer such as a finger or pen touches or approaches a display screen is detected by, for example, touch sensing wires (touch electrodes) arranged in the X and Y directions. This method is mainly used.
  • an out-cell method in which a touch panel having a touch sensing function is attached to the surface of the display device and an in-cell method in which the display device itself has a touch sensing function are known. ing. In recent years, more display devices have adopted the in-cell method than the out-cell method.
  • Patent Documents 2 to 6 disclose touch sensing technology using an in-cell method.
  • the in-cell method has a problem of touch sensing technology that is not clarified in these patent documents.
  • a problem that is not likely to be a problem with the external touch panel method that is, the touch sensing wiring is easily affected by noise from the source wiring electrically linked to the active element provided in the liquid crystal cell.
  • Patent Document 1 discloses a technique for reversing the polarity of pixels in units of columns in which a plurality of pixels are arrayed along the vertical direction of the screen with respect to liquid crystal driving.
  • Patent Document 1 does not include touch sensing technology.
  • Patent Document 2 includes a description about dot inversion driving and discloses a touch sensing technique.
  • the drive electrode and the detection electrode that perform the touch sensing function are substantially configured by metal wiring.
  • Patent Document 3 relates to an in-plane switching (IPS) liquid crystal display and discloses a technique in which touch sensing drive electrodes form electrode pairs used for detection of touch sensing signals and display. Such disclosure of Patent Document 3 is similar to the feature point of Claim 2 described in Patent Document 5.
  • IPS in-plane switching
  • Patent Document 4 discloses a structure in which a touch screen technology is incorporated in a vertical electric field type liquid crystal display device in which counter electrodes are stacked on a color filter. Such a structure is shown, for example, in claim 1 and Example of Patent Document 4. Further, as described in claim 1 of Patent Document 4, the display pixel includes a storage capacitor. Further, the touch drive electrode operates as a counter electrode of the storage capacitor during the display operation. It should be noted that the paragraph 0156 et seq. Of Patent Document 4 discloses a configuration in which two types of in-plane switching (IPS) electrodes are parallel to each other in a single plane. Patent Document 4 paragraph 0157 shows that an IPS display lacks a Vcom layer that can be used for touch drive or touch sensing. In the structure disclosed in Patent Document 4, it is necessary to cross over yVcom to xVcom (paragraph 0033 of Patent Document 4, FIG. 5, FIG. 1E, FIG. 1F, etc.).
  • IPS in-plane switching
  • Patent Document 5 discloses a touch sensing technique using strip-shaped conductors orthogonal to each other in a liquid crystal cell.
  • Patent Document 6 discloses a plurality of touch drive electrodes (connected to the interconnection conductor xVcom as a drive region) made of a transparent material and extending in the first direction, and a plurality of touch detection electrodes (as sense regions) extending in the second direction. and one of the touch drive electrode and the touch detection electrode functions as a counter electrode of the liquid crystal display.
  • Patent Document 6 discloses a technique for performing touch sensing between a drive line including a first group of a plurality of display pixels and a sense line including a second group of the plurality of display pixels. It has a very complicated configuration in which a bypass tunnel is provided between circuit elements.
  • Japanese Patent Application Laid-Open No. H10-228561 discloses a means for suppressing deterioration in image quality when liquid crystal driving line sequential scanning is performed.
  • a polysilicon semiconductor is used for an active element (TFT: Thin Film Transistor) that drives liquid crystal. Furthermore, by providing a transfer circuit including a latch unit to hold the potential, a potential drop of a scanning signal line specific to a polysilicon TFT having a large off-leakage current is prevented and a picture quality of a liquid crystal display is prevented from being lowered.
  • the touch detection electrodes and the pixel signal lines are configured to be parallel and overlap in a plan view.
  • the S / N ratio (especially “S”, signal value) can be increased by shortening the distance between the touch detection wiring and the touch drive electrode COML.
  • the touch detection electrode and the pixel signal line are formed in a long line shape and overlapped so as to extend in the longitudinal direction of the pixel in plan view, the touch detection electrode and the pixel signal line are brought closer to each other by bringing them closer to each other.
  • the parasitic capacitance generated between the two lines is increased.
  • “N” (noise) generated from the pixel signal line is easily added to the touch detection electrode, and as a result, the S / N ratio is hardly improved.
  • Patent Document 8 As a wiring structure of a thin film transistor signal line, a scanning line, and a storage capacitor line used for driving a liquid crystal, a three-layer metal wiring composed of an indium-containing layer / copper / indium-containing layer Techniques for forming the are disclosed.
  • Patent Document 8 discloses a configuration in which signal lines (source lines) and pixel electrodes are included in a touch sensing space described later. Since the signal line (source line) and the pixel electrode are noise generation sources, it is not considered to reduce the influence of noise caused by the signal (video signal) to touch sensing. For example, the fourth embodiment of Patent Document 8 and FIG.
  • Patent Document 8 discloses a configuration in which a source wiring is provided in addition to a pixel electrode on a touch sensing wiring. For this reason, it is easier to pick up more noise and parasitic capacitance than the structure shown in FIG. 11, and in this respect, the most undesirable configuration is disclosed.
  • the gate line is located at the bottom in the Y direction, and the thin film transistor has a bottom gate structure.
  • Patent Literature 1 to Patent Literature 8 do not sufficiently consider means for reducing noise caused by source wiring to which video signals for performing video display are applied, and are highly sensitive. It is difficult to provide touch sensing technology. Furthermore, it is insufficient to suppress the generation of noise related to liquid crystal driving.
  • polarity inversion driving is generally employed as liquid crystal driving in order to avoid display sticking due to charge accumulation.
  • the source wiring for transmitting the video signal has been a source for generating noise due to polarity inversion.
  • the source wiring is likely to be accompanied by a change in parasitic capacitance accompanying the polarity inversion of the video signal.
  • the array substrate (TFT substrate) in the method in which the array substrate (TFT substrate) has a touch sensing function, the array substrate (TFT substrate) is located very close to a signal wiring such as a source wiring or a gate wiring that drives the active element (TFT).
  • a signal wiring such as a source wiring or a gate wiring that drives the active element (TFT).
  • touch sensing wiring wiring related to touch sensing (hereinafter referred to as touch sensing wiring) is disposed in parallel with these wirings.
  • a source wiring that transmits video signals with various voltages and at a high frequency has a great adverse effect on the touch sensing wiring.
  • a leakage current is large, and it is necessary to rewrite the video signal frequently, and there is a concern that noise generated from the source wiring may affect the touch sensing wiring. Is done.
  • a sense line touch signal detection wiring
  • a drive line touch sensing drive wiring
  • a source wiring and a gate wiring for driving an active element are combined into one sheet.
  • the present invention has been made in view of the above problems, and provides a liquid crystal display device that reduces the influence of noise that affects touch sensing in a liquid crystal display device that is a horizontal electric field method typified by the FFS mode. To do.
  • a display device includes a display device substrate including a first transparent substrate, and touch sensing wiring provided on the first transparent substrate and extending in a first direction, and a second transparent substrate.
  • a common electrode, a first insulating layer provided under the common electrode, a pixel electrode provided under the first insulating layer in each of the plurality of pixel openings, and under the pixel electrode A second insulating layer provided; and is electrically connected to the common electrode under the second insulating layer and extends in a second direction orthogonal to the first direction and crosses the plurality of pixel openings.
  • An active element which is a thin film transistor having a top gate structure provided under the third insulating layer and electrically connected to the pixel electrode; and the second layer having the same layer configuration as the conductive wiring
  • a gate wiring formed between the insulating layer and the third insulating layer at the same position as the conductive wiring and extending in the second direction in plan view and electrically linked to the active element
  • a source wiring that extends in the first direction and is electrically linked to the active element in a plan view, and is provided at the center in the longitudinal direction of the pattern of the electrode portion, and the common electrode and the conductive wiring
  • An array substrate having a contact hole for electrically connecting the display substrate, a display functional layer sandwiched between the display device substrate and the array substrate, the pixel electrode, and the common electrode
  • a control unit that performs video display by driving the display function layer by applying a driving voltage therebetween, and detecting a change in capacitance between the common electrode and the touch sensing wiring. And including. In the oblique direction inclined with respect to the
  • the “display function layer” in one embodiment of the present invention means a layer that realizes a function of performing an action such as light transmission, light shielding, light reflection, or light emission between electrodes.
  • Examples of such a display function layer include a liquid crystal element, an organic EL element, an EMS element, a MEMS element, an IMOD element, and a micro LED element.
  • the common electrode may have a stripe pattern extending in a longitudinal direction parallel to the touch sensing wiring in a plan view.
  • the active element may include a channel layer made of an oxide semiconductor, and the channel layer may be a thin film transistor in contact with a gate insulating film.
  • the oxide semiconductor is an oxide semiconductor including two or more metal oxides of gallium, indium, zinc, tin, aluminum, germanium, antimony, bismuth, and cerium. There may be.
  • the gate insulating film may be a gate insulating film formed of a complex oxide containing cerium oxide.
  • the display functional layer is a liquid crystal layer
  • the liquid crystal of the liquid crystal layer has an initial alignment parallel to the array substrate, and the common electrode, the pixel electrode, It may be driven by a fringe electric field generated by a liquid crystal driving voltage applied between the two.
  • the common electrode and the pixel electrode may be composed of a composite oxide containing at least indium oxide and tin oxide.
  • the touch sensing wiring may be formed of a metal layer including a copper alloy layer.
  • the touch sensing wiring may have a structure in which a copper alloy layer is sandwiched between conductive metal oxide layers.
  • the conductive wiring may have a structure in which a copper alloy layer is sandwiched between conductive metal oxide layers.
  • the conductive metal oxide layer may be a composite oxide layer containing two or more of indium oxide, zinc oxide, antimony oxide, and tin oxide.
  • the display device substrate includes a black matrix provided between the first transparent substrate and the touch sensing wiring, and the touch sensing wiring includes the black matrix. You may superimpose on a part of.
  • the display device substrate may include a color filter provided at a position corresponding to the plurality of pixel openings.
  • the present invention it is possible to provide a liquid crystal display device in which noise that adversely affects touch sensing is reduced and the wiring structure related to touch sensing is simplified.
  • a configuration in which the source wiring or the pixel electrode to which the video signal is supplied is not included in the touch sensing space can be realized, and noise related to the video signal can be reduced.
  • FIG. 3 is a cross-sectional view partially showing the display device according to the first embodiment of the present invention, and is a cross-sectional view taken along the line A-A ′ shown in FIG. 2.
  • FIG. 3 is a cross-sectional view partially showing the display device according to the first embodiment of the present invention, and is a cross-sectional view taken along the line B-B ′ shown in FIG. 2. It is sectional drawing which shows partially the display apparatus which concerns on 1st Embodiment of this invention, and is an expanded sectional view which expands and shows a common electrode.
  • FIG. 3 is a cross-sectional view partially showing the display device according to the first embodiment of the present invention, and is a cross-sectional view taken along the line C-C ′ shown in FIG. 2.
  • FIG. 3 is a plan view partially showing the display device according to the first embodiment of the present invention, in which a display device substrate including a color filter and touch sensing wiring is stacked on the array substrate shown in FIG.
  • FIG. 7 is a cross-sectional view partially showing the display device substrate according to the first exemplary embodiment of the present invention, and is a cross-sectional view taken along the line F-F ′ shown in FIG. 6. It is sectional drawing which shows the display apparatus substrate which concerns on 1st Embodiment of this invention partially, and is sectional drawing explaining the terminal part of touch sensing wiring. It is sectional drawing which shows the display apparatus substrate which concerns on 1st Embodiment of this invention partially, and is sectional drawing explaining the terminal part of touch sensing wiring. FIG.
  • FIG. 3 is a plan view partially showing the array substrate according to the first embodiment of the present invention, and is a diagram for explaining one step of the manufacturing process of the array substrate, showing a pattern of the channel layer of one component of the active element .
  • the broken lines indicate the positions of source wirings and gate wirings formed in the subsequent steps.
  • FIG. 2 is a plan view partially showing the array substrate according to the first embodiment of the present invention, and is a plan view for explaining one step in the manufacturing process of the array substrate.
  • On the channel layer a source wiring, a source electrode, and It is a top view which shows the structure in which each pattern of the drain electrode was formed.
  • FIG. 2 is a plan view partially showing the array substrate according to the first embodiment of the present invention, and is a plan view for explaining one process among the manufacturing processes of the array substrate, and a gate electrode and a gate wiring through a gate insulating film 2 is a plan view showing a structure in which each pattern of conductive wiring is formed.
  • each of the gate electrode, the gate wiring, and the conductive wiring has a stacked structure formed of a plurality of layers including a metal layer and the like.
  • FIG. 3 is a plan view partially showing the array substrate according to the first embodiment of the present invention, and is a plan view for explaining one process among the manufacturing processes of the array substrate, in which a pattern of pixel electrodes is formed through an insulating layer.
  • FIG. 3 is a plan view partially showing the array substrate according to the first embodiment of the present invention, and is a plan view for explaining one process among the manufacturing processes of the array substrate, in which a pattern of pixel electrodes is formed through an insulating layer.
  • FIG. 6 is a timing chart showing an example of time-division driving for performing liquid crystal driving and touch sensing driving in the display device according to the embodiment of the present invention. It is a top view which shows partially the pixel of the display apparatus which concerns on 1st Embodiment of this invention, Comprising: It is a top view which shows the orientation state of the liquid crystal in one pixel.
  • FIG. 2 is a plan view partially showing a pixel of the display device according to the first embodiment of the present invention, and showing a liquid crystal driving operation when a liquid crystal driving voltage is applied between the pixel electrode and the common electrode. is there.
  • FIG. 3 is a schematic cross-sectional view showing the display device according to the first embodiment of the present invention, and is a cross-sectional view showing a change in the generation state of an electric field when a pointer such as a finger contacts or approaches the surface on the viewer side of the display device substrate It is. It is sectional drawing which shows partially the principal part of the array substrate which comprises the display apparatus which concerns on the modification of 1st Embodiment of this invention.
  • FIG. 21 is a cross-sectional view partially showing an array substrate constituting a display device according to a second embodiment of the present invention, and is a cross-sectional view taken along the line D-D ′ shown in FIG. 20.
  • FIG. 21 shows partially the display apparatus which concerns on 2nd Embodiment of this invention, and has the structure where the display apparatus board
  • FIG. 21 is a cross-sectional view partially showing an array substrate constituting a display device according to a second embodiment of the present invention, and is a cross-sectional view taken along line E-E ′ shown in FIG. 20. It is a top view which shows partially the pixel of the display apparatus which concerns on 2nd Embodiment of this invention, Comprising: It is a top view which shows the orientation state of the liquid crystal in one pixel.
  • FIG. 6 is a plan view partially showing a pixel of a display device according to a second embodiment of the present invention, and showing a liquid crystal driving operation when a liquid crystal driving voltage is applied between the pixel electrode and the common electrode. is there.
  • FIG. 4 is a cross-sectional view partially showing a display device employing FFS mode liquid crystal, and showing a liquid crystal drive operation by a fringe electric field when a liquid crystal drive voltage is applied between a pixel electrode and a common electrode.
  • a substrate that can be used for the display device a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, a semiconductor substrate such as silicon, silicon carbide, or silicon germanium, a plastic substrate, or the like can be used.
  • touch driving wirings A voltage applied to the touch sensing wiring for driving the touch sensing is called a touch driving voltage
  • a voltage applied between the common electrode and the pixel electrode for driving the liquid crystal layer which is a display function layer is called a liquid crystal driving voltage.
  • the conductive wiring may be referred to as common wiring.
  • the liquid crystal display device LCD1 uses an in-cell method.
  • the “in-cell method” means a liquid crystal display device in which a touch sensing function is built in the liquid crystal display device or a liquid crystal display device in which the touch sensing function is integrated with the liquid crystal display device.
  • a polarizing film is bonded to the outer surface of each of the display device substrate and the array substrate.
  • the in-cell type liquid crystal display device is located between any two polarizing films facing each other and is touch-sensing at any part constituting the liquid crystal display device in the thickness direction.
  • a liquid crystal display device having a function is located between any two polarizing films facing each other and is touch-sensing at any part constituting the liquid crystal display device in the thickness direction.
  • FIG. 1 is a block diagram showing a liquid crystal display device LCD1 according to the first embodiment of the present invention.
  • the liquid crystal display device LCD1 according to the present embodiment includes a display unit 110, and a control unit 120 for controlling the display unit 110 and a touch sensing function.
  • the control unit 120 has a known configuration, and includes a video signal control unit 121 (first control unit), a touch sensing control unit 122 (second control unit), and a system control unit 123 (third control unit). I have.
  • the video signal control unit 121 sets the common electrode 17 (described later) provided on the array substrate 200 to a constant potential, and the gate wiring 10 (described later, scanning line) and the source wiring 31 (described later, provided) provided on the array substrate 200. Signal to the signal line).
  • the video signal controller 121 applies a display liquid crystal driving voltage between the common electrode 17 and the pixel electrode 20 (described later), whereby a fringe electric field is generated on the array substrate 200, and liquid crystal molecules are generated along the fringe electric field. Rotates and the liquid crystal layer 300 is driven. As a result, an image is displayed on the array substrate 200.
  • a rectangular wave video signal is individually applied to each of the plurality of pixel electrodes 20 via a source wiring (signal line). Further, the rectangular wave may be a positive or negative DC rectangular wave or an AC rectangular wave.
  • the video signal control unit 121 sends such a video signal to the source wiring.
  • the touch sensing control unit 122 applies touch sensing driving voltage to the touch sensing wiring 3 (described later), detects a change in capacitance generated between the touch sensing wiring 3 and the common electrode 17, and performs touch sensing.
  • the system control unit 123 can control the video signal control unit 121 and the touch sensing control unit 122 to perform liquid crystal driving and capacitance change detection alternately, that is, in a time division manner. Further, the system control unit 123 may have a function of driving the liquid crystal at a frequency different from the liquid crystal drive frequency and the touch sensing drive frequency or at different voltages. In the system control unit 123 having such a function, for example, a frequency of noise from the external environment picked up by the liquid crystal display device LCD1 is detected, and a touch sensing drive frequency different from the noise frequency is selected. Thereby, the influence of noise can be reduced. Further, in such a system control unit 123, a touch sensing driving frequency can be selected in accordance with the scanning speed of a pointer such as a finger or a pen.
  • the common electrode 17 has a function of driving a liquid crystal by applying a liquid crystal driving voltage for display between the common electrode 17 and the pixel electrode 20, and the touch sensing wiring 3 And a touch sensing function for detecting a change in capacitance generated between the common electrode 17 and the common electrode 17. Since the touch sensing wiring according to the embodiment of the present invention can be formed of a metal layer having good conductivity, the touch sensitivity can be improved by reducing the resistance value of the touch sensing wiring (described later).
  • control unit 120 has a function of performing touch sensing drive by the touch sensing wiring 3 and the common electrode 17 in at least one of the stable period of the video display and the black display stable period after the video display. It is preferable to have.
  • the liquid crystal display device according to the present embodiment can include a display device substrate according to an embodiment described later.
  • the “plan view” described below means a plane viewed from the direction in which the observer observes the display surface of the liquid crystal display device (plane of the display device substrate).
  • the shape of the display part of the liquid crystal display device according to the embodiment of the present invention, the shape of the pixel opening that defines the pixel, and the number of pixels constituting the liquid crystal display device are not limited.
  • the direction of the short side of the pixel opening is defined as the X direction
  • the direction of the long side is defined as the Y direction
  • the thickness of the transparent substrate The vertical direction is defined as the Z direction
  • the liquid crystal display device may be configured by switching between the X direction and the Y direction defined as described above.
  • an alignment film that imparts initial alignment to the liquid crystal layer 300, an optical film such as a polarizing film and a retardation film, a protective cover glass, and the like are omitted.
  • a polarizing film is attached to each of the front and back surfaces of the liquid crystal display device LCD1 so that the optical axis is crossed Nicol.
  • FIG. 2 is a plan view partially showing the array substrate 200 constituting the liquid crystal display device LCD1 according to the first embodiment of the present invention, and is a plan view seen from the observer side.
  • the liquid crystal display device LCD1 includes a plurality of source lines 31, a plurality of gate lines 10, and a plurality of common lines 30 (conductive lines) on the array substrate 200.
  • Each of the source wirings 31 is formed to have a linear pattern extending in the Y direction (first direction).
  • Each of the gate wiring 10 and each of the common wiring 30 is formed to have a linear pattern extending in the X direction (second direction). That is, the source line 31 is orthogonal to the gate line 10 and the common line 30.
  • the common wiring 30 extends in the X direction so as to cross the plurality of pixel openings.
  • the plurality of pixel openings are regions defined on the transparent substrate 22.
  • the liquid crystal display device LCD1 includes a plurality of pixel electrodes 20 arranged in a matrix and a plurality of active elements 28 (thin film transistors) provided so as to correspond to the pixel electrodes 20 and connected to the pixel electrodes 20.
  • the pixel electrode 20 is provided in each of the plurality of pixel openings.
  • an active element 28 is connected to each of the plurality of pixel electrodes 20. In the example shown in FIG. 2, the active element 28 is provided at the position of the upper right end of the pixel electrode 20.
  • the active element 28 is connected to the channel layer 27 via a source electrode 24 (described later) connected to the source wiring 31, a channel layer 27 (described later), a drain electrode 26 (described later), and an insulating film 13 (described later). And a gate electrode 25 arranged to face each other.
  • the gate electrode 25 of the active element 28 constitutes a part of the gate wiring 10 and is connected to the gate wiring 10.
  • the liquid crystal display device LCD1 includes a plurality of pixels, and one pixel electrode 20 forms one pixel.
  • a voltage positive voltage
  • a region where liquid crystal driving is performed by the pixel electrode 20 may be referred to as a pixel, a pixel opening, or a pixel region.
  • This pixel is an area partitioned by the source wiring 31 and the gate wiring 10 in plan view.
  • the liquid crystal display device LCD1 includes a common electrode 17 at a position facing the pixel electrode 20 in the Z direction.
  • a common electrode 17 having two stripe patterns is provided for one pixel electrode 20.
  • the common electrode 17 is provided in each of the plurality of pixel openings.
  • the common electrode 17 extends in the Y direction and is parallel to the longitudinal direction of the pixel electrode 20.
  • the length EL of the common electrode 17 in the Y direction is larger than the length of the pixel electrode 20 in the Y direction.
  • the common electrode 17 is electrically connected to the common wiring 30 through a through hole 20S and a contact hole H described later. As shown in FIG.
  • the contact hole H is located at the center in the longitudinal direction of the conductive pattern (electrode portion 17 ⁇ / b> A, stripe pattern) of the common electrode 17.
  • the number of common electrodes 17 and the number of contact holes in one pixel can be adjusted by, for example, the pixel width (pixel size).
  • the width W17A of the common electrode 17 is, for example, about 3 ⁇ m.
  • the pitch P17A (distance) between the adjacent common electrodes 17 is, for example, about 4 ⁇ m.
  • the common electrodes 17 are spaced apart from each other at a pitch P17A in the X direction. In the example shown in FIG.
  • the common electrode 17 having two stripe patterns is provided for one pixel electrode 20, but the present invention is not limited to this configuration.
  • the number of the common electrodes 17 may be one or more, or three or more.
  • the width W17A and the pitch P17A of the common electrode 17 can be appropriately changed according to the pixel size and the design.
  • FIG. 3 is a sectional view partially showing the liquid crystal display device LCD1 according to the first embodiment of the present invention, and is a sectional view taken along the line AA ′ shown in FIG. In particular, FIG. 3 is a cross-sectional view along the short side direction of the pixel opening.
  • FIG. 4A is a sectional view partially showing the liquid crystal display device LCD1 according to the first embodiment of the present invention, and is a sectional view taken along the line BB ′ shown in FIG.
  • FIG. 4B is a sectional view partially showing the liquid crystal display device LCD1 according to the first embodiment of the present invention, and is an enlarged sectional view in which a common electrode is enlarged.
  • FIG. 5 is a sectional view partially showing the liquid crystal display device LCD1 according to the first embodiment of the present invention, and is a sectional view taken along the line CC ′ shown in FIG.
  • 3 and 4A show the distance W1 between the touch sensing wiring 3 and the common electrode 17.
  • the distance W1 is a distance in the Z direction in a space including the transparent resin layer 16, the color filter 51 (RGB), the alignment film (not shown), and the liquid crystal layer 300.
  • This space does not include active elements, source lines, and pixel electrodes.
  • this space indicated by the distance W1 is referred to as a touch sensing space.
  • Noise generated from noise sources such as active elements and source wirings is generally emitted in a three-dimensional radial pattern. For this reason, the magnitude of noise is 1/3 of the distance W1 (the larger the distance, the smaller the influence of noise).
  • 3 and 4A show the distance W2 between the touch sensing wiring 3 and the source wiring 31.
  • the touch sensing wiring 3 and the source wiring 31 are greatly separated.
  • the common electrode 17 and the source wiring 31 do not overlap in plan view, the parasitic capacitance caused by the source wiring 31 is extremely small.
  • the common electrode 17 provided at a position closest to the touch sensing space has a shape of a small piece for each pixel in the longitudinal direction of the pixel. For this reason, compared with the case where the common electrode extended in a linear shape so as to straddle a plurality of pixels is provided, the common electrode 17 according to the present embodiment can reduce the parasitic capacitance. According to the structure shown in FIG. 3 and FIG. 4A, it is possible to suppress the influence of noise caused by the video signal supplied to the source wiring 31 on the touch sensing wiring 3. Parasitic capacitance generated between them can be reduced.
  • the liquid crystal display device LCD1 includes a display device substrate 100 (counter substrate), an array substrate 200 bonded so as to face the display device substrate 100, and a liquid crystal layer 300 sandwiched between the display device substrate 100 and the array substrate 200. .
  • the backlight unit BU that supplies light L to the liquid crystal display device LCD1 is provided on the back surface of the array substrate 200 constituting the liquid crystal display device LCD1 (the surface opposite to the transparent substrate surface of the array substrate 200 on which the liquid crystal layer 300 is disposed). ).
  • the backlight unit may be provided on the side surface of the liquid crystal display device LCD1.
  • a reflection plate, a light guide plate, a light diffusion plate, or the like that reflects the light emitted from the backlight unit BU toward the inside of the liquid crystal display device LCD1 is provided on the back surface of the transparent substrate 22 of the array substrate 200. It is done.
  • the display device substrate 100 includes a transparent substrate 21 (first transparent substrate), a touch sensing wiring 3 provided on the transparent substrate 21, a color filter 51 (RGB) formed so as to cover the touch sensing wiring 3, and And a transparent resin layer 16 formed so as to cover the color filter 51.
  • the touch sensing wiring 3 functions as a touch driving electrode (touch driving wiring).
  • touch sensing is detected by detecting a change in capacitance between the touch sensing wiring 3 and the common electrode 17.
  • the touch sensing wiring 3 has a laminated structure formed of a conductive layer including at least a black layer 8 and a metal layer 5 formed above the black layer 8.
  • the conductive layer has a three-layer configuration of a first conductive metal oxide layer 6, a metal layer 5, and a second conductive metal oxide layer 4. Further, a black layer or a light absorption layer may be further laminated on the surface (liquid crystal layer side) of the first conductive metal oxide layer 6. There may be a portion having the same line width between the touch sensing wiring 3 and the black layer 8 in plan view.
  • a conductive metal oxide or a two-layer stack of conductive metal oxides A layer configuration without the above may be employed.
  • Metal layer 5 As the metal layer 5, for example, a copper-containing layer that is a copper layer or a copper alloy layer, or an aluminum alloy layer (aluminum-containing layer) containing aluminum can be employed. Specifically, copper, silver, gold, titanium, molybdenum, aluminum, or an alloy thereof can be applied as the material of the metal layer 5. Since nickel is a ferromagnetic material, it can be formed by vacuum film formation such as sputtering although the film formation rate is lowered. Chromium has the disadvantage of environmental pollution and a large resistance value, but can be used as a material for the metal layer according to the present embodiment.
  • the metal forming the metal layer 5 in order to obtain adhesion to the transparent substrate 21 and the transparent resin layer 16, copper, aluminum, magnesium, calcium, titanium, molybdenum, indium, tin, zinc, neodymium, nickel, aluminum It is preferable to employ an alloy to which one or more metal elements selected from antimony and silver are added.
  • the amount of the metal element added to the metal layer 5 is preferably 4 at% or less because the resistance value of the copper alloy or aluminum is not greatly lowered.
  • a copper alloy film forming method for example, a vacuum film forming method such as sputtering can be used.
  • the metal layer 5 When adopting a copper alloy thin film or an aluminum alloy thin film, if the film thickness is 100 nm or more, or 150 nm or more, visible light is hardly transmitted. Therefore, if the metal layer 5 according to the present embodiment has a film thickness of, for example, 100 nm to 300 nm, sufficient light shielding properties can be obtained. The film thickness of the metal layer 5 may exceed 300 nm. As will be described later, the material of the metal layer 5 can also be applied to the common wiring 30 (conductive wiring). A laminated structure in which the metal layer 5 is sandwiched between conductive metal oxide layers can also be applied to the common wiring 30 (conductive wiring).
  • the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 sandwich the metal layer 5.
  • copper such as nickel, zinc, indium, titanium, molybdenum, tungsten, etc.
  • Different metals or alloy layers of these metals may be inserted.
  • the material of the second conductive metal oxide layer 4 and the first conductive metal oxide layer 6 for example, two or more kinds of metals selected from indium oxide, zinc oxide, antimony oxide, and tin oxide are used.
  • a composite oxide containing an oxide can be employed.
  • the amount of indium (In) contained in the second conductive metal oxide layer 4 and the first conductive metal oxide layer 6 needs to be greater than 80 at%.
  • the amount of indium (In) is preferably greater than 80 at%. More preferably, the amount of indium (In) is greater than 90 at%.
  • the amount of indium (In) is less than 80 at%, the specific resistance of the conductive metal oxide layer to be formed increases, which is not preferable. If the amount of zinc (Zn) exceeds 20 at%, the alkali resistance of the conductive metal oxide (mixed oxide) decreases, which is not preferable.
  • both atomic percentages of metal elements in the mixed oxide counting only metal elements not counting oxygen elements
  • Antimony oxide can be added to the conductive metal oxide layer because metal antimony hardly forms a solid solution region with copper and suppresses diffusion of copper in a laminated structure.
  • the amount of zinc (Zn) contained in the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 needs to be larger than the amount of tin (Sn). If the tin content exceeds the zinc content, there will be problems with wet etching in the subsequent process. In other words, the metal layer made of copper or copper alloy is more easily etched than the conductive metal oxide layer, and the first conductive metal oxide layer 6, the metal layer 5, and the second conductive metal oxide layer 4. A difference in the width is likely to occur.
  • the amount of tin (Sn) contained in the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 is preferably in the range of 0.5 at% or more and 6 at% or less.
  • a ternary mixed oxide film of indium, zinc, and tin (conductive composite)
  • the specific resistance of the oxide layer can be reduced. If the amount of tin exceeds 6 at%, zinc is also added to the conductive metal oxide layer, so that the specific resistance of the ternary mixed oxide film (conductive composite oxide layer) becomes too large.
  • the specific resistance is approximately 5 ⁇ 10 ⁇ 4 ⁇ cm or more as the specific resistance of the single layer film of the mixed oxide film.
  • the specific resistance of the mixed oxide is not limited to the above range.
  • the conductive metal oxide layer described above is a composite containing two or more metal oxides selected from indium oxide, zinc oxide, antimony oxide, and tin oxide. An oxide is desirable.
  • the copper layer or the copper alloy layer has low adhesion to the transparent resin layer 16 and the glass substrate (transparent substrate 21) constituting the color filter 51. For this reason, when a copper layer or a copper alloy layer is applied to a display device substrate as it is, it is difficult to realize a practical display device substrate.
  • the above-described composite oxide has sufficient adhesion to the color filter 51, the black matrix BM (black layer 8), the glass substrate (transparent substrate 21), and the like, and a copper layer or a copper alloy layer. Adhesion to is also sufficient. For this reason, when a copper layer or a copper alloy layer using a composite oxide is applied to a display device substrate, a practical display device substrate can be realized.
  • Copper, copper alloy, silver, silver alloy, or oxides and nitrides thereof generally do not have sufficient adhesion to the transparent substrate 21 such as glass, the black matrix BM, and the like. Therefore, when the conductive metal oxide layer is not provided, peeling may occur at the interface between the touch sensing wiring 3 and the transparent substrate 21 such as glass or the interface between the touch sensing wiring 3 and the black layer 8.
  • the display device substrate in which the conductive metal oxide layer is not formed as the base layer of the metal layer 5 (copper or copper alloy) is peeled off. In addition to defects, defects due to electrostatic breakdown may occur in the touch sensing wiring 3 during the manufacturing process of the display device substrate, which is not practical.
  • Such electrostatic breakdown in the touch sensing wiring 3 is caused by static electricity in the wiring pattern by a post process such as laminating the color filter 51 on the transparent substrate 21, a process of bonding the display device substrate and the array substrate, a cleaning process or the like. Is a phenomenon that causes pattern breakage, disconnection, and the like due to electrostatic breakdown.
  • non-conductive copper oxide may be formed over time on the surface of the copper layer or copper alloy layer, making electrical contact difficult.
  • a complex oxide layer such as indium oxide, zinc oxide, antimony oxide, and tin oxide can realize a stable ohmic contact. When such a complex oxide layer is used, an electric current such as a transfer described later is used. Can be easily implemented.
  • the seal portion where the display device substrate and the array substrate are bonded to each other, it is also possible to perform conduction transfer (transfer) from the display device substrate 100 to the array substrate 200 in the thickness direction of the seal portion.
  • a conductor selected from an anisotropic conductive film, a minute metal sphere, or a resin sphere covered with a metal film in the seal portion, the display device substrate 100 and the array substrate 200 can be electrically connected.
  • Examples of the metal oxide layer structure of the conductive metal oxide layers 4 and 6 and the metal layer 5 applicable to the embodiment of the present invention include the following structures.
  • a metal layer is formed on a copper alloy layer.
  • Layer structure obtained by film formation, or layer obtained by laminating a metal layer on aluminum alloy or copper alloy with molybdenum oxide, tungsten oxide, mixed oxide of nickel oxide and copper oxide, titanium oxide, etc. Examples include the configuration.
  • the layer structure obtained by the conductive metal oxide layer and the metal layer has an advantage that the film can be continuously formed by a vacuum film forming apparatus such as a sputtering apparatus.
  • the black layer 8 functions as a black matrix BM of the liquid crystal display device LCD1.
  • the black layer is made of, for example, a colored resin in which a black color material is dispersed. Copper oxides and copper alloy oxides cannot obtain sufficient black or low reflectance, but the visible light reflectance at the interface between the black layer and the substrate such as glass according to this embodiment is almost the same. It is suppressed to 3% or less, and high visibility is obtained.
  • carbon As the black color material, carbon, carbon nanotubes, or a mixture of a plurality of organic pigments can be used.
  • carbon is used at a ratio of 51 mass% or more with respect to the total amount of the color material, that is, as the main color material.
  • an organic pigment such as blue or red can be added to the black color material.
  • the reproducibility of the black layer can be improved by adjusting the concentration of carbon contained in the photosensitive black coating liquid as a starting material (lowering the carbon concentration).
  • the range of the carbon concentration in this embodiment is set in the range of 4 to 50% by mass with respect to the total solid content including the resin, the curing agent, and the pigment.
  • the carbon concentration may exceed 50% by mass.
  • the suitability of the coating film tends to decrease.
  • the carbon concentration is set to less than 4% by mass, sufficient black color cannot be obtained, and reflected light generated in the underlying metal layer located under the black layer is greatly recognized, thereby reducing visibility. there were.
  • a black layer may be formed using a mixture of a plurality of organic pigments as a black color adjustment. Considering the refractive index (about 1.5) of the base material such as glass or transparent resin, the reflectance of the black layer is such that the reflectance at the interface between the black layer and the base material is 3% or less. Is set. In this case, it is desirable to adjust the content and type of the black color material, the resin used for the color material, and the film thickness.
  • the reflectance at the interface between the black layer having a refractive index of approximately 1.5 and the black layer is set to 3% or less in the visible wavelength range. And low reflectivity can be realized.
  • the reflectance of the black layer shall be 3% or less in consideration of the necessity of preventing the reflected light caused by the light emitted from the backlight unit BU from being reflected again and the improvement of the visibility of the observer. Is desirable.
  • the refractive index of the acrylic resin used for the color filter and the liquid crystal material is approximately in the range of 1.5 to 1.7.
  • a structure in which the color filter 51 is provided is used, but a structure in which the color filter 51 is omitted, for example, the touch sensing wiring 3 provided on the transparent substrate 21 and Alternatively, a structure including a transparent resin layer 16 formed so as to cover the touch sensing wiring 3 may be used.
  • a liquid crystal display device using a display device substrate that does not include the color filter 51 each LED of red light emission, green light emission, and blue light emission is provided in a backlight unit, and color display is performed by a field sequential method.
  • the layer configuration of the touch sensing wiring 3 provided on the transparent substrate 21 shown in FIG. 3 includes the layer configuration of the common wiring 30 (conductive wiring) formed on the array substrate 200 described later and the gate electrode 25 (gate wiring 10). It can be the same as the layer structure.
  • the array substrate 200 includes a transparent substrate 22 (second transparent substrate), a fourth insulating layer 14 formed to cover the surface of the transparent substrate 22, A source wiring 31 formed on the fourth insulating layer 14, a third insulating layer 13 formed on the fourth insulating layer 14 so as to cover the source wiring 31, and a gate wiring formed on the third insulating layer 13 10, a common wiring 30 formed on the third insulating layer 13, a second insulating layer 12 formed on the third insulating layer 13 so as to cover the gate wiring 10 and the common wiring 30, and a second insulating layer
  • the pixel electrode 20 formed on the first insulating layer 12, the first insulating layer 11 formed on the second insulating layer 12 so as to cover the pixel electrode 20, and the common electrode 17 are provided.
  • Materials for forming the first insulating layer 11, the second insulating layer 12, the third insulating layer 13, and the fourth insulating layer 14 include silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, cerium oxide, and hafnium oxide. Alternatively, a mixed material containing such a material is employed. Alternatively, a polyimide resin, an acrylic resin, a benzocyclobutene resin, or a low dielectric constant material (low-k material) may be used for a part of these insulating layers. Moreover, as a structure of such insulating layers 11, 12, 13, and 14, a layer structure composed of a single layer may be employed, or a multilayer structure in which a plurality of layers are stacked may be employed.
  • Such insulating layers 11, 12, 13, and 14 can be formed by using a film forming apparatus such as plasma CVD or sputtering.
  • the source wiring 31 is disposed between the third insulating layer 13 and the fourth insulating layer 14.
  • a multi-layered conductive layer can be adopted.
  • the source wiring 31 has a three-layer structure of titanium / aluminum alloy / titanium.
  • the aluminum alloy is an aluminum-neodymium alloy.
  • the same material as that of the metal layer 5 described above is employed.
  • the structure of the common wiring 30 is the same as that of the metal layer 5 described above.
  • the pixel electrode 20 is provided in each of the plurality of pixel openings 18, and is connected to an active element (described later) that is a TFT. Since the active elements are arranged in a matrix on the array substrate 200, the pixel electrodes 20 are similarly arranged on the array substrate 200 in a matrix.
  • the pixel electrode 20 is formed of a transparent conductive film such as ITO.
  • the channel layer or semiconductor layer constituting the active element may be formed of a polysilicon semiconductor or an oxide semiconductor.
  • the layer configuration of the channel layer or the semiconductor layer constituting the active element may be a stacked configuration in which a polysilicon semiconductor and an oxide semiconductor are stacked.
  • An element formed of two types of semiconductors for example, an active element including a channel layer that is a polysilicon semiconductor and an active element including a channel layer that is an oxide semiconductor are formed on the same surface of the array substrate. There may be.
  • a configuration may be employed in which a TFT array formed of an oxide semiconductor is laminated in two layers on a polysilicon semiconductor TFT array via an insulating layer.
  • the TFT formed of an oxide semiconductor has a function of supplying a signal (selecting a TFT element) to the TFT formed of a polysilicon semiconductor
  • a TFT formed of a polysilicon semiconductor has a function of driving the display function layer.
  • FIG. 4B shows the structure of the common electrode 17 and the constituent members of the array substrate 200 located around the common electrode 17.
  • a stacked structure including the common wiring 30, the common electrode 17, the pixel electrode 20, the first insulating layer 11, and the second insulating layer 12 will be specifically described.
  • FIG. 4B shows the main part of the pixels constituting the array substrate 200, and shows the structure of one common electrode 17 in one pixel.
  • the structure of the common electrode 17 shown in FIG. 4B is also applied to all the pixels on the array substrate 200.
  • the second insulating layer 12 is provided below the first insulating layer 11, is formed on the common wiring 30, and has a through hole 12H that forms a part of a contact hole H described later.
  • the first insulating layer 11 is provided below the common electrode 17 (electrode part 17A), is formed on the pixel electrode 20, and has a through hole 11H that forms a part of a contact hole H described later. Have.
  • the position (center position) of the through hole 12H matches the position (center position) of the through hole 11H.
  • the diameter (width in the X direction) of the through hole 11H is gradually reduced in the direction (Z direction) from the upper surface 11T of the first insulating layer 11 toward the common wiring 30.
  • the diameter (width in the X direction) of the through hole 12H is gradually reduced in the direction (Z direction) from the upper surface 12T of the second insulating layer 12 toward the common wiring 30.
  • the through hole 11H and the through hole 12H have a continuous inner wall and form a contact hole H.
  • the contact hole H has a tapered shape.
  • the pixel electrode 20 is formed under the first insulating layer 11 and has a through hole 20S.
  • the through hole 20S is an opening where no transparent conductive film exists.
  • the through hole 20S is provided at a position corresponding to the contact hole H.
  • each pixel is provided with two contact holes H, that is, a left contact hole LH (H, first contact hole) and a right contact hole RH (H, second contact hole).
  • Through holes 20S are provided at positions corresponding to the respective contact holes H.
  • the left contact hole LH and the right contact hole RH may be simply referred to as contact holes H.
  • the through hole 20S corresponds to an inner region of the inner wall 20K provided in the pixel electrode 20.
  • the diameter D20S of the through hole 20S is larger than the diameter of the contact hole H.
  • the through hole 11H (a part of the contact hole H) is provided inside the through hole 20S.
  • the through hole 20S is filled with the first insulating layer 11, and the through hole 11H is formed so as to penetrate the filling portion 11F of the first insulating layer 11 filling the inner wall of the through hole 20S.
  • a through hole 12H (a part of the contact hole H) is formed so as to be continuous with the through hole 11H also at a position below the through hole 20S.
  • the number of through holes 20S formed in the pixel electrode 20 is the same as the number of contact holes H, and is formed at the same position in plan view.
  • the diameter D20S of the through hole 20S is 3 ⁇ m to 6 ⁇ m, for example.
  • the diameter of the through hole 20 ⁇ / b> S may be larger than the width W ⁇ b> 17 ⁇ / b> A of the common electrode 17.
  • the common electrode 17 includes an electrode portion 17A (conductive portion) and a conductive connection portion 17B.
  • the electrode portion 17A is formed on the upper surface 11T of the first insulating layer 11, and is disposed so as to overlap with the through hole 20S of the pixel electrode 20 when viewed from the Z direction.
  • the electrode portion 17 ⁇ / b> A is provided on the surface of the array substrate 200 closest to the liquid crystal layer 300. Specifically, an alignment film is formed between the liquid crystal layer 300 and the array substrate 200, and the first insulating layer 11 is provided under the alignment film.
  • the width W17A of the electrode portion 17A is, for example, about 3 ⁇ m, is larger than the upper end of the conductive connection portion 17B (connection portion between the electrode portion 17A and the conductive connection portion 17B), and has a diameter D20S (for example, 2 ⁇ m) of the through hole 20S. You may form larger. Alternatively, the diameter D20S of the through hole 20S may be larger than the width W17A of the electrode portion 17A. The diameter D20S of the through hole 20S can be set to 4 ⁇ m, for example.
  • the wall portion 17K of the electrode portion 17A is the same as the inner wall 20K of the pixel electrode 20. It protrudes from the position.
  • the conductive connection portion 17B is provided inside the contact hole H (through holes 11H and 12H), and is electrically connected to the common wiring 30 through the contact hole H.
  • a film forming process and a patterning process are performed on the first insulating layer 11, so that the electrode portion 17A and the conductive connection portion 17B are formed.
  • the common electrode 17 is formed of a transparent conductive film such as ITO.
  • the first insulating layer 11 is disposed between the electrode portion 17 ⁇ / b> A and the pixel electrode 20, and the second insulating layer 12 is disposed between the common wiring 30 and the pixel electrode 20.
  • the common electrode 17 and the common wiring 30 are electrically connected to each other, and the potential of the common wiring 30 and the potential of the common electrode 17 are the same.
  • the potential of the common wiring 30 can be changed when liquid crystal driving and touch sensing driving (detection of change in capacitance) are performed alternately, that is, in a time division manner. Further, the frequency of the signal applied to the common wiring 30 (or the common electrode 17) is changed when liquid crystal driving and touch sensing driving (detection of change in capacitance) are performed alternately, that is, in time division. be able to. Further, during liquid crystal driving and frame inversion driving, the polarity of the potential of the common wiring 30 (or common electrode 17) is switched between positive polarity and negative polarity for each frame, for example, ⁇ 2.5 V liquid crystal driving. The liquid crystal can be driven by voltage.
  • the potential of the common electrode 17 may be constant (constant potential).
  • the “constant potential” in this case is, for example, the potential of the common electrode 17 that is grounded through a high resistance to the housing of the liquid crystal display device, and is ⁇ 2.5 V or the like used for the frame inversion driving. Does not mean constant potential. This is a constant potential fixed at approximately 0 V (zero volt) within a voltage range equal to or lower than the threshold voltage Vth of the liquid crystal. In other words, the “constant potential” may be a constant potential offset from the intermediate value of the liquid crystal driving voltage as long as it is within the range of Vth.
  • the “high resistance” is a resistance value that can be selected from the range of 500 megaohms to 50 teraohms. As such a resistance value, typically, 500 gigaohm to 5 teraohm can be adopted.
  • the common wiring 30 is grounded through a high resistance of 1 teraohm, for example, and can be set to a constant potential of about 0 V (zero volt).
  • the common electrode 17 connected to the common wiring 30 also has a constant potential of about 0 V (zero volts), and the accumulated capacitance can be reset.
  • the potential of the common electrode 17 is a constant potential
  • the touch drive voltage is applied to the touch sensing wiring during touch sensing.
  • liquid crystal driving and touch driving need not be time-division driven.
  • an oxide semiconductor such as IGZO is used as a material for forming a channel layer of an active element (a thin film transistor) of a liquid crystal display device
  • the above-mentioned high A resistance lower than 1 teraohm may be used as the resistance.
  • the gate wiring and the source wiring may be grounded through the high resistance. In this case, pixel burn-in can be prevented.
  • the high resistance can be adjusted for the purpose of adjusting the time constant related to touch sensing.
  • an oxide semiconductor may be simply referred to as IGZO.
  • FIG. 5 shows an example of a thin film transistor (TFT) having a top gate structure.
  • the active element 28 includes a channel layer 27, a drain electrode 26 connected to one end of the channel layer 27 (first end, the left end of the channel layer 27 in FIG. 5), and the other end (second end, FIG. 5 is connected to the right end of the channel layer 27), and the gate electrode 25 is disposed opposite to the channel layer 27 with the third insulating layer 13 interposed therebetween.
  • FIG. 5 shows a structure in which the channel layer 27, the drain electrode 26, and the source electrode 24 constituting the active element 28 are formed on the fourth insulating layer 14, but the present invention is limited to such a structure.
  • the active element 28 may be directly formed on the transparent substrate 22 without being provided on the fourth insulating layer 14.
  • Video signals are supplied to the source wiring 31 at a high frequency, and noise is easily generated from the source wiring 31.
  • the top gate structure has an advantage that the source wiring 31 that is also a noise generation source can be moved away from the touch sensing space described above.
  • the source electrode 24 and the drain electrode 26 shown in FIG. 5 are formed of conductive layers having the same structure in the same process.
  • a three-layer structure of titanium / aluminum alloy / titanium is adopted as the structure of the source electrode 24 and the drain electrode 26.
  • the aluminum alloy is an aluminum-neodymium alloy.
  • the insulating layer 13 located below the gate electrode 25 may be an insulating layer having the same width as the gate electrode 25.
  • dry etching using the gate electrode 25 as a mask is performed, and the insulating layer 13 around the gate electrode 25 is removed.
  • an insulating layer having the same width as the gate electrode 25 can be formed.
  • a technique for processing an insulating layer by dry etching using the gate electrode 25 as a mask is generally called self-alignment.
  • an oxide semiconductor called IGZO can be used as the material of the channel layer 27, for example.
  • an oxide semiconductor containing two or more metal oxides of gallium, indium, zinc, tin, aluminum, germanium, antimony, bismuth, and cerium can be used.
  • an oxide semiconductor containing indium oxide, gallium oxide, and zinc oxide is used.
  • the material of the channel layer 27 formed of an oxide semiconductor may be any of single crystal, polycrystal, microcrystal, a mixture of microcrystal and amorphous, or amorphous.
  • the thickness of the oxide semiconductor can be in the range of 2 nm to 50 nm.
  • the channel layer 27 may be formed of a polysilicon semiconductor.
  • An oxide semiconductor or a polysilicon semiconductor can be used, for example, in the configuration of a complementary transistor having a p / n junction, or can be used in the configuration of a single channel transistor having only an n-type junction.
  • a stacked structure of the oxide semiconductor for example, a stacked structure in which an n-type oxide semiconductor and an n-type oxide semiconductor having different electrical characteristics from the n-type oxide semiconductor are stacked may be employed.
  • the n-type oxide semiconductor to be stacked may include a plurality of layers. In the stacked n-type oxide semiconductor, the band gap of the underlying n-type semiconductor can be different from the band gap of the n-type semiconductor located in the upper layer.
  • the microcrystal refers to a microcrystalline oxide semiconductor film obtained by heat-treating an amorphous oxide semiconductor formed with a sputtering apparatus in a range of 180 ° C. to 450 ° C., for example.
  • it refers to a microcrystalline oxide semiconductor film formed with the substrate temperature at the time of film formation set to around 200 ° C.
  • the microcrystalline oxide semiconductor film is an oxide semiconductor film in which crystal grains of at least about 1 nm to about 3 nm or larger than 3 nm can be observed by an observation method such as TEM.
  • An oxide semiconductor can be improved in carrier mobility and reliability by being changed from amorphous to crystalline.
  • the melting point as an oxide of indium oxide or gallium oxide is high.
  • Antimony oxide and bismuth oxide have melting points of 1000 ° C. or lower, and oxides have low melting points. For example, when a ternary composite oxide of indium oxide, gallium oxide, and antimony oxide is employed, the crystallization temperature of the composite oxide can be lowered due to the effect of antimony oxide having a low melting point.
  • an oxide semiconductor that can be easily crystallized from an amorphous state to a microcrystalline state can be provided.
  • an n-type oxide semiconductor may be stacked over an n-type polysilicon semiconductor.
  • a complex oxide rich in zinc oxide can be used because it is required to be easily soluble in wet etching in a later step.
  • an oxide semiconductor layer may not be stacked only on the polysilicon channel layer (for example, removed by wet etching).
  • one thin film transistor (active element) having an n-type oxide semiconductor channel layer and one thin film transistor (active element) having an n-type silicon semiconductor channel layer are provided in the same pixel, and each channel layer of the thin film transistor It is also possible to drive a display function layer such as a liquid crystal layer or an OLED so that the above characteristics can be utilized.
  • an n-type polysilicon thin film transistor is adopted as a drive transistor for applying a voltage (current) to the display function layer, and an n-type oxidation transistor is used as a switching transistor for sending a signal to the polysilicon thin film transistor.
  • a thin film semiconductor thin film transistor can be employed.
  • the same structure can be adopted for each of the drain electrode 26 and the source electrode 24 (source wiring 31).
  • a multilayer conductive layer can be used for the drain electrode 26 and the source electrode 24.
  • an electrode structure in which aluminum, copper, or an alloy layer thereof is sandwiched between molybdenum, titanium, tantalum, tungsten, a conductive metal oxide film, or the like can be employed.
  • the drain electrode 26 and the source electrode 24 may be formed first, and the channel layer 27 may be formed so as to be stacked on these two electrodes.
  • the structure of the transistor may be a multi-gate structure such as a double gate structure.
  • the semiconductor layer or the channel layer may be adjusted in mobility and electron concentration in the thickness direction.
  • the semiconductor layer or the channel layer may have a stacked structure in which different oxide semiconductors are stacked.
  • the channel length of the transistor which is determined by the minimum distance between the source electrode and the drain electrode, can be 10 nm to 10 ⁇ m, for example, 20 nm to 1 ⁇ m.
  • the third insulating layer 13 functions as a gate insulating film.
  • insulating film materials include hafnium silicate (HfSiOx), silicon oxide, gallium oxide, aluminum oxide, silicon nitride, silicon oxynitride, aluminum oxynitride, gallium oxide, zinc oxide, hafnium oxide, cerium oxide, and the like.
  • a mixed insulating film or the like is employed.
  • Cerium oxide has a high dielectric constant and a strong bond between cerium and oxygen atoms. For this reason, it is preferable that the gate insulating film is a composite oxide containing cerium oxide.
  • Cerium oxide Even when cerium oxide is employed as one of the oxides constituting the composite oxide, it is easy to maintain a high dielectric constant in an amorphous state. Cerium oxide has an oxidizing power. Therefore, a structure in which an oxide semiconductor and cerium oxide are in contact can avoid oxygen vacancies in the oxide semiconductor, and a stable oxide can be realized. In the configuration using nitride for the gate insulating film, the above-described effect does not appear.
  • the material of the gate insulating film may include a lanthanoid metal silicate represented by cerium silicate (CeSiOx).
  • the structure of the third insulating layer 13 may be a single layer film, a mixed film, or a multilayer film.
  • the mixed film or multilayer film can be formed of a material selected from the above insulating film materials.
  • the film thickness of the third insulating layer 13 is a film thickness that can be selected from a range of 2 nm to 300 nm, for example.
  • the interface of the third insulating layer 13 in contact with the channel layer 27 can be formed in a state where a large amount of oxygen is contained (film formation atmosphere).
  • a gate insulating film containing cerium oxide can be formed in an introduced gas containing oxygen after forming an oxide semiconductor.
  • the surface of the oxide semiconductor under the gate insulating film can be oxidized, and the degree of oxidation of the surface can be adjusted.
  • it is difficult to adjust the degree of oxidation of the surface of the oxide semiconductor because the gate insulating film formation step is performed before the oxide semiconductor step.
  • oxidation of the surface of the oxide semiconductor can be promoted more than in the bottom gate structure, and oxygen vacancies in the oxide semiconductor are less likely to occur.
  • the plurality of insulating layers including the first insulating layer 11, the second insulating layer 12, the third insulating layer 13, and the insulating layer (fourth insulating layer 14) underlying the oxide semiconductor are formed using an inorganic insulating material or an organic insulating material. Can be formed.
  • silicon oxide, silicon oxynitride, or aluminum oxide can be used.
  • a structure of the insulating layer a single layer or a plurality of layers including the above materials can be used. A configuration in which a plurality of layers formed of different insulating materials are stacked may be employed.
  • an acrylic resin, a polyimide resin, a benzocyclobutene resin, a polyamide resin, or the like may be used for some insulating layers.
  • a low dielectric constant material (low-k material) can also be used.
  • a gate electrode 25 is disposed on the channel layer 27 via the third insulating layer 13.
  • the gate electrode 25 (gate wiring 10) can be formed in the same process using the same material as the common wiring 30 and having the same layer structure. Further, the gate electrode 25 may be formed using the same material as the drain electrode 26 and the source electrode 24 described above so as to have the same layer structure. In the case where the gate electrode 25 is formed using a multi-layered conductive material, a configuration in which a copper layer or a copper alloy layer is sandwiched between conductive metal oxides can be employed. The surface of the metal layer 5 exposed at the end of the gate electrode 25 can be covered with a complex oxide containing indium.
  • the entire gate electrode 25 may be covered with a nitride such as silicon nitride or molybdenum nitride so as to include the end portion of the gate electrode 25.
  • a nitride such as silicon nitride or molybdenum nitride
  • an insulating film having the same composition as the above-described gate insulating film may be stacked with a thickness greater than 50 nm.
  • the third insulating layer 13 As a method of forming the gate electrode 25, prior to the formation of the gate electrode 25, only the third insulating layer 13 positioned immediately above the channel layer 27 of the active element 28 is subjected to dry etching or the like, and the thickness of the third insulating layer 13 is thus determined. The thickness can be reduced. Oxide semiconductors having different electrical properties may be further inserted at the interface of the gate electrode 25 in contact with the third insulating layer 13. Alternatively, the third insulating layer 13 may be formed of an insulating metal oxide layer containing cerium oxide or gallium oxide. Specifically, it is necessary to increase the thickness of the third insulating layer 13 in order to prevent noise caused by the video signal supplied to the source wiring 31 from getting on the common wiring 30.
  • the third insulating layer 13 has a function as a gate insulating film located between the gate electrode 25 and the channel layer 27, and requires an appropriate film thickness considering the switching characteristics of the active element 28. Is done.
  • the third insulation positioned immediately above the channel layer 27 while keeping the film thickness of the third insulation layer 13 between the common wiring 30 and the source wiring 31 large. By reducing the thickness of the layer 13, noise caused by the video signal supplied to the source wiring can be prevented from entering the common wiring 30, and desired switching characteristics can be realized in the active element 28. Can do.
  • a light shielding film may be formed below the channel layer 27.
  • a refractory metal such as molybdenum, tungsten, titanium, or chromium can be used.
  • the gate wiring 10 is electrically linked to the active element 28. Specifically, the gate electrode 25 connected to the gate wiring 10 and the channel layer 27 of the active element 28 face each other with the third insulating layer 13 interposed therebetween. Switching driving is performed in the active element 28 in accordance with the scanning signal supplied from the video signal control unit 121 to the gate electrode 25.
  • a voltage as a video signal is applied to the source wiring 31 from the video signal control unit 121.
  • a video signal having a positive or negative voltage of ⁇ 2.5 V to ⁇ 5 V is applied to the source wiring 31.
  • the voltage applied to the common electrode 17 can be, for example, a range of ⁇ 2.5 V that changes every frame inversion.
  • the potential of the common electrode 17 may be a constant potential in a range from the liquid crystal driving threshold value Vth to 0V. When this common electrode is applied to constant potential driving described later, it is desirable to use an oxide semiconductor for the channel layer 27.
  • the channel layer composed of an oxide semiconductor has a high electrical withstand voltage, and a transistor using an oxide semiconductor applies a high drive voltage exceeding the range of ⁇ 5 V to the electrode portion 17A, thereby speeding up the response of the liquid crystal. It is possible to Various driving methods such as frame inversion driving, column inversion (vertical line) inversion driving, horizontal line inversion driving, and dot inversion driving can be applied to the liquid crystal driving.
  • the liquid crystal driving according to the present embodiment will be described later with reference to FIG.
  • a metal element or a metalloid element in a range of 0.1 at% or more and 4 at% or less can be added to copper.
  • the effect that copper migration can be suppressed is obtained by adding an element to copper.
  • elements that can be placed at the lattice position of copper by substituting a part of copper atoms in the crystal of the copper layer (grains), and the movement of copper atoms in the vicinity of the copper grains precipitated at the grain boundaries of the copper layer It is preferable to add to the copper together with an element that suppresses the above.
  • the copper atom in order to suppress the movement of the copper atom, it is preferable to add an element heavier than the copper atom (having a larger atomic weight) to the copper. In addition, it is preferable to select an additive element in which the conductivity of copper is less likely to decrease with an addition amount within a range of 0.1 at% to 4 at% with respect to copper. Furthermore, in consideration of vacuum film formation such as sputtering, an element whose film formation rate such as sputtering is close to copper is preferable. As described above, the technique of adding an element to copper can also be applied when copper is replaced with silver or aluminum. In other words, a silver alloy or an aluminum alloy may be used instead of the copper alloy.
  • Adding an element that can be placed in the copper lattice position to replace a part of the copper atoms in the crystal (grain) of the copper layer means that, in other words, a metal or metalloid that forms a solid solution with copper near room temperature. It is to be added to copper.
  • the metal that easily forms a solid solution with copper include manganese, nickel, zinc, palladium, gallium, and gold (Au).
  • Adding an element to copper that precipitates at the grain boundary of the copper layer and suppresses the movement of copper atoms in the vicinity of the copper grain is, in other words, adding a metal or metalloid that does not form a solid solution with copper near room temperature. That is.
  • metals and metalloids that are difficult to form a solid solution with copper or that are difficult to form a solid solution with copper.
  • refractory metals such as titanium, zirconium, molybdenum, and tungsten, and elements called semimetals such as silicon, germanium, antimony, and bismuth can be used.
  • Copper has a problem in reliability from the viewpoint of migration. Reliability can be supplemented by adding the above metals and metalloids to copper. The effect of suppressing migration can be obtained by adding 0.1 at% or more of the above metal or metalloid to copper. However, when the above metal or metalloid is added in excess of 4 at% to copper, the conductivity of copper is significantly deteriorated, and the merit of selecting copper or a copper alloy cannot be obtained.
  • a composite oxide (mixed oxide) selected from two or more of indium oxide, tin oxide, zinc oxide, and antimony oxide can be employed. Further, a small amount of titanium oxide, zirconium oxide, aluminum oxide, magnesium oxide, and germanium oxide may be added to this composite oxide.
  • a composite oxide of indium oxide and tin oxide is generally used as a low resistance transparent conductive film called ITO.
  • the etching rate in wet etching can be adjusted by adjusting the mixing ratio of zinc oxide and tin oxide.
  • the etching rate of the complex oxide and the etching rate of the copper alloy layer can be adjusted,
  • the pattern widths of these three layers can be made substantially equal.
  • a transistor having a top gate structure is employed as the active element 28, a transistor having a top gate structure is employed.
  • a transistor having a bottom gate structure may be employed.
  • the position of the source wiring 31 in the Z direction may be separated from the touch sensing wiring 3. it can.
  • the source wiring can be separated from the space where the electrostatic capacitance is generated between the touch sensing wiring 3 and the common electrode 17.
  • the influence of noise caused by the video signal on the touch signal can be reduced.
  • the physical space between the touch sensing wiring 3 and the common electrode 17 does not include the source wiring 31 and the pixel electrode 20.
  • a physical space between the touch sensing wiring 3 and the common electrode 17 may be referred to as a touch sensing space.
  • FIG. 6 is a plan view partially showing the liquid crystal display device LCD1 according to the first embodiment of the present invention, as viewed from the observer side through the transparent substrate 21.
  • FIG. FIG. 7 is a sectional view partially showing the display device substrate 100 according to the first embodiment of the present invention, and is a sectional view taken along the line FF ′ shown in FIG.
  • FIG. 8 is a cross-sectional view partially illustrating the display device substrate 100 according to the first embodiment of the present invention, and is a cross-sectional view illustrating the terminal portion 34 of the touch sensing wiring 3.
  • FIG. 6 is a plan view partially showing the liquid crystal display device LCD1 according to the first embodiment of the present invention, as viewed from the observer side through the transparent substrate 21.
  • FIG. 7 is a sectional view partially showing the display device substrate 100 according to the first embodiment of the present invention, and is a sectional view taken along the line FF ′ shown in FIG.
  • FIG. 8 is a cross-sectional view partially illustrating the display device substrate 100
  • FIG. 9 is a cross-sectional view partially showing the display device substrate 100 according to the first embodiment of the present invention, and is a cross-sectional view illustrating the terminal portion 34 of the touch sensing wiring 3.
  • the display device substrate 100 is laminated on the array substrate 200 shown in FIG. 2 via a liquid crystal layer.
  • a liquid crystal display device LCD1 in which the display device substrate 100 is bonded to the array substrate 200 via the liquid crystal layer 300 is obtained.
  • the source wiring 31 and the common wiring 30 constituting the array substrate 200 are shown, and other members (electrodes, wirings, active elements, etc.) constituting the array substrate 200 are omitted. .
  • the display device substrate 100 includes a color filter 51 (RGB), a touch sensing wiring 3, and a black matrix BM.
  • the black matrix BM has a lattice pattern having a plurality of pixel openings. Each of the plurality of pixel openings is provided with a red filter (R), a green filter (G), and a blue filter (blue) constituting the color filter 51.
  • the black matrix BM has an X direction extending portion extending in the X direction and a Y direction extending portion extending in the Y direction, and is formed of the material constituting the black layer 8 described above. . Further, the Y-direction extending portion corresponds to the black layer 8.
  • the touch sensing wiring 3 is provided on the display device substrate 100 so as to overlap the Y-direction extending portion (a part of the black matrix) of the black matrix BM (see FIG. 7). Further, the touch sensing wiring 3 is formed on the black matrix BM and is extended in the Y direction. In the positional relationship between the display device substrate 100 and the array substrate 200 in plan view, the touch sensing wiring 3 is disposed so as to overlap the source wiring 31, and the extending direction of the touch sensing wiring 3 is the same as that of the common wiring 30. It is orthogonal to the extending direction.
  • the touch sensing wiring 3 having a three-layer structure including a first conductive metal oxide layer, a copper alloy layer, and a second conductive metal oxide layer.
  • a material for the conductive metal oxide layer a conductive metal oxide based on indium oxide or tin oxide can be used.
  • a composite oxide obtained by adding zinc oxide, tin oxide, titanium oxide, zirconium oxide, magnesium oxide, aluminum oxide, germanium oxide, gallium oxide, cerium oxide, antimony oxide, or the like to indium oxide can be used.
  • the etching rate in wet etching can be adjusted according to the amount of zinc oxide, antimony oxide, and gallium oxide added to indium oxide.
  • Touch sensing wiring or conductive wiring of the three-layer configuration of the first conductive metal oxide layer, the copper alloy layer, and the second conductive metal oxide layer as described above (common wiring 30 formed on the array substrate 200).
  • a composite oxide of a composite metal oxide such as indium oxide-zinc oxide-tin oxide has high conductivity and strong adhesion to a copper alloy, a color filter, a glass substrate, and the like. Further, this composite metal oxide is also a hard ceramic, and a good ohmic contact can be obtained in an electrical mounting structure.
  • the conductive metal oxide layer containing such a composite oxide is applied to a three-layer configuration of the first conductive metal oxide layer, the copper alloy layer, and the second conductive metal oxide layer, for example, Extremely strong electrical mounting can be performed on a glass substrate.
  • a second conductive metal oxide layer 4 that is a ternary mixed oxide film (conductive metal oxide layer) containing indium oxide, zinc oxide, and tin oxide,
  • a ternary mixed oxide film conductive metal oxide layer
  • the metal layer 5 and the first conductive metal oxide layer 6 similar to the second conductive metal oxide layer 4
  • three layers can be formed.
  • the film formation apparatus for example, a sputtering apparatus is used, and continuous film formation is performed while maintaining a vacuum atmosphere.
  • the composition of the metal layer made of indium oxide, zinc oxide, tin oxide, and copper alloy is as follows. is there.
  • the atomic percentage of the metal element in the mixed oxide is a count of only the metal element that does not count the oxygen element.
  • First conductive metal oxide layer; In: Zn: Sn > 90: 8: 2 Second conductive metal oxide layer; In: Zn: Sn ⁇ 91: 7: 2 -Metal layer; Cu: Zn: Sb ⁇ 98.6: 1.0: 0.4
  • the amount of indium (In) contained in the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 needs to be greater than 80 at%.
  • the amount of indium (In) is preferably greater than 80 at%. More preferably, the amount of indium (In) is greater than 90 at%.
  • the amount of indium (In) is less than 80 at%, the specific resistance of the conductive metal oxide layer formed is not preferable. If the amount of zinc (Zn) exceeds 20 at%, the alkali resistance of the conductive metal oxide (mixed oxide) decreases, which is not preferable.
  • the amount of zinc (Zn) contained in the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 needs to be larger than the amount of tin (Sn). If the tin content exceeds the zinc content, there will be problems with wet etching in the subsequent process. In other words, the metal layer made of copper or copper alloy is more easily etched than the conductive metal oxide layer, and the first conductive metal oxide layer 6, the metal layer 5, and the second conductive metal oxide layer 4.
  • the amount of tin (Sn) contained in the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 is preferably in the range of 0.5 at% or more and 6 at% or less.
  • tin 0.5 at% or more and 6 at% or less
  • a ternary mixed oxide film of indium, zinc, and tin (conductive composite) The specific resistance of the oxide layer can be reduced. If the amount of tin exceeds 7 at%, zinc is also added to the conductive metal oxide layer, so that the specific resistance of the ternary mixed oxide film (conductive composite oxide layer) becomes too large.
  • the specific resistance is approximately mixed oxide film.
  • the specific resistance of the single layer film can fall within a small range of 5 ⁇ 10 ⁇ 4 ⁇ cm or more and 3 ⁇ 10 ⁇ 4 ⁇ cm or less.
  • a small amount of other elements such as titanium, zirconium, magnesium, aluminum, and germanium can be added to the mixed oxide.
  • the black matrix BM has a frame area surrounding a matrix area (rectangular display area and display screen) on the display surface (display unit 110). It is preferable that the touch sensing wiring 3 is formed on the transparent substrate 21 so as to extend from the frame region toward the outside of the transparent substrate 21, and the terminal portion 34 is formed on the touch sensing wiring 3 positioned outside the frame region. In this case, the terminal portion 34 of the touch sensing wiring 3 is provided at a position extending from the frame area without overlapping with the black matrix BM. In this configuration, the terminal portion 34 used for mounting can be directly formed on the glass surface of the transparent substrate 21 that is a glass plate. FIG.
  • FIG. 8 is a cross-sectional view showing the touch sensing wiring 3 extending from the black matrix BM in the frame region toward the outside of the transparent substrate 21 and is a view along the X direction.
  • the terminal part 34 of the touch sensing wiring 3 is directly disposed on the transparent substrate 21 which is a glass plate.
  • FIG. 9 is a cross-sectional view showing the terminal portion 34 and is a view along the Y direction.
  • the shape of the terminal portion in plan view is not limited to FIGS.
  • the upper portion of the terminal portion 34 is removed by a method such as dry etching to form a terminal portion 34 having a circular or rectangular shape, and the surface of the terminal portion 34.
  • the conductive metal oxide layer may be exposed.
  • the transfer of transfer from the display device substrate 100 to the array substrate 200 is performed in the thickness direction of the seal portion in the seal portion for bonding the display device substrate 100 and the array substrate 200 or in the liquid crystal cell. It is also possible.
  • a conductor selected from an anisotropic conductive film, a minute metal sphere, or a resin sphere covered with a metal film in the seal portion, the display device substrate 100 and the array substrate 200 can be electrically connected.
  • the first conductive metal oxide layer 6, the copper alloy layer (metal layer 5), and the second conductive metal oxide are provided only on the display device substrate 100.
  • the array substrate 200 is similarly formed of three layers of the first conductive metal oxide layer, the copper alloy layer, and the second conductive metal oxide layer. It is preferable to form a terminal portion.
  • the terminals formed on the array substrate 200 in this way are used as terminals for transfer of transfer (transfer) to the display device substrate 100. Specifically, either the structure of the layer of the conductive layer constituting the gate wiring 10 formed on the array substrate 200 or the structure of the layer of the conductive layer constituting the source wiring 31 is changed to the first conductive metal.
  • a three-layer structure of an oxide layer, a copper alloy layer, and a second conductive metal oxide layer is formed. As a result, it is possible to form lead wirings and terminal portions for conduction between the display device substrate 100 and the array substrate 200 on the array substrate 200.
  • the liquid crystal layer 300 includes liquid crystal molecules 39 having positive dielectric anisotropy.
  • the initial alignment of the liquid crystal molecules is horizontal with respect to the substrate surface of the display device substrate 100 or the array substrate 200.
  • the liquid crystal driving according to the first embodiment using the liquid crystal layer 300 may be referred to as a horizontal electric field method because a driving voltage is applied to the liquid crystal molecules so as to cross the liquid crystal layer in plan view.
  • the operation of the liquid crystal molecules 39 will be described later with reference to FIGS. 15 and 16.
  • the liquid crystal constituting the liquid crystal layer 300 may be a liquid crystal having a negative dielectric anisotropy or a liquid crystal having a positive dielectric anisotropy. It is preferable that the resistivity of the liquid crystal and the alignment film used in the liquid crystal display device, and further the transparent resin layer provided on the display device substrate is high, and the resistivity of these members is preferably 1 ⁇ 10 13 ⁇ ⁇ cm or more. .
  • the transparent substrate 22 is prepared, and the fourth insulating layer 14 is formed so as to cover the surface of the transparent substrate 22.
  • a channel layer 27 constituting the active element 28 is formed on the fourth insulating layer 14.
  • an oxide semiconductor is employed as the material of the channel layer 27, an oxide semiconductor is employed.
  • the channel layer 27 is patterned so that one channel layer 27 is disposed in one pixel.
  • broken lines 131 and 90 are shown.
  • a broken line 131 indicates the position of the source wiring formed on the fourth insulating layer 14 after the channel layer 27 is formed.
  • a broken line 90 indicates the position of the gate wiring formed on the third insulating layer 13 after the source wiring 31 is formed.
  • the source electrode 24 and the drain electrode 26 are formed on the channel layer 27, and the source wiring 31 that is electrically linked to the source electrode 24 is formed.
  • the source wiring 31 has a linear pattern extending in the Y direction.
  • the third insulating layer 13 is formed on the transparent substrate 22, that is, on the fourth insulating layer 14 so as to cover the channel layer 27, the source electrode 24, the drain electrode 26, and the source wiring 31.
  • the third insulating layer 13 has a function as an interlayer insulating film located between two wiring layers and a function as a gate insulating film.
  • the gate electrode 25 is formed on the third insulating layer 13 so as to coincide with the formation position of the channel layer 27. Further, simultaneously with the formation of the gate electrode 25, the gate wiring 10 and the common wiring 30 which are electrically linked to the gate electrode 25 are formed.
  • the gate electrode 25, the gate wiring 10, and the common wiring 30 are conductive layers made of a conductive material as described above, and are formed in the same process.
  • the second insulating layer 12 is formed on the transparent substrate 22, that is, on the third insulating layer 13 so as to cover the gate electrode 25, the gate wiring 10, and the common wiring 30.
  • a transparent conductive film is formed on the entire surface of the second insulating layer 12.
  • a pixel electrode 20 is formed for each pixel as shown in FIG.
  • a through hole 20S is also formed. That is, the through hole 20S is an opening from which the transparent conductive film is removed.
  • FIG. 13 shows a structure in which the second insulating layer 12 covering the active element 28, the source wiring 31, the gate wiring 10, the common wiring 30 and the like is formed.
  • a pixel electrode 20 is formed on the second insulating layer 12 by patterning.
  • the pixel electrode 20 is electrically connected to each drain electrode 26 of the active element 28 through a contact hole 29.
  • the diameter of the through hole 20S formed in the pixel electrode 20 is larger than the diameter of the contact hole H formed in a later process.
  • the through hole 20 ⁇ / b> S has a sufficient size (diameter) so that no electrical leakage occurs between the common electrode 17 and the common wiring 30 inside the contact hole H.
  • FIG. 13 shows a distance W4 between the common wiring 30 and the gate wiring 10. Since the distance W4 is obtained, the structure is such that noise caused by the common wiring 30 hardly affects the gate wiring 10.
  • the first insulating layer 11 is formed on the transparent substrate 22, that is, on the second insulating layer 12. Thereby, the first insulating layer 11 embeds the through hole 20 ⁇ / b> S and covers the entire surface of the pixel electrode 20. Thereafter, contact holes H are formed in the first insulating layer 11 and the second insulating layer 12 at positions corresponding to the through holes 20S. By etching the first insulating layer 11 and the second insulating layer 12, a plurality of contact holes H are collectively formed on the entire surface of the array substrate 200. Thereafter, a transparent conductive film as a constituent material of the common electrode 17 is formed on the first insulating layer 11 so as to cover the contact hole H.
  • the electrode portion 17A shown in FIG. 4B is formed on the first insulating layer 11, the conductive connection portion 17B is embedded in the contact hole H, and the common electrode 17 is formed.
  • the common electrode 17 and the common wiring 30 are electrically connected.
  • the common electrode 17 is formed on the first insulating layer 11 formed so as to cover the pixel electrode 20.
  • a common electrode 17 having two stripe pattern shapes per pixel is disposed in the longitudinal direction of the pixel.
  • the pattern shape and the number of the common electrodes 17 are not limited to this, and can be increased or decreased depending on the pixel size or the pixel size.
  • the common electrode 17 is formed of a transparent conductive film such as ITO.
  • the common electrode 17 is electrically connected to the common wiring 30 through the contact hole H at the center position in the longitudinal direction of the pixel. A portion where the common electrode 17 and the pixel electrode 20 overlap may be used as an auxiliary capacitor when performing liquid crystal display.
  • liquid crystal display device LCD1 According to the manufacturing method of the liquid crystal display device LCD1 described above, it is necessary to provide a jumper line, a bypass tunnel, etc. even when the source wiring and gate wiring for driving the active element are provided on one array substrate.
  • the liquid crystal display device LCD1 can be manufactured at a low cost.
  • FIG. 14 is a timing chart illustrating an example of time-division driving of liquid crystal driving and touch sensing driving that can be applied to the first embodiment and embodiments described later.
  • the odd number of the pulse signal Vc supplied as the clock frequency is temporarily referred to as the first pulse signal
  • the even number is the second pulse signal. It merely represents a continuous signal and does not specify the pulse signal Vc.
  • the display period shown in FIG. 14 is a display period in which one frame is 60 Hz, for example. In this one frame period, for example, one display unit period of a pixel includes a white display period and a black display period.
  • White display is performed by inputting the first pulse signal which is a clock signal. Specifically, with the input of the first pulse signal, a video signal is supplied to the source line 31, and the liquid crystal driving voltage Vd is supplied to the pixel electrode 20 via the drain electrode 26. The liquid crystal driving voltage Vd is held between the pixel electrode 20 and the common electrode 17, and drives the liquid crystal layer.
  • An active element (thin film transistor) 28 using an oxide semiconductor as a channel layer has a higher liquid crystal driving voltage holding capability than an active element using a polysilicon semiconductor as a channel layer, and can hold a high transmittance of each pixel for a long period.
  • Black display is realized, for example, by setting the voltage held between the pixel electrode 20 and the common electrode 17 to 0 V or the ground potential using the second pulse signal as a trigger.
  • the voltage of the source line is accelerated to 0 V by supplying a voltage having a polarity opposite to that of the video signal supplied to the source line in the white display period to the source line for an application time with a short pulse signal width. It becomes possible to return to.
  • the reverse polarity voltage may be a low voltage near the threshold voltage Vth for driving the liquid crystal.
  • the gate wiring 10 and the source wiring 31 may be simply grounded after the second pulse signal is input.
  • the black display means that the liquid crystal molecules in the liquid crystal layer return to the initial alignment state and are in a crossed Nicol black state.
  • the touch sensing period T touch is provided in the period of the white display stable period Wr or the black display stable period Er in which the transmittance is stable, and the touch sensing can be performed in this period.
  • the touch sensing wiring 3 picks up noise generated from the source wiring or the active element. It becomes easy and is not preferable.
  • Various liquid crystal driving methods such as frame inversion driving, column inversion driving (vertical line inversion driving), horizontal line inversion driving, and dot inversion driving can be employed in the liquid crystal display device according to the embodiment of the present invention.
  • the timing of the touch sensing period as described below can be taken.
  • the period after “break” is synonymous with the white display stabilization period Wr shown in FIG.
  • the “after video writing” of (1) to (4) above can be replaced with a black display stabilization period Er shown in FIG.
  • the touch sensing period may be provided in the two periods of the white display stable period Wr and the black display stable period Er.
  • the black display stabilization period Er a high frequency touch sensing drive voltage V touch is applied to the touch drive wiring (touch sensing wiring 3 or common wiring 30 described later). Further, in the black display stable period Er, the light emission of the backlight unit BU such as an LED can be stopped, and the influence of noise caused by the driving of the backlight unit BU can be eliminated.
  • the black display stabilization period can also be used as “black insertion” for reducing color misregistration in 3D display (stereoscopic image display).
  • the touch drive voltage can be applied to either the touch sensing wiring 3 or the common wiring 30.
  • the common electrode 17 can function as a detection electrode.
  • the touch sensing wiring 3 functions as a detection electrode
  • the common electrode 17 can function as a drive electrode. That is, the functions of the drive electrode and the detection electrode can be interchanged in the touch sensing wiring 3 and the common electrode 17.
  • a rectangular wave of the touch driving voltage V touch is always applied to either the touch sensing wiring 3 or the common electrode 17, and the clock frequency pulse (the first pulse signal, the first pulse signal) It is possible to adopt a method in which the touch detection signal is not detected only when two pulse signals) are applied. That is, it is possible to substantially adopt a split driving method.
  • Transistor using oxide semiconductor as channel layer For example, when a transistor (active element) using an oxide semiconductor such as IGZO having good memory characteristics or IGAO in which zinc oxide is replaced with antimony oxide is employed as the channel layer 27, the common electrode 17 is set to a constant voltage (constant potential). ), It is possible to omit an auxiliary capacitor (storage capacitor) necessary for constant voltage driving. Unlike a transistor using a silicon semiconductor, a transistor using IGZO or IGAO as the channel layer 27 has a very small leakage current. For example, a transfer including a latch unit as described in Patent Document 4 of the prior art document A circuit can be omitted and a simple wiring structure can be adopted.
  • the liquid crystal display device LCD1 using the array substrate 200 including a transistor using an oxide semiconductor such as IGZO as a channel layer since the leakage current of the transistor is small, after applying a liquid crystal driving voltage to the pixel electrode 20, The voltage can be maintained and the transmittance of the liquid crystal layer 300 can be maintained.
  • the electron mobility in the active element 28 is high.
  • a driving voltage corresponding to a required video signal can be applied to the pixel electrode in a short time of 2 msec (milliseconds) or less. 20 can be applied.
  • one frame of double speed driving (when the number of display frames per second is 120 frames) is about 8.3 msec, and for example, 6 msec can be assigned to touch sensing.
  • a thin film transistor using an oxide semiconductor such as IGZO as the channel layer 27 has a high withstand voltage. For this reason, for example, the response of the liquid crystal can be improved by using a high voltage of 5 V or more as the liquid crystal driving voltage.
  • the liquid crystal drive and the touch electrode drive may not be time-division driven.
  • the driving frequency of the liquid crystal and the driving frequency of the touch metal wiring can be made different.
  • the active element 28 using an oxide semiconductor such as IGZO for the channel layer 27 a transistor using a polysilicon semiconductor that needs to maintain transmittance (or voltage holding) after applying a liquid crystal driving voltage to the pixel electrode 20
  • the liquid crystal can be driven at a high speed with a high voltage, and can be used for 3D image display capable of 3D display.
  • the active element 28 using an oxide semiconductor such as IGZO for the channel layer 27 has high memory properties as described above, flicker (flickering of display) can be achieved even when the liquid crystal driving frequency is set to a low frequency of about 0.1 Hz to about 30 Hz. ).
  • the active element 28 having IGZO or IGAO as the channel layer dot inversion driving at a low frequency and touch driving at a frequency different from the dot inversion driving are performed together, thereby achieving low power consumption and high image quality. Both video display and high-precision touch sensing can be obtained.
  • the active element 28 using the oxide semiconductor for the channel layer 27 has a small leakage current as described above, the driving voltage applied to the pixel electrode 20 can be held for a long time.
  • the source wiring 31 of the active element 28, the gate wiring 10 (auxiliary capacitance line), etc. are formed by copper wiring having a wiring resistance smaller than that of the aluminum wiring, and further, the active element is touched by using IGZO or IGAO that can be driven in a short time. It is possible to provide a sufficient period for performing sensing scanning. That is, by applying an oxide semiconductor such as IGZO to the active element, the driving time of the liquid crystal or the like can be shortened, and there is a sufficient margin for the time applied to touch sensing in the video signal processing of the entire display screen.
  • an oxide semiconductor such as IGZO as the channel layer 27, it is possible to substantially eliminate the influence of coupling noise in dot inversion driving and column inversion driving. This is because, in the active element 28 using an oxide semiconductor, a voltage corresponding to a video signal can be applied to the pixel electrode 20 in a very short time (for example, 2 msec), and the pixel voltage after the video signal is applied. This is because there is a high memory property to hold the signal, and no new noise is generated during the holding period utilizing the memory property, and the influence on touch sensing can be reduced.
  • oxide semiconductor an oxide semiconductor containing two or more metal oxides of indium, gallium, zinc, tin, aluminum, germanium, antimony, and cerium can be used.
  • Oxide semiconductors such as IGZO and IGAO have a high energy gap.
  • the atomic ratios of indium (In), gallium (Ga), and zinc (Zn when the number of indium atoms in Zn is 1) can be set to 1 to 5, respectively.
  • the melting points of indium oxide, gallium oxide, and zinc oxide as metal oxides are each in the range of about 1700 ° C. to 2200 ° C.
  • antimony oxide and bismuth oxide contain the above-mentioned indium oxide, gallium oxide, and zinc oxide.
  • antimony oxide or bismuth oxide may be used instead of gallium oxide or zinc oxide.
  • concentration of a metal element such as indium or gallium in the thickness direction of the oxide semiconductor may vary.
  • the amount of gallium oxide in the oxide semiconductor may be increased near the interface between the oxide semiconductor and the insulating layer, and the amount of indium oxide may be increased at the central portion in the film thickness direction.
  • FIGS. 15 and 16 are plan views partially showing pixels of the liquid crystal display device LCD1 according to the first embodiment of the present invention. In order to easily explain the alignment of the liquid crystal molecules 39, the alignment state of the liquid crystal in one pixel is shown.
  • FIG. 15 is a plan view partially showing a pixel of the liquid crystal display device LCD1 and showing a liquid crystal alignment state (initial alignment state) in one pixel.
  • FIG. 16 is a plan view partially showing a pixel of the liquid crystal display device LCD1 and showing a liquid crystal drive operation when a liquid crystal drive voltage is applied between the pixel electrode 20 and the common electrode 17.
  • FIG. In the example shown in FIGS.
  • the pixel electrode 20 is formed in a rectangular shape, and the longitudinal direction of the pixel electrode 20 coincides with the Y direction.
  • An alignment process is performed on the alignment film so that the liquid crystal molecules 39 of the liquid crystal layer 300 are inclined at an angle ⁇ with respect to the extending direction (Y direction) of the rectangular pixel electrode 20.
  • each pixel is divided into two regions, that is, each pixel has an upper region Pa (first region) and a lower region Pb (second region).
  • the upper region Pa and the lower region Pb are arranged symmetrically with respect to the pixel center CL (a center line parallel to the X direction).
  • the upper region Pa and the lower region Pb give a pretilt of an angle ⁇ to the liquid crystal molecules 39 of the liquid crystal layer 300 in the Y direction.
  • a pretilt of an angle ⁇ is imparted to the liquid crystal molecules 39 clockwise with respect to the Y direction.
  • a pretilt of an angle ⁇ is imparted to the liquid crystal molecules 39 counterclockwise with respect to the Y direction.
  • a photo-alignment treatment or a rubbing treatment can be employed as the alignment treatment of the alignment film.
  • the angle ⁇ may be in the range of 3 ° to 15 °.
  • the liquid crystal molecules 39 to which the initial alignment is given in this way are applied to the pixel electrode 20 and the common electrode 17 as shown by the arrows in FIG. 16 when a voltage is applied between the pixel electrode 20 and the common electrode 17.
  • a fringe electric field is generated, the liquid crystal molecules 39 are aligned along the direction of the fringe electric field, and the liquid crystal molecules 39 are driven. More specifically, as shown in FIG. 26, a fringe electric field from the pixel electrode 20 toward the common electrode 17 is generated, the liquid crystal molecules 39 are driven along the fringe electric field, and rotate in a plan view.
  • FIG. 26 is a cross-sectional view partially showing the liquid crystal display device LCD1 and shows a liquid crystal driving operation when a liquid crystal driving voltage is applied between the common electrode 17 and the pixel electrode 20.
  • FIG. in the liquid crystal driving method called FFS the liquid crystal molecules 39 are driven by an electric field generated between the common electrode 17 and the pixel electrode 20, particularly, an electric field generated at an electrode end called a fringe.
  • the liquid crystal molecules 39 in a part R1 in the thickness direction of the liquid crystal layer 300 rotate, and the liquid crystal molecules 39 mainly contribute to the transmittance change.
  • the vertical electric field driving liquid crystal such as VA which can fully utilize the liquid crystal molecules in the thickness direction of the liquid crystal layer 300 as compared with the horizontal electric field driving liquid crystal display device such as FFS with respect to the transmittance in the vertical direction seen from the observer.
  • High transmittance can be obtained in the display device.
  • the horizontal electric field drive liquid crystal display device such as FFS has a characteristic that the viewing angle is wide, from the viewpoint of this characteristic, the liquid crystal display device LCD1 according to the present embodiment adopts the horizontal electric field drive method.
  • FIG. 30 is a cross-sectional view showing a conventional liquid crystal display device 250, and is a schematic diagram showing equipotential lines L2 when a liquid crystal driving voltage is applied.
  • the equipotential line L2 passes through the transparent resin layer 213, the color filter 214, and the transparent substrate 215 and extends upward.
  • the equipotential line L2 is extended in the thickness direction of the liquid crystal layer 206, the effective thickness of the liquid crystal layer 206 is secured to some extent, so that the original transmittance of the lateral electric field drive type liquid crystal display device 250 can be secured. .
  • FIG. 31 is a cross-sectional view showing a conventional liquid crystal display device 250A, in which a counter electrode 221 is provided between the liquid crystal layer 206 and the transparent resin layer 213 in addition to the components of the liquid crystal display device 250 described above. Yes.
  • the equipotential line L3 does not penetrate the counter electrode 221, the shape of the equipotential line L3 is deformed from the shape of the equipotential line L2.
  • the effective thickness of the liquid crystal layer 206 is thinner than the effective thickness of the liquid crystal layer 206 of the liquid crystal display device 250, and the luminance (transmittance) of the liquid crystal display device 250A is greatly reduced.
  • the liquid crystal display device LCD1 according to the present embodiment is different from the conventional liquid crystal display device shown in FIGS.
  • the common electrode 17 is formed above the pixel electrode 20, the potential of the common electrode 17 is maintained at 0V, and a voltage is applied between the pixel electrode 20 and the common electrode 17.
  • a fringe electric field from the pixel electrode 20 toward the common electrode 17 is generated, and the liquid crystal molecules 39 are driven by the fringe electric field.
  • Touch sensing drive 17 and 18 show a structure in the case where the touch sensing wiring 3 functions as a touch drive electrode and the common electrode 17 functions as a touch detection electrode in the liquid crystal display device LCD1 according to the first embodiment of the present invention. Show. The following description will be made based on the structure shown in FIGS. As described above, the roles of the touch drive electrode and the touch detection electrode can be interchanged.
  • FIG. 17 is a schematic cross-sectional view showing a state where an electric field is generated between the touch sensing wiring and the common electrode.
  • FIG. It is sectional drawing which shows the change of the production
  • the touch sensing wiring 3 and the common electrode 17 face each other in an oblique direction inclined with respect to the thickness direction of the liquid crystal layer 300. For this reason, it is possible to easily improve the contrast of the detection signal with respect to a change in the state in which the oblique electric field is generated, and to increase the S / N ratio of touch sensing (S / N ratio improvement effect) is obtained. Further, in such an arrangement in which the touch sensing wiring 3 and the common electrode 17 face each other in an oblique direction, since the overlapping portion where the touch sensing wiring 3 and the common electrode 17 overlap in a plan view is not formed, the parasitic capacitance is greatly reduced. be able to.
  • the common electrode 17 functions as a detection electrode and has a length EL.
  • the common electrode 17 and the touch sensing wiring 3 functioning as a drive electrode and the common electrode 17 which is parallel in plan view and has a length EL can ensure a sufficient and uniform capacitance.
  • FIG. 17 schematically shows a capacitance generation state when the touch sensing wiring 3 functions as a touch drive electrode and the common electrode 17 functions as a touch detection electrode.
  • the touch sensing wiring 3 is supplied with a pulsed write signal at a predetermined frequency.
  • the supply of the writing signal may be performed by time division between liquid crystal driving and touch driving.
  • the electrostatic capacitance indicated by the electric force lines 33 (arrows) is maintained between the grounded common electrode 17 and the touch sensing wiring 3 by the write signal.
  • the plurality of touch sensing wires 3 extend in the first direction (for example, the Y direction) and are arranged in the second direction (for example, the X direction).
  • the plurality of common wirings 30 are positioned below the pixel electrodes 20 inside the array substrate 200 in the Z direction, extend in the second direction (for example, the X direction), and extend in the first direction (for example, for example) In the Y direction).
  • the common electrode 17 is electrically connected to the common wiring 30, and a change in capacitance between the common electrode 17 and the touch sensing wiring 3 is used for detecting the presence or absence of touch.
  • a rectangular wave pulse signal is applied between the touch sensing wiring 3 and the common electrode 17 at a frequency of, for example, 500 Hz to 500 KHz.
  • the common electrode 17 as the detection electrode maintains a constant output waveform by the application of the pulse signal.
  • the distance to the display surface of the pointer such as a finger can be measured by the time from the proximity of the pointer to contact (usually several hundred ⁇ sec or more and several msec or less), the number of output pulses counted within that time, and the like.
  • Stable touch detection can be performed by taking the integral value of the touch detection signal.
  • All of the touch sensing wiring 3 and the common wiring 30 may not be used for touch sensing. Thinning driving may be performed. Next, a case where the touch sensing wiring 3 is driven to be thinned will be described. First, all the touch sensing wires 3 are divided into a plurality of groups. The number of groups is less than the number of all touch sensing wires 3. Assume that the number of wires constituting one group is, for example, six. Here, out of all the wirings (the number of wirings is six), for example, two wirings are selected (the number smaller than the number of all the wirings, two ⁇ 6).
  • touch sensing is performed using two selected wirings, and the potentials of the remaining four wirings are set to floating potentials. Since the liquid crystal display device LCD1 has a plurality of groups, touch sensing can be performed for each group in which the wiring function is defined as described above. Similarly, thinning driving may be performed on the common wiring 30 as well.
  • a pointer used for touching is a finger and a pen is different in the area and capacity of a pointer that is in contact with or close to the pointer. The number of wires to be thinned out can be adjusted by such a large pointer.
  • a pointer with a thin tip such as a pen or a needle tip can reduce the number of thinned wires and use a high-density touch sensing wiring matrix. Even during fingerprint authentication, a high-density touch sensing wiring matrix can be used.
  • the number of wires used for scanning or detection is reduced, so that the touch sensing speed can be increased.
  • the number of wirings constituting one group is six.
  • one group is formed with the number of wirings of 10 or more, and two wirings selected in one group are connected.
  • Touch sensing may be used. That is, the number of thinned-out wirings (the number of wirings having a floating potential) is increased, thereby reducing the density of selected wirings used for touch sensing (the density of selected wirings with respect to the total number of wirings).
  • Touch sensing may be used. That is, the number of thinned-out wirings (the number of wirings having a floating potential) is increased, thereby reducing the density of selected wirings used for touch sensing (the density of selected wirings with respect to the total number of wirings).
  • the source wiring 31 and the gate wiring 10 can be grounded or opened (floating) to reduce parasitic capacitance caused by these wirings.
  • Touch sensing drive and liquid crystal drive can be performed in a time-sharing manner.
  • the frequency of touch driving may be adjusted according to the required speed of touch input.
  • the touch drive frequency can be higher than the liquid crystal drive frequency.
  • the timing at which a pointer such as a finger contacts or approaches the surface of the display device substrate 100 on the viewer side is irregular and short, so that the touch drive frequency is preferably high.
  • the touch drive frequency different from the liquid crystal drive frequency there are several methods for making the touch drive frequency different from the liquid crystal drive frequency.
  • the backlight may be turned off during black display (off), and touch sensing may be performed during this black display period (a period that does not affect liquid crystal display).
  • various touch drive frequencies can be selected. Even when a liquid crystal having negative dielectric anisotropy is used, it is easy to select a touch drive frequency different from the liquid crystal drive frequency.
  • the electric lines of force 33 generated from the touch sensing wiring 3 toward the common electrode 17 act in an oblique direction or a thickness direction of the liquid crystal layer 300, but have different negative dielectric constants.
  • liquid crystal having directionality If liquid crystal having directionality is used, the liquid crystal molecules do not rise in the direction of the electric force lines 33, so that the influence on the display quality is reduced. Furthermore, when the wiring resistance of the touch sensing wiring 3 or the common wiring 30 is lowered and the touch driving voltage is lowered as the resistance decreases, a touch driving frequency different from the liquid crystal driving frequency can be easily set. By using a metal or alloy having good conductivity such as copper or silver for the metal layer constituting the touch sensing wiring 3 or the common wiring 30, a low wiring resistance can be obtained.
  • a display device that performs 3D (stereoscopic video) display
  • a plurality of video signals (for example, for the right eye) are displayed in order to display a three-dimensional front image or a deep image in addition to a normal two-dimensional image display.
  • the liquid crystal driving frequency for example, high-speed driving such as 240 Hz or 480 Hz and many video signals are required.
  • the merit obtained by making the touch drive frequency different from the liquid crystal drive frequency is great.
  • high-speed and high-accuracy touch sensing is possible in a 3D display game device. This embodiment is particularly useful for a display with a high touch input frequency such as a finger of a game machine or an automatic teller machine.
  • the liquid crystal drive frequency is 60 Hz or a drive frequency that is an integral multiple of this frequency.
  • the touch sensing part is affected by noise associated with the liquid crystal driving frequency.
  • a normal household power supply is an AC power supply of 50 Hz or 60 Hz, and the touch sensing part easily picks up noise generated from an electric device that operates with such an external power supply. Therefore, by adopting a frequency different from the frequency of 50 Hz or 60 Hz or a frequency slightly shifted from an integer multiple of these frequencies as the frequency of touch driving, the influence of noise generated from liquid crystal driving or external electronic devices can be reduced. It can be greatly reduced.
  • the application timing of the touch sensing drive signal may be shifted from the application timing of the liquid crystal drive signal on the time axis.
  • the shift amount may be a slight amount, for example, a shift amount of ⁇ 3% to ⁇ 17% from the noise frequency.
  • interference with noise frequencies can be reduced.
  • a different frequency that does not interfere with the liquid crystal driving frequency and the power supply frequency can be selected as the frequency of the touch driving, for example, from the range of 500 Hz to 500 KHz.
  • the influence of noise such as coupling noise in column inversion drive can be reduced.
  • the power consumption in the touch sensing can be reduced by detecting the touch position by the thinning drive as described above, instead of supplying the drive voltage to all of the touch sensing wires 3.
  • wiring that is not used for touch sensing may be switched to a detection electrode or a driving electrode by a switching element to perform high-definition touch sensing.
  • the wiring having the floating pattern can be switched so as to be electrically connected to the ground (grounded to the housing).
  • the signal wiring of an active element such as a TFT may be temporarily grounded to a ground (a housing or the like) when a touch sensing signal is detected.
  • touch sensing wiring that requires time to reset the capacitance detected by touch sensing control that is, touch sensing wiring having a large time constant (product of capacitance and resistance) in touch sensing, for example, touches on odd rows
  • the sensing wiring and the touch sensing wiring in the even-numbered rows may be alternately used for sensing to perform driving with the time constant adjusted.
  • a plurality of touch sensing wirings may be grouped for driving and detection. The grouping of the plurality of touch sensing wires may not be line sequential but may be a collective detection method called a self detection method for each group. Parallel driving may be performed in units of groups. Alternatively, in order to cancel noise such as parasitic capacitance, a difference detection method that takes a difference between detection signals of touch sensing wirings close to or adjacent to each other may be employed.
  • the liquid crystal display device LCD1 that has a high S / N ratio, a high resolution, and that can respond to high-speed touch input. Further, by using a thin film transistor including an oxide semiconductor as a channel layer, a liquid crystal display device with low power consumption, less flicker, and a touch sensing function can be realized.
  • FIG. 19 is an enlarged cross-sectional view showing a main part of a liquid crystal display device according to a modification of the first embodiment of the present invention.
  • the same members as those in the above-described embodiment are denoted by the same reference numerals, and the description thereof is omitted or simplified.
  • the third insulating layer 13 formed on the array substrate 200, the protruding portion 13A formed on the third insulating layer 13, and the common wiring 30 formed on the protruding portion 13A are shown. Other insulating layers, wirings, electrodes, etc. are omitted.
  • the protruding portion 13A is formed using, for example, the insulating material for forming the insulating layer described above.
  • the pattern of the protrusion 13A and the pattern of the common wiring 30 match.
  • the height between the upper surface of the protrusion 13A and the upper surface of the third insulating layer 13 where the protrusion 13A is not formed is W3.
  • the protrusion 13A is additionally formed on the third insulating layer 13 previously formed on the fourth insulating layer 14.
  • the method of providing in is mentioned.
  • a known film forming process or patterning process is used as a method for forming such a protrusion 13A.
  • the material of the third insulating layer 13 and the material of the protrusion 13A may be the same or different.
  • the third insulating layer 13 functions as a gate insulating film located between the gate electrode 25 and the channel layer 27, and has an appropriate film thickness considering the switching characteristics of the active element 28. Required. For this reason, in consideration of both the suppression of noise caused by the video signal supplied to the source wiring on the common wiring 30 and the realization of a desired switching characteristic in the active element 28, the fourth insulation. It is necessary to partially vary the film thickness of the third insulating layer 13 on the layer 14.
  • the third insulating layer 13 is formed on the fourth insulating layer 14 with an appropriate film thickness considering the switching characteristics of the active element 28, and then the height W3 considering the influence of noise on the common wiring 30.
  • a protrusion 13 ⁇ / b> A is formed on the third insulating layer 13.
  • the common wiring 30 is formed on the protruding portion 13A. According to this configuration, the thickness of the insulator between the common wiring 30 and the source wiring 31 (the sum of the thickness of the third insulating layer 13 and the thickness of the protruding portion 13A) is maintained large, and the channel layer 27 is maintained. The thickness of the third insulating layer 13 located immediately above can be reduced. As a result, it is possible to suppress the noise caused by the video signal supplied to the source wiring from getting on the common wiring 30 and to realize desired switching characteristics in the active element 28.
  • FIG. 20 is a plan view partially showing the array substrate 200 constituting the liquid crystal display device LCD2 according to the second embodiment of the present invention, and is a plan view seen from the observer side.
  • FIG. 21 is a cross-sectional view partially showing the array substrate 200 constituting the liquid crystal display device LCD2 according to the second embodiment of the present invention, and is a cross-sectional view taken along the line DD ′ shown in FIG. FIG.
  • FIG. 22 is a plan view partially showing a liquid crystal display device LCD2 according to the second embodiment of the present invention.
  • the display device includes a color filter and touch sensing wiring on the array substrate 200 via a liquid crystal layer. It is a top view which shows the structure where the board
  • FIG. 23 is a sectional view partially showing the array substrate 200 constituting the liquid crystal display device LCD2 according to the second embodiment of the present invention, and is a sectional view taken along the line EE ′ shown in FIG.
  • FIG. 24 is a plan view partially showing a pixel of the liquid crystal display device LCD2 according to the second embodiment of the present invention, and is a plan view showing the alignment state of the liquid crystal in one pixel.
  • FIG. 23 is a sectional view partially showing the array substrate 200 constituting the liquid crystal display device LCD2 according to the second embodiment of the present invention, and is a sectional view taken along the line EE ′ shown in FIG.
  • 25 is a plan view partially showing a pixel of the liquid crystal display device LCD2 according to the second embodiment of the present invention, in which a liquid crystal driving voltage is applied when a liquid crystal driving voltage is applied between the pixel electrode and the common electrode. It is a top view which shows operation
  • the pixels included in the liquid crystal display device LCD2 according to the second embodiment have a dog-legged pattern.
  • the common electrode 17 and the pixel electrode 20 have an inclined portion inclined at an angle ⁇ with respect to the Y direction.
  • the common electrode 17 and the pixel electrode 20 in each pixel have an upper region Pa (first region) and a lower region Pb (second region).
  • the upper region Pa and the lower region Pb are arranged line-symmetrically with respect to the pixel center (a center line parallel to the X direction).
  • the common electrode 17 and the pixel electrode 20 are inclined at an angle ⁇ clockwise with respect to the Y direction.
  • the common electrode 17 and the pixel electrode 20 are inclined at an angle ⁇ counterclockwise with respect to the Y direction.
  • the alignment film is subjected to a rubbing process along the alignment processing direction Rub parallel to the Y direction, thereby giving the liquid crystal molecules 39 initial alignment in the Y direction. be able to.
  • a photo-alignment treatment or a rubbing treatment can be employed as the alignment treatment of the alignment film.
  • the angle ⁇ may be in the range of 3 ° to 15 °.
  • the common electrode 17 is formed with a stripe pattern, and has two electrode portions 17A formed in a dogleg shape.
  • the contact hole H is located at the center of the conductive pattern of the common electrode 17 (electrode part 17A, a dogleg-shaped pattern).
  • the blue filter (blue) also has a dog-legged pattern.
  • a channel layer 27, a source electrode 24, and a drain electrode 26 are formed on the fourth insulating layer 14.
  • the source electrode 24 and the drain electrode 26 are formed on the channel layer 27 (FIG. 11), but in the present embodiment, the channel layer 27 is formed on the source electrode 24 and the drain electrode 26. ing. That is, in the present embodiment, the source electrode 24 and the drain electrode 26 are formed on the fourth insulating layer 14 in advance.
  • a three-layer configuration of molybdenum / aluminum alloy / molybdenum was adopted. A part of the channel layer 27 overlaps with the source electrode 24 and the drain electrode 26.
  • a composite oxide semiconductor of indium oxide, gallium oxide, and zinc oxide is employed. Zinc oxide can be replaced by antimony oxide.
  • FIG. 25 shows a liquid crystal driving operation when a liquid crystal driving voltage is applied between the common electrode 17 and the pixel electrode 20.
  • the liquid crystal driving voltage is applied in the direction of the arrow from the pixel electrode 20 to the common electrode 17, and a fringe electric field from the pixel electrode 20 toward the common electrode 17 is generated as shown in FIG. Rotate along the arrow direction in plan view.
  • the liquid crystal molecules 39 located in the upper region Pa of the pixel and the lower region Pb of the pixel rotate in opposite directions as shown in FIG. Specifically, the liquid crystal molecules 39 in the upper region Pa rotate counterclockwise, and the liquid crystal molecules 39 in the lower region Pb rotate clockwise. Therefore, optical compensation can be realized, and the viewing angle of the liquid crystal display device LCD2 can be widened.
  • liquid crystal molecules 39 liquid crystal molecules having positive dielectric anisotropy are employed.
  • liquid crystal molecules having negative dielectric anisotropy are employed, the liquid crystal molecules are unlikely to rise in the thickness direction of the liquid crystal layer 300.
  • the touch drive voltage is applied in a direction from the touch sensing wiring 3 toward the common electrode 17, that is, in an oblique direction inclined with respect to the thickness direction of the liquid crystal. It is preferable to employ liquid crystal molecules having As the liquid crystal material, for example, a high purity material having a specific resistivity of the liquid crystal layer 300 of 1 ⁇ 10 13 ⁇ cm or more is desirable.
  • the initial alignment is performed on the liquid crystal molecules 39 in the upper region Pa and the lower region Pb. Can be granted.
  • FIG. 32 is an enlarged plan view showing one pixel of a conventional liquid crystal display device using the FFS mode, and is a plan view showing an array substrate.
  • the pixel electrode 50 is located on the upper surface of the array substrate, and the common electrode 47 is located below the pixel electrode 50 via the insulating layer.
  • the pixel electrode 50 and the common electrode are formed of a transparent conductive film such as ITO.
  • the pixel electrode 50 is electrically connected to the drain electrode of the thin film transistor 46 through the contact hole 48.
  • a contact hole 48 is disposed at a position close to the thin film transistor 46 located at the upper end portion of the pixel electrode 50.
  • This embodiment is different from the conventional configuration of the cooperation unit in which the pixel electrode 50 and the thin film transistor 46 are connected as shown in FIG.
  • any common electrode 17 is electrically connected to the conductive wiring (common wiring 30) through a contact hole H (LH, RH) located in the center in the longitudinal direction of the pixel. Therefore, there is an advantage that the difference in resistance value of the transparent conductive film forming the common electrode 17 is smaller than that in the conventional configuration. Since the above-described conventional pixel electrode cooperation portion is not provided, the adverse effect of the liquid crystal disclination region D hardly occurs.
  • the stripe pattern or the dogleg-shaped pattern extending in the Y direction has been described as the pattern of the common electrode 17, but the present invention is not limited to this configuration.
  • a square pattern, a rectangular pattern, a parallelogram pattern, or the like may be employed.
  • FIG. 27 is a plan view partially showing an array substrate of a liquid crystal display device according to a third embodiment of the present invention.
  • FIG. 28 is a plan view partially showing a display device according to a third embodiment of the present invention, in which a display device substrate having a color filter and touch sensing wiring is laminated on an array substrate via a liquid crystal layer. It is a top view which shows the made structure, and is the top view seen from the observer side.
  • FIG. 29 is a cross-sectional view partially showing an array substrate constituting a display device according to the third embodiment of the present invention.
  • the pixel openings 18 in the third embodiment are formed in parallelogram shapes with different angles in plan view, and are arranged in the Y direction. Each of the pixels is divided into a matrix by gate wirings 10 parallel to the X direction and source wirings 31 along the parallelogram-shaped pixels.
  • an active element 28 is provided at the upper right end of each pixel opening 18.
  • the active element 28 includes a source electrode 24 connected to the source wiring 31, a channel layer 27, a drain electrode 26, and a gate electrode 25 disposed to face the channel layer 27 via an insulating film.
  • the gate electrode 25 of the active element 28 constitutes a part of the gate wiring 10 and is connected to the gate wiring 10. Note that the structure of the active element which is a thin film transistor is the same as the structure shown in FIG.
  • the pixel electrode 20 is electrically connected to the drain electrode 26 through a contact hole 29 located at the upper right corner of the pixel electrode 20 as shown in FIG.
  • the common electrode 17 has a stripe pattern. Specifically, the common electrode 17 extends in parallel to an extending direction (a direction inclined at an angle ⁇ with respect to the Y direction) of the pixel having a parallelogram shape in the Y direction. Located in the center. One common electrode 17 is provided for each pixel. The angle ⁇ is an inclination with respect to the Y direction in plan view. In each lower part of the common electrode 17, a pixel electrode 20 located in a lower part of the first insulating layer 11 in a cross-sectional view is provided.
  • a third contact hole 43H is provided in the center of the common electrode 17 in the Y direction.
  • the common electrode 17 is connected to the common wiring 30 (conductive wiring) through the third contact hole 43H.
  • each pixel is provided with one common electrode 17, and the number of third contact holes 43H is one in each pixel.
  • a contact hole in which the common electrode 17 and the common wiring 30 are electrically connected is a third. This is referred to as contact hole 43H.
  • the angle ⁇ can be set to an angle of 3 ° to 15 °, for example.
  • the liquid crystal molecules are aligned parallel to the plane on which the common electrode 17 or the pixel electrode 20 is provided, and the major axis direction is aligned parallel to the Y direction.
  • This is so-called FFS mode liquid crystal drive driven by a liquid crystal drive voltage applied between the common electrode 17 and the pixel electrode 20.
  • Touch sensing is performed by detecting a change in capacitance between the touch sensing wiring 3 and the common electrode 17.
  • Either the touch sensing wiring 3 or the common electrode 17 can be used as a touch drive electrode, and either can be used as a touch detection electrode.
  • FIG. 29 shows the distance W ⁇ b> 1 between the touch sensing wiring 3 and the common electrode 17.
  • the distance W1 is a distance in the Z direction in a space including the transparent resin layer 16, the color filter 51 (RGB), the alignment film (not shown), and the liquid crystal layer 300.
  • This space does not include active elements, source lines, and pixel electrodes.
  • this space indicated by the distance W1 is referred to as a touch sensing space.
  • the distance W4 between the common wiring 30 and the gate wiring 10 can be ensured, the influence of the gate signal on touch sensing can be reduced.
  • the distance W2 between the source wiring 31 to which the video signal is supplied and the touch sensing wiring 3 can be sufficiently secured, it is possible to reduce the influence on the touch sensing caused by the noise caused by the video signal. .
  • the display device substrate of this embodiment includes a color filter 51 (RGB) including a black matrix, a black matrix BM, and a touch sensing wiring 3 provided on the black matrix BM on the liquid crystal layer side.
  • RGB color filter 51
  • the color filter 51 is used. It can be omitted.
  • the liquid crystal display device according to the above-described embodiment can be applied in various ways.
  • electronic devices to which the liquid crystal display device according to the above-described embodiments can be applied mobile phones, portable game devices, portable information terminals, personal computers, electronic books, video cameras, digital still cameras, head mounted displays, navigation systems, Examples include sound reproducing devices (car audio, digital audio player, etc.), copying machines, facsimiles, printers, printer multifunction devices, vending machines, automatic teller machines (ATMs), personal authentication devices, optical communication devices, and the like.
  • ATMs automatic teller machines
  • the liquid crystal driving method applicable to the present invention is not limited to the liquid crystal driving method described in the above embodiment.
  • the liquid crystal driving method described below may be used.
  • the liquid crystal may be driven by inverting the polarity of the signal electrode (source wiring) in the active matrix (for example, described in Japanese Patent No. 2982877).
  • dot inversion driving may be performed by alternately switching the first signal line (source wiring) and the second signal line for each horizontal period of liquid crystal driving (for example, see Japanese Patent Laid-Open No. Hei. 11-102174).
  • two source wirings per pixel are used as a data drive (source wiring), and an image signal having a different polarity for each frame is transmitted to the data drive to perform horizontal line driving.
  • Good for example, described in JP-A-9-134152.
  • two gate wirings per pixel may be used as scanning signal lines (gate wirings). In this case, for example, reverse polarity data is written to the odd-numbered scanning signal lines and the even-numbered scanning signal lines.
  • data of opposite polarity may be written in the odd-numbered column and even-numbered column of adjacent pixels, respectively, and data of opposite polarity to the previous display period may be written in the next display period (see, for example, 7-181927).
  • the number of active elements (TFTs) per pixel may be one or more in any method.
  • the liquid crystal driving technique described above can be applied to the present invention.
  • Liquid crystal display device 300 Liquid crystal layer BM ... Black matrix BU ... Backlight unit W17A ... Width D20S ... Diameter EL ... Length H ... Contact hole L ... Light L2 ... etc.
  • Potential line L3 ... equipotential line LH ... left contact hole (first contact hole) RH: Right contact hole (second contact hole) LCD1 ... Liquid crystal display device LCD2 ... Liquid crystal display device LCD3 ... Liquid crystal display device P17A ... Pitch Pa ... Upper region Pb ... Lower region Rub ... Orientation processing direction W1 ... Touch Distance W2 between sensing wiring and common electrode: Distance W3 between touch sensing wiring and source wiring W3: Height W4: Distance ⁇ between touch sensing wiring and gate wiring: Angle (length of pixel opening) Tilt from direction Y)

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Abstract

A liquid-crystal display device (LCD1, LCD2, LCD3) according to the present invention includes: a display-device substrate (100); an array substrate (200); a display function layer (300) sandwiched between the display-device substrate (100) and the array substrate (200); and a control unit (120). The display-device substrate (100) includes touch sensing wiring lines (3). The array substrate (200) includes a common electrode (17) having one or more electrode sections (17A) provided individually at a plurality of pixel openings (18); conductive wiring lines (30) electrically connected to the common electrode (17) and crossing the plurality of pixel openings (18) under a second insulating layer (12); active elements (28) implemented by thin-film transistors having a top-gate structure, the active elements (28) being provided under a third insulating layer (13) and electrically connected to pixel electrodes (20); gate wiring lines (10) having the same layer configuration as the conductive wiring lines (30), formed between the second insulating layer and the third insulating layer at the same positions as the conductive wiring lines (30), and extending in a second direction in plan view so as to be electrically linked with the active element; and contact holes (H) provided at the centers in the lengthwise direction of the patterns of the electrode sections (17A) and electrically interconnecting the common electrode (17) and the conductive wiring lines (30). The touch sensing wiring lines (3) and the common electrode (17) face each other in an oblique direction inclined relative to the thickness direction of the display function layer (300).

Description

表示装置Display device
 本発明は、安定したタッチセンシングが可能で、かつ、タッチセンシング感度が高い表示装置に関する。 The present invention relates to a display device capable of stable touch sensing and having high touch sensing sensitivity.
 テレビ等の大型ディスプレイ、タブレット、スマートフォン等に、表示機能層を備える表示装置が用いられている。表示機能層として液晶を用いている液晶表示装置は、大まかに、ガラス等の2枚の透明基板間に液晶層が挟持された構成を有する。こうした液晶表示装置における主要な液晶駆動方式は、縦電界方式として知られているVA(Vertical Alignment)モードと、横電界方式として知られているIPS(In-Plane Switching)モード、或いは、フリンジ電界スイッチングFFS(Fringe Field Switching)モードに大別することができる。 Display devices having a display function layer are used for large displays such as televisions, tablets, smartphones, and the like. A liquid crystal display device using liquid crystal as a display functional layer has a configuration in which a liquid crystal layer is sandwiched between two transparent substrates such as glass. The main liquid crystal driving method in such a liquid crystal display device is a VA (Vertical Alignment) mode known as a vertical electric field method, an IPS (In-Plane Switching) mode known as a horizontal electric field method, or fringe electric field switching. FFS (Fringe Field Switching) mode can be roughly classified.
 表示機能層として有機発光ダイオードを用いている有機EL装置(OLED: Organic Light Emitting Diode)は、表示装置の薄型化の観点で注目されている。電気要素と機械的要素とで構成されるEMS(Electro Mechanical System)は、低消費電力化の観点で注目されている。MEMS(Micro-Electro-Mechanical System)は、アクチュエータ、トランスデューサー、センサ、マイクロミラー、MEMSスイッチ、及び光学フィルム等の光学部品、並びに光干渉変調器(IMOD:Interferometric Modulation)を含む。また、近年では、複数のマイクロLEDが基板上に配列された表示機能層も知られている。 Organic EL devices (OLEDs: Organic Light Emitting Diodes) that use organic light-emitting diodes as display functional layers are attracting attention from the viewpoint of reducing the thickness of display devices. EMS (Electro Mechanical System) composed of electrical elements and mechanical elements has attracted attention from the viewpoint of reducing power consumption. A MEMS (Micro-Electro-Mechanical System) includes an optical component such as an actuator, a transducer, a sensor, a micromirror, a MEMS switch, and an optical film, and an interferometric modulator (IMOD). In recent years, a display functional layer in which a plurality of micro LEDs are arranged on a substrate is also known.
 IPSモード又はFFSモードにおいては、液晶表示装置の基板面に対して液晶分子を水平配向させ、基板面に対して略平行な方向に電界を液晶分子に印加することによって、液晶駆動が行われる。IPSモード又はFFSモードは、広い視野角を有する液晶表示装置において用いられる液晶駆動方式である。FFSモードが採用された液晶表示装置は、フリンジ電界を用いることで高速に液晶を駆動することができるといった大きなメリットを有する。 In the IPS mode or the FFS mode, liquid crystal driving is performed by horizontally aligning liquid crystal molecules with respect to the substrate surface of the liquid crystal display device and applying an electric field to the liquid crystal molecules in a direction substantially parallel to the substrate surface. The IPS mode or the FFS mode is a liquid crystal driving method used in a liquid crystal display device having a wide viewing angle. A liquid crystal display device adopting the FFS mode has a great merit that a liquid crystal can be driven at high speed by using a fringe electric field.
 液晶の駆動方式に関して、液晶表示の焼きつきを抑制するために、所定の映像表示期間が経過した後に液晶層に印加する電圧の正と負を反転させる極性反転駆動(交流反転駆動)が行われている。極性反転駆動の方法としては、複数の画素の各々の極性を個別に反転させるドット反転駆動、画面の横方向に沿って複数の画素が配列されている行単位で画素の極性を反転させる水平ライン反転駆動、画面の縦方向に沿って複数の画素が配列されている列単位で画素の極性を反転させるカラム反転駆動、一画面単位で画素の極性を反転させる、或いは、画面を複数のブロックで区画するとともにブロック単位で画素の極性を反転させるフレーム反転駆動等が知られている。こうした液晶駆動技術は、例えば、特許文献1~5、7に記載、或いは、示唆されている。 Regarding the liquid crystal drive system, in order to suppress burn-in of the liquid crystal display, polarity inversion drive (AC inversion drive) is performed to invert the voltage applied to the liquid crystal layer after a predetermined video display period has elapsed. ing. The polarity inversion driving method includes dot inversion driving that individually inverts the polarity of each of a plurality of pixels, and a horizontal line that inverts the polarity of each pixel in a row in which a plurality of pixels are arranged along the horizontal direction of the screen. Inversion driving, column inversion driving to invert the polarity of pixels in a column unit in which a plurality of pixels are arranged along the vertical direction of the screen, inversion of pixel polarity in units of one screen, or screen in a plurality of blocks Frame inversion driving or the like that partitions and inverts the polarity of pixels in units of blocks is known. Such liquid crystal driving techniques are described or suggested in, for example, Patent Documents 1 to 5 and 7.
 こうした液晶表示装置として、近時、静電容量を検知する手段を備えたタッチセンシング機能を有する液晶表示装置が多く利用されている。タッチセンシング方式としては、指やペン等のポインタが表示画面に接触或いは近接したときに発生する静電容量変化を、例えば、X方向とY方向に配列されたタッチセンシング配線(タッチ電極)によって検知する方式が、主に利用されている。
 また、タッチセンシング機能を有する表示装置の構造としては、タッチセンシング機能を備えたタッチパネルを表示装置の表面に貼り付けたアウトセル方式と、表示装置自体がタッチセンシング機能を備えたインセル方式とが知られている。近年では、アウトセル方式よりも、多くの表示装置がインセル方式を採用している。
As such a liquid crystal display device, a liquid crystal display device having a touch sensing function provided with means for detecting capacitance has recently been used. As a touch sensing method, a change in capacitance that occurs when a pointer such as a finger or pen touches or approaches a display screen is detected by, for example, touch sensing wires (touch electrodes) arranged in the X and Y directions. This method is mainly used.
As the structure of a display device having a touch sensing function, an out-cell method in which a touch panel having a touch sensing function is attached to the surface of the display device and an in-cell method in which the display device itself has a touch sensing function are known. ing. In recent years, more display devices have adopted the in-cell method than the out-cell method.
 特許文献2~6は、インセル方式を用いたタッチセンシング技術が開示されている。しかしながら、インセル方式においては、これらの特許文献では明らかにされていないタッチセンシング技術の問題が出てきている。換言すれば、タッチパネル外付け方式では問題となりにくかった問題、即ち、タッチセンシング配線が、液晶セル内部に設けられたアクティブ素子に電気的に連携されたソース配線からのノイズの影響を受け易いといった新たな技術課題がある。 Patent Documents 2 to 6 disclose touch sensing technology using an in-cell method. However, the in-cell method has a problem of touch sensing technology that is not clarified in these patent documents. In other words, a problem that is not likely to be a problem with the external touch panel method, that is, the touch sensing wiring is easily affected by noise from the source wiring electrically linked to the active element provided in the liquid crystal cell. There are major technical issues.
 特許文献1は、液晶駆動に関して、画面の縦方向に沿って複数の画素が配列されている列単位で画素の極性を反転させる技術を開示している。特許文献1は、タッチセンシング技術を含んでいない。
 特許文献2は、ドット反転駆動に関する記載を含むとともに、タッチセンシング技術を開示している。特許文献2の開示においては、タッチセンシング機能を行う駆動電極及び検出電極が実質的に金属配線で構成されている。
 特許文献3は、面内切り替え(IPS)液晶ディスプレイに関し、タッチセンシング駆動電極が、タッチセンシング信号の検出及びディスプレイに使用される電極対を形成する技術を開示している。このような特許文献3の開示は、特許文献5に記載の請求項2の特徴点に類似している。
Patent Document 1 discloses a technique for reversing the polarity of pixels in units of columns in which a plurality of pixels are arrayed along the vertical direction of the screen with respect to liquid crystal driving. Patent Document 1 does not include touch sensing technology.
Patent Document 2 includes a description about dot inversion driving and discloses a touch sensing technique. In the disclosure of Patent Document 2, the drive electrode and the detection electrode that perform the touch sensing function are substantially configured by metal wiring.
Patent Document 3 relates to an in-plane switching (IPS) liquid crystal display and discloses a technique in which touch sensing drive electrodes form electrode pairs used for detection of touch sensing signals and display. Such disclosure of Patent Document 3 is similar to the feature point of Claim 2 described in Patent Document 5.
 特許文献4は、カラーフィルタ上にカウンタ電極が積層された縦電界方式の液晶表示装置に、タッチスクリーン技術が組み込まれた構造を開示している。このような構造は、例えば、特許文献4の請求項1及び実施例に示されている。また、特許文献4の請求項1に記載されているように、ディスプレイピクセルは、蓄積コンデンサを含む。更に、タッチ駆動電極は、表示動作の間、蓄積コンデンサのカウンタ電極として動作する。なお、特許文献4の段落0156以降には、面内切り替え(IPS)の2種類の電極が単一面内で互いに平行になっている構成が開示されている。特許文献4の段落0157では、IPSディスプレイが、タッチ駆動又はタッチ感知に使用できるVcom層を欠いていることが示されている。
 特許文献4が開示する構造においては、yVcomをxVcomにクロスオーバーさせる必要がある(特許文献4の段落0033、及び図5、図1E、図1F等)。
Patent Document 4 discloses a structure in which a touch screen technology is incorporated in a vertical electric field type liquid crystal display device in which counter electrodes are stacked on a color filter. Such a structure is shown, for example, in claim 1 and Example of Patent Document 4. Further, as described in claim 1 of Patent Document 4, the display pixel includes a storage capacitor. Further, the touch drive electrode operates as a counter electrode of the storage capacitor during the display operation. It should be noted that the paragraph 0156 et seq. Of Patent Document 4 discloses a configuration in which two types of in-plane switching (IPS) electrodes are parallel to each other in a single plane. Patent Document 4 paragraph 0157 shows that an IPS display lacks a Vcom layer that can be used for touch drive or touch sensing.
In the structure disclosed in Patent Document 4, it is necessary to cross over yVcom to xVcom (paragraph 0033 of Patent Document 4, FIG. 5, FIG. 1E, FIG. 1F, etc.).
 特許文献5は、液晶セル内に直交する帯状導体を用いたタッチセンシング技術を開示している。
 特許文献6は、透明材料で構成されて第1方向に延びる複数のタッチ駆動電極(ドライブ領域として相互接続導線xVcomに接続される)と、第2方向に延びる複数のタッチ検出電極(センス領域としてyVcomで接続される)とを備え、タッチ駆動電極及びタッチ検出電極のうち一方が、液晶ディスプレイのカウンタ電極として機能することを開示している。
 特許文献6は、複数のディスプレイピクセルの第1グループを含むドライブ線と、複数のディスプレイピクセルの第2グループを含むセンス線との間でタッチセンシングを行う技術を開示しており、第2グループの回路素子間にバイパストンネルが設けられた極めて複雑な構成になっている。
Patent Document 5 discloses a touch sensing technique using strip-shaped conductors orthogonal to each other in a liquid crystal cell.
Patent Document 6 discloses a plurality of touch drive electrodes (connected to the interconnection conductor xVcom as a drive region) made of a transparent material and extending in the first direction, and a plurality of touch detection electrodes (as sense regions) extending in the second direction. and one of the touch drive electrode and the touch detection electrode functions as a counter electrode of the liquid crystal display.
Patent Document 6 discloses a technique for performing touch sensing between a drive line including a first group of a plurality of display pixels and a sense line including a second group of the plurality of display pixels. It has a very complicated configuration in which a bypass tunnel is provided between circuit elements.
 特許文献7は、液晶駆動の線順次走査を行う場合の画質低下を抑える手段を開示している。特許文献7においては、液晶を駆動するアクティブ素子(TFT:Thin Film Transistor、薄膜トランジスタ)にポリシリコン半導体が用いられている。更に、ラッチ部を含む転送回路を設けて電位保持を行うことで、オフリーク電流の多いポリシリコンのTFT固有の走査信号線の電位低下を防ぐとともに、液晶表示の画質低下を防いでいる。
 また、特許文献7の図6、図7、及び段落0035の記載から、タッチ検出電極及び画素信号線が平行であり、かつ、平面視において重畳するよう構成されている。本来、タッチ検出配線とタッチの駆動電極COMLとの距離を短くすることによってS/N比(特に、「S」、シグナルの値)を高くすることができる。しかしながら、タッチ検出電極と画素信号線とが平面視において画素の長手方向に延在するように長い線状に形成されかつ重畳する構成においては、タッチ検出電極と画素信号線とを近づけることにより上記2本の線間に生じる寄生容量が大きくなる。換言すれば、画素信号線から生じる「N」(ノイズ)がタッチ検出電極に加わり易く、結果としてS/N比を向上させにくい。
Japanese Patent Application Laid-Open No. H10-228561 discloses a means for suppressing deterioration in image quality when liquid crystal driving line sequential scanning is performed. In Patent Document 7, a polysilicon semiconductor is used for an active element (TFT: Thin Film Transistor) that drives liquid crystal. Furthermore, by providing a transfer circuit including a latch unit to hold the potential, a potential drop of a scanning signal line specific to a polysilicon TFT having a large off-leakage current is prevented and a picture quality of a liquid crystal display is prevented from being lowered.
Further, from the description of FIGS. 6, 7, and paragraph 0035 of Patent Document 7, the touch detection electrodes and the pixel signal lines are configured to be parallel and overlap in a plan view. Essentially, the S / N ratio (especially “S”, signal value) can be increased by shortening the distance between the touch detection wiring and the touch drive electrode COML. However, in a configuration in which the touch detection electrode and the pixel signal line are formed in a long line shape and overlapped so as to extend in the longitudinal direction of the pixel in plan view, the touch detection electrode and the pixel signal line are brought closer to each other by bringing them closer to each other. The parasitic capacitance generated between the two lines is increased. In other words, “N” (noise) generated from the pixel signal line is easily added to the touch detection electrode, and as a result, the S / N ratio is hardly improved.
 特許文献8の段落0064においては、薄膜トランジスタの信号線、走査線、及び液晶駆動に用いられる補助容量線の配線構造として、インジウム含有層/銅/インジウム含有層で構成される3層構造の金属配線を形成する技術が開示されている。
 また、特許文献8は、後述するタッチセンシング空間内に信号線(ソース線)や画素電極が含まれている構成を開示している。信号線(ソース線)や画素電極は、ノイズ発生源となるため、タッチセンシングへの信号(映像信号)に起因のノイズの影響を減少させることを考慮していない。例えば、特許文献8の第4実施形態や図11では、タッチセンシングに用いられ、かつ、ITO等の透明導電膜で形成された共通電極上に、画素電極が具備される構成が開示されている。画素電極には、ソース線を介して供給される映像表示のための信号を頻繁に書き換える液晶駆動電圧が印加される。このため、共通電極上に画素電極が具備される図11に示される構成は好ましくない。また、特許文献8の第5実施形態や図12では、タッチセンシング配線上に、画素電極の他にソース配線が具備される構成が開示されている。このため、図11に示す構造よりも多くのノイズや寄生容量を拾い易く、この観点で、最も好ましくない構成が開示されている。図12に示す例においては、ゲート線がY方向にて最下部に位置しており、薄膜トランジスタは、ボトムゲート構造を有する。
In paragraph 0064 of Patent Document 8, as a wiring structure of a thin film transistor signal line, a scanning line, and a storage capacitor line used for driving a liquid crystal, a three-layer metal wiring composed of an indium-containing layer / copper / indium-containing layer Techniques for forming the are disclosed.
Patent Document 8 discloses a configuration in which signal lines (source lines) and pixel electrodes are included in a touch sensing space described later. Since the signal line (source line) and the pixel electrode are noise generation sources, it is not considered to reduce the influence of noise caused by the signal (video signal) to touch sensing. For example, the fourth embodiment of Patent Document 8 and FIG. 11 disclose a configuration in which a pixel electrode is provided on a common electrode used for touch sensing and formed of a transparent conductive film such as ITO. . A liquid crystal driving voltage for frequently rewriting a signal for video display supplied via the source line is applied to the pixel electrode. Therefore, the configuration shown in FIG. 11 in which the pixel electrode is provided on the common electrode is not preferable. Further, the fifth embodiment of Patent Document 8 and FIG. 12 disclose a configuration in which a source wiring is provided in addition to a pixel electrode on a touch sensing wiring. For this reason, it is easier to pick up more noise and parasitic capacitance than the structure shown in FIG. 11, and in this respect, the most undesirable configuration is disclosed. In the example shown in FIG. 12, the gate line is located at the bottom in the Y direction, and the thin film transistor has a bottom gate structure.
 特許文献1から特許文献8に開示された技術は、各々の映像表示を行うための映像信号が付与されるソース配線に起因するノイズを削減する手段が十分に考慮されておらず、高感度のタッチセンシング技術を提供し難い。更に、液晶駆動に係るノイズ発生を抑制するには不十分である。 The techniques disclosed in Patent Literature 1 to Patent Literature 8 do not sufficiently consider means for reducing noise caused by source wiring to which video signals for performing video display are applied, and are highly sensitive. It is difficult to provide touch sensing technology. Furthermore, it is insufficient to suppress the generation of noise related to liquid crystal driving.
日本国特公平4-22486号公報Japanese Patent Publication No.4-222486 日本国特開2014-109904号公報Japanese Unexamined Patent Publication No. 2014-109904 日本国特許第4584342号公報Japanese Patent No. 4584342 日本国特許第5517611号公報Japanese Patent No. 5517611 日本国特開平7-36017号公報Japanese Unexamined Patent Publication No. 7-36017 日本国特許第5746736号公報Japanese Patent No. 5,746,736 日本国特開2014-182203号公報Japanese Unexamined Patent Publication No. 2014-182203 日本国特許5807726号公報Japanese Patent No. 5807726
 インセル方式を採用するとともにタッチセンシング機能を備えた表示装置において、センシング感度を向上させるには液晶駆動で発生するノイズ対策が不可欠である。
 上述したように、電荷蓄積による表示の焼きつき(sticking)を避けるため、液晶駆動として極性反転駆動が一般的に採用されている。しかしながら、映像信号を伝達するソース配線は、極性反転に起因したノイズを発生させる発生源となっていた。加えて、ソース配線は、映像信号の極性反転に付随する寄生容量の変化を伴い易い。インセル方式を採用するとともにタッチセンシング機能を備えた表示装置においては、映像信号が伝達されるソース配線に起因するノイズの発生を抑制することが重要となっている。
In a display device that employs an in-cell method and has a touch sensing function, countermeasures against noise generated by liquid crystal driving are indispensable for improving sensing sensitivity.
As described above, polarity inversion driving is generally employed as liquid crystal driving in order to avoid display sticking due to charge accumulation. However, the source wiring for transmitting the video signal has been a source for generating noise due to polarity inversion. In addition, the source wiring is likely to be accompanied by a change in parasitic capacitance accompanying the polarity inversion of the video signal. In a display device that employs the in-cell method and has a touch sensing function, it is important to suppress the generation of noise due to the source wiring to which the video signal is transmitted.
 また、特許文献6に開示されているように、アレイ基板(TFT基板)がタッチセンシング機能を有する方式では、アクティブ素子(TFT)を駆動するソース配線やゲート配線等の信号配線に極めて近い位置に、かつ、これらの配線と平行にタッチセンシングに関わる配線(以下、タッチセンシング配線)が配設される。特に、様々な電圧により、かつ、高い頻度で映像信号を伝えるソース配線は、タッチセンシング配線に大きな悪影響を与える。
 トランジスタのチャネル層としてポリシリコン半導体を用いるアクティブ素子においては、リーク電流が大きく、映像信号を頻繁に書き直すことが必要であり、ソース配線から生じるノイズがタッチセンシング配線に対して影響を与えることが懸念される。また、TFT基板がタッチセンシング機能を有する構造において、センス線(タッチ信号の検出配線)、ドライブ線(タッチセンシングの駆動配線)、及びアクティブ素子を駆動するためのソース配線やゲート配線を一枚のアレイ基板に併設する場合には、ジャンパー線やバイパストンネル等を設ける必要がある。即ち、コスト高を招く複雑な構成が必要となる。
 また、ポリシリコン半導体のリーク電流を減らすため、各画素において2個のTFTを画素電極に接続するダブルゲート構造を採用する必要があるが、ダブルゲート構造はコスト高の要因となるとともに、画素の開口率を低下させてしまう。
Further, as disclosed in Patent Document 6, in the method in which the array substrate (TFT substrate) has a touch sensing function, the array substrate (TFT substrate) is located very close to a signal wiring such as a source wiring or a gate wiring that drives the active element (TFT). In addition, wiring related to touch sensing (hereinafter referred to as touch sensing wiring) is disposed in parallel with these wirings. In particular, a source wiring that transmits video signals with various voltages and at a high frequency has a great adverse effect on the touch sensing wiring.
In an active element using a polysilicon semiconductor as a channel layer of a transistor, a leakage current is large, and it is necessary to rewrite the video signal frequently, and there is a concern that noise generated from the source wiring may affect the touch sensing wiring. Is done. Further, in a structure in which the TFT substrate has a touch sensing function, a sense line (touch signal detection wiring), a drive line (touch sensing drive wiring), and a source wiring and a gate wiring for driving an active element are combined into one sheet. In the case of being attached to the array substrate, it is necessary to provide a jumper line, a bypass tunnel, or the like. That is, a complicated configuration that causes high costs is required.
In addition, in order to reduce the leakage current of the polysilicon semiconductor, it is necessary to adopt a double gate structure in which two TFTs are connected to the pixel electrode in each pixel. The aperture ratio is lowered.
 本発明は、上記の課題に鑑みてなされたものであって、FFSモードに代表される横電界方式である液晶表示装置において、タッチセンシングに影響を与えるノイズの影響を軽減した液晶表示装置を提供する。 The present invention has been made in view of the above problems, and provides a liquid crystal display device that reduces the influence of noise that affects touch sensing in a liquid crystal display device that is a horizontal electric field method typified by the FFS mode. To do.
 本発明の一態様に係る表示装置は、第1透明基板と、前記第1透明基板上に設けられた第1方向に延在するタッチセンシング配線とを備えた表示装置基板と、第2透明基板と、前記第2透明基板上の複数の多角形状の画素開口部と、前記複数の画素開口部の各々に設けられているとともに平面視において前記第1方向に延在する1以上の電極部を有する共通電極と、前記共通電極の下に設けられた第1絶縁層と、前記複数の画素開口部の各々において前記第1絶縁層の下に設けられた画素電極と、前記画素電極の下に設けられた第2絶縁層と、前記第2絶縁層の下において前記共通電極に電気的に接続されかつ前記第1方向に直交する第2方向に延在して前記複数の画素開口部を横断する導電配線と、前記導電配線の下に設けられた第3絶縁層と、前記第3絶縁層の下に設けられて前記画素電極に電気的に接続されているトップゲート構造の薄膜トランジスタであるアクティブ素子と、前記導電配線と同じ層構成を有して前記第2絶縁層と前記第3絶縁層との間において前記導電配線と同じ位置に形成されているとともに平面視において前記第2方向に延在して前記アクティブ素子に電気的に連携されたゲート配線と、平面視において前記第1方向に延在して前記アクティブ素子に電気的に連携されたソース配線と、前記電極部のパターンの長手方向の中央に設けられているとともに前記共通電極と前記導電配線とを電気的に接続するコンタクトホールを備えるアレイ基板と、前記表示装置基板と前記アレイ基板との間に挟持された表示機能層と、前記画素電極と前記共通電極との間に駆動電圧を印加することによって前記表示機能層を駆動させることにより映像表示を行い、前記共通電極と前記タッチセンシング配線との間の静電容量の変化を検知してタッチセンシングを行う制御部と、を含む。前記表示機能層の厚さ方向に対して傾斜する斜め方向において、前記タッチセンシング配線と前記共通電極とは互いに向かい合っている。 A display device according to an aspect of the present invention includes a display device substrate including a first transparent substrate, and touch sensing wiring provided on the first transparent substrate and extending in a first direction, and a second transparent substrate. A plurality of polygonal pixel openings on the second transparent substrate, and one or more electrode portions provided in each of the plurality of pixel openings and extending in the first direction in plan view. A common electrode, a first insulating layer provided under the common electrode, a pixel electrode provided under the first insulating layer in each of the plurality of pixel openings, and under the pixel electrode A second insulating layer provided; and is electrically connected to the common electrode under the second insulating layer and extends in a second direction orthogonal to the first direction and crosses the plurality of pixel openings. Conductive wiring to be connected and a third insulation provided under the conductive wiring. An active element which is a thin film transistor having a top gate structure provided under the third insulating layer and electrically connected to the pixel electrode; and the second layer having the same layer configuration as the conductive wiring A gate wiring formed between the insulating layer and the third insulating layer at the same position as the conductive wiring and extending in the second direction in plan view and electrically linked to the active element; A source wiring that extends in the first direction and is electrically linked to the active element in a plan view, and is provided at the center in the longitudinal direction of the pattern of the electrode portion, and the common electrode and the conductive wiring; An array substrate having a contact hole for electrically connecting the display substrate, a display functional layer sandwiched between the display device substrate and the array substrate, the pixel electrode, and the common electrode A control unit that performs video display by driving the display function layer by applying a driving voltage therebetween, and detecting a change in capacitance between the common electrode and the touch sensing wiring. And including. In the oblique direction inclined with respect to the thickness direction of the display function layer, the touch sensing wiring and the common electrode face each other.
 本発明の一態様における「表示機能層」とは、光透過、遮光、光反射、或いは発光等の作用を電極間で行う機能を実現する層を意味する。このような表示機能層としては、例えば、液晶素子、有機EL素子、EMS素子、MEMS素子、IMOD素子、マイクロLED素子等が挙げられる。 The “display function layer” in one embodiment of the present invention means a layer that realizes a function of performing an action such as light transmission, light shielding, light reflection, or light emission between electrodes. Examples of such a display function layer include a liquid crystal element, an organic EL element, an EMS element, a MEMS element, an IMOD element, and a micro LED element.
 本発明の一態様に係る表示装置においては、前記共通電極は、平面視において前記タッチセンシング配線と平行な長尺方向に延在するストライプパターンを有してもよい。 In the display device according to one aspect of the present invention, the common electrode may have a stripe pattern extending in a longitudinal direction parallel to the touch sensing wiring in a plan view.
 本発明の一態様に係る表示装置においては、前記アクティブ素子は、酸化物半導体で構成されたチャネル層を含み、前記チャネル層は、ゲート絶縁膜と接触している薄膜トランジスタであってもよい。 In the display device according to one embodiment of the present invention, the active element may include a channel layer made of an oxide semiconductor, and the channel layer may be a thin film transistor in contact with a gate insulating film.
 本発明の一態様に係る表示装置においては、前記酸化物半導体は、ガリウム、インジウム、亜鉛、錫、アルミニウム、ゲルマニウム、アンチモン、ビスマス、セリウムのうち2種以上の金属酸化物を含む酸化物半導体であってもよい。 In the display device according to one embodiment of the present invention, the oxide semiconductor is an oxide semiconductor including two or more metal oxides of gallium, indium, zinc, tin, aluminum, germanium, antimony, bismuth, and cerium. There may be.
 本発明の一態様に係る表示装置においては、前記ゲート絶縁膜は、酸化セリウムを含む複合酸化物で形成されたゲート絶縁膜であってもよい。 In the display device according to one embodiment of the present invention, the gate insulating film may be a gate insulating film formed of a complex oxide containing cerium oxide.
 本発明の一態様に係る表示装置においては、前記表示機能層は液晶層であって、前記液晶層の液晶は、前記アレイ基板に平行な初期配向を有し、前記共通電極と前記画素電極との間に印加される液晶駆動電圧によって生じるフリンジ電界で駆動されてもよい。 In the display device according to one embodiment of the present invention, the display functional layer is a liquid crystal layer, and the liquid crystal of the liquid crystal layer has an initial alignment parallel to the array substrate, and the common electrode, the pixel electrode, It may be driven by a fringe electric field generated by a liquid crystal driving voltage applied between the two.
 本発明の一態様に係る表示装置においては、前記共通電極及び前記画素電極は、少なくとも、酸化インジウム、酸化錫を含む複合酸化物で構成されてもよい。 In the display device according to one embodiment of the present invention, the common electrode and the pixel electrode may be composed of a composite oxide containing at least indium oxide and tin oxide.
 本発明の一態様に係る表示装置においては、前記タッチセンシング配線は、銅合金層を含む金属層で構成されてもよい。 In the display device according to one aspect of the present invention, the touch sensing wiring may be formed of a metal layer including a copper alloy layer.
 本発明の一態様に係る表示装置においては、前記タッチセンシング配線は、銅合金層が導電性金属酸化物層で挟持された構造を有してもよい。 In the display device according to one embodiment of the present invention, the touch sensing wiring may have a structure in which a copper alloy layer is sandwiched between conductive metal oxide layers.
 本発明の一態様に係る表示装置においては、前記導電配線は、銅合金層が導電性金属酸化物層で挟持された構造を有してもよい。 In the display device according to one embodiment of the present invention, the conductive wiring may have a structure in which a copper alloy layer is sandwiched between conductive metal oxide layers.
 本発明の一態様に係る表示装置においては、前記導電性金属酸化物層は、酸化インジウム、酸化亜鉛、酸化アンチモン、酸化錫のうち2種以上を含む複合酸化物層であってもよい。 In the display device according to one embodiment of the present invention, the conductive metal oxide layer may be a composite oxide layer containing two or more of indium oxide, zinc oxide, antimony oxide, and tin oxide.
 本発明の一態様に係る表示装置においては、前記表示装置基板は、前記第1透明基板と前記タッチセンシング配線との間に設けられたブラックマトリクスを具備し、前記タッチセンシング配線は、前記ブラックマトリクスの一部と重畳してもよい。 In the display device according to an aspect of the present invention, the display device substrate includes a black matrix provided between the first transparent substrate and the touch sensing wiring, and the touch sensing wiring includes the black matrix. You may superimpose on a part of.
 本発明の一態様に係る表示装置においては、前記表示装置基板は、複数の画素開口部に対応する位置に設けられたカラーフィルタを備えてもよい。 In the display device according to one aspect of the present invention, the display device substrate may include a color filter provided at a position corresponding to the plurality of pixel openings.
 本発明の一態様によれば、タッチセンシングに悪影響を与えるノイズを軽減し、かつ、タッチセンシングに関わる配線構造を簡略化した、液晶表示装置を提供することができる。また、映像信号が供給されるソース配線又は画素電極がタッチセンシング空間に含まれない構成を実現することができ、映像信号に係るノイズを軽減することができる。 According to one embodiment of the present invention, it is possible to provide a liquid crystal display device in which noise that adversely affects touch sensing is reduced and the wiring structure related to touch sensing is simplified. In addition, a configuration in which the source wiring or the pixel electrode to which the video signal is supplied is not included in the touch sensing space can be realized, and noise related to the video signal can be reduced.
本発明の第1実施形態に係る表示装置を構成する制御部(映像信号制御部、システム制御部、及びタッチセンシング制御部)及び表示部を示すブロック図である。It is a block diagram which shows the control part (a video signal control part, a system control part, and a touch sensing control part) and a display part which comprise the display apparatus which concerns on 1st Embodiment of this invention. 本発明の第1実施形態に係る表示装置を構成するアレイ基板を部分的に示す平面図であり、観察者側から見た平面図である。It is a top view which shows partially the array substrate which comprises the display apparatus which concerns on 1st Embodiment of this invention, and is the top view seen from the observer side. 本発明の第1実施形態に係る表示装置を部分的に示す断面図であり、図2に示すA-A’線に沿う断面図である。FIG. 3 is a cross-sectional view partially showing the display device according to the first embodiment of the present invention, and is a cross-sectional view taken along the line A-A ′ shown in FIG. 2. 本発明の第1実施形態に係る表示装置を部分的に示す断面図であり、図2に示すB-B’線に沿う断面図である。FIG. 3 is a cross-sectional view partially showing the display device according to the first embodiment of the present invention, and is a cross-sectional view taken along the line B-B ′ shown in FIG. 2. 本発明の第1実施形態に係る表示装置を部分的に示す断面図であり、共通電極を拡大して示す拡大断面図である。It is sectional drawing which shows partially the display apparatus which concerns on 1st Embodiment of this invention, and is an expanded sectional view which expands and shows a common electrode. 本発明の第1実施形態に係る表示装置を部分的に示す断面図であり、図2に示すC-C’線に沿う断面図である。FIG. 3 is a cross-sectional view partially showing the display device according to the first embodiment of the present invention, and is a cross-sectional view taken along the line C-C ′ shown in FIG. 2. 本発明の第1実施形態に係る表示装置を部分的に示す平面図であり、図2に示すアレイ基板上に、液晶層を介して、カラーフィルタ及びタッチセンシング配線を具備する表示装置基板が積層された構造を示す平面図である。FIG. 3 is a plan view partially showing the display device according to the first embodiment of the present invention, in which a display device substrate including a color filter and touch sensing wiring is stacked on the array substrate shown in FIG. 2 via a liquid crystal layer. It is a top view which shows the made structure. 本発明の第1実施形態に係る表示装置基板を部分的に示す断面図であり、図6に示すF-F’線に沿う断面図である。FIG. 7 is a cross-sectional view partially showing the display device substrate according to the first exemplary embodiment of the present invention, and is a cross-sectional view taken along the line F-F ′ shown in FIG. 6. 本発明の第1実施形態に係る表示装置基板を部分的に示す断面図であり、タッチセンシング配線の端子部を説明する断面図である。It is sectional drawing which shows the display apparatus substrate which concerns on 1st Embodiment of this invention partially, and is sectional drawing explaining the terminal part of touch sensing wiring. 本発明の第1実施形態に係る表示装置基板を部分的に示す断面図であり、タッチセンシング配線の端子部を説明する断面図である。It is sectional drawing which shows the display apparatus substrate which concerns on 1st Embodiment of this invention partially, and is sectional drawing explaining the terminal part of touch sensing wiring. 本発明の第1実施形態に係るアレイ基板を部分的に示す平面図であり、アレイ基板の製造工程のうち一工程を説明する図であり、アクティブ素子の一構成要素のチャネル層のパターンを示す。図10において、破線は、次工程以降で形成されるソース配線およびゲート配線の位置を示す。FIG. 3 is a plan view partially showing the array substrate according to the first embodiment of the present invention, and is a diagram for explaining one step of the manufacturing process of the array substrate, showing a pattern of the channel layer of one component of the active element . In FIG. 10, the broken lines indicate the positions of source wirings and gate wirings formed in the subsequent steps. 本発明の第1実施形態に係るアレイ基板を部分的に示す平面図であり、アレイ基板の製造工程のうち一工程を説明する平面図であり、チャネル層上に、ソース配線、ソース電極、及びドレイン電極の各々のパターンが形成された構造を示す平面図である。FIG. 2 is a plan view partially showing the array substrate according to the first embodiment of the present invention, and is a plan view for explaining one step in the manufacturing process of the array substrate. On the channel layer, a source wiring, a source electrode, and It is a top view which shows the structure in which each pattern of the drain electrode was formed. 本発明の第1実施形態に係るアレイ基板を部分的に示す平面図であり、アレイ基板の製造工程のうち一工程を説明する平面図であり、ゲート絶縁膜を介して、ゲート電極、ゲート配線、及び導電配線の各々のパターンが形成された構造を示す平面図である。図12において、ゲート電極、ゲート配線、及び導電配線の各々は、金属層等を含む複数層で形成された積層構造を有する。FIG. 2 is a plan view partially showing the array substrate according to the first embodiment of the present invention, and is a plan view for explaining one process among the manufacturing processes of the array substrate, and a gate electrode and a gate wiring through a gate insulating film 2 is a plan view showing a structure in which each pattern of conductive wiring is formed. FIG. In FIG. 12, each of the gate electrode, the gate wiring, and the conductive wiring has a stacked structure formed of a plurality of layers including a metal layer and the like. 本発明の第1実施形態に係るアレイ基板を部分的に示す平面図であり、アレイ基板の製造工程のうち一工程を説明する平面図であり、絶縁層を介して画素電極のパターンが形成された構造を示す平面図である。なお、図13に示すアレイ基板上に絶縁層を介して共通電極が形成された積層構造は、上記図2に示す構造に相当する。FIG. 3 is a plan view partially showing the array substrate according to the first embodiment of the present invention, and is a plan view for explaining one process among the manufacturing processes of the array substrate, in which a pattern of pixel electrodes is formed through an insulating layer. FIG. Note that the stacked structure in which the common electrode is formed on the array substrate shown in FIG. 13 via the insulating layer corresponds to the structure shown in FIG. 本発明の実施形態に係る表示装置における液晶駆動とタッチセンシング駆動とを行う時分割駆動の一例を示すタイミングチャートである。6 is a timing chart showing an example of time-division driving for performing liquid crystal driving and touch sensing driving in the display device according to the embodiment of the present invention. 本発明の第1実施形態に係る表示装置の画素を部分的に示す平面図であって、一画素における液晶の配向状態を示す平面図である。It is a top view which shows partially the pixel of the display apparatus which concerns on 1st Embodiment of this invention, Comprising: It is a top view which shows the orientation state of the liquid crystal in one pixel. 本発明の第1実施形態に係る表示装置の画素を部分的に示す平面図であって、画素電極と共通電極との間に液晶駆動電圧を印加した時の、液晶駆動動作を示す平面図である。FIG. 2 is a plan view partially showing a pixel of the display device according to the first embodiment of the present invention, and showing a liquid crystal driving operation when a liquid crystal driving voltage is applied between the pixel electrode and the common electrode. is there. 本発明の第1実施形態に係る表示装置において、タッチセンシング配線がタッチ駆動電極として機能し、かつ、共通電極がタッチ検出電極として機能した場合の、タッチセンシング配線と共通電極との間に電界が生成された状態を示す模式断面図である。In the display device according to the first embodiment of the present invention, when the touch sensing wiring functions as a touch drive electrode and the common electrode functions as a touch detection electrode, an electric field is generated between the touch sensing wiring and the common electrode. It is a schematic cross section which shows the produced | generated state. 本発明の第1実施形態に係る表示装置を示す模式断面図であり、指等のポインタが表示装置基板の観察者側の表面に接触或いは近接した時の電界の生成状態の変化を示す断面図である。FIG. 3 is a schematic cross-sectional view showing the display device according to the first embodiment of the present invention, and is a cross-sectional view showing a change in the generation state of an electric field when a pointer such as a finger contacts or approaches the surface on the viewer side of the display device substrate It is. 本発明の第1実施形態の変形例に係る表示装置を構成するアレイ基板の要部を部分的に示す断面図である。It is sectional drawing which shows partially the principal part of the array substrate which comprises the display apparatus which concerns on the modification of 1st Embodiment of this invention. 本発明の第2実施形態に係る表示装置を構成するアレイ基板を部分的に示す平面図であり、観察者側から見た平面図である。It is a top view which shows partially the array substrate which comprises the display apparatus which concerns on 2nd Embodiment of this invention, and is the top view seen from the observer side. 本発明の第2実施形態に係る表示装置を構成するアレイ基板を部分的に示す断面図であり、図20に示すD-D’線に沿う断面図である。FIG. 21 is a cross-sectional view partially showing an array substrate constituting a display device according to a second embodiment of the present invention, and is a cross-sectional view taken along the line D-D ′ shown in FIG. 20. 本発明の第2実施形態に係る表示装置を部分的に示す平面図であり、アレイ基板上に、液晶層を介して、カラーフィルタ及びタッチセンシング配線を具備する表示装置基板が積層された構造を示す平面図であり、観察者側から見た平面図である。It is a top view which shows partially the display apparatus which concerns on 2nd Embodiment of this invention, and has the structure where the display apparatus board | substrate which comprises a color filter and touch sensing wiring was laminated | stacked through the liquid crystal layer on the array substrate. It is the top view shown, and is the top view seen from the observer side. 本発明の第2実施形態に係る表示装置を構成するアレイ基板を部分的に示す断面図であり、図20に示すE-E’線に沿う断面図である。FIG. 21 is a cross-sectional view partially showing an array substrate constituting a display device according to a second embodiment of the present invention, and is a cross-sectional view taken along line E-E ′ shown in FIG. 20. 本発明の第2実施形態に係る表示装置の画素を部分的に示す平面図であって、一画素における液晶の配向状態を示す平面図である。It is a top view which shows partially the pixel of the display apparatus which concerns on 2nd Embodiment of this invention, Comprising: It is a top view which shows the orientation state of the liquid crystal in one pixel. 本発明の第2実施形態に係る表示装置の画素を部分的に示す平面図であって、画素電極と共通電極との間に液晶駆動電圧を印加した時の、液晶駆動動作を示す平面図である。FIG. 6 is a plan view partially showing a pixel of a display device according to a second embodiment of the present invention, and showing a liquid crystal driving operation when a liquid crystal driving voltage is applied between the pixel electrode and the common electrode. is there. FFSモードの液晶を採用した表示装置を部分的に示す断面図であって、画素電極と共通電極との間に液晶駆動電圧を印加した時の、フリンジ電界による液晶駆動動作を示す断面図である。FIG. 4 is a cross-sectional view partially showing a display device employing FFS mode liquid crystal, and showing a liquid crystal drive operation by a fringe electric field when a liquid crystal drive voltage is applied between a pixel electrode and a common electrode. . 本発明の第3実施形態に係る表示装置を構成するアレイ基板を部分的に示す平面図である。It is a top view which shows partially the array substrate which comprises the display apparatus which concerns on 3rd Embodiment of this invention. 本発明の第3実施形態に係る表示装置を部分的に示す平面図であり、アレイ基板上に、液晶層を介して、カラーフィルタ及びタッチセンシング配線を具備する表示装置基板が積層された構造を示す平面図であり、観察者側から見た平面図である。It is a top view which shows partially the display apparatus which concerns on 3rd Embodiment of this invention, and has the structure where the display apparatus board | substrate which comprises a color filter and touch sensing wiring was laminated | stacked on the array substrate through the liquid crystal layer. It is the top view shown, and is the top view seen from the observer side. 本発明の第3実施形態に係る表示装置を構成するアレイ基板を部分的に示す断面図である。It is sectional drawing which shows partially the array substrate which comprises the display apparatus which concerns on 3rd Embodiment of this invention. 従来の液晶表示装置の表示部を等電位線とともに模式的に示す断面図である。It is sectional drawing which shows typically the display part of the conventional liquid crystal display device with an equipotential line. 従来の液晶表示装置の表示部の変形例を等電位線とともに模式的に示す断面図である。It is sectional drawing which shows typically the modification of the display part of the conventional liquid crystal display device with an equipotential line. FFSモードを利用する従来の液晶表示装置の一画素を示す拡大平面図である。It is an enlarged plan view which shows one pixel of the conventional liquid crystal display device using FFS mode.
 以下、図面を参照しながら本発明の実施形態について説明する。
 以下の説明において、同一又は実質的に同一の機能及び構成要素には、同一の符号を付し、その説明を省略又は簡略化し、或いは、必要な場合のみ説明を行う。各図においては、各構成要素を図面上で認識し得る程度の大きさとするため、各構成要素の寸法及び比率を実際のものとは適宜に異ならせてある。また、必要に応じて、図示が難しい要素、例えば、液晶表示装置を構成する絶縁層、バッファ層、半導体のチャネル層を形成する複数層の構成、また、導電層を形成する複数層の構成等の図示が省略されている。表示装置に用いることの可能な基板としては、ガラス基板、セラミック基板、石英基板、サファイア基板、シリコン、炭化シリコンやシリコンゲルマニウムなどの半導体基板、あるいはプラスチック基板等が適用できる。
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
In the following description, the same or substantially the same functions and components are denoted by the same reference numerals, and the description thereof is omitted or simplified, or only when necessary. In each of the drawings, the dimensions and ratios of the respective components are appropriately changed from the actual ones in order to make the respective components large enough to be recognized on the drawings. In addition, elements that are difficult to illustrate, for example, an insulating layer, a buffer layer, a plurality of layers that form a semiconductor channel layer, and a plurality of layers that form a conductive layer, as needed, are included in a liquid crystal display device. Is omitted. As a substrate that can be used for the display device, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, a semiconductor substrate such as silicon, silicon carbide, or silicon germanium, a plastic substrate, or the like can be used.
 以下に述べる各実施形態においては、特徴的な部分について説明し、例えば、通常の液晶表示装置に用いられている構成要素と本実施形態に係る表示装置との差異がない部分については説明を省略する。
 以下の記載において、タッチセンシングに関わる配線、電極、及び信号を、単に、タッチ駆動配線、タッチ検出配線、タッチ電極、及びタッチ駆動信号と呼称することがある。タッチセンシング配線にタッチセンシングの駆動のために印加される電圧をタッチ駆動電圧と呼び、表示機能層である液晶層の駆動のために共通電極と画素電極間に印加される電圧を液晶駆動電圧と呼称する。導電配線はコモン配線と呼称することがある。
In each of the embodiments described below, characteristic parts will be described. For example, description of parts having no difference between components used in a normal liquid crystal display device and the display device according to the present embodiment will be omitted. To do.
In the following description, wirings, electrodes, and signals related to touch sensing may be simply referred to as touch driving wirings, touch detection wirings, touch electrodes, and touch driving signals. A voltage applied to the touch sensing wiring for driving the touch sensing is called a touch driving voltage, and a voltage applied between the common electrode and the pixel electrode for driving the liquid crystal layer which is a display function layer is called a liquid crystal driving voltage. Call it. The conductive wiring may be referred to as common wiring.
 また、本発明の実施形態に係る液晶表示装置LCD1は、インセル方式を用いている。ここで、「インセル方式」とは、タッチセンシング機能が液晶表示装置に内蔵された液晶表示装置、或いは、タッチセンシング機能を液晶表示装置と一体化した液晶表示装置を意味する。通常、液晶層を介して表示装置基板とアレイ基板(TFT基板)を貼り合わせた液晶表示装置においては、表示装置基板及びアレイ基板の各々の外側の面に偏光フィルムが貼付されている。換言すれば、本発明の実施形態に係るインセル方式の液晶表示装置とは、互いに対向する2つの偏光フィルムの間に位置するとともに厚み方向において液晶表示装置を構成するいずれかの部位に、タッチセンシング機能を具備する液晶表示装置である。 The liquid crystal display device LCD1 according to the embodiment of the present invention uses an in-cell method. Here, the “in-cell method” means a liquid crystal display device in which a touch sensing function is built in the liquid crystal display device or a liquid crystal display device in which the touch sensing function is integrated with the liquid crystal display device. Usually, in a liquid crystal display device in which a display device substrate and an array substrate (TFT substrate) are bonded via a liquid crystal layer, a polarizing film is bonded to the outer surface of each of the display device substrate and the array substrate. In other words, the in-cell type liquid crystal display device according to the embodiment of the present invention is located between any two polarizing films facing each other and is touch-sensing at any part constituting the liquid crystal display device in the thickness direction. A liquid crystal display device having a function.
(第1実施形態)
(液晶表示装置LCD1の機能構成)
 以下、本発明の第1実施形態に係る液晶表示装置LCD1を、図1から図18を参照しながら説明する。
 図1は、本発明の第1実施形態に係る液晶表示装置LCD1を示すブロック図である。図1に示すように、本実施形態に係る液晶表示装置LCD1は、表示部110と、表示部110及びタッチセンシング機能を制御するための制御部120とを備えている。
 制御部120は、公知の構成を有し、映像信号制御部121(第一制御部)と、タッチセンシング制御部122(第二制御部)と、システム制御部123(第三制御部)とを備えている。
(First embodiment)
(Functional configuration of liquid crystal display device LCD1)
Hereinafter, a liquid crystal display device LCD1 according to a first embodiment of the present invention will be described with reference to FIGS.
FIG. 1 is a block diagram showing a liquid crystal display device LCD1 according to the first embodiment of the present invention. As shown in FIG. 1, the liquid crystal display device LCD1 according to the present embodiment includes a display unit 110, and a control unit 120 for controlling the display unit 110 and a touch sensing function.
The control unit 120 has a known configuration, and includes a video signal control unit 121 (first control unit), a touch sensing control unit 122 (second control unit), and a system control unit 123 (third control unit). I have.
 映像信号制御部121は、アレイ基板200に設けられた共通電極17(後述)を定電位とするとともに、アレイ基板200に設けられたゲート配線10(後述、走査線)及びソース配線31(後述、信号線)に信号を送る。映像信号制御部121が共通電極17と画素電極20(後述)との間に表示用の液晶駆動電圧を印加することで、アレイ基板200上でフリンジ電界が発生し、フリンジ電界に沿って液晶分子が回転し、液晶層300が駆動される。これにより、アレイ基板200上に画像が表示される。複数の画素電極20の各々には、ソース配線(信号線)を介して、例えば、矩形波の映像信号が個別に印加される。また、矩形波としては、正又は負の直流矩形波或いは交流矩形波でもよい。映像信号制御部121は、このような映像信号をソース配線に送る。 The video signal control unit 121 sets the common electrode 17 (described later) provided on the array substrate 200 to a constant potential, and the gate wiring 10 (described later, scanning line) and the source wiring 31 (described later, provided) provided on the array substrate 200. Signal to the signal line). The video signal controller 121 applies a display liquid crystal driving voltage between the common electrode 17 and the pixel electrode 20 (described later), whereby a fringe electric field is generated on the array substrate 200, and liquid crystal molecules are generated along the fringe electric field. Rotates and the liquid crystal layer 300 is driven. As a result, an image is displayed on the array substrate 200. For example, a rectangular wave video signal is individually applied to each of the plurality of pixel electrodes 20 via a source wiring (signal line). Further, the rectangular wave may be a positive or negative DC rectangular wave or an AC rectangular wave. The video signal control unit 121 sends such a video signal to the source wiring.
 タッチセンシング制御部122は、タッチセンシング配線3(後述)にタッチセンシング駆動電圧を印加し、タッチセンシング配線3と共通電極17との間に生じる静電容量の変化を検出し、タッチセンシングを行う。 The touch sensing control unit 122 applies touch sensing driving voltage to the touch sensing wiring 3 (described later), detects a change in capacitance generated between the touch sensing wiring 3 and the common electrode 17, and performs touch sensing.
 システム制御部123は、映像信号制御部121及びタッチセンシング制御部122を制御し、液晶駆動と静電容量の変化の検出とを交互に、即ち、時分割で行うことが可能である。また、システム制御部123は、液晶駆動周波数とタッチセンシング駆動周波数とを異なる周波数で、或いは、異なる電圧で、液晶を駆動する機能を有してもよい。
 このような機能を有するシステム制御部123においては、例えば、液晶表示装置LCD1が拾ってしまう外部環境からのノイズの周波数を検知し、ノイズ周波数とは異なるタッチセンシング駆動周波数を選択する。これによって、ノイズの影響を軽減することができる。また、このようなシステム制御部123においては、指やペン等のポインタの走査速度に合わせたタッチセンシング駆動周波数を選定することもできる。
The system control unit 123 can control the video signal control unit 121 and the touch sensing control unit 122 to perform liquid crystal driving and capacitance change detection alternately, that is, in a time division manner. Further, the system control unit 123 may have a function of driving the liquid crystal at a frequency different from the liquid crystal drive frequency and the touch sensing drive frequency or at different voltages.
In the system control unit 123 having such a function, for example, a frequency of noise from the external environment picked up by the liquid crystal display device LCD1 is detected, and a touch sensing drive frequency different from the noise frequency is selected. Thereby, the influence of noise can be reduced. Further, in such a system control unit 123, a touch sensing driving frequency can be selected in accordance with the scanning speed of a pointer such as a finger or a pen.
 図1に示す構成を有する液晶表示装置LCD1において、共通電極17は、共通電極17と画素電極20との間に表示用の液晶駆動電圧を印加して液晶を駆動する機能と、タッチセンシング配線3と共通電極17との間に生じる静電容量の変化を検出するタッチセンシング機能とを併せ持つ。本発明の実施形態に係るタッチセンシング配線は、導電率の良い金属層で形成することができるため、タッチセンシング配線の抵抗値を下げてタッチ感度を向上させることができる(後述)。 In the liquid crystal display device LCD1 having the configuration shown in FIG. 1, the common electrode 17 has a function of driving a liquid crystal by applying a liquid crystal driving voltage for display between the common electrode 17 and the pixel electrode 20, and the touch sensing wiring 3 And a touch sensing function for detecting a change in capacitance generated between the common electrode 17 and the common electrode 17. Since the touch sensing wiring according to the embodiment of the present invention can be formed of a metal layer having good conductivity, the touch sensitivity can be improved by reducing the resistance value of the touch sensing wiring (described later).
 制御部120は、後述するように、映像表示の安定期間、及び、映像表示後の黒表示安定期間の少なくとも一方の安定期間で、タッチセンシング配線3及び共通電極17によるタッチセンシング駆動を行う機能を有することが好ましい。 As will be described later, the control unit 120 has a function of performing touch sensing drive by the touch sensing wiring 3 and the common electrode 17 in at least one of the stable period of the video display and the black display stable period after the video display. It is preferable to have.
(液晶表示装置LCD1の構造)
 本実施形態に係る液晶表示装置は、後述する実施形態に係る表示装置基板を具備することができる。また、以下に記載する「平面視」とは、観察者が液晶表示装置の表示面(表示装置用基板の平面)を観察する方向から見た平面を意味する。本発明の実施形態に係る液晶表示装置の表示部の形状、又は画素を規定する画素開口部の形状、液晶表示装置を構成する画素数は限定されない。ただし、以下に詳述する実施形態では、平面視、画素開口部の短辺の方向をX方向と規定し、長辺の方向(長手方向)をY方向と規定し、更に、透明基板の厚さ方向をZ方向と規定し、液晶表示装置を説明する。以下の実施形態において、上記のように規定されたX方向とY方向を切り換えて、液晶表示装置を構成してもよい。
 また、図2~図18においては、液晶層300に初期配向を付与する配向膜、偏光フィルム、位相差フィルム等の光学フィルム、保護用のカバーガラス等は、省略されている。液晶表示装置LCD1の表面及び裏面の各々には、光軸がクロスニコルとなるように、偏光フィルムが貼付されている。
(Structure of the liquid crystal display device LCD1)
The liquid crystal display device according to the present embodiment can include a display device substrate according to an embodiment described later. The “plan view” described below means a plane viewed from the direction in which the observer observes the display surface of the liquid crystal display device (plane of the display device substrate). The shape of the display part of the liquid crystal display device according to the embodiment of the present invention, the shape of the pixel opening that defines the pixel, and the number of pixels constituting the liquid crystal display device are not limited. However, in the embodiment described in detail below, in plan view, the direction of the short side of the pixel opening is defined as the X direction, the direction of the long side (longitudinal direction) is defined as the Y direction, and the thickness of the transparent substrate The vertical direction is defined as the Z direction, and the liquid crystal display device will be described. In the following embodiments, the liquid crystal display device may be configured by switching between the X direction and the Y direction defined as described above.
In FIGS. 2 to 18, an alignment film that imparts initial alignment to the liquid crystal layer 300, an optical film such as a polarizing film and a retardation film, a protective cover glass, and the like are omitted. A polarizing film is attached to each of the front and back surfaces of the liquid crystal display device LCD1 so that the optical axis is crossed Nicol.
 図2は、本発明の第1実施形態に係る液晶表示装置LCD1を構成するアレイ基板200を部分的に示す平面図であり、観察者側から見た平面図である。図2においては、アレイ基板の構造を分かり易く説明するために、アレイ基板に対向する表示装置基板の図示が省略されている。
 液晶表示装置LCD1は、アレイ基板200上に、複数のソース配線31と、複数のゲート配線10と、複数のコモン配線30(導電配線)とを備える。ソース配線31の各々は、Y方向(第1方向)に延びる線状パターンを有するように形成されている。ゲート配線10の各々及びコモン配線30の各々は、X方向(第2方向)に延びる線状パターンを有するように形成されている。即ち、ソース配線31は、ゲート配線10及びコモン配線30に直交している。コモン配線30は、複数の画素開口部を横断するようにX方向に延在している。複数の画素開口部とは、透明基板22上に定義された領域である。
FIG. 2 is a plan view partially showing the array substrate 200 constituting the liquid crystal display device LCD1 according to the first embodiment of the present invention, and is a plan view seen from the observer side. In FIG. 2, in order to easily understand the structure of the array substrate, the display device substrate facing the array substrate is not shown.
The liquid crystal display device LCD1 includes a plurality of source lines 31, a plurality of gate lines 10, and a plurality of common lines 30 (conductive lines) on the array substrate 200. Each of the source wirings 31 is formed to have a linear pattern extending in the Y direction (first direction). Each of the gate wiring 10 and each of the common wiring 30 is formed to have a linear pattern extending in the X direction (second direction). That is, the source line 31 is orthogonal to the gate line 10 and the common line 30. The common wiring 30 extends in the X direction so as to cross the plurality of pixel openings. The plurality of pixel openings are regions defined on the transparent substrate 22.
 更に、液晶表示装置LCD1は、マトリクス状に配置された複数の画素電極20と、画素電極20に対応するように設けられ、かつ、画素電極20に接続されている複数のアクティブ素子28(薄膜トランジスタ)とを備える。画素電極20は、複数の画素開口部の各々に設けられている。具体的に、複数の画素電極20の各々にアクティブ素子28が接続されている。図2に示す例では、画素電極20の右上端の位置に、アクティブ素子28が設けられている。
 アクティブ素子28は、ソース配線31に接続されているソース電極24(後述)と、チャネル層27(後述)と、ドレイン電極26(後述)と、絶縁膜13(後述)を介してチャネル層27に対向配置されたゲート電極25とを備える。アクティブ素子28のゲート電極25は、ゲート配線10の一部を構成しており、ゲート配線10に接続されている。
Furthermore, the liquid crystal display device LCD1 includes a plurality of pixel electrodes 20 arranged in a matrix and a plurality of active elements 28 (thin film transistors) provided so as to correspond to the pixel electrodes 20 and connected to the pixel electrodes 20. With. The pixel electrode 20 is provided in each of the plurality of pixel openings. Specifically, an active element 28 is connected to each of the plurality of pixel electrodes 20. In the example shown in FIG. 2, the active element 28 is provided at the position of the upper right end of the pixel electrode 20.
The active element 28 is connected to the channel layer 27 via a source electrode 24 (described later) connected to the source wiring 31, a channel layer 27 (described later), a drain electrode 26 (described later), and an insulating film 13 (described later). And a gate electrode 25 arranged to face each other. The gate electrode 25 of the active element 28 constitutes a part of the gate wiring 10 and is connected to the gate wiring 10.
 本実施形態において、液晶表示装置LCD1は、複数の画素を備えており、一つの画素電極20が一つの画素を形成している。アクティブ素子28によるスイッチング駆動により、複数の画素電極20の各々に電圧(正負の電圧)が付与され、液晶が駆動される。以下の説明では、画素電極20によって液晶駆動が行われる領域を、画素、画素開口部、或いは画素領域と称する場合がある。この画素は、平面視、ソース配線31と、ゲート配線10とで区画されている領域である。 In the present embodiment, the liquid crystal display device LCD1 includes a plurality of pixels, and one pixel electrode 20 forms one pixel. By switching driving by the active element 28, a voltage (positive voltage) is applied to each of the plurality of pixel electrodes 20, and the liquid crystal is driven. In the following description, a region where liquid crystal driving is performed by the pixel electrode 20 may be referred to as a pixel, a pixel opening, or a pixel region. This pixel is an area partitioned by the source wiring 31 and the gate wiring 10 in plan view.
 更に、液晶表示装置LCD1は、Z方向において画素電極20に対向する位置に共通電極17を備えている。特に、一つの画素電極20に対して2つのストライプパターンを有する共通電極17が設けられている。共通電極17は、複数の画素開口部の各々に設けられている。共通電極17は、Y方向において延在しており、画素電極20の長手方向に平行である。Y方向における共通電極17の長さELは、Y方向における画素電極20の長さよりも大きい。共通電極17は、後述するスルーホール20S、コンタクトホールHを通じて、コモン配線30と電気的に接続されている。コンタクトホールHは、図2に示すように、共通電極17の導電パターン(電極部17A、ストライプパターン)の長手方向における中央に位置している。
 一画素内での共通電極17の本数及びコンタクトホールの数は、例えば、画素幅(画素サイズ)により調整できる。
 X方向において、共通電極17の幅W17Aは、例えば、約3μmである。互いに隣接する共通電極17の間のピッチP17A(距離)は、例えば、約4μmである。具体的には、一つの画素上だけでなく、互いに隣接する画素間においても、X方向にてピッチP17Aで、共通電極17が互いに離間している。
 図2に示す例では、一つの画素電極20に対して2つのストライプパターンを有する共通電極17が設けられているが、本発明は、この構成を限定しない。画素電極20の大きさに応じて、共通電極17の本数は、1本以上さらには3本以上であってもよい。この場合、共通電極17の幅W17A及びピッチP17Aは、画素サイズ等や設計に応じて適宜変更可能である。
Furthermore, the liquid crystal display device LCD1 includes a common electrode 17 at a position facing the pixel electrode 20 in the Z direction. In particular, a common electrode 17 having two stripe patterns is provided for one pixel electrode 20. The common electrode 17 is provided in each of the plurality of pixel openings. The common electrode 17 extends in the Y direction and is parallel to the longitudinal direction of the pixel electrode 20. The length EL of the common electrode 17 in the Y direction is larger than the length of the pixel electrode 20 in the Y direction. The common electrode 17 is electrically connected to the common wiring 30 through a through hole 20S and a contact hole H described later. As shown in FIG. 2, the contact hole H is located at the center in the longitudinal direction of the conductive pattern (electrode portion 17 </ b> A, stripe pattern) of the common electrode 17.
The number of common electrodes 17 and the number of contact holes in one pixel can be adjusted by, for example, the pixel width (pixel size).
In the X direction, the width W17A of the common electrode 17 is, for example, about 3 μm. The pitch P17A (distance) between the adjacent common electrodes 17 is, for example, about 4 μm. Specifically, not only on one pixel but also between adjacent pixels, the common electrodes 17 are spaced apart from each other at a pitch P17A in the X direction.
In the example shown in FIG. 2, the common electrode 17 having two stripe patterns is provided for one pixel electrode 20, but the present invention is not limited to this configuration. Depending on the size of the pixel electrode 20, the number of the common electrodes 17 may be one or more, or three or more. In this case, the width W17A and the pitch P17A of the common electrode 17 can be appropriately changed according to the pixel size and the design.
 図3は、本発明の第1実施形態に係る液晶表示装置LCD1を部分的に示す断面図であり、図2に示すA-A’線に沿う断面図である。特に、図3は、画素開口部の短辺方向に沿う断面図である。
 図4Aは、本発明の第1実施形態に係る液晶表示装置LCD1を部分的に示す断面図であり、図2に示すB-B’線に沿う断面図である。図4Bは、本発明の第1実施形態に係る液晶表示装置LCD1を部分的に示す断面図であり、共通電極を拡大した拡大断面図である。
 図5は、本発明の第1実施形態に係る液晶表示装置LCD1を部分的に示す断面図であり、図2に示すC-C’線に沿う断面図である。
FIG. 3 is a sectional view partially showing the liquid crystal display device LCD1 according to the first embodiment of the present invention, and is a sectional view taken along the line AA ′ shown in FIG. In particular, FIG. 3 is a cross-sectional view along the short side direction of the pixel opening.
FIG. 4A is a sectional view partially showing the liquid crystal display device LCD1 according to the first embodiment of the present invention, and is a sectional view taken along the line BB ′ shown in FIG. FIG. 4B is a sectional view partially showing the liquid crystal display device LCD1 according to the first embodiment of the present invention, and is an enlarged sectional view in which a common electrode is enlarged.
FIG. 5 is a sectional view partially showing the liquid crystal display device LCD1 according to the first embodiment of the present invention, and is a sectional view taken along the line CC ′ shown in FIG.
 図3や図4Aは、タッチセンシング配線3と共通電極17との距離W1を示している。換言すれば、この距離W1は、透明樹脂層16、カラーフィルタ51(RGB)、図示されていない配向膜、及び液晶層300を含む空間におけるZ方向の距離である。この空間には、アクティブ素子、ソース配線、及び画素電極は含まれていない。本実施形態において、距離W1で示されるこの空間をタッチセンシング空間と呼称する。アクティブ素子やソース配線などのノイズ源から生じるノイズは、一般に3次元の放射状に放出される。このため、ノイズの大きさは、距離W1の3乗分の1となる(距離が大きいほどノイズの影響が小さくなる。)
 図3や図4Aは、タッチセンシング配線3とソース配線31との距離W2を示している。距離W2に示されるように、タッチセンシング配線3とソース配線31とは大きく離間している。加えて、図2や図3に示されるように、共通電極17とソース配線31は平面視において重畳していないため、ソース配線31に起因する寄生容量は極めて小さい。更に、タッチセンシング空間に最も近い位置に設けられている共通電極17は、画素の長手方向において画素単位で細切れの形状を有する。このため、複数の画素を跨ぐように直線形状で延在している共通電極が設けられている場合と比較して、本実施形態に係る共通電極17は、寄生容量を小さくすることができる。
 図3や図4Aに示す構造によれば、ソース配線31に供給される映像信号に起因するノイズがタッチセンシング配線3に与える影響を抑制することができ、タッチセンシング配線3とソース配線31との間に発生する寄生容量を減少させることができる。
3 and 4A show the distance W1 between the touch sensing wiring 3 and the common electrode 17. In other words, the distance W1 is a distance in the Z direction in a space including the transparent resin layer 16, the color filter 51 (RGB), the alignment film (not shown), and the liquid crystal layer 300. This space does not include active elements, source lines, and pixel electrodes. In the present embodiment, this space indicated by the distance W1 is referred to as a touch sensing space. Noise generated from noise sources such as active elements and source wirings is generally emitted in a three-dimensional radial pattern. For this reason, the magnitude of noise is 1/3 of the distance W1 (the larger the distance, the smaller the influence of noise).
3 and 4A show the distance W2 between the touch sensing wiring 3 and the source wiring 31. FIG. As indicated by the distance W2, the touch sensing wiring 3 and the source wiring 31 are greatly separated. In addition, as shown in FIGS. 2 and 3, since the common electrode 17 and the source wiring 31 do not overlap in plan view, the parasitic capacitance caused by the source wiring 31 is extremely small. Furthermore, the common electrode 17 provided at a position closest to the touch sensing space has a shape of a small piece for each pixel in the longitudinal direction of the pixel. For this reason, compared with the case where the common electrode extended in a linear shape so as to straddle a plurality of pixels is provided, the common electrode 17 according to the present embodiment can reduce the parasitic capacitance.
According to the structure shown in FIG. 3 and FIG. 4A, it is possible to suppress the influence of noise caused by the video signal supplied to the source wiring 31 on the touch sensing wiring 3. Parasitic capacitance generated between them can be reduced.
 液晶表示装置LCD1は、表示装置基板100(対向基板)と、表示装置基板100に向かい合うように貼り合わされたアレイ基板200と、表示装置基板100及びアレイ基板200によって挟持された液晶層300とを備える。
 液晶表示装置LCD1に内部に光Lを供給するバックライトユニットBUは、液晶表示装置LCD1を構成するアレイ基板200の裏面(液晶層300が配置されるアレイ基板200の透明基板の面とは反対面)に設けられている。なお、バックライトユニットは、液晶表示装置LCD1の側面に設けてもよい。この場合、例えば、バックライトユニットBUから出射された光を液晶表示装置LCD1に内部に向けて反射させる反射板、導光板、或いは、光拡散板等がアレイ基板200の透明基板22の裏面に設けられる。
The liquid crystal display device LCD1 includes a display device substrate 100 (counter substrate), an array substrate 200 bonded so as to face the display device substrate 100, and a liquid crystal layer 300 sandwiched between the display device substrate 100 and the array substrate 200. .
The backlight unit BU that supplies light L to the liquid crystal display device LCD1 is provided on the back surface of the array substrate 200 constituting the liquid crystal display device LCD1 (the surface opposite to the transparent substrate surface of the array substrate 200 on which the liquid crystal layer 300 is disposed). ). The backlight unit may be provided on the side surface of the liquid crystal display device LCD1. In this case, for example, a reflection plate, a light guide plate, a light diffusion plate, or the like that reflects the light emitted from the backlight unit BU toward the inside of the liquid crystal display device LCD1 is provided on the back surface of the transparent substrate 22 of the array substrate 200. It is done.
(表示装置基板100)
 表示装置基板100は、透明基板21(第1透明基板)と、透明基板21上に設けられたタッチセンシング配線3と、タッチセンシング配線3を覆うように形成されたカラーフィルタ51(RGB)と、カラーフィルタ51を覆うように形成された透明樹脂層16とを備えている。
 タッチセンシング配線3は、タッチ駆動電極(タッチ駆動配線)として機能する。液晶表示装置LCD1においては、タッチセンシング配線3と共通電極17間の静電容量の変化を検知することで、タッチセンシングの検出が行われる。
 タッチセンシング配線3は、少なくとも黒色層8と、黒色層8の上方に形成された金属層5とを含む導電層から形成された積層構造を有する。さらに、導電層は、第1導電性金属酸化物層6、金属層5、及び第2導電性金属酸化物層4の3層構成を有する。また、第1導電性金属酸化物層6の表面(液晶層側)にさらに黒色層や光吸収層を積層してもよい。平面視、タッチセンシング配線3と黒色層8の、線幅の等しい部分があってもよい。
 第1導電性金属酸化物層6及び第2導電性金属酸化物層4によって金属層5が挟持されている構成では、導電性金属酸化物のいずれか、或いは導電性金属酸化物の2層積層を省いた層構成が採用されてもよい。
(Display device substrate 100)
The display device substrate 100 includes a transparent substrate 21 (first transparent substrate), a touch sensing wiring 3 provided on the transparent substrate 21, a color filter 51 (RGB) formed so as to cover the touch sensing wiring 3, and And a transparent resin layer 16 formed so as to cover the color filter 51.
The touch sensing wiring 3 functions as a touch driving electrode (touch driving wiring). In the liquid crystal display device LCD1, touch sensing is detected by detecting a change in capacitance between the touch sensing wiring 3 and the common electrode 17.
The touch sensing wiring 3 has a laminated structure formed of a conductive layer including at least a black layer 8 and a metal layer 5 formed above the black layer 8. Furthermore, the conductive layer has a three-layer configuration of a first conductive metal oxide layer 6, a metal layer 5, and a second conductive metal oxide layer 4. Further, a black layer or a light absorption layer may be further laminated on the surface (liquid crystal layer side) of the first conductive metal oxide layer 6. There may be a portion having the same line width between the touch sensing wiring 3 and the black layer 8 in plan view.
In the configuration in which the metal layer 5 is sandwiched between the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4, either a conductive metal oxide or a two-layer stack of conductive metal oxides A layer configuration without the above may be employed.
(金属層5)
 金属層5としては、例えば、銅層或いは銅合金層である銅含有層、或いは、アルミニウムを含有するアルミニウム合金層(アルミニウム含有層)を採用することができる。具体的に、金属層5の材料としては、銅、銀、金、チタン、モリブデン、アルミニウム、或いはこれらの合金を適用することができる。ニッケルは強磁性体であるため、成膜レートが落ちるものの、スパッタリング等の真空成膜で形成することができる。クロムは、環境汚染の問題や抵抗値が大きいというデメリットを有するが、本実施形態に係る金属層の材料として用いることができる。金属層5を形成する金属としては、透明基板21や透明樹脂層16に対する密着性を得るために、銅或いはアルミニウムに、マグネシウム、カルシウム、チタン、モリブデン、インジウム、錫、亜鉛、ネオジウム、ニッケル、アルミニウム、アンチモン、銀から選択される1以上の金属元素を添加した合金を採用することが好ましい。金属元素を金属層5に添加する量は、4at%以下であれば、銅合金やアルミニウムの抵抗値を大きく下げることがないので好ましい。銅合金の成膜方法としては、例えば、スパッタリング等の真空成膜法を用いることができる。
 銅合金薄膜やアルミニウム合金薄膜を採用する場合、膜厚を100nm以上、或いは150nm以上とすると、可視光をほとんど透過しなくなる。したがって、本実施形態に係る金属層5は、例えば、100nm~300nmの膜厚を有していれば、十分な遮光性を得ることができる。金属層5の膜厚は、300nmを超えてもよい。なお、後述するように、金属層5の材料は、コモン配線30(導電配線)にも適用することができる。また、導電性金属酸化物層で金属層5を挟持する積層構造も、コモン配線30(導電配線)に適用することができる。
(Metal layer 5)
As the metal layer 5, for example, a copper-containing layer that is a copper layer or a copper alloy layer, or an aluminum alloy layer (aluminum-containing layer) containing aluminum can be employed. Specifically, copper, silver, gold, titanium, molybdenum, aluminum, or an alloy thereof can be applied as the material of the metal layer 5. Since nickel is a ferromagnetic material, it can be formed by vacuum film formation such as sputtering although the film formation rate is lowered. Chromium has the disadvantage of environmental pollution and a large resistance value, but can be used as a material for the metal layer according to the present embodiment. As the metal forming the metal layer 5, in order to obtain adhesion to the transparent substrate 21 and the transparent resin layer 16, copper, aluminum, magnesium, calcium, titanium, molybdenum, indium, tin, zinc, neodymium, nickel, aluminum It is preferable to employ an alloy to which one or more metal elements selected from antimony and silver are added. The amount of the metal element added to the metal layer 5 is preferably 4 at% or less because the resistance value of the copper alloy or aluminum is not greatly lowered. As a copper alloy film forming method, for example, a vacuum film forming method such as sputtering can be used.
When adopting a copper alloy thin film or an aluminum alloy thin film, if the film thickness is 100 nm or more, or 150 nm or more, visible light is hardly transmitted. Therefore, if the metal layer 5 according to the present embodiment has a film thickness of, for example, 100 nm to 300 nm, sufficient light shielding properties can be obtained. The film thickness of the metal layer 5 may exceed 300 nm. As will be described later, the material of the metal layer 5 can also be applied to the common wiring 30 (conductive wiring). A laminated structure in which the metal layer 5 is sandwiched between conductive metal oxide layers can also be applied to the common wiring 30 (conductive wiring).
(導電性金属酸化物層4、6)
 第1導電性金属酸化物層6及び第2導電性金属酸化物層4は、金属層5を挟持する。第1導電性金属酸化物層6と金属層5との界面及び第2導電性金属酸化物層4と金属層5との界面には、ニッケル、亜鉛、インジウム、チタン、モリブデン、タングステン等、銅と異なる金属やこれら金属の合金層を挿入してもよい。
 具体的に、第2導電性金属酸化物層4及び第1導電性金属酸化物層6の材料としては、例えば、酸化インジウム、酸化亜鉛、酸化アンチモン、酸化錫から選択される2種以上の金属酸化物を含む複合酸化物を採用することができる。
 第2導電性金属酸化物層4及び第1導電性金属酸化物層6に含まれるインジウム(In)の量は、80at%より多く含有させる必要がある。インジウム(In)の量は、80at%より多いことが好ましい。インジウム(In)の量は、90at%より多いことがさらに好ましい。インジウム(In)の量が80at%より少ない場合、形成される導電性金属酸化物層の比抵抗が大きくなり、好ましくない。亜鉛(Zn)の量が20at%を超えると、導電性金属酸化物(混合酸化物)の耐アルカリ性が低下するので好ましくない。上記の第2導電性金属酸化物層4及び第1導電性金属酸化物層6においては、いずれも、混合酸化物中の金属元素でのアトミックパーセント(酸素元素をカウントしない金属元素のみのカウント)である。酸化アンチモンは、金属アンチモンが銅との固溶域を形成しにくく、積層構成での銅の拡散を抑制するため、上記導電性金属酸化物層に加えることができる。
(Conductive metal oxide layers 4 and 6)
The first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 sandwich the metal layer 5. At the interface between the first conductive metal oxide layer 6 and the metal layer 5 and the interface between the second conductive metal oxide layer 4 and the metal layer 5, copper such as nickel, zinc, indium, titanium, molybdenum, tungsten, etc. Different metals or alloy layers of these metals may be inserted.
Specifically, as the material of the second conductive metal oxide layer 4 and the first conductive metal oxide layer 6, for example, two or more kinds of metals selected from indium oxide, zinc oxide, antimony oxide, and tin oxide are used. A composite oxide containing an oxide can be employed.
The amount of indium (In) contained in the second conductive metal oxide layer 4 and the first conductive metal oxide layer 6 needs to be greater than 80 at%. The amount of indium (In) is preferably greater than 80 at%. More preferably, the amount of indium (In) is greater than 90 at%. When the amount of indium (In) is less than 80 at%, the specific resistance of the conductive metal oxide layer to be formed increases, which is not preferable. If the amount of zinc (Zn) exceeds 20 at%, the alkali resistance of the conductive metal oxide (mixed oxide) decreases, which is not preferable. In the second conductive metal oxide layer 4 and the first conductive metal oxide layer 6 described above, both atomic percentages of metal elements in the mixed oxide (counting only metal elements not counting oxygen elements) It is. Antimony oxide can be added to the conductive metal oxide layer because metal antimony hardly forms a solid solution region with copper and suppresses diffusion of copper in a laminated structure.
 第1導電性金属酸化物層6及び第2導電性金属酸化物層4に含まれる亜鉛(Zn)の量は、錫(Sn)の量より多くする必要がある。錫の含有量が亜鉛含有量を超えてくると、後工程でのウエットエッチングで支障が出てくる。換言すれば、銅或いは銅合金である金属層が導電性金属酸化物層よりもエッチングされ易くなり、第1導電性金属酸化物層6、金属層5、及び第2導電性金属酸化物層4との幅に差が生じ易くなる。
 第1導電性金属酸化物層6及び第2導電性金属酸化物層4に含まれる錫(Sn)の量は、0.5at%以上6at%以下の範囲内が好ましい。インジウム元素に対する比較で、0.5at%以上6at%以下の錫を導電性金属酸化物層に添加することで、上記インジウム、亜鉛、及び錫との3元系混合酸化物膜(導電性の複合酸化物層)の比抵抗を小さくすることができる。錫の量が6at%を超えると、導電性金属酸化物層に対する亜鉛の添加も伴うため、3元系混合酸化物膜(導電性の複合酸化物層)の比抵抗が大きくなりすぎる。上記の範囲(0.5at%以上6at%以下)内で亜鉛及び錫の量を調整することで、比抵抗をおおよそ、混合酸化物膜の単層膜の比抵抗として5×10-4Ωcm以上3×10-4Ωcm以下の小さな範囲内に収めることができる。上記混合酸化物中には、チタン、ジルコニウム、マグネシウム、アルミニウム、ゲルマニウム等の他の元素を少量、添加することもできる。ただし、本実施形態において、混合酸化物の比抵抗は、上記の範囲に限定されない。
The amount of zinc (Zn) contained in the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 needs to be larger than the amount of tin (Sn). If the tin content exceeds the zinc content, there will be problems with wet etching in the subsequent process. In other words, the metal layer made of copper or copper alloy is more easily etched than the conductive metal oxide layer, and the first conductive metal oxide layer 6, the metal layer 5, and the second conductive metal oxide layer 4. A difference in the width is likely to occur.
The amount of tin (Sn) contained in the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 is preferably in the range of 0.5 at% or more and 6 at% or less. In comparison with indium element, by adding tin of 0.5 at% or more and 6 at% or less to the conductive metal oxide layer, a ternary mixed oxide film of indium, zinc, and tin (conductive composite) The specific resistance of the oxide layer can be reduced. If the amount of tin exceeds 6 at%, zinc is also added to the conductive metal oxide layer, so that the specific resistance of the ternary mixed oxide film (conductive composite oxide layer) becomes too large. By adjusting the amount of zinc and tin within the above range (0.5 at% or more and 6 at% or less), the specific resistance is approximately 5 × 10 −4 Ωcm or more as the specific resistance of the single layer film of the mixed oxide film. It can be within a small range of 3 × 10 −4 Ωcm or less. A small amount of other elements such as titanium, zirconium, magnesium, aluminum, and germanium can be added to the mixed oxide. However, in this embodiment, the specific resistance of the mixed oxide is not limited to the above range.
 金属層5が銅層或いは銅合金層である場合、上述した導電性金属酸化物層は、酸化インジウム、酸化亜鉛、酸化アンチモン、及び酸化錫から選択される2種以上の金属酸化物を含む複合酸化物であることが望ましい。銅層或いは銅合金層は、カラーフィルタ51を構成する透明樹脂層16やガラス基板(透明基板21)に対する密着性が低い。このため、銅層或いは銅合金層をこのまま表示装置基板に適用した場合、実用的な表示装置基板を実現することは難しい。しかし、上述した複合酸化物は、カラーフィルタ51、ブラックマトリクスBM(黒色層8)、及びガラス基板(透明基板21)等に対する密着性を十分に有しており、かつ、銅層や銅合金層に対する密着性も十分である。このため、複合酸化物を用いた銅層或いは銅合金層を表示装置基板に適用した場合、実用的な表示装置基板を実現することが可能となる。 When the metal layer 5 is a copper layer or a copper alloy layer, the conductive metal oxide layer described above is a composite containing two or more metal oxides selected from indium oxide, zinc oxide, antimony oxide, and tin oxide. An oxide is desirable. The copper layer or the copper alloy layer has low adhesion to the transparent resin layer 16 and the glass substrate (transparent substrate 21) constituting the color filter 51. For this reason, when a copper layer or a copper alloy layer is applied to a display device substrate as it is, it is difficult to realize a practical display device substrate. However, the above-described composite oxide has sufficient adhesion to the color filter 51, the black matrix BM (black layer 8), the glass substrate (transparent substrate 21), and the like, and a copper layer or a copper alloy layer. Adhesion to is also sufficient. For this reason, when a copper layer or a copper alloy layer using a composite oxide is applied to a display device substrate, a practical display device substrate can be realized.
 銅、銅合金、銀、銀合金、或いはこれらの酸化物、窒化物は、ガラス等の透明基板21やブラックマトリクスBM等に対する十分な密着性を一般的に有していない。そのため、導電性金属酸化物層を設けない場合、タッチセンシング配線3とガラス等の透明基板21との界面、或いは、タッチセンシング配線3と黒色層8の界面で剥がれが生じる可能性がある。細い配線パターンを有するタッチセンシング配線3として銅或いは銅合金を用いる場合、金属層5(銅或いは銅合金)の下地層として導電性金属酸化物層が形成されていない表示装置基板においては、剥がれによる不良以外にも、表示装置基板の製造工程の途中でタッチセンシング配線3に静電破壊による不良が生じる場合があり、実用的ではない。このようなタッチセンシング配線3における静電破壊は、カラーフィルタ51を透明基板21上に積層するといった後工程や、表示装置基板とアレイ基板とを貼り合わせる工程や、洗浄工程等によって配線パターンに静電気が蓄積され、静電破壊によりパターン欠け、断線等を生じる現象である。
 加えて、銅層や銅合金層の表面には、導電性を有しない銅酸化物が経時的に形成され、電気的なコンタクトが困難となることがある。その一方、酸化インジウム、酸化亜鉛、酸化アンチモン、酸化錫等の複合酸化物層は、安定したオーミックコンタクトを実現することができ、このような複合酸化物層を用いる場合では後述するトランスファ等の電気的実装を容易に行うことができる。また、表示装置基板とアレイ基板とが貼り合わされるシール部において、表示装置基板100からアレイ基板200への導通の転移(トランスファ)を、シール部の厚み方向に行うことも可能である。異方性導電膜、微小な金属球、或いは金属膜で覆った樹脂球等から選ばれる導体をシール部に配置することで、表示装置基板100とアレイ基板200とを導通することができる。
Copper, copper alloy, silver, silver alloy, or oxides and nitrides thereof generally do not have sufficient adhesion to the transparent substrate 21 such as glass, the black matrix BM, and the like. Therefore, when the conductive metal oxide layer is not provided, peeling may occur at the interface between the touch sensing wiring 3 and the transparent substrate 21 such as glass or the interface between the touch sensing wiring 3 and the black layer 8. When copper or a copper alloy is used as the touch sensing wiring 3 having a thin wiring pattern, the display device substrate in which the conductive metal oxide layer is not formed as the base layer of the metal layer 5 (copper or copper alloy) is peeled off. In addition to defects, defects due to electrostatic breakdown may occur in the touch sensing wiring 3 during the manufacturing process of the display device substrate, which is not practical. Such electrostatic breakdown in the touch sensing wiring 3 is caused by static electricity in the wiring pattern by a post process such as laminating the color filter 51 on the transparent substrate 21, a process of bonding the display device substrate and the array substrate, a cleaning process or the like. Is a phenomenon that causes pattern breakage, disconnection, and the like due to electrostatic breakdown.
In addition, non-conductive copper oxide may be formed over time on the surface of the copper layer or copper alloy layer, making electrical contact difficult. On the other hand, a complex oxide layer such as indium oxide, zinc oxide, antimony oxide, and tin oxide can realize a stable ohmic contact. When such a complex oxide layer is used, an electric current such as a transfer described later is used. Can be easily implemented. Further, in the seal portion where the display device substrate and the array substrate are bonded to each other, it is also possible to perform conduction transfer (transfer) from the display device substrate 100 to the array substrate 200 in the thickness direction of the seal portion. By disposing a conductor selected from an anisotropic conductive film, a minute metal sphere, or a resin sphere covered with a metal film in the seal portion, the display device substrate 100 and the array substrate 200 can be electrically connected.
 本発明の実施形態に適用可能な導電性金属酸化物層4、6と金属層5での金属酸化物の層構成としては、以下の構成が挙げられる。例えば、中心基材として酸化インジウムを含有するITO(Indium Tin Oxide)やIZTO(Indium Zinc Tin Oxide、Zは酸化亜鉛)において酸素が不足した状態で、例えば、銅合金層の上に金属層を成膜することによって得られる層構成、或いは、酸化モリブデン、酸化タングステン、酸化ニッケルと酸化銅の混合酸化物、酸化チタン、等をアルミニウム合金や銅合金の上に金属層を積層することによって得られる層構成等が挙げられる。導電性金属酸化物層と金属層とによって得られる層構成は、スパッタ装置等の真空成膜装置で、連続成膜できるというメリットがある。 Examples of the metal oxide layer structure of the conductive metal oxide layers 4 and 6 and the metal layer 5 applicable to the embodiment of the present invention include the following structures. For example, in a state where oxygen is insufficient in ITO (Indium Tin Oxide) or IZTO (Indium Zinc Tin Oxide, Z is zinc oxide) containing indium oxide as a central base material, for example, a metal layer is formed on a copper alloy layer. Layer structure obtained by film formation, or layer obtained by laminating a metal layer on aluminum alloy or copper alloy with molybdenum oxide, tungsten oxide, mixed oxide of nickel oxide and copper oxide, titanium oxide, etc. Examples include the configuration. The layer structure obtained by the conductive metal oxide layer and the metal layer has an advantage that the film can be continuously formed by a vacuum film forming apparatus such as a sputtering apparatus.
(黒色層8)
 黒色層8は、液晶表示装置LCD1のブラックマトリクスBMとして機能する。黒色層は、例えば、黒色の色材を分散させた着色樹脂で構成されている。銅の酸化物や銅合金の酸化物は、十分な黒色や低い反射率を得られないが、本実施形態に係る黒色層とガラス等の基板との間の界面における可視光の反射率はほぼ3%以下に抑えられ、高い視認性が得られる。
(Black layer 8)
The black layer 8 functions as a black matrix BM of the liquid crystal display device LCD1. The black layer is made of, for example, a colored resin in which a black color material is dispersed. Copper oxides and copper alloy oxides cannot obtain sufficient black or low reflectance, but the visible light reflectance at the interface between the black layer and the substrate such as glass according to this embodiment is almost the same. It is suppressed to 3% or less, and high visibility is obtained.
 黒色の色材としては、カーボン、カーボンナノチューブ或いは、複数の有機顔料の混合物が適用可能である。例えば、色材全体の量に対して51質量%以上の割合で、即ち、主な色材としてカーボンを用いる。反射色を調整するため、青もしくは赤等の有機顔料を黒色の色材に添加して用いることができる。例えば、出発材料である感光性黒色塗布液に含まれるカーボンの濃度を調整する(カーボン濃度を下げる)ことにより、黒色層の再現性を向上させることができる。 As the black color material, carbon, carbon nanotubes, or a mixture of a plurality of organic pigments can be used. For example, carbon is used at a ratio of 51 mass% or more with respect to the total amount of the color material, that is, as the main color material. In order to adjust the reflection color, an organic pigment such as blue or red can be added to the black color material. For example, the reproducibility of the black layer can be improved by adjusting the concentration of carbon contained in the photosensitive black coating liquid as a starting material (lowering the carbon concentration).
 液晶表示装置の製造装置である大型露光装置を用いた場合であっても、例えば、1~6μmの幅(細線)を有するパターンを有する黒色層を形成することができる(パターニング)。なお、本実施形態におけるカーボン濃度の範囲は、樹脂や硬化剤と顔料とを含めた全体の固形分に対して、4以上50以下の質量%の範囲内に設定している。ここで、カーボン量として、カーボン濃度が50質量%を超えてもよいが、全体の固形分に対してカーボン濃度が50質量%を超えると塗膜適性が低下する傾向がある。また、カーボン濃度を4質量%未満に設定した場合、十分な黒色を得ることができず、黒色層下に位置する下地の金属層で生じる反射光が大きく視認され、視認性を低下させることがあった。 Even when a large exposure apparatus, which is a liquid crystal display manufacturing apparatus, is used, for example, a black layer having a pattern having a width (thin line) of 1 to 6 μm can be formed (patterning). In addition, the range of the carbon concentration in this embodiment is set in the range of 4 to 50% by mass with respect to the total solid content including the resin, the curing agent, and the pigment. Here, as the amount of carbon, the carbon concentration may exceed 50% by mass. However, when the carbon concentration exceeds 50% by mass with respect to the entire solid content, the suitability of the coating film tends to decrease. In addition, when the carbon concentration is set to less than 4% by mass, sufficient black color cannot be obtained, and reflected light generated in the underlying metal layer located under the black layer is greatly recognized, thereby reducing visibility. there were.
 後工程であるフォトリソグラフィにおいて露光処理を行う場合、露光対象の基板と、マスクとの位置合わせ(アライメント)が行われる。この時、アライメントを優先し、例えば、透過測定による黒色層の光学濃度を2以下とすることができる。カーボン以外に、黒色の色調整として複数の有機顔料の混合物を用いて黒色層を形成してもよい。ガラスや透明樹脂等の基材の屈折率(約1.5)を考慮し、黒色層とそれら基材との間の界面における反射率が3%以下となるように、黒色層の反射率が設定される。この場合、黒色色材の含有量、種類、色材に用いられる樹脂、膜厚を調整することが望ましい。これらの条件を最適化することで、屈折率がおよそ1.5であるガラス等の基材と黒色層との間の界面における反射率を、可視光の波長領域内で3%以下にすることができ、低反射率を実現することができる。バックライトユニットBUから出射された光に起因する反射光が再度反射することを防止する必要性、観察者の視認性の向上を配慮して、黒色層の反射率は、3%以下とすることが望ましい。なお、通常、カラーフィルタに用いられるアクリル樹脂、また、液晶材料の屈折率は、おおよそ1.5以上1.7以下の範囲である。
 また、タッチセンシング配線3や導電配線(コモン配線30)上に、光吸収性を有する金属酸化物を形成することで、タッチセンシング配線3に用いられる金属層5による光反射を抑制することができる。
When exposure processing is performed in photolithography, which is a subsequent process, alignment between the substrate to be exposed and the mask is performed. At this time, priority is given to alignment, and for example, the optical density of the black layer by transmission measurement can be made 2 or less. In addition to carbon, a black layer may be formed using a mixture of a plurality of organic pigments as a black color adjustment. Considering the refractive index (about 1.5) of the base material such as glass or transparent resin, the reflectance of the black layer is such that the reflectance at the interface between the black layer and the base material is 3% or less. Is set. In this case, it is desirable to adjust the content and type of the black color material, the resin used for the color material, and the film thickness. By optimizing these conditions, the reflectance at the interface between the black layer having a refractive index of approximately 1.5 and the black layer is set to 3% or less in the visible wavelength range. And low reflectivity can be realized. The reflectance of the black layer shall be 3% or less in consideration of the necessity of preventing the reflected light caused by the light emitted from the backlight unit BU from being reflected again and the improvement of the visibility of the observer. Is desirable. In general, the refractive index of the acrylic resin used for the color filter and the liquid crystal material is approximately in the range of 1.5 to 1.7.
Further, by forming a light-absorbing metal oxide on the touch sensing wiring 3 or the conductive wiring (common wiring 30), light reflection by the metal layer 5 used for the touch sensing wiring 3 can be suppressed. .
 図3に示す表示装置基板100においては、カラーフィルタ51が設けられた構造が用いられているが、カラーフィルタ51が省略された構造、例えば、透明基板21上に設けられたタッチセンシング配線3と、タッチセンシング配線3を覆うように形成された透明樹脂層16とを備えた構造を用いてもよい。
 カラーフィルタ51を含まない表示装置基板を用いる液晶表示装置においては、赤色発光、緑色発光、及び青色発光の各々のLEDをバックライトユニットに設け、フィールドシーケンシャルの手法でカラー表示を行う。図3に示す透明基板21上に設けられたタッチセンシング配線3の層構成は、後述するアレイ基板200に形成されるコモン配線30(導電配線)の層構成やゲート電極25(ゲート配線10)の層構成と同じにすることができる。
In the display device substrate 100 shown in FIG. 3, a structure in which the color filter 51 is provided is used, but a structure in which the color filter 51 is omitted, for example, the touch sensing wiring 3 provided on the transparent substrate 21 and Alternatively, a structure including a transparent resin layer 16 formed so as to cover the touch sensing wiring 3 may be used.
In a liquid crystal display device using a display device substrate that does not include the color filter 51, each LED of red light emission, green light emission, and blue light emission is provided in a backlight unit, and color display is performed by a field sequential method. The layer configuration of the touch sensing wiring 3 provided on the transparent substrate 21 shown in FIG. 3 includes the layer configuration of the common wiring 30 (conductive wiring) formed on the array substrate 200 described later and the gate electrode 25 (gate wiring 10). It can be the same as the layer structure.
(アレイ基板200)
 図3、図4A、及び図4Bに示すように、アレイ基板200は、透明基板22(第2透明基板)と、透明基板22の表面を覆うように形成された第4絶縁層14と、第4絶縁層14上に形成されたソース配線31と、ソース配線31を覆うように第4絶縁層14上に形成された第3絶縁層13と、第3絶縁層13上に形成されたゲート配線10と、第3絶縁層13上に形成されたコモン配線30と、ゲート配線10及びコモン配線30を覆うように第3絶縁層13上に形成された第2絶縁層12と、第2絶縁層12上に形成された画素電極20と、画素電極20を覆うように第2絶縁層12上に形成された第1絶縁層11と、共通電極17を備えている。
(Array substrate 200)
As shown in FIGS. 3, 4A, and 4B, the array substrate 200 includes a transparent substrate 22 (second transparent substrate), a fourth insulating layer 14 formed to cover the surface of the transparent substrate 22, A source wiring 31 formed on the fourth insulating layer 14, a third insulating layer 13 formed on the fourth insulating layer 14 so as to cover the source wiring 31, and a gate wiring formed on the third insulating layer 13 10, a common wiring 30 formed on the third insulating layer 13, a second insulating layer 12 formed on the third insulating layer 13 so as to cover the gate wiring 10 and the common wiring 30, and a second insulating layer The pixel electrode 20 formed on the first insulating layer 12, the first insulating layer 11 formed on the second insulating layer 12 so as to cover the pixel electrode 20, and the common electrode 17 are provided.
 第1絶縁層11、第2絶縁層12、第3絶縁層13、及び第4絶縁層14を形成する材料としては、酸化シリコン、酸化窒化シリコン、酸化アルミニウム、酸化窒化アルミニウム、酸化セリウム、酸化ハフニウム、或いはこのような材料を含む混合材料が採用される。あるいは、これら絶縁層の一部に、ポリイミド樹脂、アクリル樹脂、ベンゾシクロブテン樹脂や低誘電率材料(low-k材料)を用いてもよい。また、このような絶縁層11、12、13、14の構成としては、単一層からなる層構成が採用されてもよいし、複数の層が積層された多層構成が採用されてもよい。このような絶縁層11、12、13、14は、プラズマCVDやスパッタリング等の成膜装置を用いて形成することが可能である。
 ソース配線31は、第3絶縁層13と第4絶縁層14との間に配設される。ソース配線31の構造としては、多層の導電層を採用することができる。第1実施形態では、ソース配線31の構造として、チタン/アルミニウム合金/チタンの3層構成を採用している。ここで、アルミニウム合金は、アルミニウム-ネオジウムの合金である。
 コモン配線30の形成材料としては、上述した金属層5と同じ材料が採用される。また、同様に、コモン配線30の構造としては、上述した金属層5と同じ構造が採用される。
Materials for forming the first insulating layer 11, the second insulating layer 12, the third insulating layer 13, and the fourth insulating layer 14 include silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, cerium oxide, and hafnium oxide. Alternatively, a mixed material containing such a material is employed. Alternatively, a polyimide resin, an acrylic resin, a benzocyclobutene resin, or a low dielectric constant material (low-k material) may be used for a part of these insulating layers. Moreover, as a structure of such insulating layers 11, 12, 13, and 14, a layer structure composed of a single layer may be employed, or a multilayer structure in which a plurality of layers are stacked may be employed. Such insulating layers 11, 12, 13, and 14 can be formed by using a film forming apparatus such as plasma CVD or sputtering.
The source wiring 31 is disposed between the third insulating layer 13 and the fourth insulating layer 14. As the structure of the source wiring 31, a multi-layered conductive layer can be adopted. In the first embodiment, the source wiring 31 has a three-layer structure of titanium / aluminum alloy / titanium. Here, the aluminum alloy is an aluminum-neodymium alloy.
As a material for forming the common wiring 30, the same material as that of the metal layer 5 described above is employed. Similarly, the structure of the common wiring 30 is the same as that of the metal layer 5 described above.
 画素電極20は、複数の画素開口部18の各々に設けられており、TFTであるアクティブ素子(後述)に接続されている。アレイ基板200においては、アクティブ素子がマトリクス状に配置されていることから、画素電極20も同様に、アレイ基板200上においてマトリクス状に配置されている。画素電極20は、ITO等の透明導電膜で形成されている。 The pixel electrode 20 is provided in each of the plurality of pixel openings 18, and is connected to an active element (described later) that is a TFT. Since the active elements are arranged in a matrix on the array substrate 200, the pixel electrodes 20 are similarly arranged on the array substrate 200 in a matrix. The pixel electrode 20 is formed of a transparent conductive film such as ITO.
 アクティブ素子を構成するチャネル層或いは半導体層は、ポリシリコン半導体で形成されてもよく、酸化物半導体で形成されてもよい。アクティブ素子を構成するチャネル層或いは半導体層の層構成は、ポリシリコン半導体と酸化物半導体とが積層された積層構成であってもよい。アレイ基板上の同一面に、2種の半導体で形成される素子、例えば、ポリシリコン半導体であるチャネル層を備えるアクティブ素子と、酸化物半導体であるチャネル層を備えるアクティブ素子が形成された構成であってもよい。さらには、ポリシリコン半導体のTFTアレイ上に、絶縁層を介して、酸化物半導体で形成されたTFTアレイが2層に積層された構成が採用されてもよい。表示機能層が有機EL(Organic Electroluminescence)層である場合、酸化物半導体で形成されたTFTは、ポリシリコン半導体で形成されたTFTに信号を供給する(TFT素子を選択する)機能を有し、ポリシリコン半導体で形成されたTFTは、表示機能層を駆動する機能を有する。この構成により、表示機能層として有機EL層が採用された表示装置を実現することができる。キャリア移動度が高いポリシリコン半導体を備えるとともにチャネル層としてポリシリコン半導体を有するTFTは、有機EL素子への電流注入(有機EL素子の駆動)に適している。 The channel layer or semiconductor layer constituting the active element may be formed of a polysilicon semiconductor or an oxide semiconductor. The layer configuration of the channel layer or the semiconductor layer constituting the active element may be a stacked configuration in which a polysilicon semiconductor and an oxide semiconductor are stacked. An element formed of two types of semiconductors, for example, an active element including a channel layer that is a polysilicon semiconductor and an active element including a channel layer that is an oxide semiconductor are formed on the same surface of the array substrate. There may be. Furthermore, a configuration may be employed in which a TFT array formed of an oxide semiconductor is laminated in two layers on a polysilicon semiconductor TFT array via an insulating layer. When the display function layer is an organic EL (Organic Electroluminescence) layer, the TFT formed of an oxide semiconductor has a function of supplying a signal (selecting a TFT element) to the TFT formed of a polysilicon semiconductor, A TFT formed of a polysilicon semiconductor has a function of driving the display function layer. With this configuration, it is possible to realize a display device in which an organic EL layer is employed as a display function layer. A TFT including a polysilicon semiconductor having a high carrier mobility and having a polysilicon semiconductor as a channel layer is suitable for current injection into an organic EL element (driving the organic EL element).
(共通電極17の構造)
 図4Bを参照し、共通電極17の構造と、共通電極17の周辺に位置するアレイ基板200の構成部材とを説明する。特に、コモン配線30、共通電極17、画素電極20、第1絶縁層11、及び第2絶縁層12で構成される積層構造について具体的に説明する。図4Bは、アレイ基板200を構成する画素の要部を示しており、一つの画素における、一つの共通電極17の構造を示している。図4Bに示す共通電極17の構造は、アレイ基板200における全ての画素においても適用されている。
(Structure of common electrode 17)
With reference to FIG. 4B, the structure of the common electrode 17 and the constituent members of the array substrate 200 located around the common electrode 17 will be described. In particular, a stacked structure including the common wiring 30, the common electrode 17, the pixel electrode 20, the first insulating layer 11, and the second insulating layer 12 will be specifically described. FIG. 4B shows the main part of the pixels constituting the array substrate 200, and shows the structure of one common electrode 17 in one pixel. The structure of the common electrode 17 shown in FIG. 4B is also applied to all the pixels on the array substrate 200.
 第2絶縁層12は、第1絶縁層11の下に設けられており、コモン配線30上に形成されており、後述するコンタクトホールHの一部を形成する貫通孔12Hを有する。第1絶縁層11は、共通電極17の上部(電極部17A)の下に設けられており、画素電極20上に形成されており、後述するコンタクトホールHの一部を形成する貫通孔11Hを有する。貫通孔12Hの位置(中心位置)と、貫通孔11Hの位置(中心位置)とは一致している。貫通孔11Hの直径(X方向における幅)は、第1絶縁層11の上面11Tからコモン配線30に向かう方向(Z方向)において、徐々に小さくなっている。同様に、貫通孔12Hの直径(X方向における幅)は、第2絶縁層12の上面12Tからコモン配線30に向かう方向(Z方向)において、徐々に小さくなっている。貫通孔11H及び貫通孔12Hは、連続する内壁を有しており、コンタクトホールHを形成している。コンタクトホールHは、テーパ形状を有する。 The second insulating layer 12 is provided below the first insulating layer 11, is formed on the common wiring 30, and has a through hole 12H that forms a part of a contact hole H described later. The first insulating layer 11 is provided below the common electrode 17 (electrode part 17A), is formed on the pixel electrode 20, and has a through hole 11H that forms a part of a contact hole H described later. Have. The position (center position) of the through hole 12H matches the position (center position) of the through hole 11H. The diameter (width in the X direction) of the through hole 11H is gradually reduced in the direction (Z direction) from the upper surface 11T of the first insulating layer 11 toward the common wiring 30. Similarly, the diameter (width in the X direction) of the through hole 12H is gradually reduced in the direction (Z direction) from the upper surface 12T of the second insulating layer 12 toward the common wiring 30. The through hole 11H and the through hole 12H have a continuous inner wall and form a contact hole H. The contact hole H has a tapered shape.
 画素電極20は、第1絶縁層11の下に形成されており、スルーホール20Sを有する。スルーホール20Sは、透明導電膜の存在しない開口部である。スルーホール20Sは、コンタクトホールHに対応する位置に設けられている。
 図2に示す例では、各画素に2つのコンタクトホールH、即ち、左側コンタクトホールLH(H、第1コンタクトホール)及び右側コンタクトホールRH(H、第2コンタクトホール)が設けられており、2つのコンタクトホールHの各々に対応する位置にスルーホール20Sが設けられている。
 以下の説明では、左側コンタクトホールLH及び右側コンタクトホールRHを、単に、コンタクトホールHと称することがある。
The pixel electrode 20 is formed under the first insulating layer 11 and has a through hole 20S. The through hole 20S is an opening where no transparent conductive film exists. The through hole 20S is provided at a position corresponding to the contact hole H.
In the example shown in FIG. 2, each pixel is provided with two contact holes H, that is, a left contact hole LH (H, first contact hole) and a right contact hole RH (H, second contact hole). Through holes 20S are provided at positions corresponding to the respective contact holes H.
In the following description, the left contact hole LH and the right contact hole RH may be simply referred to as contact holes H.
 スルーホール20Sは、画素電極20に設けられた内壁20Kの内側領域に相当する。スルーホール20Sの直径D20Sは、コンタクトホールHの直径よりも大きい。貫通孔11H(コンタクトホールHの一部)は、スルーホール20Sの内部に設けられている。スルーホール20Sの内部には第1絶縁層11が充填されており、スルーホール20Sの内壁を埋めている第1絶縁層11の充填部11Fを貫通するように貫通孔11Hは形成されている。更に、スルーホール20Sの下方の位置においても、貫通孔11Hに連続するように貫通孔12H(コンタクトホールHの一部)が形成されている。なお、画素電極20に形成されているスルーホール20Sの数は、コンタクトホールHの数と同じであり、平面視、同じ位置に形成されている。スルーホール20Sの直径D20Sは、例えば、3μmから6μmである。スルーホール20Sの直径は、共通電極17の幅W17Aより大きくしてもよい。 The through hole 20S corresponds to an inner region of the inner wall 20K provided in the pixel electrode 20. The diameter D20S of the through hole 20S is larger than the diameter of the contact hole H. The through hole 11H (a part of the contact hole H) is provided inside the through hole 20S. The through hole 20S is filled with the first insulating layer 11, and the through hole 11H is formed so as to penetrate the filling portion 11F of the first insulating layer 11 filling the inner wall of the through hole 20S. Furthermore, a through hole 12H (a part of the contact hole H) is formed so as to be continuous with the through hole 11H also at a position below the through hole 20S. Note that the number of through holes 20S formed in the pixel electrode 20 is the same as the number of contact holes H, and is formed at the same position in plan view. The diameter D20S of the through hole 20S is 3 μm to 6 μm, for example. The diameter of the through hole 20 </ b> S may be larger than the width W <b> 17 </ b> A of the common electrode 17.
 共通電極17は、電極部17A(導電部)と、導電接続部17Bとを備える。
 電極部17Aは、第1絶縁層11の上面11Tに形成されており、Z方向から見て、画素電極20のスルーホール20Sと重なるように配置されている。電極部17Aは、液晶層300に最も近いアレイ基板200の面に設けられている。具体的には、液晶層300とアレイ基板200との間には配向膜が形成されており、この配向膜の下に第1絶縁層11が設けられている。
 電極部17Aの幅W17Aは、例えば、約3μmであり、導電接続部17Bの上端(電極部17Aと導電接続部17Bとの接続部)よりも大きく、スルーホール20Sの直径D20S(例えば、2μm)よりも大きく形成してもよい。あるいは、電極部17Aの幅W17Aよりも、スルーホール20Sの直径D20Sが大きくてもよい。スルーホール20Sの直径D20Sを、例えば、4μmとすることもできる。電極部17Aの中心(Z方向に平行な電極部17Aの中心線)から電極部17Aの外側に向けた方向(X方向)において、電極部17Aの壁部17Kは、画素電極20の内壁20Kの位置よりも突出している。
 導電接続部17Bは、コンタクトホールH(貫通孔11H、12H)の内部に設けられており、コンタクトホールHを通じて、コモン配線30に電気的に接続されている。
 第1絶縁層11及び第2絶縁層12に上述したコンタクトホールが形成されている状態で、第1絶縁層11上に成膜工程及びパターニング工程を施すことで、電極部17A及び導電接続部17Bは、一体的に形成されている。共通電極17は、画素電極20と同様に、ITO等の透明導電膜で形成されている。
The common electrode 17 includes an electrode portion 17A (conductive portion) and a conductive connection portion 17B.
The electrode portion 17A is formed on the upper surface 11T of the first insulating layer 11, and is disposed so as to overlap with the through hole 20S of the pixel electrode 20 when viewed from the Z direction. The electrode portion 17 </ b> A is provided on the surface of the array substrate 200 closest to the liquid crystal layer 300. Specifically, an alignment film is formed between the liquid crystal layer 300 and the array substrate 200, and the first insulating layer 11 is provided under the alignment film.
The width W17A of the electrode portion 17A is, for example, about 3 μm, is larger than the upper end of the conductive connection portion 17B (connection portion between the electrode portion 17A and the conductive connection portion 17B), and has a diameter D20S (for example, 2 μm) of the through hole 20S. You may form larger. Alternatively, the diameter D20S of the through hole 20S may be larger than the width W17A of the electrode portion 17A. The diameter D20S of the through hole 20S can be set to 4 μm, for example. In the direction (X direction) from the center of the electrode portion 17A (the center line of the electrode portion 17A parallel to the Z direction) to the outside of the electrode portion 17A, the wall portion 17K of the electrode portion 17A is the same as the inner wall 20K of the pixel electrode 20. It protrudes from the position.
The conductive connection portion 17B is provided inside the contact hole H (through holes 11H and 12H), and is electrically connected to the common wiring 30 through the contact hole H.
In a state where the contact holes described above are formed in the first insulating layer 11 and the second insulating layer 12, a film forming process and a patterning process are performed on the first insulating layer 11, so that the electrode portion 17A and the conductive connection portion 17B are formed. Are integrally formed. Similar to the pixel electrode 20, the common electrode 17 is formed of a transparent conductive film such as ITO.
 上述した積層構造においては、電極部17Aと画素電極20との間に第1絶縁層11が配置され、かつ、コモン配線30と画素電極20との間に第2絶縁層12が配置された状態で、共通電極17及びコモン配線30は互いに導通しており、コモン配線30の電位と共通電極17の電位とが同じとなっている。 In the stacked structure described above, the first insulating layer 11 is disposed between the electrode portion 17 </ b> A and the pixel electrode 20, and the second insulating layer 12 is disposed between the common wiring 30 and the pixel electrode 20. Thus, the common electrode 17 and the common wiring 30 are electrically connected to each other, and the potential of the common wiring 30 and the potential of the common electrode 17 are the same.
 コモン配線30(あるいは共通電極17)の電位は、液晶駆動とタッチセンシング駆動(静電容量の変化の検出)とを交互に行う際に、即ち、時分割で、変えることができる。また、コモン配線30(あるいは共通電極17)に付与される信号の周波数は、液晶駆動とタッチセンシング駆動(静電容量の変化の検出)とを交互に行う際に、即ち、時分割で、変えることができる。また、液晶駆動時、かつ、フレーム反転駆動時には、コモン配線30(あるいは共通電極17)の電位の極性を、フレーム毎に正極性と負極性とに入れ替えて、例えば、±2.5Vの液晶駆動電圧で液晶を駆動することができる。 The potential of the common wiring 30 (or the common electrode 17) can be changed when liquid crystal driving and touch sensing driving (detection of change in capacitance) are performed alternately, that is, in a time division manner. Further, the frequency of the signal applied to the common wiring 30 (or the common electrode 17) is changed when liquid crystal driving and touch sensing driving (detection of change in capacitance) are performed alternately, that is, in time division. be able to. Further, during liquid crystal driving and frame inversion driving, the polarity of the potential of the common wiring 30 (or common electrode 17) is switched between positive polarity and negative polarity for each frame, for example, ± 2.5 V liquid crystal driving. The liquid crystal can be driven by voltage.
 液晶駆動をカラム反転駆動やドット反転駆動とする場合、共通電極17の電位は一定(定電位)としてもよい。この場合の「定電位」とは、例えば、液晶表示装置の筐体等に、高抵抗を介して接地された共通電極17の電位であって、前記フレーム反転駆動に用いる±2.5V等の定電位を意味しない。液晶の閾値Vth以下の電圧以下の範囲で、略0V(ゼロボルト)に固定された定電位である。換言すれば、Vthの範囲内であれば、「定電位」は、液晶駆動電圧の中間値からオフセットさせた定電位であってもよい。なお、上記の「高抵抗」とは、500メガオームから50テラオームの範囲内から選択可能な抵抗値である。このような抵抗値としては、例えば、代表的に500ギガオームから5テラオームを採用することができる。液晶駆動方式としてカラム反転駆動やドット反転駆動を採用する場合、コモン配線30は、例えば、1テラオームの高抵抗を介して接地され、およそ0V(ゼロボルト)の定電位とすることができる。この場合、コモン配線30に接続されている共通電極17もおよそ0V(ゼロボルト)の定電位となり、蓄積された静電容量のリセットを行うことができる。共通電極17の電位を定電位とする場合、タッチセンシング時にタッチ駆動電圧はタッチセンシング配線に印加される。共通電極17の電位を「定電位」とする場合、液晶駆動とタッチ駆動を時分割駆動しなくてもよい。 When the liquid crystal driving is column inversion driving or dot inversion driving, the potential of the common electrode 17 may be constant (constant potential). The “constant potential” in this case is, for example, the potential of the common electrode 17 that is grounded through a high resistance to the housing of the liquid crystal display device, and is ± 2.5 V or the like used for the frame inversion driving. Does not mean constant potential. This is a constant potential fixed at approximately 0 V (zero volt) within a voltage range equal to or lower than the threshold voltage Vth of the liquid crystal. In other words, the “constant potential” may be a constant potential offset from the intermediate value of the liquid crystal driving voltage as long as it is within the range of Vth. The “high resistance” is a resistance value that can be selected from the range of 500 megaohms to 50 teraohms. As such a resistance value, typically, 500 gigaohm to 5 teraohm can be adopted. When column inversion driving or dot inversion driving is adopted as the liquid crystal driving method, the common wiring 30 is grounded through a high resistance of 1 teraohm, for example, and can be set to a constant potential of about 0 V (zero volt). In this case, the common electrode 17 connected to the common wiring 30 also has a constant potential of about 0 V (zero volts), and the accumulated capacitance can be reset. When the potential of the common electrode 17 is a constant potential, the touch drive voltage is applied to the touch sensing wiring during touch sensing. When the potential of the common electrode 17 is set to “constant potential”, liquid crystal driving and touch driving need not be time-division driven.
 なお、液晶表示装置のアクティブ素子(薄膜トランジスタ)のチャネル層を形成する材料として、IGZO等の酸化物半導体を用いる場合、液晶表示装置の画素の焼きつきが生じ易い状態を緩和するため、上述した高抵抗として1テラオームより低い抵抗を用いてもよい。
 後述する黒表示時に、上記高抵抗を介してゲート配線やソース配線を接地してもよい。この場合、画素の焼きつきを防ぐことができる。
 また、タッチセンシングに関わる時定数を調整する目的で上記高抵抗を調整することができる。IGZO等の酸化物半導体をアクティブ素子のチャネル層に用いる表示装置では、タッチセンシング制御における、上記の種々の工夫が可能となる。以下の記載において、酸化物半導体を単にIGZOと呼称することがある。
Note that in the case where an oxide semiconductor such as IGZO is used as a material for forming a channel layer of an active element (a thin film transistor) of a liquid crystal display device, the above-mentioned high A resistance lower than 1 teraohm may be used as the resistance.
During black display, which will be described later, the gate wiring and the source wiring may be grounded through the high resistance. In this case, pixel burn-in can be prevented.
Further, the high resistance can be adjusted for the purpose of adjusting the time constant related to touch sensing. In a display device using an oxide semiconductor such as IGZO for the channel layer of the active element, the above-described various devices in touch sensing control can be achieved. In the following description, an oxide semiconductor may be simply referred to as IGZO.
(アクティブ素子28)
 次に、図5を参照して、画素電極20に接続されているアクティブ素子28の構造について説明する。
 図5は、トップゲート構造を有する薄膜トランジスタ(TFT)の一例を示す。
 アクティブ素子28は、チャネル層27と、チャネル層27の一端(第一端、図5におけるチャネル層27の左端)に接続されたドレイン電極26と、チャネル層27の他端(第二端、図5におけるチャネル層27の右端)に接続されたソース電極24と、第3絶縁層13を介してチャネル層27に対向配置されたゲート電極25とを備える。図5は、アクティブ素子28を構成するチャネル層27、ドレイン電極26、及びソース電極24が第4絶縁層14上に形成されている構造を示しているが、本発明はこのような構造に限定されない。第4絶縁層14に設けずに、透明基板22上にアクティブ素子28を直接形成してもよい。
 ソース配線31には高い頻度で映像信号が供給され、ソース配線31からノイズが発生し易い。トップゲート構造においては、ノイズ発生源でもあるソース配線31を、前述したタッチセンシング空間から遠ざけることができるメリットがある。
 図5に示すソース電極24とドレイン電極26は、同じ工程において、同じ構成の導電層で形成される。第1実施形態では、ソース電極24とドレイン電極26の構造として、チタン/アルミニウム合金/チタンの3層構成を採用している。ここで、アルミニウム合金は、アルミニウム-ネオジウムの合金である。
 ゲート電極25の下部に位置する絶縁層13は、ゲート電極25と同じ幅を有する絶縁層であってもよい。この場合、例えば、ゲート電極25をマスクとして用いたドライエッチングを行い、ゲート電極25の周囲の絶縁層13を除去する。これによって、ゲート電極25と同じ幅を有する絶縁層を形成することができる。ゲート電極25をマスクとして用いて絶縁層をドライエッチングにて加工する技術は、一般に自己整合と呼称される。
(Active element 28)
Next, the structure of the active element 28 connected to the pixel electrode 20 will be described with reference to FIG.
FIG. 5 shows an example of a thin film transistor (TFT) having a top gate structure.
The active element 28 includes a channel layer 27, a drain electrode 26 connected to one end of the channel layer 27 (first end, the left end of the channel layer 27 in FIG. 5), and the other end (second end, FIG. 5 is connected to the right end of the channel layer 27), and the gate electrode 25 is disposed opposite to the channel layer 27 with the third insulating layer 13 interposed therebetween. FIG. 5 shows a structure in which the channel layer 27, the drain electrode 26, and the source electrode 24 constituting the active element 28 are formed on the fourth insulating layer 14, but the present invention is limited to such a structure. Not. The active element 28 may be directly formed on the transparent substrate 22 without being provided on the fourth insulating layer 14.
Video signals are supplied to the source wiring 31 at a high frequency, and noise is easily generated from the source wiring 31. The top gate structure has an advantage that the source wiring 31 that is also a noise generation source can be moved away from the touch sensing space described above.
The source electrode 24 and the drain electrode 26 shown in FIG. 5 are formed of conductive layers having the same structure in the same process. In the first embodiment, a three-layer structure of titanium / aluminum alloy / titanium is adopted as the structure of the source electrode 24 and the drain electrode 26. Here, the aluminum alloy is an aluminum-neodymium alloy.
The insulating layer 13 located below the gate electrode 25 may be an insulating layer having the same width as the gate electrode 25. In this case, for example, dry etching using the gate electrode 25 as a mask is performed, and the insulating layer 13 around the gate electrode 25 is removed. As a result, an insulating layer having the same width as the gate electrode 25 can be formed. A technique for processing an insulating layer by dry etching using the gate electrode 25 as a mask is generally called self-alignment.
 チャネル層27の材料としては、例えば、IGZOと呼称される酸化物半導体を用いることができる。チャネル層27の材料としては、ガリウム、インジウム、亜鉛、錫、アルミニウム、ゲルマニウム、アンチモン、ビスマス、セリウムのうちの2種以上の金属酸化物を含む酸化物半導体を用いることができる。本実施形態では、酸化インジウム、酸化ガリウム、及び酸化亜鉛を含む酸化物半導体を用いている。酸化物半導体で形成されるチャネル層27の材料は、単結晶、多結晶、微結晶、微結晶とアモルファスとの混合体、或いは、アモルファスのいずれでもよい。酸化物半導体の膜厚としては、2nm~50nmの範囲内の膜厚とすることができる。なお、チャネル層27は、ポリシリコン半導体で形成してもよい。 As the material of the channel layer 27, for example, an oxide semiconductor called IGZO can be used. As a material of the channel layer 27, an oxide semiconductor containing two or more metal oxides of gallium, indium, zinc, tin, aluminum, germanium, antimony, bismuth, and cerium can be used. In this embodiment, an oxide semiconductor containing indium oxide, gallium oxide, and zinc oxide is used. The material of the channel layer 27 formed of an oxide semiconductor may be any of single crystal, polycrystal, microcrystal, a mixture of microcrystal and amorphous, or amorphous. The thickness of the oxide semiconductor can be in the range of 2 nm to 50 nm. The channel layer 27 may be formed of a polysilicon semiconductor.
 酸化物半導体もしくはポリシリコン半導体を、例えば、p/n接合をもつ相補型のトランジスタの構成に用いることができ、あるいは、n型接合のみを有する単チャネル型トランジスタの構成にて用いることができる。酸化物半導体の積層構成として、例えば、n型酸化物半導体と、このn型の酸化物半導体と電気的特性が異なるn型酸化物半導体とが積層された積層構成が採用されてもよい。積層されるn型酸化物半導体は、複数層で構成されてもよい。積層されるn型酸化物半導体においては、下地のn型半導体のバンドギャップを、上層に位置するn型半導体のバンドギャップとは異ならせることができる。
 チャネル層の上面が、例えば、異なる酸化物半導体で覆われた構成を採用してもよい。
 あるいは、例えば、結晶性のn型酸化物半導体上に、微結晶の(非晶質に近い)酸化物半導体が積層された積層構成を採用してもよい。ここで微結晶とは、例えば、スパッタリング装置にて成膜された非晶質の酸化物半導体を、180℃以上450℃以下の範囲で熱処理した微結晶状の酸化物半導体膜を言う。あるいは、成膜時の基板温度を200℃前後に設定した状態で成膜された微結晶状の酸化物半導体膜を言う。微結晶状の酸化物半導体膜は、TEMなどの観察方法により、少なくとも1nmから3nm前後、或いは、3nmより大きい結晶粒を観察することができる酸化物半導体膜である。
 酸化物半導体は、非晶質から結晶質に変化させることで、キャリア移動度の改善や信頼性の向上を実現することができる。酸化インジウムや酸化ガリウムの酸化物としての融点は高い。酸化アンチモンや酸化ビスマスの融点はいずれも1000℃以下で、酸化物の融点が低い。例えば、酸化インジウムと酸化ガリウムと酸化アンチモンの3元系複合酸化物を採用した場合、融点の低い酸化アンチモンの効果で、この複合酸化物の結晶化温度を低くすることができる。換言すれば、非晶質状態から、微結晶状態などに結晶化させ易い酸化物半導体を提供できる。
 半導体の積層構成として、n型のポリシリコン半導体上に、n型の酸化物半導体を積層してもよい。このポリシリコン半導体を下地層として用いる積層構造を得るに方法としては、レーザーアニールによるポリシリコン結晶化工程の後、真空状態を維持したまま、酸化物半導体をスパッタリングなどで成膜することが好ましい。この方法に適用される酸化物半導体としては、後工程のウエットエッチングにおいて易溶性が求められることから、酸化亜鉛リッチな複合酸化物を用いることができる。例えば、スパッタリングに用いるターゲットの金属元素の原子比としては、In:Ga:Zn=1:2:2を例示することができる。この積層構成において、ポリシリコンのチャネル層上のみ、酸化物半導体を積層しない(例えば、ウエットエッチングで除去する)構成を採用してもよい。
 さらに、同一画素にn型酸化物半導体のチャネル層を有する薄膜トランジスタ(アクティブ素子)と、n型シリコン半導体のチャネル層を有する薄膜トランジスタ(アクティブ素子)を1つずつ配設し、薄膜トランジスタの各々のチャネル層の特性を活かすように、液晶層やOLEDといった表示機能層を駆動することもできる。表示機能層として液晶層やOLEDを用いる場合、表示機能層に電圧(電流)を印加する駆動トランジスタとしてn型のポリシリコン薄膜トランジスタを採用し、このポリシリンコン薄膜トランジスタに信号を送るスイッチングトランジスタとしてn型酸化物半導体の薄膜トランジスタを採用することができる。
An oxide semiconductor or a polysilicon semiconductor can be used, for example, in the configuration of a complementary transistor having a p / n junction, or can be used in the configuration of a single channel transistor having only an n-type junction. As the stacked structure of the oxide semiconductor, for example, a stacked structure in which an n-type oxide semiconductor and an n-type oxide semiconductor having different electrical characteristics from the n-type oxide semiconductor are stacked may be employed. The n-type oxide semiconductor to be stacked may include a plurality of layers. In the stacked n-type oxide semiconductor, the band gap of the underlying n-type semiconductor can be different from the band gap of the n-type semiconductor located in the upper layer.
For example, a configuration in which the upper surface of the channel layer is covered with a different oxide semiconductor may be employed.
Alternatively, for example, a stacked structure in which a microcrystalline (close to amorphous) oxide semiconductor is stacked over a crystalline n-type oxide semiconductor may be employed. Here, the microcrystal refers to a microcrystalline oxide semiconductor film obtained by heat-treating an amorphous oxide semiconductor formed with a sputtering apparatus in a range of 180 ° C. to 450 ° C., for example. Alternatively, it refers to a microcrystalline oxide semiconductor film formed with the substrate temperature at the time of film formation set to around 200 ° C. The microcrystalline oxide semiconductor film is an oxide semiconductor film in which crystal grains of at least about 1 nm to about 3 nm or larger than 3 nm can be observed by an observation method such as TEM.
An oxide semiconductor can be improved in carrier mobility and reliability by being changed from amorphous to crystalline. The melting point as an oxide of indium oxide or gallium oxide is high. Antimony oxide and bismuth oxide have melting points of 1000 ° C. or lower, and oxides have low melting points. For example, when a ternary composite oxide of indium oxide, gallium oxide, and antimony oxide is employed, the crystallization temperature of the composite oxide can be lowered due to the effect of antimony oxide having a low melting point. In other words, an oxide semiconductor that can be easily crystallized from an amorphous state to a microcrystalline state can be provided.
As a stacked structure of the semiconductor, an n-type oxide semiconductor may be stacked over an n-type polysilicon semiconductor. As a method for obtaining a stacked structure using the polysilicon semiconductor as an underlayer, it is preferable to form an oxide semiconductor by sputtering or the like while maintaining a vacuum state after the polysilicon crystallization step by laser annealing. As an oxide semiconductor applied to this method, a complex oxide rich in zinc oxide can be used because it is required to be easily soluble in wet etching in a later step. For example, as the atomic ratio of the metal element of the target used for sputtering, In: Ga: Zn = 1: 2: 2 can be exemplified. In this stacked structure, an oxide semiconductor layer may not be stacked only on the polysilicon channel layer (for example, removed by wet etching).
Further, one thin film transistor (active element) having an n-type oxide semiconductor channel layer and one thin film transistor (active element) having an n-type silicon semiconductor channel layer are provided in the same pixel, and each channel layer of the thin film transistor It is also possible to drive a display function layer such as a liquid crystal layer or an OLED so that the above characteristics can be utilized. When a liquid crystal layer or an OLED is used as the display function layer, an n-type polysilicon thin film transistor is adopted as a drive transistor for applying a voltage (current) to the display function layer, and an n-type oxidation transistor is used as a switching transistor for sending a signal to the polysilicon thin film transistor. A thin film semiconductor thin film transistor can be employed.
 ドレイン電極26及びソース電極24(ソース配線31)の各々としては、同じ構造を採用することができる。例えば、多層の導電層をドレイン電極26及びソース電極24に用いることができる。例えば、アルミニウム、銅、或いはこれらの合金層を、モリブデン、チタン、タンタル、タングステン、導電性の金属酸化物膜等で挟持する電極構造を採用することができる。第4絶縁層14上に、先にドレイン電極26及びソース電極24を形成し、これら2つの電極に積層するようにチャネル層27を形成してもよい。トランジスタの構造は、ダブルゲート構造等のマルチゲート構造であってよい。
 半導体層あるいはチャネル層は、その厚み方向に移動度や電子濃度を調整してもよい。半導体層あるいはチャネル層は、異なる酸化物半導体が積層された積層構成であってもよい。ソース電極とドレイン電極の最小の間隔によって決定されるトランジスタのチャネル長は、10nm以上10μm以下、例えば、20nmから1μmとすることができる。
The same structure can be adopted for each of the drain electrode 26 and the source electrode 24 (source wiring 31). For example, a multilayer conductive layer can be used for the drain electrode 26 and the source electrode 24. For example, an electrode structure in which aluminum, copper, or an alloy layer thereof is sandwiched between molybdenum, titanium, tantalum, tungsten, a conductive metal oxide film, or the like can be employed. On the fourth insulating layer 14, the drain electrode 26 and the source electrode 24 may be formed first, and the channel layer 27 may be formed so as to be stacked on these two electrodes. The structure of the transistor may be a multi-gate structure such as a double gate structure.
The semiconductor layer or the channel layer may be adjusted in mobility and electron concentration in the thickness direction. The semiconductor layer or the channel layer may have a stacked structure in which different oxide semiconductors are stacked. The channel length of the transistor, which is determined by the minimum distance between the source electrode and the drain electrode, can be 10 nm to 10 μm, for example, 20 nm to 1 μm.
 第3絶縁層13は、ゲート絶縁膜として機能する。このような絶縁膜材料としては、ハフニウムシリケート(HfSiOx)、酸化シリコン、酸化ガリウム、酸化アルミニウム、窒化シリコン、酸化窒化シリコン、酸化窒化アルミニウム、酸化ガリウム、酸化亜鉛、酸化ハフニウム、酸化セリウム、あるいはこれらを混合した絶縁膜等が採用される。酸化セリウムは、誘電率が高く、かつ、セリウムと酸素原子の結びつきが強固である。このため、ゲート絶縁膜を、酸化セリウムを含む複合酸化物とすることは好ましい。複合酸化物を構成する酸化物の1つとして酸化セリウムを採用した場合にも、非晶質状態で高い誘電率を保持し易い。酸化セリウムは、酸化力を備えている。このため、酸化物半導体と酸化セリウムとが接触する構造で、酸化物半導体の酸素欠損を避けることができ、安定した酸化物を実現することができる。窒化物をゲート絶縁膜に用いる構成では、上記のような作用が発現しない。また、ゲート絶縁膜の材料は、セリウムシリケート(CeSiOx)に代表されるランタノイド金属シリケートを含んでもよい。 The third insulating layer 13 functions as a gate insulating film. Examples of such insulating film materials include hafnium silicate (HfSiOx), silicon oxide, gallium oxide, aluminum oxide, silicon nitride, silicon oxynitride, aluminum oxynitride, gallium oxide, zinc oxide, hafnium oxide, cerium oxide, and the like. A mixed insulating film or the like is employed. Cerium oxide has a high dielectric constant and a strong bond between cerium and oxygen atoms. For this reason, it is preferable that the gate insulating film is a composite oxide containing cerium oxide. Even when cerium oxide is employed as one of the oxides constituting the composite oxide, it is easy to maintain a high dielectric constant in an amorphous state. Cerium oxide has an oxidizing power. Therefore, a structure in which an oxide semiconductor and cerium oxide are in contact can avoid oxygen vacancies in the oxide semiconductor, and a stable oxide can be realized. In the configuration using nitride for the gate insulating film, the above-described effect does not appear. The material of the gate insulating film may include a lanthanoid metal silicate represented by cerium silicate (CeSiOx).
 第3絶縁層13の構造としては、単層膜、混合膜、或いは多層膜であってもよい。混合膜や多層膜の場合、上記絶縁膜材料から選択された材料によって混合膜や多層膜を形成することができる。第3絶縁層13の膜厚は、例えば、2nm以上300nm以下の範囲内から選択可能な膜厚である。チャネル層27を酸化物半導体で形成する場合、酸素が多く含まれる状態(成膜雰囲気)で、チャネル層27と接触する第3絶縁層13の界面を形成することができる。 The structure of the third insulating layer 13 may be a single layer film, a mixed film, or a multilayer film. In the case of a mixed film or multilayer film, the mixed film or multilayer film can be formed of a material selected from the above insulating film materials. The film thickness of the third insulating layer 13 is a film thickness that can be selected from a range of 2 nm to 300 nm, for example. In the case where the channel layer 27 is formed using an oxide semiconductor, the interface of the third insulating layer 13 in contact with the channel layer 27 can be formed in a state where a large amount of oxygen is contained (film formation atmosphere).
 薄膜トランジスタの製造工程において、トップゲート構造を有する薄膜トランジスタでは、酸化物半導体を形成した後、酸素を含む導入ガスの中で、酸化セリウムを含むゲート絶縁膜を形成することができる。このとき、ゲート絶縁膜下の酸化物半導体の表面を酸化させることができ、かつ、その表面の酸化度合いを調整することができる。ボトムゲート構造を有する薄膜トランジスタでは、ゲート絶縁膜の形成工程が酸化物半導体の工程より先に行われるため、酸化物半導体の表面の酸化度合いを調整することが難しい。トップゲート構造を有する薄膜トランジスタにおいては、酸化物半導体の表面の酸化をボトムゲート構造の場合よりも促進させることができ、酸化物半導体の酸素欠損が生じにくい。 In the thin film transistor manufacturing process, in a thin film transistor having a top gate structure, a gate insulating film containing cerium oxide can be formed in an introduced gas containing oxygen after forming an oxide semiconductor. At this time, the surface of the oxide semiconductor under the gate insulating film can be oxidized, and the degree of oxidation of the surface can be adjusted. In a thin film transistor having a bottom gate structure, it is difficult to adjust the degree of oxidation of the surface of the oxide semiconductor because the gate insulating film formation step is performed before the oxide semiconductor step. In a thin film transistor having a top gate structure, oxidation of the surface of the oxide semiconductor can be promoted more than in the bottom gate structure, and oxygen vacancies in the oxide semiconductor are less likely to occur.
 第1絶縁層11、第2絶縁層12、第3絶縁層13、及び酸化物半導体の下地の絶縁層(第4絶縁層14)を含む複数の絶縁層は、無機絶縁材料または有機絶縁材料を用いて形成することができる。絶縁層の材料としては、酸化シリコン、酸化窒化シルコン、酸化アルミニウムを用いることができ、絶縁層の構造としては、上記材料を含む単層や複数層を用いることができる。異なる絶縁材料で形成された複数の層が積層された構成であってもよい。絶縁膜の上面を平坦化する効果を得るため、アクリル樹脂、ポリイミド樹脂、ベンゾシクロブテン樹脂、ポリアミド樹脂などを一部の絶縁層に用いてもよい。低誘電率材料(low-k材料)を用いることもできる。 The plurality of insulating layers including the first insulating layer 11, the second insulating layer 12, the third insulating layer 13, and the insulating layer (fourth insulating layer 14) underlying the oxide semiconductor are formed using an inorganic insulating material or an organic insulating material. Can be formed. As a material for the insulating layer, silicon oxide, silicon oxynitride, or aluminum oxide can be used. As a structure of the insulating layer, a single layer or a plurality of layers including the above materials can be used. A configuration in which a plurality of layers formed of different insulating materials are stacked may be employed. In order to obtain the effect of planarizing the upper surface of the insulating film, an acrylic resin, a polyimide resin, a benzocyclobutene resin, a polyamide resin, or the like may be used for some insulating layers. A low dielectric constant material (low-k material) can also be used.
 チャネル層27の上には、第3絶縁層13を介して、ゲート電極25が配設される。ゲート電極25(ゲート配線10)は、上述したコモン配線30と同じ材料を用いて、同じ層構成を有するように、同じ工程で形成することができる。また、ゲート電極25は、上述したドレイン電極26及びソース電極24と同じ材料を用いて、同じ層構成を有するように形成してもよい。ゲート電極25を多層の導電性材料を用いて形成する場合、銅層或いは銅合金層を導電性金属酸化物で挟持する構成を採用することができる。
 ゲート電極25の端部に露出する金属層5の表面は、インジウムを含む複合酸化物で覆うこともできる。あるいは、窒化珪素や窒化モリブデンなどの窒化物でゲート電極25の端部を含むようゲート電極25全体を覆ってもよい。あるいは、上述したゲート絶縁膜と同じ組成を有する絶縁膜を50nmより厚い膜厚で積層してもよい。
A gate electrode 25 is disposed on the channel layer 27 via the third insulating layer 13. The gate electrode 25 (gate wiring 10) can be formed in the same process using the same material as the common wiring 30 and having the same layer structure. Further, the gate electrode 25 may be formed using the same material as the drain electrode 26 and the source electrode 24 described above so as to have the same layer structure. In the case where the gate electrode 25 is formed using a multi-layered conductive material, a configuration in which a copper layer or a copper alloy layer is sandwiched between conductive metal oxides can be employed.
The surface of the metal layer 5 exposed at the end of the gate electrode 25 can be covered with a complex oxide containing indium. Alternatively, the entire gate electrode 25 may be covered with a nitride such as silicon nitride or molybdenum nitride so as to include the end portion of the gate electrode 25. Alternatively, an insulating film having the same composition as the above-described gate insulating film may be stacked with a thickness greater than 50 nm.
 ゲート電極25の形成方法としては、ゲート電極25の形成に先立って、アクティブ素子28のチャネル層27の直上に位置する第3絶縁層13のみにドライエッチング等を施し、第3絶縁層13の厚さを薄くすることもできる。
 第3絶縁層13と接触するゲート電極25の界面に、電気的性質の異なる酸化物半導体を更に挿入してもよい。あるいは、第3絶縁層13を酸化セリウムや酸化ガリウムを含む絶縁性の金属酸化物層で形成してもよい。
 具体的に、ソース配線31に供給される映像信号に起因するノイズがコモン配線30に乗ることを抑制するために、第3絶縁層13を厚くする必要がある。その一方、第3絶縁層13は、ゲート電極25とチャネル層27との間に位置するゲート絶縁膜としての機能を有しており、アクティブ素子28のスイッチング特性を考慮した適切な膜厚が要求される。このように相反する2つの機能を実現するために、コモン配線30とソース配線31との間における第3絶縁層13の膜厚を大きく維持したまま、チャネル層27の直上に位置する第3絶縁層13の厚さを薄くすることで、ソース配線に供給される映像信号に起因するノイズがコモン配線30に乗ることを抑制することができるとともに、アクティブ素子28において所望のスイッチング特性を実現することができる。
 また、チャネル層27の下部には、遮光膜を形成してもよい。遮光膜の材料としては、モリブデン、タングステン、チタン、クロム等の高融点金属を用いることができる。
As a method of forming the gate electrode 25, prior to the formation of the gate electrode 25, only the third insulating layer 13 positioned immediately above the channel layer 27 of the active element 28 is subjected to dry etching or the like, and the thickness of the third insulating layer 13 is thus determined. The thickness can be reduced.
Oxide semiconductors having different electrical properties may be further inserted at the interface of the gate electrode 25 in contact with the third insulating layer 13. Alternatively, the third insulating layer 13 may be formed of an insulating metal oxide layer containing cerium oxide or gallium oxide.
Specifically, it is necessary to increase the thickness of the third insulating layer 13 in order to prevent noise caused by the video signal supplied to the source wiring 31 from getting on the common wiring 30. On the other hand, the third insulating layer 13 has a function as a gate insulating film located between the gate electrode 25 and the channel layer 27, and requires an appropriate film thickness considering the switching characteristics of the active element 28. Is done. In order to realize the two contradictory functions as described above, the third insulation positioned immediately above the channel layer 27 while keeping the film thickness of the third insulation layer 13 between the common wiring 30 and the source wiring 31 large. By reducing the thickness of the layer 13, noise caused by the video signal supplied to the source wiring can be prevented from entering the common wiring 30, and desired switching characteristics can be realized in the active element 28. Can do.
Further, a light shielding film may be formed below the channel layer 27. As a material for the light shielding film, a refractory metal such as molybdenum, tungsten, titanium, or chromium can be used.
 ゲート配線10は、アクティブ素子28と電気的に連携されている。具体的に、ゲート配線10に接続されているゲート電極25とアクティブ素子28のチャネル層27とは、第3絶縁層13を介して対向している。映像信号制御部121からゲート電極25に供給される走査信号に応じてアクティブ素子28においてスイッチング駆動が行われる。 The gate wiring 10 is electrically linked to the active element 28. Specifically, the gate electrode 25 connected to the gate wiring 10 and the channel layer 27 of the active element 28 face each other with the third insulating layer 13 interposed therebetween. Switching driving is performed in the active element 28 in accordance with the scanning signal supplied from the video signal control unit 121 to the gate electrode 25.
 ソース配線31には、映像信号制御部121から映像信号としての電圧が付与される。ソース配線31には、例えば、±2.5Vから±5Vの正あるいは負の電圧の映像信号が付与される。共通電極17に印加される電圧としては、例えば、フレーム反転毎に変化する±2.5Vの範囲とすることができる。また、共通電極17の電位を、液晶駆動の閾値Vth以下から0Vの範囲の定電位としてもよい。この共通電極を後述する定電位駆動に適用する場合、チャネル層27に酸化物半導体を用いることが望ましい。酸化物半導体で構成されたチャネル層の電気的な耐電圧は高く、酸化物半導体を用いたトランジスタにより、±5Vのレンジを越えた高い駆動電圧を電極部17Aに印加し、液晶の応答を高速化することが可能である。液晶駆動には、フレーム反転駆動、カラム反転(垂直ライン)反転駆動、水平ライン反転駆動、ドット反転駆動など種々の駆動方法を適用することができる。本実施形態に係る液晶駆動については、図14を参照して後述する。 A voltage as a video signal is applied to the source wiring 31 from the video signal control unit 121. For example, a video signal having a positive or negative voltage of ± 2.5 V to ± 5 V is applied to the source wiring 31. The voltage applied to the common electrode 17 can be, for example, a range of ± 2.5 V that changes every frame inversion. Further, the potential of the common electrode 17 may be a constant potential in a range from the liquid crystal driving threshold value Vth to 0V. When this common electrode is applied to constant potential driving described later, it is desirable to use an oxide semiconductor for the channel layer 27. The channel layer composed of an oxide semiconductor has a high electrical withstand voltage, and a transistor using an oxide semiconductor applies a high drive voltage exceeding the range of ± 5 V to the electrode portion 17A, thereby speeding up the response of the liquid crystal. It is possible to Various driving methods such as frame inversion driving, column inversion (vertical line) inversion driving, horizontal line inversion driving, and dot inversion driving can be applied to the liquid crystal driving. The liquid crystal driving according to the present embodiment will be described later with reference to FIG.
 ゲート電極25の構成の一部に銅合金を採用する場合、銅に対し0.1at%以上4at%以下の範囲内の金属元素或いは半金属元素を添加することができる。このように元素を銅に添加することによって、銅のマイグレーションを抑制することができるという効果が得られる。特に、銅層の結晶(グレイン)内で銅原子の一部と置換することによって銅の格子位置に配置できる元素と、銅層の結晶粒界に析出して銅のグレイン近傍の銅原子の動きを抑制する元素とを共に銅に添加することが好ましい。或いは、銅原子の動きを抑制するためには銅原子より重い(原子量の大きな)元素を銅に添加することが好ましい。加えて、銅に対し0.1at%から4at%の範囲内の添加量で、銅の導電率が低下しにくい添加元素を選択することが好ましい。さらに、スパッタリング等の真空成膜を考慮すると、スパッタリング等の成膜レートが銅に近い元素が好ましい。上述したように元素を銅に添加する技術は、仮に、銅を銀やアルミニウムに置き換えた場合にも適用することができる。換言すれば、銅合金に代えて、銀合金やアルミニウム合金を用いてもよい。 When a copper alloy is used as a part of the structure of the gate electrode 25, a metal element or a metalloid element in a range of 0.1 at% or more and 4 at% or less can be added to copper. Thus, the effect that copper migration can be suppressed is obtained by adding an element to copper. In particular, elements that can be placed at the lattice position of copper by substituting a part of copper atoms in the crystal of the copper layer (grains), and the movement of copper atoms in the vicinity of the copper grains precipitated at the grain boundaries of the copper layer It is preferable to add to the copper together with an element that suppresses the above. Alternatively, in order to suppress the movement of the copper atom, it is preferable to add an element heavier than the copper atom (having a larger atomic weight) to the copper. In addition, it is preferable to select an additive element in which the conductivity of copper is less likely to decrease with an addition amount within a range of 0.1 at% to 4 at% with respect to copper. Furthermore, in consideration of vacuum film formation such as sputtering, an element whose film formation rate such as sputtering is close to copper is preferable. As described above, the technique of adding an element to copper can also be applied when copper is replaced with silver or aluminum. In other words, a silver alloy or an aluminum alloy may be used instead of the copper alloy.
 銅層の結晶(グレイン)内で銅原子の一部と置き換わって銅の格子位置に配置できる元素を銅に添加することは、言い換えると、常温付近で銅と固溶体を形成する金属や半金属を銅に添加することである。銅と固溶体を形成し易い金属は、マンガン、ニッケル、亜鉛、パラジウム、ガリウム、金(Au)等が挙げられる。銅層の結晶粒界に析出して銅のグレイン近傍の銅原子の動きを抑制する元素を銅に添加することは、言い換えると、常温付近で銅と固溶体を形成しない金属や半金属を添加することである。銅と固溶体を形成しにくい或いは銅と固溶体を形成しにくい金属や半金属には種々の材料が挙げられる。例えば、チタン、ジルコニウム、モリブデン、タングステン等の高融点金属、シリコン、ゲルマニウム、アンチモン、ビスマス等の半金属と呼称される元素等を挙げることができる。
 銅は、マイグレーションの観点で信頼性面に問題がある。上記の金属や半金属を銅に添加することで信頼性面を補うことができる。銅に対し、上記金属や半金属を0.1at%以上添加することでマイグレーションを抑制する効果が得られる。しかし、銅に対し、上記金属や半金属を4at%を超えて添加する場合では、銅の導電率の悪化が著しくなり、銅或いは銅合金を選定するメリットが得られない。
Adding an element that can be placed in the copper lattice position to replace a part of the copper atoms in the crystal (grain) of the copper layer means that, in other words, a metal or metalloid that forms a solid solution with copper near room temperature. It is to be added to copper. Examples of the metal that easily forms a solid solution with copper include manganese, nickel, zinc, palladium, gallium, and gold (Au). Adding an element to copper that precipitates at the grain boundary of the copper layer and suppresses the movement of copper atoms in the vicinity of the copper grain is, in other words, adding a metal or metalloid that does not form a solid solution with copper near room temperature. That is. There are various materials for metals and metalloids that are difficult to form a solid solution with copper or that are difficult to form a solid solution with copper. For example, refractory metals such as titanium, zirconium, molybdenum, and tungsten, and elements called semimetals such as silicon, germanium, antimony, and bismuth can be used.
Copper has a problem in reliability from the viewpoint of migration. Reliability can be supplemented by adding the above metals and metalloids to copper. The effect of suppressing migration can be obtained by adding 0.1 at% or more of the above metal or metalloid to copper. However, when the above metal or metalloid is added in excess of 4 at% to copper, the conductivity of copper is significantly deteriorated, and the merit of selecting copper or a copper alloy cannot be obtained.
 上記導電性金属酸化物としては、例えば、酸化インジウム、酸化錫、酸化亜鉛、酸化アンチモンから2以上選択される複合酸化物(混合酸化物)を採用することができる。この複合酸化物には、さらに、酸化チタン、酸化ジルコニウム、酸化アルミニウム、酸化マグネシウム、酸化ゲルマニウムを少量、添加してもよい。酸化インジウムと酸化錫の複合酸化物は、ITOと呼称される低抵抗の透明導電膜として一般的である。酸化インジウム、酸化亜鉛、及び酸化錫の三元系の複合酸化物を用いる場合、酸化亜鉛及び酸化錫の混合割合を調整することで、ウエットエッチングにおけるエッチングレートを調整することができる。酸化インジウム、酸化亜鉛、及び酸化錫の三元系の複合酸化物によって合金層が挟持された3層構成においては、複合酸化物のエッチングレートと銅合金層のエッチングレートと調整することができ、これら3層のパターン幅を略等しくすることができる。 As the conductive metal oxide, for example, a composite oxide (mixed oxide) selected from two or more of indium oxide, tin oxide, zinc oxide, and antimony oxide can be employed. Further, a small amount of titanium oxide, zirconium oxide, aluminum oxide, magnesium oxide, and germanium oxide may be added to this composite oxide. A composite oxide of indium oxide and tin oxide is generally used as a low resistance transparent conductive film called ITO. In the case of using a ternary composite oxide of indium oxide, zinc oxide, and tin oxide, the etching rate in wet etching can be adjusted by adjusting the mixing ratio of zinc oxide and tin oxide. In the three-layer configuration in which the alloy layer is sandwiched between ternary complex oxides of indium oxide, zinc oxide, and tin oxide, the etching rate of the complex oxide and the etching rate of the copper alloy layer can be adjusted, The pattern widths of these three layers can be made substantially equal.
 一般に、階調表示を行うために、階調表示に応じた種々の電圧がソース配線に印加され、かつ、種々のタイミングで映像信号がソース配線に付与される。このような映像信号に起因するノイズは、共通電極17に乗り易く、タッチセンシングの検出精度を低下させる恐れがある。そこで、図5に示すように、ソース配線31と、タッチセンシング配線3との距離W2を大きくする構造を採用することで、ノイズを低減することができるという効果が得られる。 Generally, in order to perform gradation display, various voltages corresponding to gradation display are applied to the source wiring, and video signals are applied to the source wiring at various timings. Such noise caused by the video signal is likely to get on the common electrode 17 and may reduce the detection accuracy of touch sensing. Therefore, as shown in FIG. 5, by adopting a structure in which the distance W2 between the source wiring 31 and the touch sensing wiring 3 is increased, an effect that noise can be reduced is obtained.
 本実施形態においては、アクティブ素子28としては、トップゲート構造を有するトランジスタが採用されている。トップゲート構造に代えて、ボトムゲート構造を有するトランジスタが採用されてもよいが、トップゲート構造のトランジスタを採用する場合では、Z方向におけるソース配線31の位置をタッチセンシング配線3から離間させることができる。換言すれば、トップゲート構造を有するトランジスタの場合、タッチセンシング配線3と共通電極17との間に静電容量が生成される空間から、ソース配線を離間することができる。このように静電容量が生成される空間からソース配線を離間させることで、タッチセンシング配線3と共通電極17との間で検出されるタッチ信号へのノイズの影響、即ち、ソース配線から生じる種々の映像信号に起因するノイズがタッチ信号に与える影響を低減することができる。本実施形態においては、タッチセンシング配線3と共通電極17との間の物理的な空間にソース配線31や画素電極20を含まないことが重要である。以下の説明において、タッチセンシング配線3と共通電極17との間の物理的な空間をタッチセンシング空間と呼称することがある。また、図13に例示されているゲート配線10とコモン配線30(導電配線)との距離W4と、上述した距離W2とを合わせて考慮されたタッチセンシング空間を形成することが望ましい。距離W4を得ることで、ゲート配線10に供給されるゲート信号に起因するノイズがコモン配線30に与える影響を緩和できる。 In the present embodiment, as the active element 28, a transistor having a top gate structure is employed. Instead of the top gate structure, a transistor having a bottom gate structure may be employed. However, in the case of employing a top gate structure transistor, the position of the source wiring 31 in the Z direction may be separated from the touch sensing wiring 3. it can. In other words, in the case of a transistor having a top gate structure, the source wiring can be separated from the space where the electrostatic capacitance is generated between the touch sensing wiring 3 and the common electrode 17. By separating the source wiring from the space where the electrostatic capacitance is generated in this way, the influence of noise on the touch signal detected between the touch sensing wiring 3 and the common electrode 17, that is, various types generated from the source wiring. The influence of noise caused by the video signal on the touch signal can be reduced. In the present embodiment, it is important that the physical space between the touch sensing wiring 3 and the common electrode 17 does not include the source wiring 31 and the pixel electrode 20. In the following description, a physical space between the touch sensing wiring 3 and the common electrode 17 may be referred to as a touch sensing space. Further, it is desirable to form a touch sensing space that takes into account the distance W4 between the gate wiring 10 and the common wiring 30 (conductive wiring) illustrated in FIG. 13 and the above-described distance W2. By obtaining the distance W4, it is possible to reduce the influence of noise caused by the gate signal supplied to the gate wiring 10 on the common wiring 30.
(表示装置基板100の具体的な構造)
 次に、図6~図9を参照し、表示装置基板100の具体的な構造について説明する。図6は、本発明の第1実施形態に係る液晶表示装置LCD1を部分的に示す平面図であり、透明基板21を通じて観察者側から見た図である。
 図7は、本発明の第1実施形態に係る表示装置基板100を部分的に示す断面図であり、図6に示すF-F’線に沿う断面図である。図8は、本発明の第1実施形態に係る表示装置基板100を部分的に示す断面図であり、タッチセンシング配線3の端子部34を説明する断面図である。図9は、本発明の第1実施形態に係る表示装置基板100を部分的に示す断面図であり、タッチセンシング配線3の端子部34を説明する断面図である。
 図6に示すように、図2に示すアレイ基板200上に、液晶層を介して、表示装置基板100が積層されている。これによって、液晶層300を介してアレイ基板200に表示装置基板100が貼り合わされた液晶表示装置LCD1が得られている。
 なお、図6においては、アレイ基板200を構成するソース配線31、及びコモン配線30が示されており、アレイ基板200を構成する他の部材(電極、配線、アクティブ素子等)は省略されている。
(Specific structure of display device substrate 100)
Next, a specific structure of the display device substrate 100 will be described with reference to FIGS. FIG. 6 is a plan view partially showing the liquid crystal display device LCD1 according to the first embodiment of the present invention, as viewed from the observer side through the transparent substrate 21. FIG.
FIG. 7 is a sectional view partially showing the display device substrate 100 according to the first embodiment of the present invention, and is a sectional view taken along the line FF ′ shown in FIG. FIG. 8 is a cross-sectional view partially illustrating the display device substrate 100 according to the first embodiment of the present invention, and is a cross-sectional view illustrating the terminal portion 34 of the touch sensing wiring 3. FIG. 9 is a cross-sectional view partially showing the display device substrate 100 according to the first embodiment of the present invention, and is a cross-sectional view illustrating the terminal portion 34 of the touch sensing wiring 3.
As shown in FIG. 6, the display device substrate 100 is laminated on the array substrate 200 shown in FIG. 2 via a liquid crystal layer. Thus, a liquid crystal display device LCD1 in which the display device substrate 100 is bonded to the array substrate 200 via the liquid crystal layer 300 is obtained.
In FIG. 6, the source wiring 31 and the common wiring 30 constituting the array substrate 200 are shown, and other members (electrodes, wirings, active elements, etc.) constituting the array substrate 200 are omitted. .
 表示装置基板100は、カラーフィルタ51(RGB)、タッチセンシング配線3、及びブラックマトリクスBMを備える。ブラックマトリクスBMは、複数の画素開口を備えた格子パターンを有している。複数の画素開口部の各々には、カラーフィルタ51を構成する赤フィルタ(R)、緑フィルタ(G)、及び青フィルタ(青)が設けられている。ブラックマトリクスBMは、X方向に延在するX方向延在部と、Y方向に延在するY方向延在部とを有しており、上述した黒色層8を構成する材料で形成されている。また、Y方向延在部は、黒色層8に相当する。ブラックマトリクスBMのY方向延在部(ブラックマトリクスの一部)に重なるように、タッチセンシング配線3が表示装置基板100に設けられている(図7参照)。
 また、タッチセンシング配線3は、ブラックマトリクスBM上に形成され、Y方向に延線されている。表示装置基板100とアレイ基板200との平面視での位置関係において、タッチセンシング配線3は、ソース配線31に重なるように配置されており、タッチセンシング配線3の延在方向は、コモン配線30の延在方向に対して直交している。
The display device substrate 100 includes a color filter 51 (RGB), a touch sensing wiring 3, and a black matrix BM. The black matrix BM has a lattice pattern having a plurality of pixel openings. Each of the plurality of pixel openings is provided with a red filter (R), a green filter (G), and a blue filter (blue) constituting the color filter 51. The black matrix BM has an X direction extending portion extending in the X direction and a Y direction extending portion extending in the Y direction, and is formed of the material constituting the black layer 8 described above. . Further, the Y-direction extending portion corresponds to the black layer 8. The touch sensing wiring 3 is provided on the display device substrate 100 so as to overlap the Y-direction extending portion (a part of the black matrix) of the black matrix BM (see FIG. 7).
Further, the touch sensing wiring 3 is formed on the black matrix BM and is extended in the Y direction. In the positional relationship between the display device substrate 100 and the array substrate 200 in plan view, the touch sensing wiring 3 is disposed so as to overlap the source wiring 31, and the extending direction of the touch sensing wiring 3 is the same as that of the common wiring 30. It is orthogonal to the extending direction.
 図7に示すように、ブラックマトリクスBMを構成する黒色層8上に、第1導電性金属酸化物層、銅合金層、及び第2導電性金属酸化物層の3層構成のタッチセンシング配線3が積層されている。
 導電性金属酸化物層の材料としては、酸化インジウムや酸化錫を基材とする導電性金属酸化物を適用することができる。例えば、酸化インジウムに、酸化亜鉛、酸化錫、酸化チタン、酸化ジルコニウム、酸化マグネシウム、酸化アルミニウム、酸化ゲルマニウム、酸化ガリウム、酸化セリウム、酸化アンチモン等を添加した複合酸化物を用いることができる。少なくとも、酸化亜鉛を混合する複合酸化物系を用いる場合では、酸化インジウムに対する酸化亜鉛、酸化アンチモン、酸化ガリウムの添加量に応じてウエットエッチングでのエッチングレートを調整することができる。
As shown in FIG. 7, on the black layer 8 constituting the black matrix BM, the touch sensing wiring 3 having a three-layer structure including a first conductive metal oxide layer, a copper alloy layer, and a second conductive metal oxide layer. Are stacked.
As a material for the conductive metal oxide layer, a conductive metal oxide based on indium oxide or tin oxide can be used. For example, a composite oxide obtained by adding zinc oxide, tin oxide, titanium oxide, zirconium oxide, magnesium oxide, aluminum oxide, germanium oxide, gallium oxide, cerium oxide, antimony oxide, or the like to indium oxide can be used. At least in the case of using a composite oxide system in which zinc oxide is mixed, the etching rate in wet etching can be adjusted according to the amount of zinc oxide, antimony oxide, and gallium oxide added to indium oxide.
 上記のような第1導電性金属酸化物層、銅合金層、及び第2導電性金属酸化物層の3層構成のタッチセンシング配線或いは導電配線(アレイ基板200上に形成されたコモン配線30)を形成する際には、導電性金属酸化物と銅合金のエッチングレートを合わせ、略同じ幅でエッチングすることが重要である。酸化インジウムと酸化亜鉛の2元系材料を主材料とし、さらに他の必要な要素、例えば、導電性改善や信頼性改善を実現できる他の金属酸化物を主材料に添加することで、上記3層構成を有する配線を実現することができる。
 例えば、酸化インジウム-酸化亜鉛-酸化錫等の複合金属酸化物による複合酸化物は、高い導電性を有するとともに、銅合金、カラーフィルタ、及びガラス基板等に対する強い密着性を有する。さらに、この複合金属酸化物は、硬いセラミックスでもあり、かつ、電気的な実装構造において、良好なオーミックコンタクトが得られる。このような複合酸化物を含む導電性金属酸化物層を、上記第1導電性金属酸化物層、銅合金層、及び第2導電性金属酸化物層の3層構成に適用すれば、例えば、ガラス基板上で極めて強固な電気的実装を行うことができる。
Touch sensing wiring or conductive wiring of the three-layer configuration of the first conductive metal oxide layer, the copper alloy layer, and the second conductive metal oxide layer as described above (common wiring 30 formed on the array substrate 200). When forming the film, it is important to match the etching rates of the conductive metal oxide and the copper alloy and perform etching with substantially the same width. By adding a binary system material of indium oxide and zinc oxide as a main material, and adding other necessary elements, for example, other metal oxides capable of improving conductivity and reliability to the main material, the above 3 Wiring having a layer structure can be realized.
For example, a composite oxide of a composite metal oxide such as indium oxide-zinc oxide-tin oxide has high conductivity and strong adhesion to a copper alloy, a color filter, a glass substrate, and the like. Further, this composite metal oxide is also a hard ceramic, and a good ohmic contact can be obtained in an electrical mounting structure. When the conductive metal oxide layer containing such a composite oxide is applied to a three-layer configuration of the first conductive metal oxide layer, the copper alloy layer, and the second conductive metal oxide layer, for example, Extremely strong electrical mounting can be performed on a glass substrate.
 図7に示すように、ブラックマトリクスBM上に、酸化インジウムと酸化亜鉛と酸化錫を含む3元系混合酸化物膜(導電性金属酸化物層)である第2導電性金属酸化物層4、金属層5、及び第2導電性金属酸化物層4と同様の第1導電性金属酸化物層6とを連続成膜することで、3層を形成することができる。成膜装置として、例えば、スパッタリング装置を用い、真空雰囲気を維持したまま、連続成膜を行う。
 例えば、第2導電性金属酸化物層4及び第1導電性金属酸化物層6のそれぞれにおいて、酸化インジウムと酸化亜鉛と酸化錫、及び、銅合金である金属層の組成は、下記の通りである。いずれの場合も、混合酸化物中の金属元素でのアトミックパーセント(酸素元素をカウントしない金属元素のみのカウント。以下、at%で表記)である。
 ・第1導電性金属酸化物層; In:Zn:Sn ⇒ 90:8:2
 ・第2導電性金属酸化物層; In:Zn:Sn ⇒ 91:7:2
 ・金属層 ; Cu:Zn:Sb ⇒ 98.6:1.0:0.4
 第1導電性金属酸化物層6と第2導電性金属酸化物層4とに含まれるインジウム(In)の量は、80at%より多く含有させる必要がある。インジウム(In)の量は、80at%より多いことが好ましい。インジウム(In)の量は、90at%より多いことがさらに好ましい。インジウム(In)の量は、80at%よりも少ない場合、形成される導電性金属酸化物層の比抵抗が大きくなり好ましくない。亜鉛(Zn)の量は、20at%を超えると導電性金属酸化物(混合酸化物)の耐アルカリ性が低下するので好ましくない。
 第1導電性金属酸化物層6及び第2導電性金属酸化物層4に含まれる亜鉛(Zn)の量は、錫(Sn)の量より多くする必要がある。錫の含有量が亜鉛含有量を超えてくると、後工程でのウエットエッチングで支障が出てくる。換言すれば、銅或いは銅合金である金属層が導電性金属酸化物層よりもエッチングされ易くなり、第1導電性金属酸化物層6、金属層5、及び第2導電性金属酸化物層4との幅に差が生じ易くなる。
 第1導電性金属酸化物層6及び第2導電性金属酸化物層4に含まれる錫(Sn)の量は、0.5at%以上6at%以下の範囲内が好ましい。インジウム元素に対する比較で、0.5at%以上6at%以下の錫を導電性金属酸化物層に添加することで、上記インジウム、亜鉛、及び錫との3元系混合酸化物膜(導電性の複合酸化物層)の比抵抗を小さくすることができる。錫の量が7at%を超えると、導電性金属酸化物層に対する亜鉛の添加も伴うため、3元系混合酸化物膜(導電性の複合酸化物層)の比抵抗が大きくなりすぎる。上記の範囲(0.5at%以上6at%以下)内で亜鉛及び錫の量を調整することで、また、成膜条件やアニール条件等を調整することで、比抵抗をおおよそ、混合酸化物膜の単層膜の比抵抗として5×10-4Ωcm以上3×10-4Ωcm以下の小さな範囲内に収めることができる。上記混合酸化物中には、チタン、ジルコニウム、マグネシウム、アルミニウム、ゲルマニウム等の他の元素を少量、添加することもできる。
As shown in FIG. 7, on the black matrix BM, a second conductive metal oxide layer 4 that is a ternary mixed oxide film (conductive metal oxide layer) containing indium oxide, zinc oxide, and tin oxide, By continuously forming the metal layer 5 and the first conductive metal oxide layer 6 similar to the second conductive metal oxide layer 4, three layers can be formed. As the film formation apparatus, for example, a sputtering apparatus is used, and continuous film formation is performed while maintaining a vacuum atmosphere.
For example, in each of the second conductive metal oxide layer 4 and the first conductive metal oxide layer 6, the composition of the metal layer made of indium oxide, zinc oxide, tin oxide, and copper alloy is as follows. is there. In either case, the atomic percentage of the metal element in the mixed oxide is a count of only the metal element that does not count the oxygen element.
First conductive metal oxide layer; In: Zn: Sn => 90: 8: 2
Second conductive metal oxide layer; In: Zn: Sn ⇒ 91: 7: 2
-Metal layer; Cu: Zn: Sb ⇒ 98.6: 1.0: 0.4
The amount of indium (In) contained in the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 needs to be greater than 80 at%. The amount of indium (In) is preferably greater than 80 at%. More preferably, the amount of indium (In) is greater than 90 at%. When the amount of indium (In) is less than 80 at%, the specific resistance of the conductive metal oxide layer formed is not preferable. If the amount of zinc (Zn) exceeds 20 at%, the alkali resistance of the conductive metal oxide (mixed oxide) decreases, which is not preferable.
The amount of zinc (Zn) contained in the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 needs to be larger than the amount of tin (Sn). If the tin content exceeds the zinc content, there will be problems with wet etching in the subsequent process. In other words, the metal layer made of copper or copper alloy is more easily etched than the conductive metal oxide layer, and the first conductive metal oxide layer 6, the metal layer 5, and the second conductive metal oxide layer 4. A difference in the width is likely to occur.
The amount of tin (Sn) contained in the first conductive metal oxide layer 6 and the second conductive metal oxide layer 4 is preferably in the range of 0.5 at% or more and 6 at% or less. In comparison with indium element, by adding tin of 0.5 at% or more and 6 at% or less to the conductive metal oxide layer, a ternary mixed oxide film of indium, zinc, and tin (conductive composite) The specific resistance of the oxide layer can be reduced. If the amount of tin exceeds 7 at%, zinc is also added to the conductive metal oxide layer, so that the specific resistance of the ternary mixed oxide film (conductive composite oxide layer) becomes too large. By adjusting the amount of zinc and tin within the above range (0.5 at% or more and 6 at% or less), and adjusting the film forming conditions and annealing conditions, the specific resistance is approximately mixed oxide film. The specific resistance of the single layer film can fall within a small range of 5 × 10 −4 Ωcm or more and 3 × 10 −4 Ωcm or less. A small amount of other elements such as titanium, zirconium, magnesium, aluminum, and germanium can be added to the mixed oxide.
 ブラックマトリクスBMは、表示面(表示部110)内でのマトリクス領域(矩形状の表示領域と表示画面)を囲う額縁領域を有する。タッチセンシング配線3を、透明基板21の外側に向けて額縁領域から延びるように透明基板21上に形成し、額縁領域の外側に位置するタッチセンシング配線3に端子部34を形成することが好ましい。この場合、タッチセンシング配線3の端子部34は、ブラックマトリクスBMと重畳せずに額縁領域から延出する位置に設けられている。この構成においては、ガラス板である透明基板21のガラス面に、実装に用いられる端子部34を直接形成することが可能である。
 図8は、透明基板21の外側に向けて額縁領域のブラックマトリクスBMから延出するタッチセンシング配線3を示す断面図であって、X方向に沿う図である。タッチセンシング配線3の端子部34は、ガラス板である透明基板21上に直接配設される。図9は、端子部34を示す断面図であって、Y方向に沿う図である。
The black matrix BM has a frame area surrounding a matrix area (rectangular display area and display screen) on the display surface (display unit 110). It is preferable that the touch sensing wiring 3 is formed on the transparent substrate 21 so as to extend from the frame region toward the outside of the transparent substrate 21, and the terminal portion 34 is formed on the touch sensing wiring 3 positioned outside the frame region. In this case, the terminal portion 34 of the touch sensing wiring 3 is provided at a position extending from the frame area without overlapping with the black matrix BM. In this configuration, the terminal portion 34 used for mounting can be directly formed on the glass surface of the transparent substrate 21 that is a glass plate.
FIG. 8 is a cross-sectional view showing the touch sensing wiring 3 extending from the black matrix BM in the frame region toward the outside of the transparent substrate 21 and is a view along the X direction. The terminal part 34 of the touch sensing wiring 3 is directly disposed on the transparent substrate 21 which is a glass plate. FIG. 9 is a cross-sectional view showing the terminal portion 34 and is a view along the Y direction.
 端子部の平面視の形状は図8や図9に限定されない。例えば、透明樹脂層16で端子部34上を覆った後に、ドライエッチング等の方法で端子部34の上部を除去し、円形又は矩形の形状を有する端子部34を形成し、端子部34の表面に導電性金属酸化物層を露出させてもよい。この場合、表示装置基板100とアレイ基板200とを貼り合わせるシール部、或いは液晶セルの内部において、表示装置基板100からアレイ基板200への導通の転移(トランスファ)を、シール部の厚み方向に行うことも可能である。異方性導電膜、微小な金属球、或いは金属膜で覆った樹脂球等から選ばれる導体をシール部に配置することで、表示装置基板100とアレイ基板200とを導通することができる。 The shape of the terminal portion in plan view is not limited to FIGS. For example, after covering the terminal portion 34 with the transparent resin layer 16, the upper portion of the terminal portion 34 is removed by a method such as dry etching to form a terminal portion 34 having a circular or rectangular shape, and the surface of the terminal portion 34. The conductive metal oxide layer may be exposed. In this case, the transfer of transfer from the display device substrate 100 to the array substrate 200 is performed in the thickness direction of the seal portion in the seal portion for bonding the display device substrate 100 and the array substrate 200 or in the liquid crystal cell. It is also possible. By disposing a conductor selected from an anisotropic conductive film, a minute metal sphere, or a resin sphere covered with a metal film in the seal portion, the display device substrate 100 and the array substrate 200 can be electrically connected.
 表示装置基板100とアレイ基板200との間の導通構造においては、表示装置基板100のみに第1導電性金属酸化物層6、銅合金層(金属層5)、及び第2導電性金属酸化物層4の3層を配設させるのではなく、アレイ基板200にも、同様に、第1導電性金属酸化物層、銅合金層、及び第2導電性金属酸化物層の3層で形成された端子部を形成することが好ましい。このようにアレイ基板200に形成された端子は、表示装置基板100に対する導通の転移(トランスファ)用の端子として用いられる。具体的には、アレイ基板200に形成されているゲート配線10を構成する導電層のレイヤの構造、或いは、ソース配線31を構成する導電層のレイヤの構造のいずれかを、第1導電性金属酸化物層、銅合金層、及び第2導電性金属酸化物層の3層構造にする。これによって、表示装置基板100とアレイ基板200との間の導通のための引き回し配線や端子部をアレイ基板200に形成することができる。 In the conductive structure between the display device substrate 100 and the array substrate 200, the first conductive metal oxide layer 6, the copper alloy layer (metal layer 5), and the second conductive metal oxide are provided only on the display device substrate 100. Instead of disposing the three layers 4, the array substrate 200 is similarly formed of three layers of the first conductive metal oxide layer, the copper alloy layer, and the second conductive metal oxide layer. It is preferable to form a terminal portion. The terminals formed on the array substrate 200 in this way are used as terminals for transfer of transfer (transfer) to the display device substrate 100. Specifically, either the structure of the layer of the conductive layer constituting the gate wiring 10 formed on the array substrate 200 or the structure of the layer of the conductive layer constituting the source wiring 31 is changed to the first conductive metal. A three-layer structure of an oxide layer, a copper alloy layer, and a second conductive metal oxide layer is formed. As a result, it is possible to form lead wirings and terminal portions for conduction between the display device substrate 100 and the array substrate 200 on the array substrate 200.
(液晶層300)
 図3に戻り、液晶層300(表示機能層)について説明する。
 液晶層300は、正の誘電率異方性を有する液晶分子39を含む。液晶分子の初期配向は、表示装置基板100或いはアレイ基板200の基板面に対して水平である。液晶層300を用いた第1実施形態に係る液晶駆動は、平面視、液晶層を横断するように駆動電圧が液晶分子に印加されるため、横電界方式と呼称されることがある。液晶分子39の動作については、図15及び図16を参照して後述する。液晶層300を構成する液晶は、負の誘電率異方性をもつ液晶であっても、正の誘電率異方性の液晶であってもよい。液晶表示装置に用いられる液晶や配向膜、さらには表示装置基板に具備される透明樹脂層の抵抗率は高いことが好ましく、これら部材の抵抗率は1×1013Ω・cm以上あることが好ましい。
(Liquid crystal layer 300)
Returning to FIG. 3, the liquid crystal layer 300 (display function layer) will be described.
The liquid crystal layer 300 includes liquid crystal molecules 39 having positive dielectric anisotropy. The initial alignment of the liquid crystal molecules is horizontal with respect to the substrate surface of the display device substrate 100 or the array substrate 200. The liquid crystal driving according to the first embodiment using the liquid crystal layer 300 may be referred to as a horizontal electric field method because a driving voltage is applied to the liquid crystal molecules so as to cross the liquid crystal layer in plan view. The operation of the liquid crystal molecules 39 will be described later with reference to FIGS. 15 and 16. The liquid crystal constituting the liquid crystal layer 300 may be a liquid crystal having a negative dielectric anisotropy or a liquid crystal having a positive dielectric anisotropy. It is preferable that the resistivity of the liquid crystal and the alignment film used in the liquid crystal display device, and further the transparent resin layer provided on the display device substrate is high, and the resistivity of these members is preferably 1 × 10 13 Ω · cm or more. .
(液晶表示装置LCD1の製造方法)
 次に、図2~図5に示す画素構造を有するアレイ基板200を備えた液晶表示装置LCD1の製造方法について、図10~図13を用いて説明する。
 まず、透明基板22を準備し、透明基板22の表面を覆うように第4絶縁層14を形成する。
 次に、図10に示すように、第4絶縁層14上に、アクティブ素子28を構成するチャネル層27を形成する。チャネル層27の材料としては、酸化物半導体が採用される。本実施形態では、一つの画素に1つのチャネル層27を配置するように、チャネル層27のパターニングが行われる。図10においては、破線131、90が示されている。破線131は、チャネル層27を形成した後に第4絶縁層14上に形成されるソース配線の位置を示している。破線90は、ソース配線31を形成した後に第3絶縁層13上に形成されるゲート配線の位置を示している。
(Manufacturing method of liquid crystal display device LCD1)
Next, a manufacturing method of the liquid crystal display device LCD1 including the array substrate 200 having the pixel structure shown in FIGS. 2 to 5 will be described with reference to FIGS.
First, the transparent substrate 22 is prepared, and the fourth insulating layer 14 is formed so as to cover the surface of the transparent substrate 22.
Next, as shown in FIG. 10, a channel layer 27 constituting the active element 28 is formed on the fourth insulating layer 14. As the material of the channel layer 27, an oxide semiconductor is employed. In the present embodiment, the channel layer 27 is patterned so that one channel layer 27 is disposed in one pixel. In FIG. 10, broken lines 131 and 90 are shown. A broken line 131 indicates the position of the source wiring formed on the fourth insulating layer 14 after the channel layer 27 is formed. A broken line 90 indicates the position of the gate wiring formed on the third insulating layer 13 after the source wiring 31 is formed.
 次に、図11に示すように、ソース電極24及びドレイン電極26をチャネル層27上に形成するとともに、ソース電極24に電気的に連携されるソース配線31を形成する。ソース配線31は、Y方向に延在する線状パターンを有する。 Next, as shown in FIG. 11, the source electrode 24 and the drain electrode 26 are formed on the channel layer 27, and the source wiring 31 that is electrically linked to the source electrode 24 is formed. The source wiring 31 has a linear pattern extending in the Y direction.
 次に、チャネル層27、ソース電極24、ドレイン電極26、及びソース配線31を覆うように、透明基板22上に、即ち、第4絶縁層14上に、第3絶縁層13を形成する。この第3絶縁層13は、2つの配線層の間に位置する層間絶縁膜としての機能と、ゲート絶縁膜としての機能とを有する。
 次に、図12に示すように、第3絶縁層13を形成した後、チャネル層27の形成位置に一致するように、第3絶縁層13上に、ゲート電極25を形成する。更に、ゲート電極25の形成と同時に、ゲート電極25に電気的に連携されるゲート配線10と、コモン配線30を形成する。ゲート電極25、ゲート配線10、及びコモン配線30は、上述したように導電性材料で構成される導電層であり、同じ工程で形成される。
Next, the third insulating layer 13 is formed on the transparent substrate 22, that is, on the fourth insulating layer 14 so as to cover the channel layer 27, the source electrode 24, the drain electrode 26, and the source wiring 31. The third insulating layer 13 has a function as an interlayer insulating film located between two wiring layers and a function as a gate insulating film.
Next, as shown in FIG. 12, after forming the third insulating layer 13, the gate electrode 25 is formed on the third insulating layer 13 so as to coincide with the formation position of the channel layer 27. Further, simultaneously with the formation of the gate electrode 25, the gate wiring 10 and the common wiring 30 which are electrically linked to the gate electrode 25 are formed. The gate electrode 25, the gate wiring 10, and the common wiring 30 are conductive layers made of a conductive material as described above, and are formed in the same process.
 次に、ゲート電極25、ゲート配線10、及びコモン配線30を覆うように、透明基板22上に、即ち、第3絶縁層13上に、第2絶縁層12を形成する。第2絶縁層12を成膜した後、第2絶縁層12の全面に透明導電膜を成膜する。
 その後、透明導電膜をパターニングすることで、図13に示すように画素毎に画素電極20が形成される。画素電極20をパターニングする際に、スルーホール20Sも形成する。即ち、スルーホール20Sは、透明導電膜が除去された開口部になっている。
 図13は、アクティブ素子28、ソース配線31、ゲート配線10、及びコモン配線30等を覆う第2絶縁層12が形成された構造を示している。第2絶縁層12上には、パターニングによって画素電極20が形成されている。画素電極20は、コンタクトホール29を介して、アクティブ素子28の各々のドレイン電極26と電気的に接続されている。また、画素電極20に形成されているスルーホール20Sの直径は、後の工程で形成されるコンタクトホールHの直径よりも大きい。スルーホール20Sは、コンタクトホールHの内部で共通電極17とコモン配線30との電気的リークが生じないような十分な大きさ(直径)を有する。図13には、コモン配線30とゲート配線10との距離W4が示されている。距離W4が得られているため、コモン配線30に起因するノイズが、ゲート配線10に影響しにくい構造となっている。
Next, the second insulating layer 12 is formed on the transparent substrate 22, that is, on the third insulating layer 13 so as to cover the gate electrode 25, the gate wiring 10, and the common wiring 30. After forming the second insulating layer 12, a transparent conductive film is formed on the entire surface of the second insulating layer 12.
Thereafter, by patterning the transparent conductive film, a pixel electrode 20 is formed for each pixel as shown in FIG. When patterning the pixel electrode 20, a through hole 20S is also formed. That is, the through hole 20S is an opening from which the transparent conductive film is removed.
FIG. 13 shows a structure in which the second insulating layer 12 covering the active element 28, the source wiring 31, the gate wiring 10, the common wiring 30 and the like is formed. A pixel electrode 20 is formed on the second insulating layer 12 by patterning. The pixel electrode 20 is electrically connected to each drain electrode 26 of the active element 28 through a contact hole 29. In addition, the diameter of the through hole 20S formed in the pixel electrode 20 is larger than the diameter of the contact hole H formed in a later process. The through hole 20 </ b> S has a sufficient size (diameter) so that no electrical leakage occurs between the common electrode 17 and the common wiring 30 inside the contact hole H. FIG. 13 shows a distance W4 between the common wiring 30 and the gate wiring 10. Since the distance W4 is obtained, the structure is such that noise caused by the common wiring 30 hardly affects the gate wiring 10.
 次に、透明基板22上に、即ち、第2絶縁層12上に、第1絶縁層11を形成する。これにより、第1絶縁層11は、スルーホール20Sを埋設し、画素電極20の全面を覆う。その後、スルーホール20Sに対応する位置に、コンタクトホールHを第1絶縁層11及び第2絶縁層12に形成する。第1絶縁層11及び第2絶縁層12にエッチングを施すことによって、アレイ基板200の全面において複数のコンタクトホールHは、一括して形成される。
 その後、共通電極17の構成材料である透明導電膜を、コンタクトホールHを覆うように、かつ、第1絶縁層11上に成膜する。その後、透明導電膜にパターニングを施すことによって、図4Bに示す電極部17Aが第1絶縁層11上に形成され、コンタクトホールHの内部に導電接続部17Bが埋設され、共通電極17が形成される。これによって、共通電極17とコモン配線30とが導通する。上記の工程を経て、図2に示すアレイ基板200が得られる。
Next, the first insulating layer 11 is formed on the transparent substrate 22, that is, on the second insulating layer 12. Thereby, the first insulating layer 11 embeds the through hole 20 </ b> S and covers the entire surface of the pixel electrode 20. Thereafter, contact holes H are formed in the first insulating layer 11 and the second insulating layer 12 at positions corresponding to the through holes 20S. By etching the first insulating layer 11 and the second insulating layer 12, a plurality of contact holes H are collectively formed on the entire surface of the array substrate 200.
Thereafter, a transparent conductive film as a constituent material of the common electrode 17 is formed on the first insulating layer 11 so as to cover the contact hole H. Thereafter, by patterning the transparent conductive film, the electrode portion 17A shown in FIG. 4B is formed on the first insulating layer 11, the conductive connection portion 17B is embedded in the contact hole H, and the common electrode 17 is formed. The As a result, the common electrode 17 and the common wiring 30 are electrically connected. Through the above steps, the array substrate 200 shown in FIG. 2 is obtained.
 図2に示す例では、画素電極20を覆うように形成された第1絶縁層11上に、共通電極17が形成されている。また、一つの画素に2本のストライプパターン形状を有する共通電極17、画素の長手方向に配設されている。共通電極17のパターン形状や本数はこれに限定されず、画素サイズや画素の大きさによって増減できる。共通電極17は、ITO等の透明導電膜で形成されている。また、共通電極17は、画素の長手方向における中央位置において、コンタクトホールHを通じてコモン配線30と電気的に接続されている。共通電極17と画素電極20とが重畳する部分は、液晶表示を行う際の補助容量として用いてもよい。 In the example shown in FIG. 2, the common electrode 17 is formed on the first insulating layer 11 formed so as to cover the pixel electrode 20. In addition, a common electrode 17 having two stripe pattern shapes per pixel is disposed in the longitudinal direction of the pixel. The pattern shape and the number of the common electrodes 17 are not limited to this, and can be increased or decreased depending on the pixel size or the pixel size. The common electrode 17 is formed of a transparent conductive film such as ITO. The common electrode 17 is electrically connected to the common wiring 30 through the contact hole H at the center position in the longitudinal direction of the pixel. A portion where the common electrode 17 and the pixel electrode 20 overlap may be used as an auxiliary capacitor when performing liquid crystal display.
 上述した液晶表示装置LCD1の製造方法によれば、アクティブ素子を駆動するためのソース配線やゲート配線を一枚のアレイ基板に併設する場合にであっても、ジャンパー線やバイパストンネル等を設ける必要がなく、低コストで液晶表示装置LCD1を製造することができる。 According to the manufacturing method of the liquid crystal display device LCD1 described above, it is necessary to provide a jumper line, a bypass tunnel, etc. even when the source wiring and gate wiring for driving the active element are provided on one array substrate. The liquid crystal display device LCD1 can be manufactured at a low cost.
(液晶駆動とタッチセンシング駆動の時分割)
 図14は、第1実施形態及び後述する実施形態に適用可能な液晶駆動とタッチセンシング駆動の時分割駆動の一例を示すタイミングチャートである。
 なお、以下に記載の第1パルス信号や第2パルス信号の序数表現に関し、例えば、クロック周波数として供給されるパルス信号Vcの奇数番目を仮に第1パルス信号と称し、偶数番目を第2パルス信号と称し、連続している信号を表現しているにすぎず、パルス信号Vcを特定していない。
 図14に示された表示期間は、例えば、1フレームを60Hzとする表示期間である。この1フレームの期間において、例えば、画素の一表示単位期間は、白表示期間と黒表示期間とを含む。
 クロック信号である第1パルス信号の入力によって白表示が行われる。具体的に、第1パルス信号の入力に伴い、ソース配線31に映像信号が供給され、画素電極20にドレイン電極26を介して液晶駆動電圧Vdが供給される。液晶駆動電圧Vdは、画素電極20と共通電極17との間で保持され、液晶層を駆動する。チャネル層として酸化物半導体を用いるアクティブ素子(薄膜トランジスタ)28は、チャネル層としてポリシリコン半導体を用いるアクティブ素子よりも液晶駆動電圧の保持能力が高く、それぞれ画素の高い透過率を長い期間、保持できる。
(Time division of liquid crystal drive and touch sensing drive)
FIG. 14 is a timing chart illustrating an example of time-division driving of liquid crystal driving and touch sensing driving that can be applied to the first embodiment and embodiments described later.
Regarding the ordinal expression of the first pulse signal and the second pulse signal described below, for example, the odd number of the pulse signal Vc supplied as the clock frequency is temporarily referred to as the first pulse signal, and the even number is the second pulse signal. It merely represents a continuous signal and does not specify the pulse signal Vc.
The display period shown in FIG. 14 is a display period in which one frame is 60 Hz, for example. In this one frame period, for example, one display unit period of a pixel includes a white display period and a black display period.
White display is performed by inputting the first pulse signal which is a clock signal. Specifically, with the input of the first pulse signal, a video signal is supplied to the source line 31, and the liquid crystal driving voltage Vd is supplied to the pixel electrode 20 via the drain electrode 26. The liquid crystal driving voltage Vd is held between the pixel electrode 20 and the common electrode 17, and drives the liquid crystal layer. An active element (thin film transistor) 28 using an oxide semiconductor as a channel layer has a higher liquid crystal driving voltage holding capability than an active element using a polysilicon semiconductor as a channel layer, and can hold a high transmittance of each pixel for a long period.
 次に、第2パルス信号の入力によって、白表示から黒表示に移行する。黒表示は、例えば、第2パルス信号をトリガーとして、画素電極20と共通電極17との間で保持されている電圧を0Vあるいは接地電位にすることで実現される。例えば、白表示期間でソース配線に供給された映像信号とは逆極性の電圧を、前記パルス信号幅の短い印加時間で、当該ソース配線に供給することで、ソース配線の電圧を加速的に0Vに戻すことが可能となる。この逆極性の電圧は、液晶駆動の閾値電圧Vth付近の低い電圧でよい。黒表示への移行のため、ゲート配線を接地させることは好ましい。チャネル層としてポリシリコン半導体を用いるアクティブ素子の場合は、第2パルス信号の入力の後、ゲート配線10やソース配線31を単に接地させてもよい。なお、黒表示とは、液晶層の液晶分子が初期配向状態に戻り、クロスニコルでの黒の状態であることを意味する。 Next, when the second pulse signal is input, the display shifts from white display to black display. Black display is realized, for example, by setting the voltage held between the pixel electrode 20 and the common electrode 17 to 0 V or the ground potential using the second pulse signal as a trigger. For example, the voltage of the source line is accelerated to 0 V by supplying a voltage having a polarity opposite to that of the video signal supplied to the source line in the white display period to the source line for an application time with a short pulse signal width. It becomes possible to return to. The reverse polarity voltage may be a low voltage near the threshold voltage Vth for driving the liquid crystal. In order to shift to black display, it is preferable to ground the gate wiring. In the case of an active element using a polysilicon semiconductor as the channel layer, the gate wiring 10 and the source wiring 31 may be simply grounded after the second pulse signal is input. The black display means that the liquid crystal molecules in the liquid crystal layer return to the initial alignment state and are in a crossed Nicol black state.
 タッチセンシング期間Ttouchは、透過率が安定している白表示安定期間Wr、あるいは黒表示安定期間Erの期間に設けられており、この期間においてタッチセンシングを実施することができる。映像信号やゲート信号がソース配線31やゲート配線10に供給される期間、例えば、電圧Vdが印加されている印加時間Dtにおいては、ソース配線やアクティブ素子から発生するノイズをタッチセンシング配線3が拾い易くなり、好ましくない。
 本発明の実施形態に係る液晶表示装置には、フレーム反転駆動、カラム反転駆動(垂直ライン反転駆動)、水平ライン反転駆動、ドット反転駆動など種々の液晶駆動方式を採用できる。液晶駆動方式毎に、例えば、下記のようなタッチセンシング期間のタイミングをとることができる。
(1) 1画素、あるいは、2画素など複数画素での映像書き込みが行われた後(表示単位期間のでの映像表示の後)のタイミング
(2) 一垂直ラインの映像書き込みが行われた後のタイミング
(3) 一水平ラインの映像書き込みが行われた後のタイミング
(4) 1フレームや1/2フレームでの映像書き込みが行われた後のタイミング
 (1)から(4)の「映像書き込み行われた後」の期間は、図14に示す白表示安定期間Wrと同義である。加えて、上記(1)から(4)の「映像書き込み行われた後」は、図14に示す黒表示安定期間Erに置き換えることができる。前記したように、白表示安定期間Wrと黒表示安定期間Erの2つの期間にタッチセンシング期間を設けてもよい。
The touch sensing period T touch is provided in the period of the white display stable period Wr or the black display stable period Er in which the transmittance is stable, and the touch sensing can be performed in this period. During a period in which the video signal and the gate signal are supplied to the source wiring 31 and the gate wiring 10, for example, during the application time Dt during which the voltage Vd is applied, the touch sensing wiring 3 picks up noise generated from the source wiring or the active element. It becomes easy and is not preferable.
Various liquid crystal driving methods such as frame inversion driving, column inversion driving (vertical line inversion driving), horizontal line inversion driving, and dot inversion driving can be employed in the liquid crystal display device according to the embodiment of the present invention. For each liquid crystal driving method, for example, the timing of the touch sensing period as described below can be taken.
(1) Timing after video writing with one pixel or plural pixels such as two pixels (after video display in the display unit period) (2) After video writing of one vertical line Timing (3) Timing after video writing on one horizontal line (4) Timing after video writing on 1 frame or 1/2 frame “Video writing line” from (1) to (4) The period after “break” is synonymous with the white display stabilization period Wr shown in FIG. In addition, the “after video writing” of (1) to (4) above can be replaced with a black display stabilization period Er shown in FIG. As described above, the touch sensing period may be provided in the two periods of the white display stable period Wr and the black display stable period Er.
 図14のタイミングチャートに示すように、黒表示安定期間Erにおいて、高い周波数のタッチセンシング駆動電圧Vtouchがタッチ駆動配線(後述するタッチセンシング配線3又はコモン配線30)に印加される。
 また、黒表示安定期間Erでは、LED等のバックライトユニットBUの発光を停止し、バックライトユニットBUの駆動に起因して発生するノイズの影響を無くすことができる。黒表示安定期間を3D表示(立体画像表示)での、色ずれを軽減するための「黒挿入」として用いることもできる。
As shown in the timing chart of FIG. 14, in the black display stabilization period Er, a high frequency touch sensing drive voltage V touch is applied to the touch drive wiring (touch sensing wiring 3 or common wiring 30 described later).
Further, in the black display stable period Er, the light emission of the backlight unit BU such as an LED can be stopped, and the influence of noise caused by the driving of the backlight unit BU can be eliminated. The black display stabilization period can also be used as “black insertion” for reducing color misregistration in 3D display (stereoscopic image display).
 タッチセンシング期間Ttouchにおいて、タッチ駆動電圧は、タッチセンシング配線3あるいはコモン配線30のいずれかに印加できる。換言すれば、タッチセンシング配線3を駆動電極として機能させる場合には、共通電極17が検出電極として機能することができる。反対に、タッチセンシング配線3を検出電極として機能させる場合には、共通電極17が駆動電極として機能することができる。即ち、タッチセンシング配線3と共通電極17とにおいて、駆動電極と検出電極の機能を入れ替えることができる。
 また、液晶駆動とタッチ駆動との時分割駆動において、タッチ駆動電圧Vtouchの矩形波をタッチセンシング配線3と共通電極17のいずれかに常時印加し、クロック周波数のパルス(第1パルス信号、第2パルス信号)が印加される時のみ、タッチ検出信号を検出させない方式を採用することができる。即ち、実質的に、分割駆動の方法を採用することも可能である。
In the touch sensing period T touch , the touch drive voltage can be applied to either the touch sensing wiring 3 or the common wiring 30. In other words, when the touch sensing wiring 3 functions as a drive electrode, the common electrode 17 can function as a detection electrode. On the contrary, when the touch sensing wiring 3 functions as a detection electrode, the common electrode 17 can function as a drive electrode. That is, the functions of the drive electrode and the detection electrode can be interchanged in the touch sensing wiring 3 and the common electrode 17.
Further, in the time-division driving of the liquid crystal driving and the touch driving, a rectangular wave of the touch driving voltage V touch is always applied to either the touch sensing wiring 3 or the common electrode 17, and the clock frequency pulse (the first pulse signal, the first pulse signal) It is possible to adopt a method in which the touch detection signal is not detected only when two pulse signals) are applied. That is, it is possible to substantially adopt a split driving method.
(チャネル層として酸化物半導体を用いるトランジスタ)
 例えば、チャネル層27としてメモリ性の良好なIGZO、或いは酸化亜鉛を酸化アンチモンに置き換えたIGAOなどの酸化物半導体を用いたトランジスタ(アクティブ素子)を採用すると、共通電極17を一定の電圧(定電位)とするときの、定電圧駆動に必要な補助容量(ストーレッジキャパシタ)を省くことも可能である。チャネル層27としてIGZOやIGAOを用いたトランジスタは、シリコン半導体を用いたトランジスタと異なり、リーク電流が極めて小さいので、例えば、先行技術文献の特許文献4に記載されているようなラッチ部を含む転送回路を省くことができ、単純な配線構造を採用することができる。また、IGZO等の酸化物半導体をチャネル層として用いたトランジスタを具備するアレイ基板200を用いた液晶表示装置LCD1においては、トランジスタのリーク電流が小さいため、画素電極20に液晶駆動電圧を印加した後に電圧を保持することができ、液晶層300の透過率を維持することができる。
(Transistor using oxide semiconductor as channel layer)
For example, when a transistor (active element) using an oxide semiconductor such as IGZO having good memory characteristics or IGAO in which zinc oxide is replaced with antimony oxide is employed as the channel layer 27, the common electrode 17 is set to a constant voltage (constant potential). ), It is possible to omit an auxiliary capacitor (storage capacitor) necessary for constant voltage driving. Unlike a transistor using a silicon semiconductor, a transistor using IGZO or IGAO as the channel layer 27 has a very small leakage current. For example, a transfer including a latch unit as described in Patent Document 4 of the prior art document A circuit can be omitted and a simple wiring structure can be adopted. In addition, in the liquid crystal display device LCD1 using the array substrate 200 including a transistor using an oxide semiconductor such as IGZO as a channel layer, since the leakage current of the transistor is small, after applying a liquid crystal driving voltage to the pixel electrode 20, The voltage can be maintained and the transmittance of the liquid crystal layer 300 can be maintained.
 IGZO等の酸化物半導体をチャネル層27に用いる場合、アクティブ素子28での電子移動度が高く、例えば、2msec(ミリ秒)以下の短時間で、必要な映像信号に対応する駆動電圧を画素電極20に印加することができる。例えば、倍速駆動(1秒間の表示コマ数が120フレームである場合)の1フレームは約8.3msecであり、例えば、6msecをタッチセンシングに割り当てることができる。チャネル層27としてIGZO等の酸化物半導体を用いる薄膜トランジスタは、高い耐電圧を有する。このため、例えば、液晶駆動電圧として5V以上の高電圧を用いることで、液晶の応答性を改善できる。
 透明電極パターンを有する共通電極17が、定電位であるときには、液晶駆動とタッチ電極駆動とを時分割駆動しなくてもよい。液晶の駆動周波数とタッチ金属配線の駆動周波数とは、異ならせることができる。例えば、IGZO等の酸化物半導体をチャネル層27に用いたアクティブ素子28においては、画素電極20に液晶駆動電圧を印加した後に透過率保持(或いは電圧保持)が必要なポリシリコン半導体を用いたトランジスタとは異なり、透過率を保持するために映像をリフレッシュ(再度の映像信号の書き込み)する必要がなく、フリッカーが少ない。従って、IGZO等の酸化物半導体を採用した液晶表示装置LCD1においては、低周波数での駆動や低消費電力駆動が可能となる。
 前述した2層構造のTFTアレイを用いることで、低周波数から高周波数の広い領域で、低消費電力駆動が可能となる。
When an oxide semiconductor such as IGZO is used for the channel layer 27, the electron mobility in the active element 28 is high. For example, a driving voltage corresponding to a required video signal can be applied to the pixel electrode in a short time of 2 msec (milliseconds) or less. 20 can be applied. For example, one frame of double speed driving (when the number of display frames per second is 120 frames) is about 8.3 msec, and for example, 6 msec can be assigned to touch sensing. A thin film transistor using an oxide semiconductor such as IGZO as the channel layer 27 has a high withstand voltage. For this reason, for example, the response of the liquid crystal can be improved by using a high voltage of 5 V or more as the liquid crystal driving voltage.
When the common electrode 17 having the transparent electrode pattern is at a constant potential, the liquid crystal drive and the touch electrode drive may not be time-division driven. The driving frequency of the liquid crystal and the driving frequency of the touch metal wiring can be made different. For example, in the active element 28 using an oxide semiconductor such as IGZO for the channel layer 27, a transistor using a polysilicon semiconductor that needs to maintain transmittance (or voltage holding) after applying a liquid crystal driving voltage to the pixel electrode 20 In contrast to this, it is not necessary to refresh the video (rewriting the video signal again) in order to maintain the transmittance, and the flicker is small. Therefore, the liquid crystal display device LCD1 employing an oxide semiconductor such as IGZO can be driven at a low frequency and driven with low power consumption.
By using the two-layer TFT array described above, it is possible to drive with low power consumption in a wide region from low frequency to high frequency.
 IGZO等の酸化物半導体は、電気的な耐圧が高いので、高めの電圧で液晶を高速駆動することができ、3D表示が可能な3次元映像表示に用いることが可能となる。IGZO等の酸化物半導体をチャネル層27に用いるアクティブ素子28は、上述のようにメモリ性が高いため、例えば、液晶駆動周波数を0.1Hz以上30Hz以下程度の低周波数としてもフリッカー(表示のちらつき)を生じにくいメリットがある。IGZOやIGAOをチャネル層とするアクティブ素子28を用いて、低周波数によるドット反転駆動と、かつ、ドット反転駆動とは異なる周波数によるタッチ駆動とを共に行うことで、低消費電力で、高画質の映像表示と高精度のタッチセンシングをともに得ることができる。 Since an oxide semiconductor such as IGZO has a high electrical withstand voltage, the liquid crystal can be driven at a high speed with a high voltage, and can be used for 3D image display capable of 3D display. Since the active element 28 using an oxide semiconductor such as IGZO for the channel layer 27 has high memory properties as described above, flicker (flickering of display) can be achieved even when the liquid crystal driving frequency is set to a low frequency of about 0.1 Hz to about 30 Hz. ). By using the active element 28 having IGZO or IGAO as the channel layer, dot inversion driving at a low frequency and touch driving at a frequency different from the dot inversion driving are performed together, thereby achieving low power consumption and high image quality. Both video display and high-precision touch sensing can be obtained.
 また、酸化物半導体をチャネル層27に用いるアクティブ素子28は、前述のようにリーク電流が少ないため、画素電極20に印加した駆動電圧を長い時間保持することができる。アクティブ素子28のソース配線31やゲート配線10(補助容量線)等をアルミニウム配線より配線抵抗の小さい銅配線で形成し、さらに、アクティブ素子として短時間で駆動できるIGZOやIGAOを用いることで、タッチセンシングの走査を行うための期間を十分設けることが可能となる。即ち、IGZO等の酸化物半導体をアクティブ素子に適用することで液晶等の駆動時間を短くすることができ、表示画面全体の映像信号処理の中で、タッチセンシングに適用する時間に十分な余裕ができる。このことにより、発生する静電容量の変化を高精度で検出することができる。
 さらに、チャネル層27としてIGZO等の酸化物半導体を採用することで、ドット反転駆動やカラム反転駆動でのカップリングノイズの影響を略解消することができる。これは、酸化物半導体を用いたアクティブ素子28では、映像信号に対応する電圧を極めて短い時間(例えば、2msec)で画素電極20に印加することができ、また、その映像信号印加後の画素電圧を保持するメモリ性が高く、そのメモリ性を活用した保持期間に新たなノイズ発生はなく、タッチセンシングへの影響を軽減できるためである。
In addition, since the active element 28 using the oxide semiconductor for the channel layer 27 has a small leakage current as described above, the driving voltage applied to the pixel electrode 20 can be held for a long time. The source wiring 31 of the active element 28, the gate wiring 10 (auxiliary capacitance line), etc. are formed by copper wiring having a wiring resistance smaller than that of the aluminum wiring, and further, the active element is touched by using IGZO or IGAO that can be driven in a short time. It is possible to provide a sufficient period for performing sensing scanning. That is, by applying an oxide semiconductor such as IGZO to the active element, the driving time of the liquid crystal or the like can be shortened, and there is a sufficient margin for the time applied to touch sensing in the video signal processing of the entire display screen. it can. This makes it possible to detect the change in capacitance that occurs with high accuracy.
Further, by employing an oxide semiconductor such as IGZO as the channel layer 27, it is possible to substantially eliminate the influence of coupling noise in dot inversion driving and column inversion driving. This is because, in the active element 28 using an oxide semiconductor, a voltage corresponding to a video signal can be applied to the pixel electrode 20 in a very short time (for example, 2 msec), and the pixel voltage after the video signal is applied. This is because there is a high memory property to hold the signal, and no new noise is generated during the holding period utilizing the memory property, and the influence on touch sensing can be reduced.
 酸化物半導体としては、インジウム、ガリウム、亜鉛、錫、アルミニウム、ゲルマニウム、アンチモン、セリウムのうちの2種以上の金属酸化物を含む酸化物半導体を採用することができる。
 IGZOやIGAOなどの酸化物半導体は、高いエネルギーギャップを持つ。酸化物半導体の膜に含まれるインジウム(In)、ガリウム(Ga)、亜鉛(Znのインジウム原子数を1とするときのガリウム、亜鉛のそれぞれ原子数比を、1~5とすることができる。酸化インジウム、酸化ガリウム、酸化亜鉛の金属酸化物としてのそれぞれ融点は、およそ1700℃から2200℃の範囲内にある。例えば、酸化アンチモンや酸化ビスマスは、上記の酸化インジウム、酸化ガリウム、酸化亜鉛の複合酸化物の中に添加することができる。また、複合酸化物においては、酸化ガリウムあるいは酸化亜鉛に置き換えて、酸化アンチモンや酸化ビスマスを用いてもよい。
 酸化物半導体の膜厚方向におけるインジウムやガリウムなどの金属元素の濃度は変化してもよい。例えば、酸化物半導体と絶縁層との界面付近において酸化物半導体の酸化ガリウム量を大きくし、膜厚方向の中央部位について酸化インジウム量を大きくしてもよい。酸化物半導体の膜厚方向に金属元素の各々の濃度勾配があってよく、酸化物半導体の膜厚方向のキャリア移動度に差があってよい。
As the oxide semiconductor, an oxide semiconductor containing two or more metal oxides of indium, gallium, zinc, tin, aluminum, germanium, antimony, and cerium can be used.
Oxide semiconductors such as IGZO and IGAO have a high energy gap. The atomic ratios of indium (In), gallium (Ga), and zinc (Zn when the number of indium atoms in Zn is 1) can be set to 1 to 5, respectively. The melting points of indium oxide, gallium oxide, and zinc oxide as metal oxides are each in the range of about 1700 ° C. to 2200 ° C. For example, antimony oxide and bismuth oxide contain the above-mentioned indium oxide, gallium oxide, and zinc oxide. In addition, in the composite oxide, antimony oxide or bismuth oxide may be used instead of gallium oxide or zinc oxide.
The concentration of a metal element such as indium or gallium in the thickness direction of the oxide semiconductor may vary. For example, the amount of gallium oxide in the oxide semiconductor may be increased near the interface between the oxide semiconductor and the insulating layer, and the amount of indium oxide may be increased at the central portion in the film thickness direction. There may be a concentration gradient of each metal element in the film thickness direction of the oxide semiconductor, and there may be a difference in carrier mobility in the film thickness direction of the oxide semiconductor.
(液晶配向と液晶駆動)
 図15及び図16は、本発明の第1実施形態に係る液晶表示装置LCD1の画素を部分的に示す平面図である。液晶分子39の配向を分かり易く説明するために、一画素における液晶の配向状態を示している。図15は、液晶表示装置LCD1の画素を部分的に示す平面図であって、一画素における液晶の配向状態(初期配向状態)を示す平面図である。図16は、液晶表示装置LCD1の画素を部分的に示す平面図であって、画素電極20と共通電極17との間に液晶駆動電圧を印加した時の、液晶駆動動作を示す平面図である。
 図15及び図16に示す例では、画素電極20は矩形状に形成されており、画素電極20の長手方向はY方向に一致している。このような矩形状の画素電極20の延在方向(Y方向)に対し、液晶層300の液晶分子39が角度θで傾斜する方向に向くように、配向処理が配向膜に施されている。
(Liquid crystal alignment and liquid crystal drive)
15 and 16 are plan views partially showing pixels of the liquid crystal display device LCD1 according to the first embodiment of the present invention. In order to easily explain the alignment of the liquid crystal molecules 39, the alignment state of the liquid crystal in one pixel is shown. FIG. 15 is a plan view partially showing a pixel of the liquid crystal display device LCD1 and showing a liquid crystal alignment state (initial alignment state) in one pixel. FIG. 16 is a plan view partially showing a pixel of the liquid crystal display device LCD1 and showing a liquid crystal drive operation when a liquid crystal drive voltage is applied between the pixel electrode 20 and the common electrode 17. FIG. .
In the example shown in FIGS. 15 and 16, the pixel electrode 20 is formed in a rectangular shape, and the longitudinal direction of the pixel electrode 20 coincides with the Y direction. An alignment process is performed on the alignment film so that the liquid crystal molecules 39 of the liquid crystal layer 300 are inclined at an angle θ with respect to the extending direction (Y direction) of the rectangular pixel electrode 20.
 特に、本実施形態においては、各画素が2つ領域に区画されており、即ち、各画素は、上部領域Pa(第1領域)と下部領域Pb(第2領域)とを有する。上部領域Pa及び下部領域Pbは、画素中央CL(X方向に平行な中央線)に対し、線対称に配置されている。上部領域Pa及び下部領域Pbは、Y方向に対し、液晶層300の液晶分子39に角度θのプレチルトを付与している。上部領域Paにおいては、Y方向に対して時計回りで角度θのプレチルトが液晶分子39に付与されている。下部領域Pbにおいては、Y方向に対して反時計回りで角度θのプレチルトが液晶分子39に付与されている。配向膜の配向処理としては、光配向処理或いはラビング処理を採用することができる。角度θを具体的に規定する必要はないが、例えば、角度θを3°~15°の範囲としてもよい。 In particular, in the present embodiment, each pixel is divided into two regions, that is, each pixel has an upper region Pa (first region) and a lower region Pb (second region). The upper region Pa and the lower region Pb are arranged symmetrically with respect to the pixel center CL (a center line parallel to the X direction). The upper region Pa and the lower region Pb give a pretilt of an angle θ to the liquid crystal molecules 39 of the liquid crystal layer 300 in the Y direction. In the upper region Pa, a pretilt of an angle θ is imparted to the liquid crystal molecules 39 clockwise with respect to the Y direction. In the lower region Pb, a pretilt of an angle θ is imparted to the liquid crystal molecules 39 counterclockwise with respect to the Y direction. As the alignment treatment of the alignment film, a photo-alignment treatment or a rubbing treatment can be employed. Although it is not necessary to specifically define the angle θ, for example, the angle θ may be in the range of 3 ° to 15 °.
 このように初期配向が付与されている液晶分子39は、画素電極20と共通電極17との間に電圧が印加された際に、図16の矢印に示すように画素電極20と共通電極17との間にフリンジ電界が生成し、フリンジ電界の方向に沿うように液晶分子39は配向し、液晶分子39が駆動される。より具体的には、図26に示すように画素電極20から共通電極17に向かうフリンジ電界が発生し、フリンジ電界に沿って液晶分子39が駆動され、平面視において回転する。 The liquid crystal molecules 39 to which the initial alignment is given in this way are applied to the pixel electrode 20 and the common electrode 17 as shown by the arrows in FIG. 16 when a voltage is applied between the pixel electrode 20 and the common electrode 17. In the meantime, a fringe electric field is generated, the liquid crystal molecules 39 are aligned along the direction of the fringe electric field, and the liquid crystal molecules 39 are driven. More specifically, as shown in FIG. 26, a fringe electric field from the pixel electrode 20 toward the common electrode 17 is generated, the liquid crystal molecules 39 are driven along the fringe electric field, and rotate in a plan view.
 図26は、液晶表示装置LCD1を部分的に示す断面図であり、液晶駆動電圧を共通電極17と画素電極20との間に印加したときの液晶駆動動作を示している。FFSと呼ばれる液晶駆動方式は、共通電極17と画素電極20との間に生じる電界、特に、フリンジと呼ばれる電極端部において生じる電界によって液晶分子39が駆動される。図26に示したように液晶層300の厚み方向における一部R1における液晶分子39が回転し、この液晶分子39が主に透過率変化に寄与する。従って、観察者から見た垂直方向の透過率に関し、FFS等の横電界駆動の液晶表示装置に比べて、液晶層300の厚み方向における液晶分子を十分に活用できるVA等の縦電界駆動の液晶表示装置において高い透過率が得られる。しかしながら、FFS等の横電界駆動の液晶表示装置は視野角が広いという特性を有するため、この特性の観点で、本実施形態に係る液晶表示装置LCD1は、横電界駆動方式を採用している。 FIG. 26 is a cross-sectional view partially showing the liquid crystal display device LCD1 and shows a liquid crystal driving operation when a liquid crystal driving voltage is applied between the common electrode 17 and the pixel electrode 20. FIG. In the liquid crystal driving method called FFS, the liquid crystal molecules 39 are driven by an electric field generated between the common electrode 17 and the pixel electrode 20, particularly, an electric field generated at an electrode end called a fringe. As shown in FIG. 26, the liquid crystal molecules 39 in a part R1 in the thickness direction of the liquid crystal layer 300 rotate, and the liquid crystal molecules 39 mainly contribute to the transmittance change. Accordingly, the vertical electric field driving liquid crystal such as VA which can fully utilize the liquid crystal molecules in the thickness direction of the liquid crystal layer 300 as compared with the horizontal electric field driving liquid crystal display device such as FFS with respect to the transmittance in the vertical direction seen from the observer. High transmittance can be obtained in the display device. However, since the horizontal electric field drive liquid crystal display device such as FFS has a characteristic that the viewing angle is wide, from the viewpoint of this characteristic, the liquid crystal display device LCD1 according to the present embodiment adopts the horizontal electric field drive method.
 図30は、従来の液晶表示装置250を示す断面図であり、液晶駆動電圧を印加した時の等電位線L2を示す模式図である。透明基板215側に透明電極や導電膜が存在しない場合には、等電位線L2は透明樹脂層213、カラーフィルタ214、および透明基板215を貫通して上部に延びる。等電位線L2が液晶層206の厚さ方向に延線される場合、液晶層206の実効厚さがある程度確保されるので、横電界駆動方式の液晶表示装置250の本来の透過率を確保できる。
 図31は、従来の液晶表示装置250Aを示す断面図であり、前述の液晶表示装置250の各構成に加えて液晶層206と透明樹脂層213との間に対向電極221を備える場合を示している。この場合には、等電位線L3は対向電極221を貫通しないので、等電位線L3の形状は前述の等電位線L2の形状から変形する。このとき、液晶層206の実効厚さは液晶表示装置250の液晶層206の実効厚さに比べて薄くなり、液晶表示装置250Aの輝度(透過率)は大きく低下する。
FIG. 30 is a cross-sectional view showing a conventional liquid crystal display device 250, and is a schematic diagram showing equipotential lines L2 when a liquid crystal driving voltage is applied. When there is no transparent electrode or conductive film on the transparent substrate 215 side, the equipotential line L2 passes through the transparent resin layer 213, the color filter 214, and the transparent substrate 215 and extends upward. When the equipotential line L2 is extended in the thickness direction of the liquid crystal layer 206, the effective thickness of the liquid crystal layer 206 is secured to some extent, so that the original transmittance of the lateral electric field drive type liquid crystal display device 250 can be secured. .
FIG. 31 is a cross-sectional view showing a conventional liquid crystal display device 250A, in which a counter electrode 221 is provided between the liquid crystal layer 206 and the transparent resin layer 213 in addition to the components of the liquid crystal display device 250 described above. Yes. In this case, since the equipotential line L3 does not penetrate the counter electrode 221, the shape of the equipotential line L3 is deformed from the shape of the equipotential line L2. At this time, the effective thickness of the liquid crystal layer 206 is thinner than the effective thickness of the liquid crystal layer 206 of the liquid crystal display device 250, and the luminance (transmittance) of the liquid crystal display device 250A is greatly reduced.
 本実施形態に係る液晶表示装置LCD1は、このような図30及び図31に示す従来の液晶表示装置とは異なる。本実施形態に係る液晶表示装置LCD1においては、画素電極20の上方に共通電極17が形成され、共通電極17の電位が0Vに維持され、画素電極20と共通電極17との間に電圧を印加することで、画素電極20から共通電極17に向かうフリンジ電界を発生させ、このフリンジ電界によって液晶分子39が駆動される。 The liquid crystal display device LCD1 according to the present embodiment is different from the conventional liquid crystal display device shown in FIGS. In the liquid crystal display device LCD1 according to the present embodiment, the common electrode 17 is formed above the pixel electrode 20, the potential of the common electrode 17 is maintained at 0V, and a voltage is applied between the pixel electrode 20 and the common electrode 17. As a result, a fringe electric field from the pixel electrode 20 toward the common electrode 17 is generated, and the liquid crystal molecules 39 are driven by the fringe electric field.
(タッチセンシング駆動)
 図17及び図18は、本発明の第1実施形態に係る液晶表示装置LCD1において、タッチセンシング配線3がタッチ駆動電極として機能し、かつ、共通電極17がタッチ検出電極として機能した場合の構造を示している。
 図17及び図18に示す構造に基づいて、以下の説明を行う。
 なお、上述したように、タッチ駆動電極とタッチ検出電極の役割を入れ替えることができる。
(Touch sensing drive)
17 and 18 show a structure in the case where the touch sensing wiring 3 functions as a touch drive electrode and the common electrode 17 functions as a touch detection electrode in the liquid crystal display device LCD1 according to the first embodiment of the present invention. Show.
The following description will be made based on the structure shown in FIGS.
As described above, the roles of the touch drive electrode and the touch detection electrode can be interchanged.
 図17は、タッチセンシング配線と共通電極との間に電界が生成された状態を示す模式断面図であり、図18は、指等のポインタが表示装置基板100の観察者側の表面に接触或いは近接した時の電界の生成状態の変化を示す断面図である。
 図17及び図18においては、タッチセンシング配線3と共通電極17を用いたタッチセンシング技術を説明する。図17及び図18は、タッチセンシング駆動を分かり易く説明するため、アレイ基板200を構成する第1絶縁層11及び共通電極17と、表示装置基板100とを示しており、その他の構成は、省略している。
FIG. 17 is a schematic cross-sectional view showing a state where an electric field is generated between the touch sensing wiring and the common electrode. FIG. It is sectional drawing which shows the change of the production | generation state of the electric field when it adjoins.
17 and 18, a touch sensing technique using the touch sensing wiring 3 and the common electrode 17 will be described. 17 and 18 show the first insulating layer 11 and the common electrode 17 constituting the array substrate 200 and the display device substrate 100 for easy understanding of the touch sensing drive, and other configurations are omitted. is doing.
 図17及び図18に示すように、液晶層300の厚さ方向に対して傾斜する斜め方向において、タッチセンシング配線3と共通電極17とが互いに向かい合っている。このため、斜め方向の電界が生成される状態の変化に対して検出信号のコントラストを容易に向上することが可能であり、タッチセンシングのS/N比を高くすることができるという効果(S/N比の改善効果)が得られる。更に、このように斜め方向にタッチセンシング配線3と共通電極17とが互いに向かい合う配置においては、平面視においてタッチセンシング配線3と共通電極17とが重なる重畳部が形成されないため、寄生容量を大きく減らすことができる。また、タッチ検出電極とタッチ駆動電極が、厚みの上下方向で重なりあう構成では、タッチ検出電極及びタッチ駆動電極が互いに重なる部分における静電容量が変化し難いため、タッチセンシングのS/N比にコントラストを与え難い。例えば、タッチ検出電極とタッチ駆動電極とが同一面上の平行な位置関係にある場合は、指等のポインタの位置によって静電容量が不均一に変化し易くなり、誤検出及び解像度の低下の恐れがある。
 本発明の実施形態に係る液晶表示装置LCD1においては、図2や図20に示すように、共通電極17は、検出電極として機能し、長さELを有する。この共通電極17は、駆動電極として機能するタッチセンシング配線3と、平面視、平行であり、長さELを有する共通電極17により、静電容量を十分かつ均一に確保することができる。
As shown in FIGS. 17 and 18, the touch sensing wiring 3 and the common electrode 17 face each other in an oblique direction inclined with respect to the thickness direction of the liquid crystal layer 300. For this reason, it is possible to easily improve the contrast of the detection signal with respect to a change in the state in which the oblique electric field is generated, and to increase the S / N ratio of touch sensing (S / N ratio improvement effect) is obtained. Further, in such an arrangement in which the touch sensing wiring 3 and the common electrode 17 face each other in an oblique direction, since the overlapping portion where the touch sensing wiring 3 and the common electrode 17 overlap in a plan view is not formed, the parasitic capacitance is greatly reduced. be able to. In addition, in the configuration in which the touch detection electrode and the touch drive electrode overlap in the vertical direction of the thickness, the capacitance at the portion where the touch detection electrode and the touch drive electrode overlap with each other hardly changes. It is difficult to give contrast. For example, when the touch detection electrode and the touch drive electrode are in a parallel positional relationship on the same plane, the capacitance tends to vary non-uniformly depending on the position of a pointer such as a finger, resulting in false detection and reduced resolution. There is a fear.
In the liquid crystal display device LCD1 according to the embodiment of the present invention, as shown in FIGS. 2 and 20, the common electrode 17 functions as a detection electrode and has a length EL. The common electrode 17 and the touch sensing wiring 3 functioning as a drive electrode and the common electrode 17 which is parallel in plan view and has a length EL can ensure a sufficient and uniform capacitance.
 図17は、タッチセンシング配線3をタッチ駆動電極として機能させ、共通電極17をタッチ検出電極として機能させた場合の、静電容量の発生状況を模式的に示している。タッチセンシング配線3には、所定周波数でパルス状の書き込み信号が供給される。この書き込み信号の供給は、液晶駆動とタッチ駆動との時分割で行ってもよい。書き込み信号によって、接地されている共通電極17とタッチセンシング配線3との間に、電気力線33(矢印)で示される静電容量が維持される。 FIG. 17 schematically shows a capacitance generation state when the touch sensing wiring 3 functions as a touch drive electrode and the common electrode 17 functions as a touch detection electrode. The touch sensing wiring 3 is supplied with a pulsed write signal at a predetermined frequency. The supply of the writing signal may be performed by time division between liquid crystal driving and touch driving. The electrostatic capacitance indicated by the electric force lines 33 (arrows) is maintained between the grounded common electrode 17 and the touch sensing wiring 3 by the write signal.
 図18に示すように、指等のポインタが表示装置基板100の観察者側の表面に接触或いは近接すると、共通電極17とタッチセンシング配線3との間の静電容量が変化し、この静電容量の変化により、指等のポインタのタッチの有無が検出される。
 図17及び図18に示されるように、タッチセンシング配線3と共通電極17との間には、液晶駆動に関わる電極や配線は設けられていない。更に、図3や図5に示されるようにソース配線31が、タッチセンシング配線3及び共通電極17(タッチ駆動配線及びタッチ検出配線)から離れている。このため、液晶駆動に関わるノイズを拾いにくい構造が実現されている。
As shown in FIG. 18, when a pointer such as a finger contacts or approaches the surface of the display device substrate 100 on the viewer side, the capacitance between the common electrode 17 and the touch sensing wiring 3 changes, and this electrostatic capacitance changes. The presence or absence of a touch of a pointer such as a finger is detected based on the change in capacity.
As shown in FIG. 17 and FIG. 18, no electrode or wiring related to liquid crystal driving is provided between the touch sensing wiring 3 and the common electrode 17. Further, as shown in FIGS. 3 and 5, the source wiring 31 is separated from the touch sensing wiring 3 and the common electrode 17 (touch drive wiring and touch detection wiring). For this reason, a structure that hardly picks up noise related to liquid crystal driving is realized.
 例えば、平面視において、複数のタッチセンシング配線3は、第1方向(例えば、Y方向)に延在するとともに、第2方向(例えば、X方向)に並べて配設されている。複数のコモン配線30(導電配線)は、Z方向においてアレイ基板200の内部における画素電極20よりも下方に位置し、第2方向(例えば、X方向)に延在し、第1方向(例えば、Y方向)に並んでいる。共通電極17は、コモン配線30と電気的に接続されており、共通電極17とタッチセンシング配線3との間の静電容量の変化をタッチ有無の検出に用いる。 For example, in plan view, the plurality of touch sensing wires 3 extend in the first direction (for example, the Y direction) and are arranged in the second direction (for example, the X direction). The plurality of common wirings 30 (conductive wirings) are positioned below the pixel electrodes 20 inside the array substrate 200 in the Z direction, extend in the second direction (for example, the X direction), and extend in the first direction (for example, for example) In the Y direction). The common electrode 17 is electrically connected to the common wiring 30, and a change in capacitance between the common electrode 17 and the touch sensing wiring 3 is used for detecting the presence or absence of touch.
 本実施形態に係る液晶表示装置LCD1において、タッチセンシング配線3と共通電極17との間に、例えば、500Hz以上500KHz以下の周波数で矩形波状のパルス信号が印加される。通常、このパルス信号の印加によって、検出電極である共通電極17は一定の出力波形を維持する。指等のポインタが表示装置基板100の観察者側の表面に接触或いは近接すると、その部位の共通電極17の出力波形に変化が現れ、タッチの有無が判断される。指等のポインタの表示面までの距離は、ポインタの近接から接触するまでの時間(通常、数百μsec以上数msec以下)や、その時間内にカウントされる出力パルス数等で測定できる。タッチ検出信号の積分値をとることで安定したタッチ検出を行うことができる。 In the liquid crystal display device LCD1 according to the present embodiment, a rectangular wave pulse signal is applied between the touch sensing wiring 3 and the common electrode 17 at a frequency of, for example, 500 Hz to 500 KHz. Normally, the common electrode 17 as the detection electrode maintains a constant output waveform by the application of the pulse signal. When a pointer such as a finger contacts or approaches the surface of the display device substrate 100 on the viewer side, a change appears in the output waveform of the common electrode 17 at that portion, and the presence or absence of a touch is determined. The distance to the display surface of the pointer such as a finger can be measured by the time from the proximity of the pointer to contact (usually several hundred μsec or more and several msec or less), the number of output pulses counted within that time, and the like. Stable touch detection can be performed by taking the integral value of the touch detection signal.
 タッチセンシング配線3及びコモン配線30(或いは導電配線に接続された共通電極)の全てをタッチセンシングに用いなくてもよい。間引き駆動を行ってもよい。次に、タッチセンシング配線3を間引き駆動させる場合について説明する。まず、全てのタッチセンシング配線3を複数のグループに区分する。グループの数は、全てのタッチセンシング配線3の数より少ない。一つのグループを構成する配線数が、例えば、6本であるとする。ここで、全ての配線(配線数は6本)のうち、例えば、2本の配線を選択する(全ての配線の本数よりも少ない本数、2本<6本)。一つのグループにおいては、選択された2本の配線を用いてタッチセンシングが行われ、残りの4本の配線における電位がフローティング電位に設定される。液晶表示装置LCD1は、複数のグループを有することから、上記のように配線の機能が定義されているグループ毎にタッチセンシングを行うことができる。同様に、コモン配線30においても、間引き駆動を行ってもよい。
 タッチに用いられるポインタが、指である場合とペンである場合とは、接触あるいは近接するポインタの面積や容量が異なる。こうしたポインタの大ききによって、間引く配線の本数を調整できる。ペンや針先など先端が細いポインタでは、配線の間引き本数を減らして高密度のタッチセンシング配線のマトリクスを用いることができる。指紋認証時も高密度のタッチセンシング配線のマトリクスを用いることができる。
All of the touch sensing wiring 3 and the common wiring 30 (or the common electrode connected to the conductive wiring) may not be used for touch sensing. Thinning driving may be performed. Next, a case where the touch sensing wiring 3 is driven to be thinned will be described. First, all the touch sensing wires 3 are divided into a plurality of groups. The number of groups is less than the number of all touch sensing wires 3. Assume that the number of wires constituting one group is, for example, six. Here, out of all the wirings (the number of wirings is six), for example, two wirings are selected (the number smaller than the number of all the wirings, two <6). In one group, touch sensing is performed using two selected wirings, and the potentials of the remaining four wirings are set to floating potentials. Since the liquid crystal display device LCD1 has a plurality of groups, touch sensing can be performed for each group in which the wiring function is defined as described above. Similarly, thinning driving may be performed on the common wiring 30 as well.
A pointer used for touching is a finger and a pen is different in the area and capacity of a pointer that is in contact with or close to the pointer. The number of wires to be thinned out can be adjusted by such a large pointer. A pointer with a thin tip such as a pen or a needle tip can reduce the number of thinned wires and use a high-density touch sensing wiring matrix. Even during fingerprint authentication, a high-density touch sensing wiring matrix can be used.
 このようにグループ毎にタッチセンシング駆動を行うことで、走査或いは検出に用いられる配線数が減るため、タッチセンシング速度を上げることができる。さらに、上記の例では、一つのグループを構成する配線数が6本であったが、例えば、10以上の配線数で一つのグループを形成し、一つのグループにおいて選択された2本の配線を用いてタッチセンシングが行ってもよい。即ち、間引かれる配線の数(フローティング電位となる配線の数)を増やし、これによってタッチセンシングに用いられる選択配線の密度(全配線数に対する選択配線の密度)を低下させ、選択配線によって走査或いは検出を行うことで、消費電力の削減やタッチ検出精度の向上に寄与する。逆に、間引かれる配線の数を減らし、タッチセンシングに用いられる選択配線の密度を高くし、選択配線によって走査或いは検出を行うことで、例えば、指紋認証やタッチペンによる入力に活用できる。こうしたタッチセンシングの間、ソース配線31やゲート配線10を、接地あるいはオープン(フローティング)として、これら配線に起因する寄生容量を減らすことができる。 As described above, by performing touch sensing drive for each group, the number of wires used for scanning or detection is reduced, so that the touch sensing speed can be increased. Further, in the above example, the number of wirings constituting one group is six. However, for example, one group is formed with the number of wirings of 10 or more, and two wirings selected in one group are connected. Touch sensing may be used. That is, the number of thinned-out wirings (the number of wirings having a floating potential) is increased, thereby reducing the density of selected wirings used for touch sensing (the density of selected wirings with respect to the total number of wirings). By performing detection, it contributes to reduction of power consumption and improvement of touch detection accuracy. Conversely, by reducing the number of thinned lines, increasing the density of selected lines used for touch sensing, and performing scanning or detection using the selected lines, it can be used for, for example, fingerprint authentication or touch pen input. During such touch sensing, the source wiring 31 and the gate wiring 10 can be grounded or opened (floating) to reduce parasitic capacitance caused by these wirings.
 タッチセンシング駆動と液晶駆動を時分割で行うこともできる。要求されるタッチ入力の速さに合わせてタッチ駆動の周波数を調整してもよい。タッチ駆動周波数は、液晶駆動周波数より高い周波数を採用することができる。指等のポインタが表示装置基板100の観察者側の表面に接触或いは近接するタイミングは不定期であり、かつ、短時間であることから、タッチ駆動周波数は高いことが望ましい。 ● Touch sensing drive and liquid crystal drive can be performed in a time-sharing manner. The frequency of touch driving may be adjusted according to the required speed of touch input. The touch drive frequency can be higher than the liquid crystal drive frequency. The timing at which a pointer such as a finger contacts or approaches the surface of the display device substrate 100 on the viewer side is irregular and short, so that the touch drive frequency is preferably high.
 タッチ駆動周波数と液晶駆動周波数とを異ならせる方法は、いくつか挙げられる。例えば、ノーマリオフの液晶駆動にて、黒表示(オフ)のときにバックライトもオフとし、この黒表示の期間(液晶表示に影響のない期間)にタッチセンシングを行ってもよい。この場合、タッチ駆動の周波数を種々、選択できる。
 また、負の誘電率異方性を有する液晶を用いる場合でも、液晶駆動周波数とは異なるタッチ駆動周波数を選択し易い。換言すれば、図17及び図18に示すようにタッチセンシング配線3から共通電極17に向けて生じる電気力線33は、液晶層300の斜め方向或いは厚み方向に作用するが、負の誘電率異方性を有する液晶を用いれば、この電気力線33の方向に液晶分子が立ち上がらないため、表示品質に対する影響が少なくなる。
 さらには、タッチセンシング配線3やコモン配線30の配線抵抗を下げて、抵抗の低下に伴ってタッチ駆動電圧を下げる場合も、液晶駆動周波数とは異なるタッチ駆動周波数を容易に設定できる。タッチセンシング配線3やコモン配線30を構成する金属層に銅や銀等の導電率の良好な金属、合金を用いることで、低い配線抵抗が得られる。
There are several methods for making the touch drive frequency different from the liquid crystal drive frequency. For example, in normally-off liquid crystal driving, the backlight may be turned off during black display (off), and touch sensing may be performed during this black display period (a period that does not affect liquid crystal display). In this case, various touch drive frequencies can be selected.
Even when a liquid crystal having negative dielectric anisotropy is used, it is easy to select a touch drive frequency different from the liquid crystal drive frequency. In other words, as shown in FIGS. 17 and 18, the electric lines of force 33 generated from the touch sensing wiring 3 toward the common electrode 17 act in an oblique direction or a thickness direction of the liquid crystal layer 300, but have different negative dielectric constants. If liquid crystal having directionality is used, the liquid crystal molecules do not rise in the direction of the electric force lines 33, so that the influence on the display quality is reduced.
Furthermore, when the wiring resistance of the touch sensing wiring 3 or the common wiring 30 is lowered and the touch driving voltage is lowered as the resistance decreases, a touch driving frequency different from the liquid crystal driving frequency can be easily set. By using a metal or alloy having good conductivity such as copper or silver for the metal layer constituting the touch sensing wiring 3 or the common wiring 30, a low wiring resistance can be obtained.
 3D(立体映像)表示を行う表示装置の場合、通常の2次元画像の表示に加え、3次元的に手前の画像や奥にある画像を表示するために複数の映像信号(例えば、右目用の映像信号と左目用の映像信号)が必要となる。このため、液晶駆動の周波数に関し、例えば、240Hz或いは480Hz等の高速駆動及び多くの映像信号が必要となる。このとき、タッチ駆動の周波数を液晶駆動の周波数とは異ならせることによって得られるメリットは大きい。例えば、本実施形態により3D表示のゲーム機器において、高速及び高精度のタッチセンシングが可能となる。本実施形態では、ゲーム機器や現金自動支払機等の指等のタッチ入力頻度の高いディスプレイにおいても特に有用である。 In the case of a display device that performs 3D (stereoscopic video) display, a plurality of video signals (for example, for the right eye) are displayed in order to display a three-dimensional front image or a deep image in addition to a normal two-dimensional image display. A video signal and a video signal for the left eye). For this reason, with respect to the liquid crystal driving frequency, for example, high-speed driving such as 240 Hz or 480 Hz and many video signals are required. At this time, the merit obtained by making the touch drive frequency different from the liquid crystal drive frequency is great. For example, according to the present embodiment, high-speed and high-accuracy touch sensing is possible in a 3D display game device. This embodiment is particularly useful for a display with a high touch input frequency such as a finger of a game machine or an automatic teller machine.
 動画表示を典型として、画素の映像信号による書き換え動作は頻繁に行われる。これら映像信号に付随するノイズはソース配線から派生するため、本発明の実施形態のようにソース配線31の厚み方向(Z方向)の位置をタッチセンシング配線3遠ざけることは好ましい。本発明の実施形態によれば、タッチ駆動信号は、ソース配線31から遠い位置にあるタッチセンシング配線3に印加されるため、タッチ駆動信号が印加される配線がアレイ基板に設けられた構造を開示する特許文献6よりも、ノイズの影響が少なくなる。 と し て Rewriting operations using video signals of pixels are frequently performed, typically in moving image display. Since the noise accompanying these video signals is derived from the source wiring, it is preferable to move the position of the source wiring 31 in the thickness direction (Z direction) away from the touch sensing wiring 3 as in the embodiment of the present invention. According to the embodiment of the present invention, since the touch drive signal is applied to the touch sensing wiring 3 located far from the source wiring 31, a structure in which a wiring to which the touch drive signal is applied is provided on the array substrate is disclosed. Therefore, the influence of noise is less than that of Patent Document 6.
 一般に、液晶駆動の周波数は、60Hz、或いは、この周波数の整数倍の駆動周波数である。通常、タッチセンシング部位は、液晶駆動の周波数に伴うノイズの影響を受ける。さらに、通常の家庭電源は、50Hz或いは60Hzの交流電源であり、こうした外部電源で動作する電気機器から生じるノイズを、タッチセンシング部位が拾い易い。従って、タッチ駆動の周波数として、50Hzや60Hzの周波数とは異なる周波数、或いは、これら周波数の整数倍から若干シフトさせた周波数を採用することで、液晶駆動や外部の電子機器から生じるノイズの影響を大きく低減することができる。或いは、時間軸で、液晶駆動信号の印加タイミングからタッチセンシング駆動信号の印加タイミングをシフトさせてもよい。シフト量は、若干量でよく、例えば、ノイズ周波数から±3%~±17%のシフト量でよい。この場合、ノイズ周波数に対する干渉を低減することができる。例えば、タッチ駆動の周波数は、例えば、500Hz~500KHzの範囲から、上記液晶駆動周波数や電源周波数と干渉しない異なる周波数を選択することができる。液晶駆動周波数や電源周波数と干渉しない異なる周波数をタッチ駆動の周波数として選択することで、例えば、カラム反転駆動でのカップリングノイズ等のノイズの影響を軽減することができる。
 また、タッチセンシング駆動において、駆動電圧を、タッチセンシング配線3の全てに供給するのでなく、上述したように間引き駆動によってタッチ位置検出を行うことで、タッチセンシングでの消費電力を低減できる。
Generally, the liquid crystal drive frequency is 60 Hz or a drive frequency that is an integral multiple of this frequency. Usually, the touch sensing part is affected by noise associated with the liquid crystal driving frequency. Furthermore, a normal household power supply is an AC power supply of 50 Hz or 60 Hz, and the touch sensing part easily picks up noise generated from an electric device that operates with such an external power supply. Therefore, by adopting a frequency different from the frequency of 50 Hz or 60 Hz or a frequency slightly shifted from an integer multiple of these frequencies as the frequency of touch driving, the influence of noise generated from liquid crystal driving or external electronic devices can be reduced. It can be greatly reduced. Alternatively, the application timing of the touch sensing drive signal may be shifted from the application timing of the liquid crystal drive signal on the time axis. The shift amount may be a slight amount, for example, a shift amount of ± 3% to ± 17% from the noise frequency. In this case, interference with noise frequencies can be reduced. For example, a different frequency that does not interfere with the liquid crystal driving frequency and the power supply frequency can be selected as the frequency of the touch driving, for example, from the range of 500 Hz to 500 KHz. By selecting a different frequency that does not interfere with the liquid crystal drive frequency and the power supply frequency as the touch drive frequency, for example, the influence of noise such as coupling noise in column inversion drive can be reduced.
Further, in the touch sensing drive, the power consumption in the touch sensing can be reduced by detecting the touch position by the thinning drive as described above, instead of supplying the drive voltage to all of the touch sensing wires 3.
 間引き駆動において、タッチセンシングに用いられない配線、即ち、フローティングパターンを有する配線については、スイッチング素子により、検出電極や駆動電極に切り替えて高精細なタッチセンシングを行ってもよい。或いは、フローティングパターンを有する配線は、グランド(筐体に接地)と電気的に接続するように切り替えることもできる。タッチセンシングのS/N比を改善するため、タッチセンシングの信号検出時にTFT等のアクティブ素子の信号配線を一時、グランド(筐体等)に接地してもよい。 In thinning driving, wiring that is not used for touch sensing, that is, wiring having a floating pattern, may be switched to a detection electrode or a driving electrode by a switching element to perform high-definition touch sensing. Alternatively, the wiring having the floating pattern can be switched so as to be electrically connected to the ground (grounded to the housing). In order to improve the S / N ratio of touch sensing, the signal wiring of an active element such as a TFT may be temporarily grounded to a ground (a housing or the like) when a touch sensing signal is detected.
 また、タッチセンシング制御で検出する静電容量のリセットに時間を要するタッチセンシング配線、即ち、タッチセンシングでの時定数(容量と抵抗値の積)が大きいタッチセンシング配線では、例えば、奇数行のタッチセンシング配線と偶数行のタッチセンシング配線とを交互にセンシングに利用し、時定数の大きさを調整した駆動を行ってもよい。複数のタッチセンシング配線をグルーピングして駆動や検出を行ってもよい。複数のタッチセンシング配線のグルーピングは、線順次とせず、そのグループ単位でセルフ検出方式とも呼称される、一括検出の手法をとってもよい。グループ単位での、並列駆動を行ってもよい。或いは寄生容量等のノイズキャンセルのため、互いに近接又は隣接するタッチセンシング配線の検出信号の差をとる差分検出方式を採用してもよい。 In addition, touch sensing wiring that requires time to reset the capacitance detected by touch sensing control, that is, touch sensing wiring having a large time constant (product of capacitance and resistance) in touch sensing, for example, touches on odd rows Alternatively, the sensing wiring and the touch sensing wiring in the even-numbered rows may be alternately used for sensing to perform driving with the time constant adjusted. A plurality of touch sensing wirings may be grouped for driving and detection. The grouping of the plurality of touch sensing wires may not be line sequential but may be a collective detection method called a self detection method for each group. Parallel driving may be performed in units of groups. Alternatively, in order to cancel noise such as parasitic capacitance, a difference detection method that takes a difference between detection signals of touch sensing wirings close to or adjacent to each other may be employed.
 上述した第1実施形態によれば、S/N比の高い、高解像度で、かつ、高速なタッチ入力に応えられる液晶表示装置LCD1を提供することができる。更に、チャネル層として酸化物半導体を用いた薄膜トランジスタを採用することで、低消費電力でフリッカーの少なく、かつ、タッチセンシング機能を備えた液晶表示装置を実現することができる。 According to the first embodiment described above, it is possible to provide the liquid crystal display device LCD1 that has a high S / N ratio, a high resolution, and that can respond to high-speed touch input. Further, by using a thin film transistor including an oxide semiconductor as a channel layer, a liquid crystal display device with low power consumption, less flicker, and a touch sensing function can be realized.
(第1実施形態の変形例)
 図19は、本発明の第1実施形態の変形例に係る液晶表示装置の要部を示す拡大断面図である。図19において、上述した実施形態と同一部材には同一符号を付して、その説明は省略または簡略化する。
 図19においては、アレイ基板200に形成される第3絶縁層13と、第3絶縁層13上に形成される突起部13Aと、突起部13A上に形成されるコモン配線30とが示されており、その他の絶縁層、配線、電極等は、省略されている。突起部13Aは、例えば、上述した絶縁層を形成する絶縁材料を用いて形成されている。
 平面視において、突起部13Aのパターンとコモン配線30のパターンとは一致している。突起部13Aの上面と、突起部13Aが形成されていない第3絶縁層13の上面との間の高さはW3である。突起部13Aを形成する方法としては、上述した実施形態によって第3絶縁層13を形成した後に、第4絶縁層14上に先に形成された第3絶縁層13上に突起部13Aを付加的に設ける方法が挙げられる。このような突起部13Aの形成方法は、公知の成膜工程やパターニング工程が用いられる。第3絶縁層13の材料と突起部13Aの材料とは同じであってもよいし、異なってもよい。
(Modification of the first embodiment)
FIG. 19 is an enlarged cross-sectional view showing a main part of a liquid crystal display device according to a modification of the first embodiment of the present invention. In FIG. 19, the same members as those in the above-described embodiment are denoted by the same reference numerals, and the description thereof is omitted or simplified.
In FIG. 19, the third insulating layer 13 formed on the array substrate 200, the protruding portion 13A formed on the third insulating layer 13, and the common wiring 30 formed on the protruding portion 13A are shown. Other insulating layers, wirings, electrodes, etc. are omitted. The protruding portion 13A is formed using, for example, the insulating material for forming the insulating layer described above.
In a plan view, the pattern of the protrusion 13A and the pattern of the common wiring 30 match. The height between the upper surface of the protrusion 13A and the upper surface of the third insulating layer 13 where the protrusion 13A is not formed is W3. As a method of forming the protrusion 13A, after forming the third insulating layer 13 according to the above-described embodiment, the protrusion 13A is additionally formed on the third insulating layer 13 previously formed on the fourth insulating layer 14. The method of providing in is mentioned. A known film forming process or patterning process is used as a method for forming such a protrusion 13A. The material of the third insulating layer 13 and the material of the protrusion 13A may be the same or different.
 ソース配線31に供給される映像信号に起因するノイズがコモン配線30に乗ることを抑制する観点で、突起部13Aの高さW3を適切に設定することが可能である。
 特に、図5に示すように、第3絶縁層13は、ゲート電極25とチャネル層27との間に位置するゲート絶縁膜として機能し、アクティブ素子28のスイッチング特性を考慮した適切な膜厚が要求される。このため、ソース配線に供給される映像信号に起因するノイズがコモン配線30に乗ることを抑制すること、及び、アクティブ素子28において所望のスイッチング特性を実現することの両方を考慮すると、第4絶縁層14上において第3絶縁層13の膜厚を部分的に異ならせる必要がある。
 そこで、最初に、アクティブ素子28におけるスイッチング特性を考慮した適切な膜厚で第3絶縁層13を第4絶縁層14上に形成し、その後、コモン配線30に対するノイズの影響を考慮した高さW3を有する突起部13Aを第3絶縁層13上に形成する。更に、突起部13A上にコモン配線30を形成する。この構成によれば、コモン配線30とソース配線31との間における絶縁体の厚さ(第3絶縁層13の膜厚と突起部13Aの膜厚の合計)を大きく維持したまま、チャネル層27の直上に位置する第3絶縁層13の厚さを薄くすることができる。これによって、ソース配線に供給される映像信号に起因するノイズがコモン配線30に乗ることを抑制することができるとともに、アクティブ素子28において所望のスイッチング特性を実現することができる。
From the viewpoint of suppressing noise caused by the video signal supplied to the source wiring 31 from getting on the common wiring 30, it is possible to appropriately set the height W3 of the protruding portion 13A.
In particular, as shown in FIG. 5, the third insulating layer 13 functions as a gate insulating film located between the gate electrode 25 and the channel layer 27, and has an appropriate film thickness considering the switching characteristics of the active element 28. Required. For this reason, in consideration of both the suppression of noise caused by the video signal supplied to the source wiring on the common wiring 30 and the realization of a desired switching characteristic in the active element 28, the fourth insulation. It is necessary to partially vary the film thickness of the third insulating layer 13 on the layer 14.
Therefore, first, the third insulating layer 13 is formed on the fourth insulating layer 14 with an appropriate film thickness considering the switching characteristics of the active element 28, and then the height W3 considering the influence of noise on the common wiring 30. A protrusion 13 </ b> A is formed on the third insulating layer 13. Further, the common wiring 30 is formed on the protruding portion 13A. According to this configuration, the thickness of the insulator between the common wiring 30 and the source wiring 31 (the sum of the thickness of the third insulating layer 13 and the thickness of the protruding portion 13A) is maintained large, and the channel layer 27 is maintained. The thickness of the third insulating layer 13 located immediately above can be reduced. As a result, it is possible to suppress the noise caused by the video signal supplied to the source wiring from getting on the common wiring 30 and to realize desired switching characteristics in the active element 28.
(第2実施形態)
 第2実施形態に係る液晶表示装置LCD2を、図20から図25を用いて説明する。上述した第1実施形態と同一部材には同一符号を付して、その説明は省略または簡略化する。
 図20は、本発明の第2実施形態に係る液晶表示装置LCD2を構成するアレイ基板200を部分的に示す平面図であり、観察者側から見た平面図である。
 図21は、本発明の第2実施形態に係る液晶表示装置LCD2を構成するアレイ基板200を部分的に示す断面図であり、図20に示すD-D’線に沿う断面図である。
 図22は、本発明の第2実施形態に係る液晶表示装置LCD2を部分的に示す平面図であり、アレイ基板200上に、液晶層を介して、カラーフィルタ及びタッチセンシング配線を具備する表示装置基板が積層された構造を示す平面図であり、観察者側から見た平面図である。
 図23は、本発明の第2実施形態に係る液晶表示装置LCD2を構成するアレイ基板200を部分的に示す断面図であり、図20に示すE-E’線に沿う断面図である。
 図24は、本発明の第2実施形態に係る液晶表示装置LCD2の画素を部分的に示す平面図であって、一画素における液晶の配向状態を示す平面図である。
 図25は、本発明の第2実施形態に係る液晶表示装置LCD2の画素を部分的に示す平面図であって、画素電極と共通電極との間に液晶駆動電圧を印加した時の、液晶駆動動作を示す平面図である。
(Second Embodiment)
A liquid crystal display device LCD2 according to the second embodiment will be described with reference to FIGS. The same members as those in the first embodiment described above are denoted by the same reference numerals, and the description thereof is omitted or simplified.
FIG. 20 is a plan view partially showing the array substrate 200 constituting the liquid crystal display device LCD2 according to the second embodiment of the present invention, and is a plan view seen from the observer side.
FIG. 21 is a cross-sectional view partially showing the array substrate 200 constituting the liquid crystal display device LCD2 according to the second embodiment of the present invention, and is a cross-sectional view taken along the line DD ′ shown in FIG.
FIG. 22 is a plan view partially showing a liquid crystal display device LCD2 according to the second embodiment of the present invention. The display device includes a color filter and touch sensing wiring on the array substrate 200 via a liquid crystal layer. It is a top view which shows the structure where the board | substrate was laminated | stacked, and is the top view seen from the observer side.
FIG. 23 is a sectional view partially showing the array substrate 200 constituting the liquid crystal display device LCD2 according to the second embodiment of the present invention, and is a sectional view taken along the line EE ′ shown in FIG.
FIG. 24 is a plan view partially showing a pixel of the liquid crystal display device LCD2 according to the second embodiment of the present invention, and is a plan view showing the alignment state of the liquid crystal in one pixel.
FIG. 25 is a plan view partially showing a pixel of the liquid crystal display device LCD2 according to the second embodiment of the present invention, in which a liquid crystal driving voltage is applied when a liquid crystal driving voltage is applied between the pixel electrode and the common electrode. It is a top view which shows operation | movement.
 図20に示すように、第2実施形態に係る液晶表示装置LCD2が備える画素は、くの字形状パターン(dog-legged pattern)を有する。
 図24及び図25に示すように、共通電極17及び画素電極20は、Y方向に対して角度θで傾斜する傾斜部を有している。具体的に、各画素における共通電極17及び画素電極20は、上部領域Pa(第1領域)と下部領域Pb(第2領域)とを有する。上部領域Pa及び下部領域Pbは、画素中央(X方向に平行な中央線)に対し、線対称に配置されている。上部領域Paにおいては、共通電極17及び画素電極20は、Y方向に対して時計回りで角度θで傾斜している。下部領域Pbにおいては、共通電極17及び画素電極20は、Y方向に対して反時計回りで角度θで傾斜している。このように共通電極17及び画素電極20を傾斜させることで、Y方向に平行な配向処理方向Rubに沿ってラビング処理を配向膜に施すことで、液晶分子39にY方向に初期配向を付与することができる。配向膜の配向処理としては、光配向処理或いはラビング処理を採用することができる。角度θを具体的に規定する必要はないが、例えば、角度θを3°~15°の範囲としてもよい。図20において、共通電極17は、ストライプパターンを有して形成されており、くの字形状に形成された2つの電極部17Aを有する。コンタクトホールHは、共通電極17の導電パターン(電極部17A、くの字形状パターン)の中央に位置している。
As shown in FIG. 20, the pixels included in the liquid crystal display device LCD2 according to the second embodiment have a dog-legged pattern.
As shown in FIGS. 24 and 25, the common electrode 17 and the pixel electrode 20 have an inclined portion inclined at an angle θ with respect to the Y direction. Specifically, the common electrode 17 and the pixel electrode 20 in each pixel have an upper region Pa (first region) and a lower region Pb (second region). The upper region Pa and the lower region Pb are arranged line-symmetrically with respect to the pixel center (a center line parallel to the X direction). In the upper region Pa, the common electrode 17 and the pixel electrode 20 are inclined at an angle θ clockwise with respect to the Y direction. In the lower region Pb, the common electrode 17 and the pixel electrode 20 are inclined at an angle θ counterclockwise with respect to the Y direction. By tilting the common electrode 17 and the pixel electrode 20 in this manner, the alignment film is subjected to a rubbing process along the alignment processing direction Rub parallel to the Y direction, thereby giving the liquid crystal molecules 39 initial alignment in the Y direction. be able to. As the alignment treatment of the alignment film, a photo-alignment treatment or a rubbing treatment can be employed. Although it is not necessary to specifically define the angle θ, for example, the angle θ may be in the range of 3 ° to 15 °. In FIG. 20, the common electrode 17 is formed with a stripe pattern, and has two electrode portions 17A formed in a dogleg shape. The contact hole H is located at the center of the conductive pattern of the common electrode 17 (electrode part 17A, a dogleg-shaped pattern).
 図22に示すように、ソース配線31、黒色層8(ブラックマトリクスBMのY方向延在部)、タッチセンシング配線3、及びカラーフィルタ51を構成する赤フィルタ(R)、緑フィルタ(G)、及び青フィルタ(青)も、くの字形状パターン(dog-legged pattern)を有する。 As shown in FIG. 22, the source line 31, the black layer 8 (the Y-direction extension part of the black matrix BM), the touch sensing line 3, and the red filter (R), the green filter (G) constituting the color filter 51, The blue filter (blue) also has a dog-legged pattern.
 図23に示す例では、第4絶縁層14上にチャネル層27、ソース電極24、及びドレイン電極26が形成されている。上記第1実施形態では、ソース電極24及びドレイン電極26がチャネル層27上に形成されていたが(図11)、本実施形態では、ソース電極24及びドレイン電極26上にチャネル層27が形成されている。
 即ち、本実施形態では、第4絶縁層14上に、先にソース電極24とドレイン電極26を形成している。第2実施形態でのソース電極24とドレイン電極26の構成としては、モリブデン/アルミニウム合金/モリブデンの3層構成を採用した。チャネル層27の一部は、ソース電極24及びドレイン電極26に重畳している。チャネル層27の材料としては、酸化インジウム、酸化ガリウム、酸化亜鉛の複合酸化物半導体を採用している。酸化亜鉛は、酸化アンチモンに置き換えることができる。
In the example shown in FIG. 23, a channel layer 27, a source electrode 24, and a drain electrode 26 are formed on the fourth insulating layer 14. In the first embodiment, the source electrode 24 and the drain electrode 26 are formed on the channel layer 27 (FIG. 11), but in the present embodiment, the channel layer 27 is formed on the source electrode 24 and the drain electrode 26. ing.
That is, in the present embodiment, the source electrode 24 and the drain electrode 26 are formed on the fourth insulating layer 14 in advance. As a configuration of the source electrode 24 and the drain electrode 26 in the second embodiment, a three-layer configuration of molybdenum / aluminum alloy / molybdenum was adopted. A part of the channel layer 27 overlaps with the source electrode 24 and the drain electrode 26. As the material of the channel layer 27, a composite oxide semiconductor of indium oxide, gallium oxide, and zinc oxide is employed. Zinc oxide can be replaced by antimony oxide.
 次に、画素形状が上記形状を有するメリットについて、図24及び図25を参照して説明する。
 図25は、共通電極17と画素電極20との間に液晶駆動電圧を印加したときの液晶駆動動作を示している。液晶駆動電圧は、画素電極20から共通電極17の矢印方向にかかり、図26に示すように画素電極20から共通電極17に向かうフリンジ電界が発生し、フリンジ電界に沿って液晶分子39が駆動され、平面視において矢印方向に沿って回転する。画素の上部領域Paと画素の下部領域Pbに位置する液晶分子39は、図25に示されるように互いに逆向きに回転する。具体的に、上部領域Paにおける液晶分子39は反時計回りに回転し、下部領域Pbにおける液晶分子39は時計回りに回転する。このため、光学的補償を実現することができ、液晶表示装置LCD2の視野角を広げることができる。
Next, the merit that the pixel shape has the above shape will be described with reference to FIGS.
FIG. 25 shows a liquid crystal driving operation when a liquid crystal driving voltage is applied between the common electrode 17 and the pixel electrode 20. The liquid crystal driving voltage is applied in the direction of the arrow from the pixel electrode 20 to the common electrode 17, and a fringe electric field from the pixel electrode 20 toward the common electrode 17 is generated as shown in FIG. Rotate along the arrow direction in plan view. The liquid crystal molecules 39 located in the upper region Pa of the pixel and the lower region Pb of the pixel rotate in opposite directions as shown in FIG. Specifically, the liquid crystal molecules 39 in the upper region Pa rotate counterclockwise, and the liquid crystal molecules 39 in the lower region Pb rotate clockwise. Therefore, optical compensation can be realized, and the viewing angle of the liquid crystal display device LCD2 can be widened.
 本実施形態においては、液晶分子39としては、正の誘電率異方性を有する液晶分子を採用している。負の誘電率異方性を有する液晶分子を採用する場合、液晶層300の厚み方向に液晶分子が立ち上がりにくい。本実施形態においては、タッチ駆動電圧が、タッチセンシング配線3から共通電極17に向けた方向、即ち、液晶の厚み方向に対して傾斜する斜め方向に印加されるため、負の誘電率異方性を有する液晶分子を採用することが好ましい。液晶材料としては、例えば、液晶層300の固有抵抗率が1×1013Ωcm以上の高純度材料であることが望ましい。 In the present embodiment, as the liquid crystal molecules 39, liquid crystal molecules having positive dielectric anisotropy are employed. When liquid crystal molecules having negative dielectric anisotropy are employed, the liquid crystal molecules are unlikely to rise in the thickness direction of the liquid crystal layer 300. In the present embodiment, the touch drive voltage is applied in a direction from the touch sensing wiring 3 toward the common electrode 17, that is, in an oblique direction inclined with respect to the thickness direction of the liquid crystal. It is preferable to employ liquid crystal molecules having As the liquid crystal material, for example, a high purity material having a specific resistivity of the liquid crystal layer 300 of 1 × 10 13 Ωcm or more is desirable.
 本実施形態によれば、上述した第1実施形態よって得られる効果に加えて、Y方向に平行な配向処理方向Rubを施すことで、上部領域Paと下部領域Pbとにおける液晶分子39に初期配向を付与することができる。 According to the present embodiment, in addition to the effects obtained by the first embodiment described above, by performing the alignment treatment direction Rub parallel to the Y direction, the initial alignment is performed on the liquid crystal molecules 39 in the upper region Pa and the lower region Pb. Can be granted.
 図32を参照し、本実施形態のメリットについてより具体的に説明する。
 図32は、FFSモードを利用する従来の液晶表示装置の一画素を示す拡大平面図であり、アレイ基板を示す平面図である。図32では、画素電極50がアレイ基板の上面に位置しており、絶縁層を介して画素電極50の下方に共通電極47が位置している。画素電極50及び共通電極は、ITOなど透明導電膜で形成されている。コンタクトホール48を介して、画素電極50は薄膜トランジスタ46のドレイン電極と電気的につながっている。画素電極50の上端部に位置する薄膜トランジスタ46に近い位置にコンタクトホール48が配置される。
 このような従来の液晶表示装置においては、コンタクトホール48の位置から最大距離Pdに達するように画素電極50を延ばす必要がある。この場合、画素電極50を形成する透明導電膜の抵抗値と画素電極50の位置との関係により、コンタクホールに近い位置における液晶分子と、コンタクホールから離れた位置における(最大距離Pd離れた)液晶分子との間に、応答性の差が生じてしまう。
 従来の液晶表示装置を構成する画素においてより大きな問題は、複数ストライプパターン(櫛歯状パターン)で形成された画素電極のコンタクトホールに近い位置において液晶のディスクリネーション領域Dが生じてしまうことである。ディスクリネーション領域Dでは、画素電極50から共通電極47への電気力線49の方向が変わるため、十分な透過率が得られず、また、透過する光に変色が生じる場合がある。
With reference to FIG. 32, the merit of the present embodiment will be described more specifically.
FIG. 32 is an enlarged plan view showing one pixel of a conventional liquid crystal display device using the FFS mode, and is a plan view showing an array substrate. In FIG. 32, the pixel electrode 50 is located on the upper surface of the array substrate, and the common electrode 47 is located below the pixel electrode 50 via the insulating layer. The pixel electrode 50 and the common electrode are formed of a transparent conductive film such as ITO. The pixel electrode 50 is electrically connected to the drain electrode of the thin film transistor 46 through the contact hole 48. A contact hole 48 is disposed at a position close to the thin film transistor 46 located at the upper end portion of the pixel electrode 50.
In such a conventional liquid crystal display device, it is necessary to extend the pixel electrode 50 so as to reach the maximum distance Pd from the position of the contact hole 48. In this case, depending on the relationship between the resistance value of the transparent conductive film forming the pixel electrode 50 and the position of the pixel electrode 50, the liquid crystal molecules at a position close to the contact hole and the position away from the contact hole (the maximum distance Pd away). A difference in response occurs between the liquid crystal molecules.
A larger problem in the pixels constituting a conventional liquid crystal display device is that a liquid crystal disclination region D is generated at a position close to a contact hole of a pixel electrode formed by a plurality of stripe patterns (comb-like patterns). is there. In the disclination region D, the direction of the electric lines of force 49 from the pixel electrode 50 to the common electrode 47 changes, so that sufficient transmittance cannot be obtained, and discoloration may occur in the transmitted light.
 本実施形態は、図32に示すような画素電極50と薄膜トランジスタ46とが接続される連携部の従来構成とは異なる。本実施形態においては、図20に示されるように、いずれの共通電極17は、画素の長尺方向における中央に位置するコンタクトホールH(LH、RH)を通じて導電配線(コモン配線30)と電気的に繋がるため、共通電極17を形成する透明導電膜の抵抗値の差は、従来構成より小さくなるメリットがある。上記した従来構成の画素電極の連携部が設けられていないため、液晶のディスクリネーション領域Dの悪影響は殆ど生じない。 This embodiment is different from the conventional configuration of the cooperation unit in which the pixel electrode 50 and the thin film transistor 46 are connected as shown in FIG. In this embodiment, as shown in FIG. 20, any common electrode 17 is electrically connected to the conductive wiring (common wiring 30) through a contact hole H (LH, RH) located in the center in the longitudinal direction of the pixel. Therefore, there is an advantage that the difference in resistance value of the transparent conductive film forming the common electrode 17 is smaller than that in the conventional configuration. Since the above-described conventional pixel electrode cooperation portion is not provided, the adverse effect of the liquid crystal disclination region D hardly occurs.
 上述した実施形態においては、共通電極17のパターンとして、Y方向に延在するストライプパターン或いはくの字形状パターン(dog-legged pattern)について説明したが、本発明はこの構成に限定されない。例えば、正方形パターン、長方形パターン、平行四辺形パターン等を採用してもよい。 In the above-described embodiment, the stripe pattern or the dogleg-shaped pattern extending in the Y direction has been described as the pattern of the common electrode 17, but the present invention is not limited to this configuration. For example, a square pattern, a rectangular pattern, a parallelogram pattern, or the like may be employed.
(第3実施形態)
 第3実施形態に係る液晶表示装置LCD3を、図27から図29を用いて説明する。
 上述した第1実施形態と同一部材には同一符号を付して、その説明は省略または簡略化する。
 図27は、本発明の第3実施形態に係る液晶表示装置のアレイ基板を部分的に示す平面図である。図28は、本発明の第3実施形態に係る表示装置を部分的に示す平面図であり、アレイ基板上に、液晶層を介して、カラーフィルタ及びタッチセンシング配線を具備する表示装置基板が積層された構造を示す平面図であり、観察者側から見た平面図である。図29は、本発明の第3実施形態に係る表示装置を構成するアレイ基板を部分的に示す断面図である。
(Third embodiment)
A liquid crystal display device LCD3 according to a third embodiment will be described with reference to FIGS.
The same members as those in the first embodiment described above are denoted by the same reference numerals, and the description thereof is omitted or simplified.
FIG. 27 is a plan view partially showing an array substrate of a liquid crystal display device according to a third embodiment of the present invention. FIG. 28 is a plan view partially showing a display device according to a third embodiment of the present invention, in which a display device substrate having a color filter and touch sensing wiring is laminated on an array substrate via a liquid crystal layer. It is a top view which shows the made structure, and is the top view seen from the observer side. FIG. 29 is a cross-sectional view partially showing an array substrate constituting a display device according to the third embodiment of the present invention.
 第3実施形態における画素開口部18は、平面視、角度の異なる平行四辺形形状で形成されており、Y方向に並ぶ。画素の各々は、X方向に平行なゲート配線10と、平行四辺形形状の画素に沿うソース配線31でとによって、マトリクス状に区分されている。図27においては、画素開口部18の各々の右上端にアクティブ素子28が設けられている。アクティブ素子28は、ソース配線31に接続されているソース電極24と、チャネル層27と、ドレイン電極26と、絶縁膜を介してチャネル層27に対向配置されたゲート電極25とを備える。アクティブ素子28のゲート電極25は、ゲート配線10の一部を構成しており、ゲート配線10に接続されている。なお、薄膜トランジスタであるアクティブ素子の構成は、図5に示す構造と同様である。 The pixel openings 18 in the third embodiment are formed in parallelogram shapes with different angles in plan view, and are arranged in the Y direction. Each of the pixels is divided into a matrix by gate wirings 10 parallel to the X direction and source wirings 31 along the parallelogram-shaped pixels. In FIG. 27, an active element 28 is provided at the upper right end of each pixel opening 18. The active element 28 includes a source electrode 24 connected to the source wiring 31, a channel layer 27, a drain electrode 26, and a gate electrode 25 disposed to face the channel layer 27 via an insulating film. The gate electrode 25 of the active element 28 constitutes a part of the gate wiring 10 and is connected to the gate wiring 10. Note that the structure of the active element which is a thin film transistor is the same as the structure shown in FIG.
 画素電極20は、図27に示すように画素電極20の右上隅に位置するコンタクトホール29を介してドレイン電極26と電気的につながっている。
 共通電極17は、ストライプパターンを有して形成されている。具体的に、共通電極17は、平行四辺形形状を有する画素のY方向に向いた延在方向(Y方向に対して角度θで傾斜する方向)に平行に延在し、画素開口部18の中央に位置している。
 共通電極17は、は、各画素に一つ設けられている。角度θは、平面視でのY方向に対する傾きである。共通電極17の各々の下部においては、断面視、第1絶縁層11の下部に位置する画素電極20が設けられている。共通電極17のY方向の中央には、第3コンタクトホール43Hが設けられている。第3コンタクトホール43Hを介して、共通電極17は、コモン配線30(導電配線)と接続されている。
 なお、本実施形態においては、各画素には1つの共通電極17が設けられており、第3コンタクトホール43Hの数も各画素において1つである。第1実施形態及び第2実施形態において説明した第1コンタクトホールLH及び第2コンタクトホールRHと区別するため、第3実施形態では、共通電極17とコモン配線30とが導通するコンタクトホールを第3コンタクトホール43Hと呼称している。角度θは、第2実施形態と同様に、例えば、3°から15°の角度に設定できる。
The pixel electrode 20 is electrically connected to the drain electrode 26 through a contact hole 29 located at the upper right corner of the pixel electrode 20 as shown in FIG.
The common electrode 17 has a stripe pattern. Specifically, the common electrode 17 extends in parallel to an extending direction (a direction inclined at an angle θ with respect to the Y direction) of the pixel having a parallelogram shape in the Y direction. Located in the center.
One common electrode 17 is provided for each pixel. The angle θ is an inclination with respect to the Y direction in plan view. In each lower part of the common electrode 17, a pixel electrode 20 located in a lower part of the first insulating layer 11 in a cross-sectional view is provided. A third contact hole 43H is provided in the center of the common electrode 17 in the Y direction. The common electrode 17 is connected to the common wiring 30 (conductive wiring) through the third contact hole 43H.
In the present embodiment, each pixel is provided with one common electrode 17, and the number of third contact holes 43H is one in each pixel. In order to distinguish from the first contact hole LH and the second contact hole RH described in the first embodiment and the second embodiment, in the third embodiment, a contact hole in which the common electrode 17 and the common wiring 30 are electrically connected is a third. This is referred to as contact hole 43H. Similarly to the second embodiment, the angle θ can be set to an angle of 3 ° to 15 °, for example.
 液晶分子は、共通電極17あるいは画素電極20が具備される平面に平行に配向され、かつ、その長軸方向は、Y方向に平行に配向されている。共通電極17と画素電極20間に印加される液晶駆動電圧により駆動される、いわゆるFFSモードの液晶駆動となる。
 タッチセンシングは、タッチセンシング配線3と共通電極17間の静電容量変化を検知することで行われる。タッチセンシング配線3と共通電極17は、いずれかをタッチ駆動電極とし、いずれかをタッチ検出電極とすることができる。
The liquid crystal molecules are aligned parallel to the plane on which the common electrode 17 or the pixel electrode 20 is provided, and the major axis direction is aligned parallel to the Y direction. This is so-called FFS mode liquid crystal drive driven by a liquid crystal drive voltage applied between the common electrode 17 and the pixel electrode 20.
Touch sensing is performed by detecting a change in capacitance between the touch sensing wiring 3 and the common electrode 17. Either the touch sensing wiring 3 or the common electrode 17 can be used as a touch drive electrode, and either can be used as a touch detection electrode.
 図29は、タッチセンシング配線3と共通電極17との距離W1を示している。換言すれば、この距離W1は、透明樹脂層16、カラーフィルタ51(RGB)、図示されていない配向膜、及び液晶層300を含む空間におけるZ方向の距離である。この空間には、アクティブ素子、ソース配線、及び画素電極は含まれていない。本実施形態において、距離W1で示されるこの空間をタッチセンシング空間と呼称する。
 図27に示すようにコモン配線30とゲート配線10との距離W4が確保できるため、ゲート信号のタッチセンシングへの影響を軽減できる。また、図29に示すように、映像信号が供給されるソース配線31とタッチセンシング配線3との距離W2が十分に確保できるため、映像信号に起因するノイズが与えるタッチセンシングへの影響を軽減できる。
FIG. 29 shows the distance W <b> 1 between the touch sensing wiring 3 and the common electrode 17. In other words, the distance W1 is a distance in the Z direction in a space including the transparent resin layer 16, the color filter 51 (RGB), the alignment film (not shown), and the liquid crystal layer 300. This space does not include active elements, source lines, and pixel electrodes. In the present embodiment, this space indicated by the distance W1 is referred to as a touch sensing space.
As shown in FIG. 27, since the distance W4 between the common wiring 30 and the gate wiring 10 can be ensured, the influence of the gate signal on touch sensing can be reduced. 29, since the distance W2 between the source wiring 31 to which the video signal is supplied and the touch sensing wiring 3 can be sufficiently secured, it is possible to reduce the influence on the touch sensing caused by the noise caused by the video signal. .
 本実施形態の表示装置基板は、液晶層側に、ブラックマトリクスを含むカラーフィルタ51(RGB)と、ブラックマトリクスBMと、ブラックマトリクスBM上に設けられたタッチセンシング配線3とを具備する。なお、バックライトユニットに、赤色LED、緑色LED、青色LEDの3種のLEDを用い、時分割駆動で順次3色を発光させ、液晶を同期させた多色表示の場合は、カラーフィルタ51を省くことができる。 The display device substrate of this embodiment includes a color filter 51 (RGB) including a black matrix, a black matrix BM, and a touch sensing wiring 3 provided on the black matrix BM on the liquid crystal layer side. In the case of multi-color display in which three types of LEDs, red LED, green LED, and blue LED, are used for the backlight unit, and the three colors are sequentially emitted by time division driving and the liquid crystal is synchronized, the color filter 51 is used. It can be omitted.
 本実施形態によれば、Y方向に平行な配向処理方向を施すことで、Y方向において互いに隣接する画素の液晶分子39において互いに異なる初期配向を付与することができる。また、上述した第1実施形態及び第2実施形態と同様の効果が得られる。 According to the present embodiment, by applying an alignment treatment direction parallel to the Y direction, different initial alignments can be imparted to the liquid crystal molecules 39 of pixels adjacent to each other in the Y direction. Further, the same effects as those of the first embodiment and the second embodiment described above can be obtained.
 例えば、上述の実施形態に係る液晶表示装置は、種々の応用が可能である。上述の実施形態に係る液晶表示装置が適用可能な電子機器としては、携帯電話、携帯型ゲーム機器、携帯情報端末、パーソナルコンピュータ、電子書籍、ビデオカメラ、デジタルスチルカメラ、ヘッドマウントディスプレイ、ナビゲーションシステム、音響再生装置(カーオーディオ、デジタルオーディオプレイヤ等)、複写機、ファクシミリ、プリンター、プリンター複合機、自動販売機、現金自動預け入れ払い機(ATM)、個人認証機器、光通信機器等が挙げられる。上記の各実施形態は、自由に組み合わせて用いることができる。 For example, the liquid crystal display device according to the above-described embodiment can be applied in various ways. As electronic devices to which the liquid crystal display device according to the above-described embodiments can be applied, mobile phones, portable game devices, portable information terminals, personal computers, electronic books, video cameras, digital still cameras, head mounted displays, navigation systems, Examples include sound reproducing devices (car audio, digital audio player, etc.), copying machines, facsimiles, printers, printer multifunction devices, vending machines, automatic teller machines (ATMs), personal authentication devices, optical communication devices, and the like. Each of the above embodiments can be used in any combination.
 本発明に適用可能な液晶駆動方法は、上述した実施形態で述べた液晶駆動方法に限定されない。例えば、以下に記載する液晶駆動方法を用いてもよい。
 例えば、アクティブマトリクスでの信号電極(ソース配線)の極性をフレーム反転して液晶を駆動してもよい(例えば、特許第2982877号公報に記載)。
 また、液晶のアクティブマトリクス駆動において、液晶駆動の水平期間毎に、第1の信号線(ソース配線)と第2の信号線と交互に入れ替えてドット反転駆動を行ってもよい(例えば、特開平11-102174号公報に記載)。
 また、液晶のアクティブマトリクス駆動において、データドライブ(ソース配線)として一画素あたり2本のソース配線を用い、このデータドライブにフレーム毎に極性の異なる画像信号を伝送して水平ライン駆動を行ってもよい(例えば、特開平9-134152号公報に記載)。
 また、液晶のアクティブマトリクス駆動において、走査信号線(ゲート配線)として一画素あたり2本のゲート配線を用いてもよい。この場合、例えば、奇数行の走査信号線と偶数行の走査信号線には、逆極性のデータが書き込まれる。ある表示期間において、隣接する画素の奇数列と偶数列とに、それぞれ逆極性のデータを書き込み、次の表示期間でそれぞれ前の表示期間とは逆極性のデータを書き込んでもよい(例えば、特開平7-181927号公報に記載)。
 上述した液晶駆動方法を本発明に適用する場合、いずれの方法においても、一画素あたりのアクティブ素子(TFT)の個数は、1以上、複数であってもよい。本発明には、上記の液晶駆動技術を適用することができる。
The liquid crystal driving method applicable to the present invention is not limited to the liquid crystal driving method described in the above embodiment. For example, the liquid crystal driving method described below may be used.
For example, the liquid crystal may be driven by inverting the polarity of the signal electrode (source wiring) in the active matrix (for example, described in Japanese Patent No. 2982877).
Further, in the active matrix driving of liquid crystal, dot inversion driving may be performed by alternately switching the first signal line (source wiring) and the second signal line for each horizontal period of liquid crystal driving (for example, see Japanese Patent Laid-Open No. Hei. 11-102174).
Further, in active matrix driving of liquid crystal, two source wirings per pixel are used as a data drive (source wiring), and an image signal having a different polarity for each frame is transmitted to the data drive to perform horizontal line driving. Good (for example, described in JP-A-9-134152).
In the active matrix driving of liquid crystal, two gate wirings per pixel may be used as scanning signal lines (gate wirings). In this case, for example, reverse polarity data is written to the odd-numbered scanning signal lines and the even-numbered scanning signal lines. In a certain display period, data of opposite polarity may be written in the odd-numbered column and even-numbered column of adjacent pixels, respectively, and data of opposite polarity to the previous display period may be written in the next display period (see, for example, 7-181927).
When the liquid crystal driving method described above is applied to the present invention, the number of active elements (TFTs) per pixel may be one or more in any method. The liquid crystal driving technique described above can be applied to the present invention.
 本発明の好ましい実施形態を説明し、上記で説明してきたが、これらは本発明の例示的なものであり、限定するものとして考慮されるべきではないことを理解すべきである。追加、省略、置換、およびその他の変更は、本発明の範囲から逸脱することなく行うことができる。従って、本発明は、前述の説明によって限定されていると見なされるべきではなく、請求の範囲によって制限されている。 While preferred embodiments of the present invention have been described and described above, it should be understood that these are exemplary of the invention and should not be considered as limiting. Additions, omissions, substitutions, and other changes can be made without departing from the scope of the invention. Accordingly, the invention is not to be seen as limited by the foregoing description, but is limited by the scope of the claims.
3・・・タッチセンシング配線
4・・・第2導電性金属酸化物層(導電性金属酸化物層)
5・・・金属層
6・・・第1導電性金属酸化物層(導電性金属酸化物層)
8・・・黒色層
10・・・ゲート配線
11・・・第1絶縁層
11F・・・充填部
11H・・・貫通孔
11T・・・上面
12・・・第2絶縁層
12H・・・貫通孔
12T・・・上面
13・・・第3絶縁層
13A・・・突起部
14・・・第4絶縁層
16・・・透明樹脂層
17・・・共通電極
17A・・・電極部
17B・・・導電接続部
17K・・・壁部
18・・・画素開口部
20・・・画素電極
20K・・・内壁
20S・・・スルーホール
21・・・透明基板(第1透明基板)
22・・・透明基板(第2透明基板)
24・・・ソース電極
25・・・ゲート電極
26・・・ドレイン電極
27・・・チャネル層
28・・・アクティブ素子
29・・・コンタクトホール
30・・・コモン配線(導電配線)
31・・・ソース配線
33・・・電気力線
34・・・端子部
39・・・液晶分子
43H・・・第3コンタクトホール(コンタクトホール)
51・・・カラーフィルタ
100・・・表示装置基板
110・・・表示部
120・・・制御部
121・・・映像信号制御部
122・・・タッチセンシング制御部
123・・・システム制御部
200・・・アレイ基板
206・・・液晶層
213・・・透明樹脂層
214・・・カラーフィルタ
215・・・透明基板
221・・・対向電極
250・・・液晶表示装置
250A・・・液晶表示装置
300・・・液晶層
BM・・・ブラックマトリクス
BU・・・バックライトユニット
W17A・・・幅
D20S・・・直径
EL・・・長さ
H・・・コンタクトホール
L・・・光
L2・・・等電位線
L3・・・等電位線
LH・・・左側コンタクトホール(第1コンタクトホール)
RH・・・右側コンタクトホール(第2コンタクトホール)
LCD1・・・液晶表示装置
LCD2・・・液晶表示装置
LCD3・・・液晶表示装置
P17A・・・ピッチ
Pa・・・上部領域
Pb・・・下部領域
Rub・・・配向処理方向
W1・・・タッチセンシング配線と共通電極との距離
W2・・・タッチセンシング配線とソース配線との距離
W3・・・高さ
W4・・・タッチセンシング配線とゲート配線との距離
θ・・・角度(画素開口の長手方向Yからの傾き)
3 ... Touch sensing wiring 4 ... Second conductive metal oxide layer (conductive metal oxide layer)
5 ... Metal layer 6 ... First conductive metal oxide layer (conductive metal oxide layer)
8 ... Black layer 10 ... Gate wiring 11 ... First insulating layer 11F ... Filling portion 11H ... Through hole 11T ... Upper surface 12 ... Second insulating layer 12H ... Through Hole 12T ... Upper surface 13 ... Third insulating layer 13A ... Projection 14 ... Fourth insulating layer 16 ... Transparent resin layer 17 ... Common electrode 17A ... Electrode portion 17B ... Conductive connecting portion 17K ... wall 18 ... pixel opening 20 ... pixel electrode 20K ... inner wall 20S ... through hole 21 ... transparent substrate (first transparent substrate)
22 ... Transparent substrate (second transparent substrate)
24 ... Source electrode 25 ... Gate electrode 26 ... Drain electrode 27 ... Channel layer 28 ... Active element 29 ... Contact hole 30 ... Common wiring (conductive wiring)
31 ... Source wiring 33 ... Electric field line 34 ... Terminal part 39 ... Liquid crystal molecule 43H ... Third contact hole (contact hole)
51 ... Color filter 100 ... Display device substrate 110 ... Display unit 120 ... Control unit 121 ... Video signal control unit 122 ... Touch sensing control unit 123 ... System control unit 200- .... Array substrate 206 ... Liquid crystal layer 213 ... Transparent resin layer 214 ... Color filter 215 ... Transparent substrate 221 ... Counter electrode 250 ... Liquid crystal display device 250A ... Liquid crystal display device 300 ... Liquid crystal layer BM ... Black matrix BU ... Backlight unit W17A ... Width D20S ... Diameter EL ... Length H ... Contact hole L ... Light L2 ... etc. Potential line L3 ... equipotential line LH ... left contact hole (first contact hole)
RH: Right contact hole (second contact hole)
LCD1 ... Liquid crystal display device LCD2 ... Liquid crystal display device LCD3 ... Liquid crystal display device P17A ... Pitch Pa ... Upper region Pb ... Lower region Rub ... Orientation processing direction W1 ... Touch Distance W2 between sensing wiring and common electrode: Distance W3 between touch sensing wiring and source wiring W3: Height W4: Distance θ between touch sensing wiring and gate wiring: Angle (length of pixel opening) Tilt from direction Y)

Claims (13)

  1.  表示装置であって、
     第1透明基板と、前記第1透明基板上に設けられた第1方向に延在するタッチセンシング配線とを備えた表示装置基板と、
     第2透明基板と、前記第2透明基板上の複数の多角形状の画素開口部と、前記複数の画素開口部の各々に設けられているとともに平面視において前記第1方向に延在する1以上の電極部を有する共通電極と、前記共通電極の下に設けられた第1絶縁層と、前記複数の画素開口部の各々において前記第1絶縁層の下に設けられた画素電極と、前記画素電極の下に設けられた第2絶縁層と、前記第2絶縁層の下において前記共通電極に電気的に接続されかつ前記第1方向に直交する第2方向に延在して前記複数の画素開口部を横断する導電配線と、前記導電配線の下に設けられた第3絶縁層と、前記第3絶縁層の下に設けられて前記画素電極に電気的に接続されているトップゲート構造の薄膜トランジスタであるアクティブ素子と、前記導電配線と同じ層構成を有して前記第2絶縁層と前記第3絶縁層との間において前記導電配線と同じ位置に形成されているとともに平面視において前記第2方向に延在して前記アクティブ素子に電気的に連携されたゲート配線と、平面視において前記第1方向に延在して前記アクティブ素子に電気的に連携されたソース配線と、前記電極部のパターンの長手方向の中央に設けられているとともに前記共通電極と前記導電配線とを電気的に接続するコンタクトホールを備えるアレイ基板と、
     前記表示装置基板と前記アレイ基板との間に挟持された表示機能層と、
     前記画素電極と前記共通電極との間に駆動電圧を印加することによって前記表示機能層を駆動させることにより映像表示を行い、前記共通電極と前記タッチセンシング配線との間の静電容量の変化を検知してタッチセンシングを行う制御部と、
     を含み、
     前記表示機能層の厚さ方向に対して傾斜する斜め方向において、前記タッチセンシング配線と前記共通電極とは互いに向かい合っている表示装置。
    A display device,
    A display device substrate comprising: a first transparent substrate; and a touch sensing wiring provided on the first transparent substrate and extending in a first direction;
    One or more second transparent substrates, a plurality of polygonal pixel openings on the second transparent substrate, and one or more provided in each of the plurality of pixel openings and extending in the first direction in plan view A common electrode having a plurality of electrode portions, a first insulating layer provided under the common electrode, a pixel electrode provided under the first insulating layer in each of the plurality of pixel openings, and the pixel A second insulating layer provided under the electrode; and the plurality of pixels electrically connected to the common electrode under the second insulating layer and extending in a second direction orthogonal to the first direction. A conductive wiring crossing the opening; a third insulating layer provided under the conductive wiring; and a top gate structure provided under the third insulating layer and electrically connected to the pixel electrode. An active element which is a thin film transistor, and the conductive wiring The same layer configuration is formed at the same position as the conductive wiring between the second insulating layer and the third insulating layer, and extends in the second direction in plan view to form the active element. An electrically linked gate wiring, a source wiring extending in the first direction in a plan view and electrically linked to the active element, and provided in the center in the longitudinal direction of the pattern of the electrode portion; And an array substrate comprising a contact hole for electrically connecting the common electrode and the conductive wiring,
    A display functional layer sandwiched between the display device substrate and the array substrate;
    An image is displayed by driving the display functional layer by applying a driving voltage between the pixel electrode and the common electrode, and a change in capacitance between the common electrode and the touch sensing wiring is performed. A control unit that detects and performs touch sensing;
    Including
    The display device in which the touch sensing wiring and the common electrode face each other in an oblique direction inclined with respect to the thickness direction of the display functional layer.
  2.  前記共通電極は、平面視において前記タッチセンシング配線と平行な長尺方向に延在するストライプパターンを有する請求項1に記載の表示装置。 The display device according to claim 1, wherein the common electrode has a stripe pattern extending in a longitudinal direction parallel to the touch sensing wiring in a plan view.
  3.  前記アクティブ素子は、酸化物半導体で構成されたチャネル層を含み、前記チャネル層はゲート絶縁膜と接触している薄膜トランジスタである請求項1に記載の表示装置。 The display device according to claim 1, wherein the active element includes a channel layer made of an oxide semiconductor, and the channel layer is a thin film transistor in contact with a gate insulating film.
  4.  前記酸化物半導体は、ガリウム、インジウム、亜鉛、錫、アルミニウム、ゲルマニウム、アンチモン、ビスマス、セリウムのうち2種以上の金属酸化物を含む酸化物半導体である請求項3に記載の表示装置。 The display device according to claim 3, wherein the oxide semiconductor is an oxide semiconductor containing two or more metal oxides of gallium, indium, zinc, tin, aluminum, germanium, antimony, bismuth, and cerium.
  5.  前記ゲート絶縁膜は、酸化セリウムを含む複合酸化物で形成されたゲート絶縁膜である請求項3に記載の表示装置。 4. The display device according to claim 3, wherein the gate insulating film is a gate insulating film formed of a complex oxide containing cerium oxide.
  6.  前記表示機能層は液晶層であって、
     前記液晶層の液晶は、
     前記アレイ基板に平行な初期配向を有し、
     前記共通電極と前記画素電極との間に印加される液晶駆動電圧によって生じるフリンジ電界で駆動される請求項1に記載の表示装置。
    The display function layer is a liquid crystal layer,
    The liquid crystal of the liquid crystal layer is
    Having an initial orientation parallel to the array substrate;
    The display device according to claim 1, wherein the display device is driven by a fringe electric field generated by a liquid crystal driving voltage applied between the common electrode and the pixel electrode.
  7.  前記共通電極及び前記画素電極は、少なくとも、酸化インジウム、酸化錫を含む複合酸化物で構成されている請求項1に記載の表示装置。 The display device according to claim 1, wherein the common electrode and the pixel electrode are made of a composite oxide containing at least indium oxide and tin oxide.
  8.  前記タッチセンシング配線は、銅合金層を含む金属層で構成されている請求項1に記載の表示装置。 The display device according to claim 1, wherein the touch sensing wiring is configured by a metal layer including a copper alloy layer.
  9.  前記タッチセンシング配線は、銅合金層が導電性金属酸化物層で挟持された構造を有する請求項1に記載の表示装置。 The display device according to claim 1, wherein the touch sensing wiring has a structure in which a copper alloy layer is sandwiched between conductive metal oxide layers.
  10.  前記導電配線は、銅合金層が導電性金属酸化物層で挟持された構造を有する請求項1に記載の表示装置。 The display device according to claim 1, wherein the conductive wiring has a structure in which a copper alloy layer is sandwiched between conductive metal oxide layers.
  11.  前記導電性金属酸化物層は、酸化インジウム、酸化亜鉛、酸化アンチモン、酸化錫のうち2種以上を含む複合酸化物層である請求項9又は請求項10に記載の表示装置。 The display device according to claim 9 or 10, wherein the conductive metal oxide layer is a composite oxide layer containing two or more of indium oxide, zinc oxide, antimony oxide, and tin oxide.
  12.  前記表示装置基板は、前記第1透明基板と前記タッチセンシング配線との間に設けられたブラックマトリクスを具備し、
     前記タッチセンシング配線は、前記ブラックマトリクスの一部と重畳している請求項1に記載の表示装置。
    The display device substrate includes a black matrix provided between the first transparent substrate and the touch sensing wiring,
    The display device according to claim 1, wherein the touch sensing wiring overlaps a part of the black matrix.
  13.  前記表示装置基板は、複数の画素開口部に対応する位置に設けられたカラーフィルタを備える請求項1に記載の表示装置。 The display device according to claim 1, wherein the display device substrate includes a color filter provided at a position corresponding to a plurality of pixel openings.
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