WO2010038254A1

WO2010038254A1 - Plasma display device

Info

Publication number: WO2010038254A1
Application number: PCT/JP2008/002723
Authority: WO
Inventors: 山口和也; 金澤義一; 町田明広
Original assignee: 日立プラズマディスプレイ株式会社
Priority date: 2008-09-30
Filing date: 2008-09-30
Publication date: 2010-04-08

Abstract

A plasma display device which repeats cell sustain discharge includes: a display panel on which a plurality of display electrode pairs having a first and a second display electrode (Y, X) are formed; a sustain drive circuit for generating a sustain pulse; a plurality of scan driver circuits which supply a sustain pulse generated by the sustain drive circuit to a plurality of first display electrodes; a separation switch (SW3) arranged between an output terminal of the sustain drive circuit and input terminals of scan driver circuits; and a ringing control circuit arranged at a first terminal (N2) between the separation switch and the scan driver circuit and clamps the ringing phenomenon generated in the sustain pulse. The ringing control circuit clamps the ringing phenomenon during a sustain drive period for applying the sustain pulse to the first display electrode.

Description

Plasma display device

The present invention relates to a plasma display device.

The plasma display device includes a display panel and a drive circuit group that drives electrodes in the display panel. Usually, a drive circuit group is arranged on the back side of the display panel, and the drive circuit group and the display panel are connected by a flexible cable or the like. The display panel includes X and Y electrodes forming a plurality of display electrode pairs and a plurality of address electrodes intersecting with the electrodes, and a cell region is formed at the intersection of the display electrode pair and the address electrode.

The driving period of the display panel of the plasma display device includes, for example, a reset period for resetting the wall charge state in the panel to a desired state, an address period for lighting the cell according to display data, and a cell that is lit during the address period. And a sustain period for repeatedly discharging. In the sustain period, the drive circuit repeatedly applies a sustain pulse between the display electrode pairs composed of the X and Y electrodes to repeatedly generate a sustain discharge.

A sustain drive circuit that generates a sustain pulse includes a switch that applies a sustain voltage to the electrodes and a switch that applies a reference voltage, for example, a ground potential. Then, by sustaining these switches alternately, a sustain pulse that repeats rising and falling is generated. In particular, the circuit group for driving the Y electrode includes a scan driver circuit directly connected to the Y electrode in addition to the sustain drive circuit.

A sustain drive circuit of a plasma display device is described in Patent Document 1, for example. Patent Document 1 describes a sustain drive circuit including a switch that applies a sustain voltage to an electrode, a switch that applies a ground potential to the electrode, and a power recovery circuit.
JP 2008-175953 A

In the plasma display device, a Y drive circuit board on which a sustain drive circuit is mounted is attached to the back side of the panel, and the scan driver board on which the scan driver circuit is mounted runs along one side of the left and right edges of the panel along the Y electrode. Arranged. A plurality of scan driver circuits mounted on the scan driver board are connected to the Y electrode of the panel via a flexible cable. For this reason, the connection wiring for connecting the sustain drive circuit and the scan driver circuit becomes very long depending on the position of the Y electrode. The inductance component parasitically included in this long-distance connection wiring is so large that it cannot be ignored, and a ringing phenomenon in which the voltage overshoots due to the inductance component occurs at the rise and fall of the sustain pulse.

The ringing phenomenon of the sustain pulse is divided into a Y electrode that increases and a Y electrode that does not increase so much depending on the position of the Y electrode. For this reason, there is a difference in discharge timing and intensity between the Y electrodes at different positions, causing variations in light emission luminance and operating voltage margin, degrading display quality and reducing display drive reliability.

Therefore, an object of the present invention is to provide a plasma display device having a novel drive circuit that solves the conventional problems.

According to the first aspect of the present invention, in a plasma display device that repeats a sustain discharge of a cell, a display panel having a plurality of display electrode pairs having first and second display electrodes and a sustain pulse are generated. A sustain driving circuit, a plurality of scan driver circuits for supplying a sustain pulse generated by the sustain driving circuit to the plurality of first display electrodes, an output terminal of the sustain driving circuit, and an input terminal of the plurality of scan driver circuits; And a ringing control circuit that clamps a ringing phenomenon that occurs in the sustain pulse, and is provided at a first terminal between the separation switch and the scan driver circuit. . The ringing control circuit clamps the ringing phenomenon during a sustain driving period in which the sustain pulse is applied to the first display electrode.

According to a preferred embodiment, the plurality of scan driver circuits are arranged along one side of the display panel corresponding to the plurality of first display electrodes, and the ringing control circuit includes the display It is provided at either or both ends of the side of the panel.

Alternatively, the sustain drive circuit is disposed at the center of the upper and lower ends of the display panel, and the plurality of scan driver circuits correspond to the plurality of first display electrodes, and either one of the left and right sides of the display panel. The ringing control circuits are provided at the upper and lower ends of the side of the display panel.

According to the second aspect of the present invention, in a plasma display device that repeats sustain discharge of a cell, a display panel having a plurality of display electrode pairs having first and second display electrodes and a sustain pulse are generated. A sustain driving circuit, a plurality of scan driver circuits for supplying a sustain pulse generated by the sustain driving circuit to the plurality of first display electrodes, an output terminal of the sustain driving circuit, and an input terminal of the plurality of scan driver circuits; A connection wiring having an inductance component provided between and a connection wiring between the sustain driving circuit and the scan driver circuit, and a ringing control circuit for clamping a ringing phenomenon generated in the sustain pulse. Have. The ringing control circuit does not perform the clamping operation when the display load factor is the first, and performs the clamping operation when the second display load factor is higher than the first display load factor.

According to the present invention, there is provided a plasma display device that performs a sustain drive in which the ringing phenomenon is controlled or suppressed.

According to the present invention, the ringing phenomenon of the sustain pulse can be suppressed, display quality can be improved, and display drive reliability can be increased.

It is a block diagram of a plasma display apparatus. It is a circuit diagram of a scan drive circuit. It is a figure which shows a sustain pulse waveform. It is a block diagram of the plasma display apparatus in this Embodiment. It is a figure which shows the panel structure of the plasma display apparatus in this Embodiment. It is a block diagram of the plasma display apparatus in this Embodiment. It is a circuit diagram of a drive circuit group on the Y electrode side in the present embodiment. FIG. 8 is a diagram illustrating an on / off operation of each of the switches SW1 to SW7 in the drive circuit group on the Y electrode side in FIG. 7 and a sustain pulse waveform applied to the Y electrode associated therewith.

Explanation of symbols

X0-X5: display electrode, first display electrode Y1-Y6: display electrode, second display electrode B: light shielding electrode CELL: cell region X_SUS_DR, Y_SUS_DR: X, Y electrode sustain drive circuits X_BLK_DR, Y_BLK_DR: X, Y-side light-shielding electrode drive circuit SCAN_DR: scan drive circuit A_DR: address drive circuit DR_CON: panel drive control circuit

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the technical scope of the present invention is not limited to these embodiments, but extends to the matters described in the claims and equivalents thereof.

FIG. 1 is a block diagram of a plasma display device. On the back side of the display panel PNL, there are a power supply circuit board PW_SUB that generates various drive voltages, a signal processing circuit board S_PROC_SUB that generates a drive signal from a video signal, a control circuit board DR_CON_SUB that controls the drive circuit, and Y A drive circuit board Y_DR_SUB and an X drive circuit board X_DR_SUB are arranged. The Y drive circuit board Y_DR_SUB is connected to a scan driver board SCAN_DR_SUB on which a plurality of scan driver circuits are mounted, and the output terminals of the plurality of scan driver circuits are connected to a plurality of Y electrodes in the display panel PNL via the flexible cable F_CBL. Connected. On the other hand, the output terminal of the X drive circuit board X_DR_SUB is connected to a plurality of X electrodes in the display panel PNL via the X relay board 10 and the flexible cable F_CBL. The plurality of address driver circuits A_DR are connected to the control circuit board DR_SUB via the address relay board 12, and their output terminals are connected to the plurality of address electrodes in the display panel PNL via the flexible cable F_CBL.

The Y drive circuit board X_DR_SUB includes a sustain drive circuit that generates a sustain pulse, a reset scan voltage generation circuit that generates a reset pulse and a scan pulse, and the like, and is arranged at the center of the upper and lower ends of the panel PNL. On the other hand, on the front side of the display panel PNL, a plurality of Y electrodes extending in the horizontal direction are arranged from the upper end to the lower end of the panel. As a result, the distance between the output terminal of the sustain drive circuit and the scan driver circuit disposed at a position facing each Y electrode differs depending on the position of the Y electrode. In particular, the distance between the scan driver circuit connected to the Y electrodes at the upper end and the lower end of the display panel PNL and the sustain drive circuit is increased, causing an increase in the inductance component of the connection wiring and causing ringing in the scan pulse.

FIG. 2 is a circuit diagram of the sustain drive circuit. The sustain drive circuit Y_SUS_DR includes a clamp circuit CP that outputs the sustain voltage Vs or the ground potential GND to the output terminal N1, and a power recovery circuit PW_R having an LC resonance circuit. The output terminal N1 is connected to the Y electrode Y of the panel via the separation switch SW3 and the Y scan driver circuit Y_SCAN_DR.

The power recovery circuit PW_R includes a charge storage capacitor C0, a power recovery inductance L2, a diode D12, a switch LD including an NMOS transistor between the output terminal N1 and the charge storage capacitor C0, and a power supply NMOS transistor. A switch LU, a diode D11, and an inductance L1 are included.

The clamp circuit CP has a switch CU (SW1) composed of an NMOS transistor that applies a sustain voltage Vs to the output terminal N1, and a switch CD (SW2) composed of an NMOS transistor that applies the ground potential GND to the output terminal N1.

The X sustain driver circuit X_SUS_DR for driving the X electrode has the same configuration as the Y sustain driver circuit.

The Y drive circuit board is further provided with a reset scan drive circuit R_S_DR at a terminal N2 between the separation switch SW3 and the Y scan driver circuit YCAN_DR. The reset scan drive circuit R_S_DR includes a reset driver circuit that applies a reset pulse to the Y electrode during a reset period, and a scan voltage generation circuit that applies a scan voltage. Since the reset pulse voltage is a positive voltage higher than the sustain voltage Vs and a non-voltage lower than the ground potential GND, and the scan voltage is a negative voltage lower than the ground potential GND, the reset pulse voltage is between the reset scan drive circuit R_S_DR and the Y sustain drive circuit Y_SUS_DR. Is provided with a separation switch SW3, and when the reset scan drive circuit R_S_DR outputs a reset pulse or a scanning voltage, the separation switch SW3 is turned off. Thereby, the breakdown voltage of the two NMOS transistors of the clamp circuit CP can be lowered.

The four switches LU, LD, CU, CD of the Y sustain driver circuit Y_SUS_DR are supplied with respective control pulses PLU, PLD, PCU, PCD from the control circuit of the control circuit board DR_CON_SUB, and the switches are turned on at a desired timing. Controlled off.

FIG. 3 is a diagram showing a sustain pulse waveform. In the figure, (A) shows the sustain pulse waveform at the output terminal N1 of the sustain drive circuit, (B) shows the sustain pulse waveform at the center electrode input portion of the display panel, and (C) shows the upper and lower ends of the display panel. The sustain pulse waveform of an electrode input part is shown.

FIG. 3A shows the sustain pulse waveform of the output concentration N1 of the sustain drive circuit Y_SUS_DR. As shown in the waveform of the Y electrode, at the rising edge of the pulse, the control pulse PLU becomes H level and the switch LU becomes conductive, and the charge of the charge storage capacitor C0 is transferred to the output terminal N1 via the switch LU, the diode D11, and the inductance L1. The voltage increases due to the output and the obtuse waveform. Then, immediately before the output terminal N1 reaches the sustain voltage Vs, the control pulse PCU becomes H level, the switch PCU becomes conductive, and the output terminal N1 is clamped to the sustain voltage Vs. At this time, the switch LU is non-conductive. On the other hand, when the pulse falls, the control pulse PLD becomes H level and the switch LD is turned on, and the charge accumulated in the capacitor Cxy between the X and Y electrodes of the panel passes through the inductance L2, the diode D12, and the switch LD. The voltage is recovered by the charge storage capacitor C0 and decreases due to the obtuse waveform. Then, immediately before the output terminal N1 reaches the ground potential (0 V), the control pulse PCD becomes H level, the switch CD becomes conductive, and the output terminal N1 is clamped to the ground potential. At this time, the switch LD is non-conductive.

However, the sustain pulse generated at the output terminal N1 is supplied to the Y scan driver circuits Y_SCAN_DR1 and 2 via the separation switch SW3, and is supplied to the Y electrode of the panel. The separation switch SW3 is a switch for supplying the output of the Y sustain drive circuit Y_SUS_DR provided in common to the plurality of Y electrodes, and has a large size and a large inductance component L3. Furthermore, the wiring distance from the output terminal N1 to the Y electrode Y1 arranged at the upper and lower ends of the panel is considerably longer than the Y electrode Y2 arranged at the center of the panel, and there is a large inductance component L4 there. It is formed.

Therefore, in the sustain waveform at the input portion of the Y electrode Y2 at the center of the panel in FIG. 3B, the potential is sharply increased when the potential is suddenly raised to the sustain voltage Vs by the switch CU of the clamp circuit CP and when the potential is sharply caused by the switch CD. When it is pulled down to the ground potential, ringing RG1 due to the inductance component occurs. In other words, it is a vibration waveform with voltage overshooting. Similarly, similar ringing RG2 is generated in the sustain waveform at the input portion of the Y electrode Y1 at the upper and lower ends of the panel in FIG. The ringing RG2 of the upper and lower electrodes Y1 is larger than the ringing RG1 of the electrode Y2 at the center of the panel.

As shown in FIG. 3, it is predicted that similar ringing will occur in the sustain pulse on the X electrode side.

The plasma display device according to the present embodiment has a ringing control circuit that suppresses ringing that occurs in the sustain pulse on the Y electrode side, and causes the ringing control circuit to perform a clamping operation as necessary to increase the voltage due to ringing or Suppresses voltage drop.

FIG. 4 is a configuration diagram of the plasma display device in the present embodiment. A difference from the configuration diagram of FIG. 1 is that a substrate R_CON_SUB mounted with a ringing control circuit is added to the upper and lower ends of the left end of the panel PNL. Other configurations are the same as those in FIG.

FIG. 5 is a diagram showing a panel configuration of the plasma display device according to the present embodiment. In the drawing, a plan view of the first substrate SUB_A is shown on the right side, and a sectional view of an arrow 100 in the plan view is shown on the left side. The configuration will be described with reference to a plan view and a cross-sectional view. The first substrate SUB_A is a transparent substrate, and a conductive X having a laminated structure of Cr / Cu / Cr is formed on the first substrate SUB_A via the dielectric layer 10. Electrodes X1, X2, Y electrodes Y1, Y2, a transparent electrode TRP connected to the X, Y electrodes, and a conductive light shielding electrode BLK provided in parallel between the X, Y electrode pairs are provided. In addition, these electrodes are covered with another dielectric layer 12. The light-shielding electrode BLK is preferably a black or dark metal electrode, and is an electrode having a Cr / Cu / Cr laminated structure like the X and Y electrodes. The transparent electrode TRP is made of, for example, a conductive material mainly composed of ITO. The X and Y electrodes have an electrode shape extending in the horizontal direction in the plan view, and the light shielding electrode BLK provided therebetween also has an electrode shape extending in the horizontal direction.

On the other hand, on the second substrate SUB_B, an address electrode ADD extending in the vertical direction so as to cross the X and Y electrodes is provided, and the address electrode ADD is covered with a dielectric layer 14. Then, ribs (partition walls) RIB are formed on the dielectric layer 14 so as to surround the cell region CELL, which is a discharge space, from four directions. That is, the outer periphery of the rib RIB shown in the plan view coincides with the outer periphery of the cell region CELL, and the rib RIB has a box-type structure that defines the cell region CELL. The rib RIB is, for example, the same dielectric material as the dielectric layer 14. A phosphor layer PH is formed on the dielectric layer 14 and on the slope of the rib RIB.

The X and Y electrodes X1, X2, Y1, and Y2 extend so as to overlap the cell region CELL, and the transparent electrode TRP extending in the vertical direction from the X and Y electrodes is located in the cell region CELL. The transparent electrode TRP has a quadrangular planar shape. Further, the light shielding electrode BLK is disposed at the top of the rib RIB extending in the lateral direction, and covers the top of the rib RIB from the first substrate SUB_A side. Thereby, the top of the rib RIB is shielded from the first substrate SUB_A side, the reflected light from the rib RIB and the white color of the rib itself are shielded, and the contrast of the display image is increased.

The driving of the plasma display device of FIG. 5 will be described. In the reset driving period, a reset pulse is applied between the X and Y electrodes, and the wall charge state on the X and Y electrodes and the address electrode ADD is reset to a desired state. In the address drive period after the reset drive period, the scan pulse is sequentially applied to the Y electrode, the address voltage is applied to the address electrode ADD corresponding to the display data, and the address electrode ADD to which the address voltage is applied and the scan pulse Address discharge is generated in the cell at the intersection with the Y electrode to which is applied. In the sustain drive period after the address drive period, a sustain pulse whose polarity is alternately changed is applied between the X and Y electrodes, and a sustain discharge is generated only in the cells that are lit during the address drive period. By controlling the number of pulses (frequency) within the sub-frame period of the sustain pulse, the display luminance during the sub-frame period is controlled.

FIG. 6 is a configuration diagram of the plasma display device according to the present embodiment. The configuration of the panel PNL is the same as the panel structure shown in FIG. However, the configuration of the transparent electrode is omitted in FIG. In the panel PNL, X electrodes X0 to X5 and Y electrodes Y1 to Y6 extending in the horizontal direction are arranged in the order of X, X, Y, Y, X, X, Y, and Y in the vertical direction.

Each X electrode is connected to a common X sustain drive circuit X_SUS_DR, and a sustain pulse is applied to all X electrodes. Each Y electrode is connected to the scan driver circuit SCAN_DR, and the common Y sustain drive circuit Y_SUS_DR generates a scan pulse at the output terminal N1, and the scan pulse passes through the scan driver circuit SCAN_DR corresponding to the separation switch SW3. Applied to the Y electrode. As described above, the reset scan drive circuit R_S_DR is provided at the terminal N2 between the separation switch SW3 and the scan driver circuit SCAN_DR.

Both the X and Y sustain drive circuits include transistors SW1 and SW4 that apply a sustain voltage Vs, transistors SW2 and SW5 that apply a ground voltage, and a power recovery circuit PW_R. The power recovery circuit PW_R is the same as the circuit shown in FIG. These transistors SW1, 2, SW4, 5 are all N-channel MOS transistors, and diodes D1, D2, D4, D5 are formed in the direction from the source terminal to the drain terminal due to their structure. These diodes are turned on when the output terminal N1 of the sustain driving circuit becomes a potential higher than the forward voltage of the diode from the sustain voltage Vs, or when the potential becomes lower than the forward voltage of the diode from the ground potential GND. The terminal N1 is clamped to the sustain voltage Vs or the ground potential GND.

Furthermore, in the present embodiment, a ringing control circuit R_CON is connected to the terminal N2 in order to suppress ringing RG1 and RG2 at the Y electrode input section shown in FIG. This ringing control circuit R_CON is desirably provided in the vicinity of the scan driver circuit SCAN_DR disposed at the upper and lower ends of the panel farthest from the sustain drive circuit Y_SUS_DR, as shown in FIG. However, since the separation switch SW3 has a large inductance component, a certain effect can be expected even if a ringing control circuit is provided between the separation switch SW3 and the scan driver circuit.

Further, an address electrode (not shown) extends in the vertical direction of the panel PNL so as to intersect the X and Y electrodes, and an address voltage is applied by the address driving circuit A_DR. The panel drive control circuit DR_CON controls the operation of these drive circuits.

FIG. 7 is a circuit diagram of a drive circuit group on the Y electrode side in the present embodiment. The drive circuit group on the Y electrode side is the same as that in FIG. 6. The Y drive circuit board Y_DR_SUB in FIG. 4 includes a Y sustain drive circuit Y_SUS_DR having a clamp circuit CL and a power recovery circuit PW_R, a separation switch SW3, and a reset. A scan drive circuit R_S_DR, a capacitor Cy, and a diode D3 are mounted.

The scan driver circuit SCAN_DR connected to each Y electrode in the display panel PNL is arranged on the left side of the panel corresponding to each Y electrode as shown in FIG. Although FIG. 7 shows only one set of the scan driver circuit SCAN_DR and the Y electrode, there are actually a plurality of sets. The scan driver circuit SCAN_DR is composed of switches SW4 and SW5 made of MOS transistors. When the sustain pulse at the output terminal N1 rises by the scan driver circuit SCAN_DR, the switch SW4 is turned on, the potential of the Y electrode is raised by capacitive coupling by the capacitor Cy, and the switch at the time when the sustain pulse at the output terminal N1 falls SW4 is non-conductive, SW5 is conductive, and the potential of the Y electrode falls. In the address period, the switch SW5 is turned on, and the scan pulse generated by the reset scan drive circuit R_S_DR is applied to the Y electrode. Similarly, in the reset period, the switch SW5 is turned on, and a reset pulse generated by the reset scan drive circuit R_S_DR is applied to the Y electrode.

FIG. 7 shows a ringing control circuit R_CON. The ringing control circuit R_CON has a first clamp circuit composed of a diode D6 and a switch SW6 of a MOS transistor between the sustain voltage Vs and the terminal N2, and further has a diode between the ground potential GND and the terminal N2. A second clamp circuit including D7 and a MOS transistor switch SW7 is provided. A capacitor C7 is provided between the sustain voltage Vs and the ground potential GND.

FIG. 8 is a diagram showing ON / OFF operations of the switches SW1 to SW7 in the Y electrode side drive circuit group in FIG. 7 and the accompanying sustain pulse waveform applied to the Y electrode. The on / off operation of these switches is controlled by the drive control circuit DR_CON in FIG.

First, during the sustain drive period, the separation switch SW3 is maintained in the on state (conducting state), and the switches SW6 and SW7 in the ringing control circuit are also maintained in the on state. In periods t1 and t3 when the sustain pulse rises, the switches SW1 and SW4 are turned on, and the switches SW2 and SW5 are turned off. As a result, the output terminal N1 of the Y sustain drive circuit Y_SUS_DR is pulled up to the sustain voltage Vs, and the sustain pulse of the Y electrode rises through the switch SW4 of the scan driver circuit SCAN_DR. At this time, the broken ringing phenomenon in which the sustain pulse voltage exceeds the sustain voltage Vs is avoided because the terminal N2 is clamped to the sustain voltage Vs via the diode D6 and the switch SW6 in the ringing control circuit R_CON. The pulse waveform has no ringing like the sustain pulse Y-SUS of the Y electrode inside.

On the other hand, in the periods t0, t2, and t4 when the sustain pulse Y-SUS falls, the switches SW2 and SW5 are turned on and the switches SW1 and SW4 are turned off. As a result, the output terminal N1 of the Y sustain drive circuit Y_SUS_DR is pulled down to the ground potential GND, and the sustain pulse of the Y electrode falls via the switch SW5 of the scan driver circuit SCAN_DR. Also at this time, the broken ringing phenomenon in which the voltage of the sustain pulse exceeds the ground potential GND is avoided because the terminal N2 is clamped to the ground potential via the diode 7 and the switch SW7 in the ringing control circuit R_CON.

The switches SW6 and SW7 of the ringing control circuit R_CON are both controlled to be off (non-conducting) in the reset driving period and the address driving period other than the sustain driving period. Therefore, there is no problem in applying the reset pulse and the scan pulse to the Y electrode. Further, the separation switch SW3 is also controlled to be in the off state during the reset driving period and the address driving period.

Ringing that occurs in the sustain pulse on the X electrode side is avoided to some extent by the clamping function of the diodes D11 and D12 provided in parallel with the switches SW11 and SW12 of the X side sustain drive circuit X_SUS_DR. That is, since there is nothing corresponding to the separation switch SW3 having a large inductance component on the X electrode side, the ringing phenomenon is avoided by the clamp diodes D11 and D12 in the sustain drive circuit.

As a result, since the sustain pulse applied to all the Y electrodes in the panel becomes a uniform pulse without ringing, luminance variation due to streaking due to a mixture of display lines where linking occurs and display lines where no ringing occurs. Can be reduced. In addition, the in-plane uniformity of luminance can be improved. Since the sustain pulse applied to the Y electrode becomes uniform, the operating voltage margin can be made uniform within the panel, and the yield can be increased.
[Modified example of embodiment]
In the above embodiment, during the sustain driving period, the switches SW6 and SW7 in the ringing control circuit R_CON are both turned on to suppress the ringing phenomenon of the sustain pulse.

On the other hand, in the modified example, the ringing phenomenon is actively used to control the light emission scale of the discharge cell. First, in the modified example, a conductive pattern for connection wiring having a long wiring length is formed on a circuit board or the like between the separation switch SW3 and all the scan driver circuits SCAN_DR connected to each Y electrode, and all the Y electrodes are formed. In contrast, an inductance component in the wiring is uniformly formed, and a ringing phenomenon occurs in the scan pulses of all Y electrodes.

When the display load factor is small, the switches SW6 and SW7 in the ringing control circuit are turned off to control the ringing phenomenon in the sustain pulse. As a result, the sustain pulse voltage between the X and Y electrodes becomes larger, the sustain discharge scale becomes larger, and higher luminance can be output. In the case of a light load, the current flowing through the display electrode is small due to the sustain discharge, and the sustain discharge can be stably generated even if ringing occurs.

Conversely, when the display load factor is large, the switches SW6 and SW7 in the ringing control circuit are turned on so that no ringing phenomenon occurs in the sustain pulse. In the case of a heavy load, the current flowing through the display electrode is large due to the sustain discharge, and the dispersion of the sustain pulse due to ringing becomes large, the uniformity of luminance within the panel is impaired, and the operating voltage margin varies. Therefore, it is preferable to avoid the occurrence of ringing by enabling the clamp function of the ringing control circuit when the load is large.

Claims

In a plasma display device that repeats a cell sustain discharge,
A display panel in which a plurality of display electrode pairs having first and second display electrodes are formed;
A sustain driving circuit for generating a sustain pulse;
A plurality of scan driver circuits each supplying a sustain pulse generated by the sustain driving circuit to the plurality of first display electrodes;
A separation switch provided between an output terminal of the sustain drive circuit and input terminals of a plurality of scan driver circuits;
A ringing control circuit that is provided at a first terminal between the separation switch and the scan driver circuit and clamps a ringing phenomenon that occurs in the sustain pulse;
The plasma display apparatus, wherein the ringing control circuit clamps the ringing phenomenon during a sustain driving period in which the sustain pulse is applied to the first display electrode.
In claim 1,
The sustain driving circuit alternately applies a first sustain voltage and a second sustain voltage lower than the first sustain voltage to the output terminal,
The ringing control circuit is provided between the first terminal and a first sustain voltage, and clamps the voltage of the sustain pulse to the first sustain voltage; and the first terminal And a second sustain circuit, and a second clamp circuit for clamping the sustain pulse voltage to the second sustain voltage.
In claim 2,
The first clamp circuit includes a first clamp switch and a first clamp diode connected in series, and the second clamp circuit includes a second clamp switch and a second clamp circuit connected in series. And a clamp diode.
In claim 1,
The plurality of scan driver circuits are arranged along one side of the display panel corresponding to the plurality of first display electrodes,
The plasma display device, wherein the ringing control circuit is provided at either or both ends of the side of the display panel.
In claim 1,
The sustain drive circuit is disposed at the center of the upper and lower ends of the display panel,
The plurality of scan driver circuits are arranged along any one of the left and right sides of the display panel corresponding to the plurality of first display electrodes,
The plasma display apparatus, wherein the ringing control circuit is provided at each of upper and lower ends of the side of the display panel.
In a plasma display device that repeats a cell sustain discharge,
A display panel in which a plurality of display electrode pairs having first and second display electrodes are formed;
A sustain driving circuit for generating a sustain pulse;
A plurality of scan driver circuits each supplying a sustain pulse generated by the sustain driving circuit to the plurality of first display electrodes;
A connection wiring having an inductance component provided between the output terminal of the sustain driving circuit and the input terminals of the plurality of scan driver circuits;
A ringing control circuit that is provided in a connection wiring between the sustain driving circuit and the scan driver circuit and clamps a ringing phenomenon that occurs in the sustain pulse;
The ringing control circuit does not perform the clamping operation at a first display load factor, and performs the clamping operation at a second display load factor higher than the first display load factor. Plasma display device.
In claim 6,
The sustain driving circuit alternately applies a first sustain voltage and a second sustain voltage lower than the first sustain voltage to the output terminal,
The ringing control circuit is provided between the first terminal and a first sustain voltage, and clamps the voltage of the sustain pulse to the first sustain voltage; and the first terminal And a second sustain circuit, and a second clamp circuit for clamping the sustain pulse voltage to the second sustain voltage.
In claim 7,
The first clamp circuit includes a first clamp switch and a first clamp diode connected in series, and the second clamp circuit includes a second clamp switch and a second clamp circuit connected in series. And a clamp diode.