US20030003757A1 - Method of etching tungsten or tungsten nitride in semiconductor structures - Google Patents

Method of etching tungsten or tungsten nitride in semiconductor structures Download PDF

Info

Publication number
US20030003757A1
US20030003757A1 US10/140,637 US14063702A US2003003757A1 US 20030003757 A1 US20030003757 A1 US 20030003757A1 US 14063702 A US14063702 A US 14063702A US 2003003757 A1 US2003003757 A1 US 2003003757A1
Authority
US
United States
Prior art keywords
plasma
tungsten
ranges
etching
plasma source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
US10/140,637
Other versions
US6579806B2 (en
Inventor
Padmapani Nallan
Hakeem Oluseyi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/614,396 external-priority patent/US6423644B1/en
Application filed by Individual filed Critical Individual
Priority to US10/140,637 priority Critical patent/US6579806B2/en
Publication of US20030003757A1 publication Critical patent/US20030003757A1/en
Application granted granted Critical
Publication of US6579806B2 publication Critical patent/US6579806B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F4/00Processes for removing metallic material from surfaces, not provided for in group C23F1/00 or C23F3/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28079Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28088Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects

Definitions

  • the present invention pertains to a method of etching tungsten or tungsten nitride electrode gates in semiconductor structures.
  • one etch chemistry is used during the majority of the etching process and a second etch chemistry is used toward the end of the etching process.
  • Semiconductor devices as a whole typically include self-aligned contact structures and gate electrodes which are fabricated from multiple film layers of differing compositions.
  • Tungsten nitride films have previously been used as barrier layers, and tungsten has been used as a conductor in various semiconductor device structures.
  • tungsten and tungsten nitride have been developing as gate materials, as a result of smaller device geometries.
  • the tungsten or tungsten nitride film (layer) is deposited over a thin (less than about 50 ⁇ thick) silicon oxide inorganic dielectric layer.
  • a thin (less than about 50 ⁇ thick) silicon oxide inorganic dielectric layer is desired to plasma dry etch through the tungsten or tungsten nitride layer and to stop etching at the surface of the silicon oxide layer. This makes it important that the etch selectivity for etching of tungsten or tungsten nitride (in preference over silicon oxide) be high.
  • the gate may be in the form of a thin line or pad, and the cross-sectional profile of the etched gate feature is preferably one where the sidewalls of the etched feature are essentially perpendicular to an underlying silicon oxide substrate layer, for example. This means the tungsten must be completely etched to the surface of the silicon oxide substrate layer (no residual “feet” at the bottom of the etched tungsten sidewall). Control of the etch process is critical in providing proper etched tungsten feature profile while avoiding etching away critical thickness of the underlying silicon oxide film substrate.
  • One reference describes a dry etching method wherein a multilayer film including one selected from tungsten, molybdenum, and a silicide thereof, is etched as the first layer.
  • a multilayer film including one selected from tungsten, molybdenum, and a silicide thereof is etched as the first layer.
  • Underlying the “first layer” is a second layer of polycrystalline silicon, which overlies a silicon oxide insulation film.
  • the etching step for the first layer uses a plasma etchant source gas made up of a first gas selected from fluorine, sulfur hexafluoride, and nitrogen trifluoride, or a mixture gas containing the first gas and a second gas selected from hydrogen chloride, hydrogen bromide, chlorine, bromine, and carbon tetrachloride.
  • Etching of the second layer of polycrystalline silicon is carried out using a plasma etchant source gas made up of the second gas and a third gas selected from an inert gas, nitrogen gas, oxygen gas, silicon tetrachloride gas, and carbon monoxide gas.
  • a plasma etchant source gas made up of the second gas and a third gas selected from an inert gas, nitrogen gas, oxygen gas, silicon tetrachloride gas, and carbon monoxide gas.
  • the amount of the third gas added to the second gas should preferably be in the range between 0 and 10 volume % of the total etching gas mixture.
  • Another reference discloses a method for fabricating a silicon-based MOS transistor having an inverse-T refractory metal gate structure.
  • the gate fabricated comprises a main CVD tungsten portion and a lower sputtered tungsten portion outwardly extending from the bottom of the CVD portion.
  • a Cl 2 /O 2 plasma etch is used to etch the CVD tungsten layer and a chemical etch (KH 2 PO 4 /KOH/K 3 Fe(CN) 6 ) is used to etch the sputtered tungsten portion.
  • the sputtered tungsten layer is said to act as a shield to protect the underlying gate oxide layer from ion damage throughout the fabrication process.
  • the sputtered tungsten is said to be more resistant to Cl 2 /O 2 reactive ion etch than is CVD tungsten.
  • a metal such as tungsten
  • RIE reactive ion etching
  • the present invention relates to a method of etching tungsten or tungsten nitride in semiconductor structures, and particularly to the etching of gate electrodes which require precise control over the etching process.
  • a method of etching tungsten or tungsten nitride which permits precise etch profile control while providing excellent selectivity in favor of etching tungsten (or tungsten nitride) rather than a thin underlying oxide layer.
  • the oxide is selected from silicon oxide, silicon oxynitride, tantalum pentoxide, zirconium oxide, and combinations thereof.
  • the method appears to be applicable to tungsten or tungsten nitride, whether deposited by physical vapor deposition (PVD) or chemical vapor deposition (CVD).
  • an initial etch chemistry used during the majority of the tungsten or tungsten nitride etching process (the main etch), employs the use of a plasma source gas where the chemically functional etchant species are typically generated from a combination of sulfur hexafluoride (SF 6 ) and nitrogen (N 2 ), or in the alternative, from a combination of nitrogen trifluoride (NF 3 ), chlorine (Cl 2 ), and carbon tetrafluoride (CF 4 ).
  • SF 6 sulfur hexafluoride
  • N 2 nitrogen
  • NF 3 nitrogen trifluoride
  • Cl 2 chlorine
  • This final portion of the etch process may be referred to as an “overetch” process, since etching is carried out to at least the surface underlying the tungsten or tungsten nitride.
  • this second etch chemistry may optionally be divided into two steps, where the plasma source gas oxygen content and plasma source power are increased in the second step.
  • the etched tungsten or tungsten nitride feature profile may be affected by the rapid tungsten etch rates obtained (about 1800 ⁇ per minute at the conditions which produce 175:1 tungsten:silicon oxide selectivity).
  • tungsten etching under conditions which provide a lower selectivity of about 30:1 tungsten:silicon oxide, for example, and a tungsten etch rate of about 1000 ⁇ per minute, and then change process conditions to those which provide a selectivity of 175:1 tungsten:silicon oxide and a tungsten etch rate of about 10-15 ⁇ per minute for a limited time at the end of the etch, to clean residue off the oxide flat surface surrounding the etched feature in general.
  • the underlying dielectric layer comprises tantalum pentoxide
  • the source gas composition and process conditions described above provide an almost infinite selectivity for etching tungsten relative to the underlying tantalum pentoxide layer.
  • This extraordinarily high tungsten:tantalum pentoxide etch selectivity allows a thinner tantalum pentoxide dielectric layer to be used (relative to a corresponding silicon oxide layer).
  • the tantalum pentoxide layer typically may have a thickness of less than about 100 ⁇ , preferably within the range of about 30 ⁇ to about 50 ⁇ .
  • the thinness of the oxide layer can be important in terms of increasing a semiconductor device speed.
  • tantalum pentoxide is more resistant to ion bombardment than silicon oxide; this permits a higher substrate bias power to be used during the tungsten overetch step when tantalum pentoxide is used as the underlying oxide layer.
  • the use of a higher bias power (from about 100 W up to about 300 W) during the overetch step provides improved profile control (i.e., a more vertical profile is obtained), while maintaining a high selectivity for etching tungsten relative to the underlying tantalum pentoxide.
  • a plasma source gas having a lower oxygen content can be used.
  • a tungsten etch rate of about 2000 ⁇ per minute can be achieved while maintaining a tungsten:tantalum pentoxide etch selectivity of about 75:1 or better.
  • one etch process includes using a plasma source gas having a volumetric percentage of O 2 of about 20%, with a plasma density within the range of about 4.0 ⁇ 10 10 e ⁇ /cm 3 to about 6.0 ⁇ 10 10 e ⁇ /cm 3 , a plasma source power within the range of about 400 W to about 600 W, a substrate bias power of about 175 W, and a process chamber pressure of about 4 mTorr, for example.
  • the final etch conditions may provide a selectivity of at least 175:1 tungsten: tantalum pentoxide, where the tungsten etch rate is less than about 1000 ⁇ per minute.
  • This etch selectivity and etch rate can be obtained by using a plasma source gas having a volumetric percentage of O 2 of about 20%, with a plasma density of about 2.0 ⁇ 10 10 e ⁇ /cm 3 , a plasma source power of about 200 W, a substrate bias power of about 175 W, and a process chamber pressure of about 6 mTorr, for example.
  • FIG. 1 shows a schematic of the plasma processing apparatus which was used to carry out the etching processes described herein.
  • FIGS. 2A and 2B show schematics of photomicrographs of etched tungsten when no overetch step is used, i.e., there is no change in the etch chemistry toward the end of the tungsten etching, and the etch is stopped in sufficient time to avoid etching an underlying silicon oxide substrate.
  • FIG. 3 shows a schematic of a photomicrograph of etched tungsten where there is a change in the etch chemistry toward the end of the tungsten etching, and etching is permitted to continue to the surface of the silicon oxide substrate.
  • FIG. 4 is a graph showing that an increase in oxygen content of a plasma source gas has a diminishing effect on the etch rate of a silicon oxide substrate, when all other process variables are held constant.
  • FIG. 5A is a graph showing the effect of increasing the plasma source power on the etch rate of tungsten; the etch rate of silicon oxide; and on the selectivity (in terms of an increase in etch rate of tungsten relative to the etch rate of silicon oxide) during an overetch step, when the oxygen concentration is about 20% by volume.
  • FIG. 5B is a three-dimensional graph showing tungsten etch rate in an overetch step, as a function of plasma source power and oxygen flow rate, all other variables held constant.
  • FIG. 5C is a three-dimensional graph showing silicon oxide etch rate in an overetch step, as a function of plasma source power and oxygen flow rate, all other variables held constant.
  • FIG. 5D is a three-dimensional graph showing selectivity (etch rate ratio of W:SiO x ) as a function of plasma source power and oxygen flow rate, all other variables held constant.
  • FIG. 6A shows a beginning semiconductor structure 600 for performing an embodiment of the method of the invention for etching tungsten, when the underlying dielectric layer is tantalum pentoxide.
  • the semiconductor structure 600 includes, from top to bottom, a patterned silicon nitride hard mask layer 612 , a patterned silicon oxynitride ARC layer 610 , a tungsten layer 608 , a tungsten nitride wetting layer 606 , and a tantalum pentoxide layer 604 , all deposited on a silicon substrate 602 .
  • the relative thicknesses of the film stack layers are not shown to scale.
  • FIG. 6B shows the semiconductor structure 600 after etching through a major portion of the tungsten 608 /tungsten nitride 606 during the main etch step.
  • FIG. 6C shows the semiconductor structure 600 after performance of the overetch step.
  • the entire thickness of the tungsten 608 /tungsten nitride 606 has been etched through, exposing the upper surface of the tantalum pentoxide layer 604 .
  • the present disclosure relates to a method of etching tungsten or tungsten nitride in semiconductor structures.
  • the method pertains to the etching of feature sizes of less than 0.5 ⁇ m, where control of etch selectivity of tungsten or tungsten nitride relative to a thin layer (typically less than about 50 ⁇ ) of an underlying oxide is of primary importance.
  • feature typically refers to metal lines, trenches and openings in a dielectric layer, as well as other structures which make up the topography of the substrate surface.
  • an initial etch chemistry used during the majority of the tungsten or tungsten nitride etching process, is typically one employing a plasma source gas comprising at least one halogen-based chemically functional etchant species.
  • the halogen is typically fluorine, chlorine, or combinations thereof.
  • a source gas comprising fluorine species is preferably used, because the fluorine is capable of removing oxides and other residues which may form on the surface of the tungsten if it is exposed to air during processing.
  • a breakthrough etch step employing a plasma generated from a fluorine-containing gas may be needed in order to remove the tungsten oxide from the substrate surface prior to etching of the tungsten layer.
  • Typical process conditions for the breakthrough etch are as follows: 50-200 sccm CF 4 ; 4-10 mTorr process chamber pressure; 300-1000 W source power; 40-200 W substrate bias power; and 50° C. substrate temperature.
  • fluorine-containing gases such as SF 6 or NF 3 , for example, can be used in place of, or in combination with, CF 4 .
  • a non-reactive diluent gas such as, for example, argon, may be used in combination with the fluorine-containing gas.
  • a typical duration for the breakthrough etch is approximately 10 seconds.
  • the tungsten main etch is preferably performed using a plasma source gas where the chemically functional etchant species are generated from sulfur hexafluoride (SF 6 ) and nitrogen (N 2 ), or from a combination of NF 3 , Cl 2 , and CF 4 . These etch chemistries provide a rapid tungsten etch rate with excellent etch profile characteristics, and do not require the performance of a breakthrough etch prior to the main tungsten etch.
  • the main etch is carried out using a source gas consisting of SF 6 and N 2 .
  • the volumetric flow rates for SF 6 typically range from about 30 sccm to about 100 sccm in a CENTURA® DPSTM processing chamber.
  • the volumetric flow rates for N 2 typically range from about 30 sccm to about 100 sccm as well.
  • the preferred volumetric ratio of SF 6 :N 2 generally ranges from about 20:50 to about 60:10.
  • the process chamber pressure ranges from about 2 mTorr to about 20 mTorr, and is preferably maintained at a pressure within a range of about 2 mTorr to about 10 mTorr.
  • the substrate temperature ranges from about 20° C. to about 100° C., with lower temperatures being preferred, since apparatus costs are lower and the possibility of damage to a gate oxide is reduced.
  • the applied plasma source power ranges from about 200 W to about 2000 W, and the applied substrate biasing power ranges from about 40 W to about 200 W.
  • plasma source power typically refers to the power that is responsible for sustaining the plasma by providing a major portion of the energy to ionize the neutral species in the chamber
  • substrate bias power typically refers to the power applied to the substrate to attract high energy plasma species toward the substrate.
  • a-second chemistry is used in which the chemically functional etchant species are generated from Cl 2 and O 2 .
  • the process during etch of the remaining portion of the tungsten may be referred to as an overetch process, since the etch is carried out to the surface of an underlying film surface and may etch for a limited distance into the underlying film surface.
  • this second etch chemistry may optionally be divided into two steps, where the oxygen content and plasma source power are increased during the second step.
  • the volumetric percentage of the O 2 in a Cl 2 /O 2 source gas mixture is controlled to range from greater than 20% up to about 45%.
  • the volumetric percentage of O 2 in a Cl 2 /O 2 source gas mixture ranges from about 35% to about 45%.
  • the plasma density in the etch process chamber must be sufficiently high.
  • a plasma density of at least about 8 ⁇ 10 10 e ⁇ /cm 3 (a plasma source power of about 800 W in a CENTURA® DPSTM processing chamber available from Applied Materials, Inc., of Santa Clara, Calif.) is required to obtain benefit from increasing the volumetric percentage of oxygen above 20%.
  • the term “decoupled plasma source” or “DPS” as used herein refers to a plasma etch apparatus with separate controls for the inductively coupled RF source power used to generate and maintain a plasma and the bias power applied to a semiconductor substrate to direct high energy species toward the substrate).
  • a first overetch step may be carried out in which the plasma source gas composition is a combination of Cl 2 and O 2 , where the volumetric content of O 2 ranges from greater than 20% to about 35%.
  • the plasma density typically ranges from about 8.0 ⁇ 10 10 e ⁇ /cm 3 (800 W applied source power and a process chamber pressure of 4-6 mTorr) to about 1.6 ⁇ 10 11 e ⁇ /cm 3 (1600 W applied source power and a process chamber pressure of 4-6 mTorr).
  • the process chamber pressure may range from about 2 mTorr to about 10 mTorr, and preferably between about 2 mTorr and 6 mTorr.
  • the substrate temperature ranges from about 20° C. to about 1001° C.
  • the applied substrate biasing power ranges from about 40 W to about 200 W. Using conditions within these ranges, adjusted for apparatus variables, a “foot” which forms at the bottom of the fine line can be removed, while maintaining the line profile at the vertical 88° to 90° profile.
  • a second overetch or finishing step is carried out, to clean etch residue from the surface of an underlying thin oxide film, without significant etching into the film (less than 10% of the thin oxide film thickness is etched).
  • the selectivity in favor of etching tungsten or tungsten nitride relative to an underlying oxide film is critical. It is desired to remove tungsten or tungsten nitride residue from the flat surface of the thin oxide layer surrounding the etched feature without etching through the thin oxide layer.
  • the chemical etchants in the plasma source gas are Cl 2 and O 2 , where the volumetric percentage of O 2 in the mixture typically ranges from about 36% to about 41%.
  • the plasma density typically ranges from about 1.6 ⁇ 10 11 e ⁇ /cm 3 to about 2.0 ⁇ 10 11 e ⁇ /cm 3 , with the other process conditions being the same as those specified above for the first overetch step.
  • a tungsten etch rate under these process conditions is about 1750 ⁇ per minute, while the selectivity (W:SiO x ) is about 175:1.
  • Increased plasma source gas O 2 content and increased plasma densities are expected to be useful as well.
  • the selectivity of 175:1 obtained using the process conditions just described may be compared with the selectivity obtained using other process conditions which, at first glance, do not appear to be significantly different, but which provide surprisingly different results.
  • a change in the O 2 flow rate to provide a volumetric concentration of of 36%, in combination with a plasma density of 1.6 ⁇ 10 11 e ⁇ /cm 3 (1600 W) provides a W:SiO x selectivity of about 75:1; and a volumetric concentration of O 2 of 20%, in combination with a plasma density of 1.5 ⁇ 10 11 e ⁇ /cm 3 (1500 W), provides a W:SiO x selectivity of about 28:1.
  • the oxide layer underlying the tungsten or tungsten nitride layer may alternatively comprise tantalum pentoxide, zirconium oxide, or silicon oxynitride, instead of silicon oxide.
  • a higher substrate bias power can be employed during the tungsten overetch step.
  • the use of a higher bias power (about 100 W up to about 300 W) during the overetch step provides improved profile control (i.e., a more vertical profile is obtained), while maintaining a high selectivity (at least 75:1) for etching tungsten relative to the underlying tantalum pentoxide.
  • a plasma source gas having a volumetric percentage of O 2 within the range of about 20% to about 50% is employed, with a plasma density within the range of about 2.0 ⁇ 10 10 e ⁇ /cm 3 to about 1.8 ⁇ 10 11 e ⁇ /cm 3 .
  • this can be achieved using a plasma source power within the range of about 200 W to about 1800 W, a substrate bias power within the range of about 100 W to about 200 W, and a process chamber pressure within the range of about 2 mTorr to about 10 mTorr.
  • Tungsten etch rates of greater than 1000 ⁇ per minute are typically obtained using this process regime to etch tungsten over an underlying tantalum pentoxide layer.
  • a semiconductor includes a variety of different materials which are known to have the behavioral characteristics of a semiconductor.
  • etch processes described herein were carried out in a CENTURA® Integrated Processing System, available from Applied Materials, Inc., of Santa Clara, Calif.
  • a CENTURA® Integrated Processing System available from Applied Materials, Inc., of Santa Clara, Calif.
  • the etch process chamber used in the EXAMPLES presented herein is shown in schematic in FIG. 1, any of the etch processors available in the industry should be able to take advantage of the etch chemistry described herein, with some adjustment to other process parameters.
  • the equipment shown in schematic in FIG. 1 includes a Decoupled Plasma Source (DPS) of the kind described by Yan Ye et al. at the Proceedings of the Eleventh International Symposium of Plasma Processing, May 7, 1996, and as published in the Electrochemical Society Proceedings, Volume 96-12, pp. 222-233 (1996).
  • the plasma processing chamber enables the processing of an 8 inch (200 mm) diameter wafer.
  • FIG. 1 shows a schematic of a side view of an individual CENTURA® DPSTM polysilicon etch chamber 100 .
  • the etch chamber 100 consists of an upper chamber 104 having a ceramic dome 106 , and a lower chamber 108 .
  • the lower chamber 108 includes a monopolar electrostatic chuck (ESC) cathode 110 .
  • Gas is introduced into the chamber via gas injection nozzles 114 for uniform gas distribution.
  • Chamber pressure is controlled by a closed-loop pressure control system (not shown) using a throttle valve 118 .
  • a substrate 120 is introduced into the lower chamber 108 through inlet 122 .
  • the substrate 120 is held in place by means of a static charge generated on the surface of electrostatic chuck (ESC) cathode 110 by applying a DC voltage to a conductive layer (not shown) located under a dielectric film (not shown) on the chuck surface.
  • the cathode 110 and substrate 120 are then raised by means of a wafer lift 124 and sealed against the upper chamber 104 in position for processing.
  • Etch gases are introduced into the upper chamber 104 via gas injection nozzles 114 .
  • the etch chamber 100 uses an inductively coupled plasma source power 126 and matching network 128 operating at 12.56 MHz for generating and sustaining a medium to high density plasma.
  • the wafer is biased with an RF source 130 and matching network 132 operating at 13.56 MHz.
  • Plasma source power 126 and substrate biasing means 130 are controlled by separate controllers (not shown).
  • FIG. 2A shows a cross-sectional side view schematic of an etched tungsten structure 200 , where the etched pattern is lines 203 and spaces 205 .
  • the line width is approximately 0.165 ⁇ m
  • the space width is approximately 0.21 ⁇ m.
  • the structure includes a thin ( ⁇ 45 A) silicon oxide layer 213 on a silicon substrate 202 , overlying silicon oxide layer 213 is a 1650 ⁇ thick layer of tungsten 204 , a 400 ⁇ thick image-focusing antireflective coating (ARC) layer 206 , and the residue 208 of a photoresist layer which was used to pattern the etched structure 200 .
  • ARC image-focusing antireflective coating
  • the tungsten layer 204 includes a thin ( ⁇ 100 ⁇ ) wetting layer of tungsten nitride (not shown) which aids in adhesion of the tungsten to the silicon oxide layer 213 .
  • the tungsten nitride is etched during the same etch process as the tungsten. Therefore, as used herein, the term “tungsten layer” refers to a layer of tungsten, optionally in combination with a thin underlying layer of tungsten nitride.
  • FIG. 2B shows a more three-dimensional view of the same etched structure 200 , showing the surface finish 222 of the etched tungsten in the bottom of a trench (space 205 ), and the smoother upper surface 224 of the overlying photoresist layer residue 208 .
  • Both Figures show a remaining unetched tungsten thickness 214 overlying upper surface 210 of silicon oxide layer 213 .
  • the unetched tungsten thickness 214 is about 0.023 ⁇ m.
  • the tungsten 204 etch was carried out using only a single etch chemistry, in which the etchant species in the plasma were SF 6 at 30 sccm and N 2 at 50 sccm. (There was no second etch chemistry used to etch the final portion of the tungsten layer 204 to the surface 210 of oxide layer 213 , i.e., there was no overetch carried out.)
  • Other etch process conditions were as follows: The etch process chamber pressure was about 4 mTorr; the substrate temperature was about 50° C.; the plasma source power was about 500 W; the substrate bias power was about 80 W.
  • the etch profile obtained was good, with the sidewall angle of the etched lines 203 from silicon oxide layer 213 surface 210 being about 89°; however, there was some tapering of the profile at the base of the line, since the tungsten was not etched all the way to the surface 210 of silicon oxide layer 203 .
  • the tungsten etch rate was about 1500 ⁇ per minute.
  • a “vertical profile” is one where the side walls of the lines are perpendicular to the surface of the silicon oxide substrate.
  • An “undercut” profile is one where the width of the line is more narrow at the base of the line than at the top surface of the line.
  • a vertical profile is typically preferred, because it enables closer placement of device structures on a given surface area.
  • the etched tungsten surface 222 at the bottom of spaces 205 exhibited a rougher finish than the line 203 upper photoresist residue 208 surface 224 .
  • FIG. 3 shows a schematic of a photomicrograph of etched tungsten 300 where there is a change in the etch chemistry toward the end of the tungsten 304 etching, and etching is permitted to continue to the surface 310 of the thin silicon oxide layer 313 .
  • the etched tungsten structure was a pattern of lines 303 and spaces 305 .
  • the line width is approximately 0.120 ⁇ m, and the space width is approximately 0.165 ⁇ m.
  • the structure included a thin ( ⁇ 45 ⁇ ) silicon oxide layer 313 on a silicon substrate 302 , a 1650 ⁇ thick overlying layer of tungsten 304 (i.e., tungsten/tungsten nitride, as described above with reference to FIG. 2), a 400 ⁇ thick image-focusing antireflective coating (ARC) layer 306 , and a photoresist layer residue 308 .
  • ARC image-focusing antireflective coating
  • the tungsten 304 etch was carried out using two etch chemistries. During the first portion of the etching, the chemically reactive etchant species in the plasma were SF 6 at sccm and N 2 at 50 sccm (i.e., 37.5 volume % SF 6 , 62.5 volume % N 2 ). Other etch process conditions were as follows: The etch process chamber pressure was about 4 mTorr; the substrate temperature was about 50° C.; the plasma source power was 500 W; the substrate bias power was about 80 W. The etch profile obtained was good, with the sidewall angle of the etched lines 303 from silicon oxide substrate 302 surface 310 being about 89°. The tungsten etch rate was about 1650 ⁇ per minute. Approximately 1500 ⁇ of the initial 1650 ⁇ thickness of the tungsten layer 304 was etched using this first etch chemistry.
  • Etching of the remaining 150 ⁇ of tungsten layer 304 was carried out using a plasma in which the chemically reactive etchant species were produced from a source gas of Cl 2 at a flow rate of about 70 sccm and O 2 at a flow rate of about 40 sccm.
  • Other etch process conditions were as follows: The etch process chamber pressure was about 6 mTorr; the substrate temperature was about 50° C.; the plasma source power was 600 W; the substrate bias power was about 80 W.
  • the etch profile obtained was excellent, with the sidewall angle of the etched lines 303 from silicon oxide substrate 302 surface 310 being about 89° to 90°.
  • the tungsten etch rate was about 1500 ⁇ per minute.
  • the etching was allowed to continue until the upper surface of the silicon oxide substrate 310 was slightly etched. It was determined that the silicon oxide etch rate was about 19 ⁇ per minute. The etch rate selectivity of tungsten:silicon oxide was about 79:1. Tungsten residue was cleared off the space 305 open areas, but there was a slight tungsten “foot” (not shown) at the bottom of tungsten lines 303 in the areas where the spacing between lines was less than that shown in FIG. 3 (in the more dense areas). Subsequent experimentation demonstrated that adjustment of the O 2 flow rate to 45 sccm, the plasma source power to 1800 W, and the process chamber pressure to 3 mTorr results in removal of the “foot”.
  • FIG. 4 is a graph 400 showing the etch rate (shown on axis 404 ) of silicon oxide as a function of the plasma source gas oxygen flow rate (shown on axis 402 ).
  • the data shown in graph 400 were obtained by etching a layer of silicon oxide only, which was deposited on a silicon wafer.
  • the total flow of Cl 2 and O 2 used was 110 sccm, and the volume % of oxygen in the plasma source gas may be calculated by dividing the sccm shown on axis 402 by the total gas flow 100 sccm and multiplying by 100.
  • the other etch process conditions used during the silicon oxide etching were as follows: The etch process chamber pressure was about 6 mTorr; the substrate temperature was about 50° C.; the plasma source power was about 1600 W; the substrate bias power was about 80 W.
  • Graph 400 indicates that there is a diminishing effect obtained by increasing the O 2 flow rate, with the etch rate leveling out at about 19 ⁇ per minute between about 35 sccm and 40 sccm of O 2 .
  • plasma density plasma source power
  • FIG. 5A is a graph 500 showing the effect of increasing the plasma source power (shown in Watts on axis 502 ), on the etch rate of tungsten (W) (shown by curve 508 ) and on the etch rate of SiO x (shown by curve 510 ), at a constant O 2 flow rate of about 20 sccm.
  • the etch rate units in each case are shown on axis 504 .
  • Graph 500 also shows the selectivity for W:SiO x as a function of the plasma source power, illustrated by curve 512 , at the constant flow rate of 20 sccm. The nominal selectivity is shown on axis 506 .
  • an increase in plasma source power results in an increase in tungsten etch rate, a decrease in SiO x etch rate, and an increase in selectivity.
  • the selectivity of W:SiO x is only about 40:1.
  • the process chamber pressure was about 6 mTorr, and the substrate temperature was about 50° C.
  • FIG. 5B is a three-dimensional graph 530 showing tungsten etch rate in an overetch step, as a function of plasma source power and oxygen flow rate, all other variables held constant.
  • the wafer etched was a sputtered tungsten layer overlying a silicon wafer.
  • the process chamber pressure was 6 mTorr, and the substrate temperature was about 50° C.
  • the tungsten etch rate units (A/min.) are shown on axis 534
  • the plasma source power units (W) are shown on axis 532
  • the O 2 flow rate units (sccm) are shown on axis 536 .
  • Curve 538 clearly shows that an increase in O 2 flow rate alone from about 30 sccm to about sccm, with plasma source power held constant at about 1,600 W, increased the tungsten etch rate from about 1170 ⁇ /min. to about 1500 ⁇ /min.
  • FIG. 5C is a three-dimensional graph 540 showing silicon oxide etch rate in an overetch step, as a function of plasma source power and oxygen flow rate, all other variables held constant.
  • the wafer etched was a silicon substrate having a layer of thermal silicon oxide on its surface.
  • the process chamber pressure was 6 mTorr, and the substrate temperature was about 50° C.
  • the silicon oxide etch rate units ( ⁇ /min.) are shown on axis 544
  • the plasma source power units (W) are shown on axis 542
  • the O 2 flow rate units (sccm) are shown on axis 546 .
  • Curve 538 shows that an increase in O 2 flow rate alone from about 20 sccm to about 40 sccm, with plasma source power held constant at about 1600 W, decreased the silicon oxide etch rate from about 37 ⁇ /min. to about 19 ⁇ /min.
  • FIG. 5D is a three-dimensional graph 550 showing selectivity (etch rate ratio of W:SiO x ) as a function of plasma source power and oxygen flow rate, all other variables held constant.
  • FIG. 5D is derived from FIGS. 5B and 5C, and makes apparent the striking increase in selectivity which can be achieved by increasing both the oxygen flow rate and the plasma source power simultaneously.
  • the selectivity (W:SiO x ) nominal units are shown on axis 554
  • the plasma source power units (W) are shown on axis 552
  • the O 2 flow rate units (sccm) are shown on axis 556 .
  • Curve 558 shows that an increase in O 2 flow rate alone from about 30 sccm to about 40 sccm, with plasma source power held constant at about 1600 W, increased the selectivity from about 50:1 to about 80:1.
  • a selectivity of about 100:1 is obtained when the O 2 content is about 40%, and the plasma source power is about 1670 W.
  • a selectivity of about 175:1 is obtained when the O 2 content is about 45% and the plasma source power is about 1800 W.
  • An increase in the selectivity to 175:1 was unexpected in view of the much smaller increase in selectivity obtained when only the oxygen flow rate was increased.
  • FIG. 5D showed that when the oxygen flow rate was held constant at about 20 sccm, and the plasma source power was increased from about 800 W up to about 1600 W, the selectivity of W:SiO x increased from about 19:1 to about 40:1. Further, as illustrated in FIG. 5D, an increase in oxygen flow rate from about 30 sccm to about 40 sccm, with the plasma source power held constant at 1600 W, provided a selectivity increase from about 50:1 to about 80:1. It was only with the synergistic combination of increased oxygen flow rate and increased plasma source power that a selectivity of 175:1 was achieved.
  • Table I below, provides a summary of various process conditions and the tungsten (or tungsten nitride) etch rate which is expected to be obtained at those process conditions. Table I also shows the selectivity relative to silicon oxide which is expected to be obtained, and the etched sidewall profile angle which is expected to be obtained.
  • TABLE I Typical Process Conditions During Final Portion Etching (Overetch) of Tungsten or Tungsten Nitride, With Underlying Silicon Oxide Layer Process Condition Process Condition Process Condition and Broad Range Preferred Range Result and Results and Results Total Gas Flow 50-200 75-125 (sccm) O 2 Flow Rate >20-60 30-50 (sccm) Vol. % O 2 in mixt.
  • the dielectric layer underlying the tungsten or tungsten nitride layer may alternatively comprise tantalum pentoxide, zirconium oxide, or silicon oxynitride, instead of silicon oxide.
  • FIG. 6 illustrates an embodiment of the method of the invention for etching tungsten, when the underlying dielectric layer is tantalum pentoxide.
  • FIG. 6A shows a beginning semiconductor structure 600 prior to performance of the method of the invention.
  • the structure 600 includes a thin (50 ⁇ ) tantalum pentoxide layer 604 on a silicon substrate 602 , overlying tantalum pentoxide layer 604 is a 300 ⁇ thick wetting layer of tungsten nitride 606 , a 700 ⁇ thick layer of tungsten 608 , a 300 ⁇ thick image-focusing antireflective coating (ARC) layer 610 (in this case, silicon oxynitride), and a 1500 ⁇ thick silicon nitride hard mask layer 612 , which is used to pattern etch the structure 600 .
  • the silicon nitride hard mask layer 612 and silicon oxynitride ARC layer 610 have been previously patterned using techniques known in the art.
  • Etching of the tungsten 608 /tungsten nitride 606 was carried out using two etch chemistries.
  • the chemically reactive etchant species in the plasma were SF 6 at 20 sccm and N 2 at 45 sccm (i.e., 31 volume % SF 6 , 69 volume % N 2 ).
  • Other etch process conditions were as follows: The etch process chamber pressure was about 4 mTorr; the substrate temperature was about 50° C.; the plasma source power was 200 W; the substrate bias power was about 175 W.
  • the tungsten/tungsten nitride etch rate was about 2000 ⁇ per minute. As shown in FIG.
  • Etching of the remaining tungsten 608 /tungsten nitride 606 was carried out using a plasma in which the chemically reactive etchant species were produced from a source gas of Cl 2 at a flow rate of about 72 sccm and O 2 at a flow rate of about 18 sccm.
  • Other etch process conditions were as follows: The etch process chamber pressure was about 4 mTorr; the substrate temperature was about 50° C.; the plasma source power was 400 W; the substrate bias power was about 175 W.
  • the tungsten/tungsten nitride etch rate was about 1871 per minute.
  • the etching was allowed to continue until the upper surface of the tantalum pentoxide layer 604 was slightly etched, as shown in FIG. 6C. It was determined that the tantalum pentoxide etch rate was about 20 ⁇ per minute.
  • the etch rate selectivity of tungsten tantalum pentoxide was about 94:1.
  • the etch profile obtained was about
  • the underlying oxide layer comprises tantalum pentoxide
  • the tantalum pentoxide is resistant to ion bombardment which occurs during anisotropic etching, we can achieve an almost infinite selectivity for etching tungsten relative to an underlying tantalum pentoxide layer.
  • This extraordinarily high tungsten:tantalum pentoxide etch selectivity allows a thinner tantalum pentoxide layer to be used (relative to a corresponding silicon oxide layer).
  • the tantalum pentoxide layer typically has thickness of less than about 100 ⁇ , preferably within the range of about 30 ⁇ to about 50 ⁇ . The thinness of the oxide layer can be important in terms of increasing a semiconductor device speed.
  • tantalum pentoxide is more resistant to ion bombardment than silicon oxide permits a higher substrate bias power to be used during the tungsten overetch step over an underlying tantalum pentoxide layer.
  • the use of a high bias power (from about 100 W up to about 300 W) during the overetch step provides improved profile control (i.e., a more vertical profile is obtained), while maintaining a high selectivity for etching tungsten relative to the underlying tantalum pentoxide.
  • a plasma source gas having a lower oxygen content can be used.
  • a tungsten etch rate of about 2000 ⁇ per minute can be achieved while maintaining a tungsten:tantalum pentoxide etch selectivity of about 75:1 or better using a plasma source gas having a volumetric percentage of O 2 of about 20%, with a plasma density within the range of about 4.0 ⁇ 10 10 e ⁇ /cm 3 to about 6.0 ⁇ 10 10 e ⁇ /cm 3 , which may be achieved in the exemplary DPS chamber using a plasma source power within the range of about 400 W to about 600 W, a substrate bias power of about 175 W, and a process chamber pressure within the range of about 4 mTorr.
  • the final etch conditions may provide a selectivity of at least 175:1 tungsten:tantalum pentoxide, where the tungsten etch rate is less than about 1000 ⁇ per minute.
  • This etch selectivity and etch rate can be obtained by using a plasma source gas having a volumetric percentage of O 2 of about 20%, with a plasma density of about 2.0 ⁇ 10 10 e ⁇ /cm 3 , which can be achieved in the exemplary DPS chamber using a plasma source power of about 200 W, a substrate bias power of about 175 W, and a process chamber pressure of about 6 mTorr.
  • Table III below, provides a summary of various process conditions and the tungsten (or tungsten nitride) overetch rate which is expected to be obtained at those process conditions. Table III also shows the selectivity for etching tungsten/tungsten nitride relative to tantalum pentoxide which is expected to be obtained, and the etched sidewall profile angle which is expected to be obtained.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Plasma & Fusion (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The present invention relates to a method of etching tungsten or tungsten nitride in semiconductor structures, and particularly to the etching of gate electrodes which require precise control over the etching process. We have discovered a method of etching tungsten or tungsten nitride which permits precise etch profile control while providing excellent selectivity, of at least 175:1, for example, in favor of etching tungsten or tungsten nitride rather than an adjacent oxide layer. Typically, the oxide is selected from silicon oxide, silicon oxynitride, tantalum pentoxide, zirconium oxide, and combinations thereof. The method appears to be applicable to tungsten or tungsten nitride, whether deposited by physical vapor deposition (PVD) or chemical vapor deposition (CVD). In particular, an initial etch chemistry, used during the majority of the tungsten or tungsten nitride etching process (the main etch), employs the use of a plasma source gas where the chemically functional etchant species are generated from a combination of sulfur hexafluoride (SF6) and nitrogen (N2), or in the alternative, from a combination of nitrogen trifluoride (NF3), chlorine (Cl2), and carbon tetrafluoride (CF4). Toward the end of the main etching process, a second chemistry is used in which the chemically functional etchant species are generated from Cl2 and O2. This final portion of the etch process may be referred to as an “overetch” process, since etching is carried out to at least the surface underlying the tungsten or tungsten nitride. However, this second etch chemistry may optionally be divided into two steps, where the plasma source gas oxygen content and plasma source power are increased in the second step.

Description

    RELATED APPLICATIONS
  • This application is a continuation-in-part of U.S. application Ser. No. 09/614,396, filed Jul. 12, 2000.[0001]
  • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0002]
  • The present invention pertains to a method of etching tungsten or tungsten nitride electrode gates in semiconductor structures. In particular, one etch chemistry is used during the majority of the etching process and a second etch chemistry is used toward the end of the etching process. [0003]
  • 2. Brief Description of the Background Art [0004]
  • Semiconductor devices as a whole typically include self-aligned contact structures and gate electrodes which are fabricated from multiple film layers of differing compositions. Tungsten nitride films have previously been used as barrier layers, and tungsten has been used as a conductor in various semiconductor device structures. Recently, both tungsten and tungsten nitride have been developing as gate materials, as a result of smaller device geometries. [0005]
  • In many instances, the tungsten or tungsten nitride film (layer) is deposited over a thin (less than about 50 Å thick) silicon oxide inorganic dielectric layer. During patterned etching of the multiple film layer structure, it is desired to plasma dry etch through the tungsten or tungsten nitride layer and to stop etching at the surface of the silicon oxide layer. This makes it important that the etch selectivity for etching of tungsten or tungsten nitride (in preference over silicon oxide) be high. (The term “selectivity” is typically used to refer to a ratio of etch rates of two materials.) Further, as the device geometries become smaller, etching of layers of material must be more precise, providing a profile which permits placement of more devices over a given surface area. In the case of a tungsten gate, for example, the gate may be in the form of a thin line or pad, and the cross-sectional profile of the etched gate feature is preferably one where the sidewalls of the etched feature are essentially perpendicular to an underlying silicon oxide substrate layer, for example. This means the tungsten must be completely etched to the surface of the silicon oxide substrate layer (no residual “feet” at the bottom of the etched tungsten sidewall). Control of the etch process is critical in providing proper etched tungsten feature profile while avoiding etching away critical thickness of the underlying silicon oxide film substrate. [0006]
  • One reference describes a dry etching method wherein a multilayer film including one selected from tungsten, molybdenum, and a silicide thereof, is etched as the first layer. Underlying the “first layer” is a second layer of polycrystalline silicon, which overlies a silicon oxide insulation film. The etching step for the first layer uses a plasma etchant source gas made up of a first gas selected from fluorine, sulfur hexafluoride, and nitrogen trifluoride, or a mixture gas containing the first gas and a second gas selected from hydrogen chloride, hydrogen bromide, chlorine, bromine, and carbon tetrachloride. Etching of the second layer of polycrystalline silicon is carried out using a plasma etchant source gas made up of the second gas and a third gas selected from an inert gas, nitrogen gas, oxygen gas, silicon tetrachloride gas, and carbon monoxide gas. In the second etch step, the amount of the third gas added to the second gas should preferably be in the range between 0 and 10 volume % of the total etching gas mixture. [0007]
  • Another reference discloses a method for fabricating a silicon-based MOS transistor having an inverse-T refractory metal gate structure. The gate fabricated comprises a main CVD tungsten portion and a lower sputtered tungsten portion outwardly extending from the bottom of the CVD portion. A Cl[0008] 2/O2 plasma etch is used to etch the CVD tungsten layer and a chemical etch (KH2PO4/KOH/K3Fe(CN)6) is used to etch the sputtered tungsten portion. The sputtered tungsten layer is said to act as a shield to protect the underlying gate oxide layer from ion damage throughout the fabrication process. In particular, the sputtered tungsten is said to be more resistant to Cl2/O2 reactive ion etch than is CVD tungsten.
  • Another reference describes a method of fabricating sidewall spacers for a self-aligned contact hole. A metal, such as tungsten, is RIE etched using a conventional etchback procedure, without the use of a photoresist masking, using a Cl[0009] 2—SF6—BCl3—Ar etchant gas mixture for plasma generation.
  • For further background information, the reader is directed to U.S. Pat. No. 5,295,923, to Hori et al.; U.S. Pat. No. 5,599,725, to Dorleans et al.; and U.S. Pat. No. 6,033,962, to Jeng et al. [0010]
  • SUMMARY OF THE INVENTION
  • The present invention relates to a method of etching tungsten or tungsten nitride in semiconductor structures, and particularly to the etching of gate electrodes which require precise control over the etching process. We have discovered a method of etching tungsten or tungsten nitride which permits precise etch profile control while providing excellent selectivity in favor of etching tungsten (or tungsten nitride) rather than a thin underlying oxide layer. Typically, the oxide is selected from silicon oxide, silicon oxynitride, tantalum pentoxide, zirconium oxide, and combinations thereof. The method appears to be applicable to tungsten or tungsten nitride, whether deposited by physical vapor deposition (PVD) or chemical vapor deposition (CVD). [0011]
  • In particular, an initial etch chemistry, used during the majority of the tungsten or tungsten nitride etching process (the main etch), employs the use of a plasma source gas where the chemically functional etchant species are typically generated from a combination of sulfur hexafluoride (SF[0012] 6) and nitrogen (N2), or in the alternative, from a combination of nitrogen trifluoride (NF3), chlorine (Cl2), and carbon tetrafluoride (CF4). Toward the end of the main etching process, a second chemistry is used in which the chemically functional etchant species are generated from Cl2 and O2. This final portion of the etch process may be referred to as an “overetch” process, since etching is carried out to at least the surface underlying the tungsten or tungsten nitride. However, this second etch chemistry may optionally be divided into two steps, where the plasma source gas oxygen content and plasma source power are increased in the second step.
  • We have discovered that an unexpectedly high etch selectivity for tungsten in preference over an underlying oxide layer (in the range of 175:1, for tungsten:silicon oxide, for example) may be obtained when a sufficiently high concentration of O[0013] 2 is used in combination with a sufficiently high plasma density. In particular, when the O2 concentration is greater than about 20% by volume in the plasma source gas, further increases in O2 content have a limited effect at plasma densities below about 8×1010e/cm3, because there is insufficient power input to energize the active oxygen species. To obtain selectivity in favor of etching tungsten or tungsten nitride relative to an underlying oxide layer, it is necessary to increase both the oxygen content of the plasma source gas and the source power applied to create and maintain the plasma. For example, at a plasma density of about 1.6×1011e/cm3, and a substrate bias voltage of about −90 V (about 90 W applied bias), an increase in plasma source gas oxygen content from about 30 volume percent to about 40 volume percent produces an increase in selectivity for etching tungsten relative to silicon oxide from about 40:1 to about 75:1. However, at 40 volume percent O2, if the plasma density is increased to about 1.8×1011 e/cm3, the selectivity for etching tungsten relative to silicon oxide unexpectedly increases from about 75:1 to about 160:1.
  • Although carrying out the “overetch” step at the conditions which produce the highest selectivity protects the underlying oxide layer, the etched tungsten or tungsten nitride feature profile may be affected by the rapid tungsten etch rates obtained (about 1800 Å per minute at the conditions which produce 175:1 tungsten:silicon oxide selectivity). To enable maintenance of feature profile while removing residual tungsten “feet” at the base of a feature, it may be advantageous to etch under conditions which provide a lower selectivity, of about 30:1 tungsten:silicon oxide, for example, and a tungsten etch rate of about 1000 Å per minute, and then change process conditions to those which provide a selectivity of 175:1 tungsten:silicon oxide and a tungsten etch rate of about 10-15 Å per minute for a limited time at the end of the etch, to clean residue off the oxide flat surface surrounding the etched feature in general. [0014]
  • When the underlying dielectric layer comprises tantalum pentoxide, we have discovered that the source gas composition and process conditions described above provide an almost infinite selectivity for etching tungsten relative to the underlying tantalum pentoxide layer. This extraordinarily high tungsten:tantalum pentoxide etch selectivity allows a thinner tantalum pentoxide dielectric layer to be used (relative to a corresponding silicon oxide layer). The tantalum pentoxide layer typically may have a thickness of less than about 100 Å, preferably within the range of about 30 Å to about 50 Å. The thinness of the oxide layer can be important in terms of increasing a semiconductor device speed. [0015]
  • We have discovered that tantalum pentoxide is more resistant to ion bombardment than silicon oxide; this permits a higher substrate bias power to be used during the tungsten overetch step when tantalum pentoxide is used as the underlying oxide layer. The use of a higher bias power (from about 100 W up to about 300 W) during the overetch step provides improved profile control (i.e., a more vertical profile is obtained), while maintaining a high selectivity for etching tungsten relative to the underlying tantalum pentoxide. When a higher bias power is employed, a plasma source gas having a lower oxygen content can be used. [0016]
  • When the underlying oxide layer comprises tantalum pentoxide, a tungsten etch rate of about 2000 Å per minute can be achieved while maintaining a tungsten:tantalum pentoxide etch selectivity of about 75:1 or better. In particular, one etch process includes using a plasma source gas having a volumetric percentage of O[0017] 2 of about 20%, with a plasma density within the range of about 4.0×1010 e/cm3 to about 6.0×1010 e/cm3, a plasma source power within the range of about 400 W to about 600 W, a substrate bias power of about 175 W, and a process chamber pressure of about 4 mTorr, for example. To enable maintenance of feature profile while removing residual tungsten “feet” at the base of a feature, it may be advantageous to adjust the etch conditions toward the end of the etch. For example, the final etch conditions may provide a selectivity of at least 175:1 tungsten: tantalum pentoxide, where the tungsten etch rate is less than about 1000 Å per minute. This etch selectivity and etch rate can be obtained by using a plasma source gas having a volumetric percentage of O2 of about 20%, with a plasma density of about 2.0×1010 e/cm3, a plasma source power of about 200 W, a substrate bias power of about 175 W, and a process chamber pressure of about 6 mTorr, for example.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 shows a schematic of the plasma processing apparatus which was used to carry out the etching processes described herein. [0018]
  • FIGS. 2A and 2B show schematics of photomicrographs of etched tungsten when no overetch step is used, i.e., there is no change in the etch chemistry toward the end of the tungsten etching, and the etch is stopped in sufficient time to avoid etching an underlying silicon oxide substrate. [0019]
  • FIG. 3 shows a schematic of a photomicrograph of etched tungsten where there is a change in the etch chemistry toward the end of the tungsten etching, and etching is permitted to continue to the surface of the silicon oxide substrate. [0020]
  • FIG. 4 is a graph showing that an increase in oxygen content of a plasma source gas has a diminishing effect on the etch rate of a silicon oxide substrate, when all other process variables are held constant. [0021]
  • FIG. 5A is a graph showing the effect of increasing the plasma source power on the etch rate of tungsten; the etch rate of silicon oxide; and on the selectivity (in terms of an increase in etch rate of tungsten relative to the etch rate of silicon oxide) during an overetch step, when the oxygen concentration is about 20% by volume. [0022]
  • FIG. 5B is a three-dimensional graph showing tungsten etch rate in an overetch step, as a function of plasma source power and oxygen flow rate, all other variables held constant. [0023]
  • FIG. 5C is a three-dimensional graph showing silicon oxide etch rate in an overetch step, as a function of plasma source power and oxygen flow rate, all other variables held constant. [0024]
  • FIG. 5D is a three-dimensional graph showing selectivity (etch rate ratio of W:SiO[0025] x) as a function of plasma source power and oxygen flow rate, all other variables held constant.
  • FIG. 6A shows a beginning [0026] semiconductor structure 600 for performing an embodiment of the method of the invention for etching tungsten, when the underlying dielectric layer is tantalum pentoxide. The semiconductor structure 600 includes, from top to bottom, a patterned silicon nitride hard mask layer 612, a patterned silicon oxynitride ARC layer 610, a tungsten layer 608, a tungsten nitride wetting layer 606, and a tantalum pentoxide layer 604, all deposited on a silicon substrate 602. The relative thicknesses of the film stack layers are not shown to scale.
  • FIG. 6B shows the [0027] semiconductor structure 600 after etching through a major portion of the tungsten 608/tungsten nitride 606 during the main etch step.
  • FIG. 6C shows the [0028] semiconductor structure 600 after performance of the overetch step. The entire thickness of the tungsten 608/tungsten nitride 606 has been etched through, exposing the upper surface of the tantalum pentoxide layer 604.
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • The present disclosure relates to a method of etching tungsten or tungsten nitride in semiconductor structures. In particular, the method pertains to the etching of feature sizes of less than 0.5 μm, where control of etch selectivity of tungsten or tungsten nitride relative to a thin layer (typically less than about 50 Å) of an underlying oxide is of primary importance. The term “feature” typically refers to metal lines, trenches and openings in a dielectric layer, as well as other structures which make up the topography of the substrate surface. [0029]
  • In particular, an initial etch chemistry, used during the majority of the tungsten or tungsten nitride etching process, is typically one employing a plasma source gas comprising at least one halogen-based chemically functional etchant species. The halogen is typically fluorine, chlorine, or combinations thereof. A source gas comprising fluorine species is preferably used, because the fluorine is capable of removing oxides and other residues which may form on the surface of the tungsten if it is exposed to air during processing. If the plasma source gas used during the main tungsten etch step does not include fluorine species (for example, if Cl[0030] 2 is used), a breakthrough etch step employing a plasma generated from a fluorine-containing gas may be needed in order to remove the tungsten oxide from the substrate surface prior to etching of the tungsten layer. Typical process conditions for the breakthrough etch are as follows: 50-200 sccm CF4; 4-10 mTorr process chamber pressure; 300-1000 W source power; 40-200 W substrate bias power; and 50° C. substrate temperature. Other fluorine-containing gases, such as SF6 or NF3, for example, can be used in place of, or in combination with, CF4. A non-reactive diluent gas, such as, for example, argon, may be used in combination with the fluorine-containing gas. A typical duration for the breakthrough etch is approximately 10 seconds. The tungsten main etch is preferably performed using a plasma source gas where the chemically functional etchant species are generated from sulfur hexafluoride (SF6) and nitrogen (N2), or from a combination of NF3, Cl2, and CF4. These etch chemistries provide a rapid tungsten etch rate with excellent etch profile characteristics, and do not require the performance of a breakthrough etch prior to the main tungsten etch.
  • For example, in one embodiment, the main etch is carried out using a source gas consisting of SF[0031] 6 and N2. The volumetric flow rates for SF6 typically range from about 30 sccm to about 100 sccm in a CENTURA® DPS™ processing chamber. The volumetric flow rates for N2 typically range from about 30 sccm to about 100 sccm as well. The preferred volumetric ratio of SF6:N2 generally ranges from about 20:50 to about 60:10. The process chamber pressure ranges from about 2 mTorr to about 20 mTorr, and is preferably maintained at a pressure within a range of about 2 mTorr to about 10 mTorr. The substrate temperature ranges from about 20° C. to about 100° C., with lower temperatures being preferred, since apparatus costs are lower and the possibility of damage to a gate oxide is reduced. The applied plasma source power ranges from about 200 W to about 2000 W, and the applied substrate biasing power ranges from about 40 W to about 200 W. (The term “plasma source power” typically refers to the power that is responsible for sustaining the plasma by providing a major portion of the energy to ionize the neutral species in the chamber, while the term “substrate bias power” typically refers to the power applied to the substrate to attract high energy plasma species toward the substrate.) Using conditions within the ranges just described, adjusted for apparatus variables, a tungsten or tungsten nitride etch rate ranging from about 1500 to about 4000 Å per minute is obtained. During the etching of fine (about 0.15 μm in width) lines, the profile of the line sidewall relative to the underlying substrate surface is vertical at about 88° to 90° (discounting “feet” which may be formed near the base of the sidewall).
  • Toward the end of the etching process, a-second chemistry is used in which the chemically functional etchant species are generated from Cl[0032] 2 and O2. The process during etch of the remaining portion of the tungsten may be referred to as an overetch process, since the etch is carried out to the surface of an underlying film surface and may etch for a limited distance into the underlying film surface. However, this second etch chemistry may optionally be divided into two steps, where the oxygen content and plasma source power are increased during the second step.
  • To obtain a satisfactory etch rate for the tungsten or tungsten nitride and the desired selectivity in favor of etching tungsten relative to an underlying silicon oxide gate layer, the volumetric percentage of the O[0033] 2 in a Cl2/O2 source gas mixture is controlled to range from greater than 20% up to about 45%. Preferably, the volumetric percentage of O2 in a Cl2/O2 source gas mixture ranges from about 35% to about 45%. However, to obtain the benefit of the O2 content specified above, the plasma density in the etch process chamber must be sufficiently high. We have determined that a plasma density of at least about 8×1010 e/cm3 (a plasma source power of about 800 W in a CENTURA® DPS™ processing chamber available from Applied Materials, Inc., of Santa Clara, Calif.) is required to obtain benefit from increasing the volumetric percentage of oxygen above 20%. (The term “decoupled plasma source” or “DPS” as used herein refers to a plasma etch apparatus with separate controls for the inductively coupled RF source power used to generate and maintain a plasma and the bias power applied to a semiconductor substrate to direct high energy species toward the substrate).
  • An alternative to using a single overetch step is to use a two-step overetch process. For example, after the main etch step, a first overetch step may be carried out in which the plasma source gas composition is a combination of Cl[0034] 2 and O2, where the volumetric content of O2 ranges from greater than 20% to about 35%. The plasma density typically ranges from about 8.0×1010 e/cm3 (800 W applied source power and a process chamber pressure of 4-6 mTorr) to about 1.6×1011 e/cm3 (1600 W applied source power and a process chamber pressure of 4-6 mTorr). The process chamber pressure may range from about 2 mTorr to about 10 mTorr, and preferably between about 2 mTorr and 6 mTorr. The substrate temperature ranges from about 20° C. to about 1001° C. The applied substrate biasing power ranges from about 40 W to about 200 W. Using conditions within these ranges, adjusted for apparatus variables, a “foot” which forms at the bottom of the fine line can be removed, while maintaining the line profile at the vertical 88° to 90° profile.
  • Subsequently, a second overetch or finishing step is carried out, to clean etch residue from the surface of an underlying thin oxide film, without significant etching into the film (less than 10% of the thin oxide film thickness is etched). In the second overetch step, the selectivity in favor of etching tungsten or tungsten nitride relative to an underlying oxide film is critical. It is desired to remove tungsten or tungsten nitride residue from the flat surface of the thin oxide layer surrounding the etched feature without etching through the thin oxide layer. Again, the chemical etchants in the plasma source gas are Cl[0035] 2 and O2, where the volumetric percentage of O2 in the mixture typically ranges from about 36% to about 41%. The plasma density typically ranges from about 1.6×1011 e/cm3 to about 2.0×1011 e/cm3, with the other process conditions being the same as those specified above for the first overetch step. A tungsten etch rate under these process conditions is about 1750 Å per minute, while the selectivity (W:SiOx) is about 175:1. Increased plasma source gas O2 content and increased plasma densities are expected to be useful as well.
  • The selectivity of 175:1 obtained using the process conditions just described may be compared with the selectivity obtained using other process conditions which, at first glance, do not appear to be significantly different, but which provide surprisingly different results. For example, a change in the O[0036] 2 flow rate to provide a volumetric concentration of of 36%, in combination with a plasma density of 1.6×1011 e/cm3 (1600 W), provides a W:SiOx selectivity of about 75:1; and a volumetric concentration of O2 of 20%, in combination with a plasma density of 1.5×1011 e/cm3 (1500 W), provides a W:SiOx selectivity of about 28:1. As these data indicate, there is an unexpected increase in selectivity in favor of etching tungsten or tungsten nitride relative to silicon oxide which occurs as a result of increasing the oxygen flow rate and the plasma density above particular ranges simultaneously. This is further illustrated in the Examples provided below.
  • The oxide layer underlying the tungsten or tungsten nitride layer may alternatively comprise tantalum pentoxide, zirconium oxide, or silicon oxynitride, instead of silicon oxide. We have discovered that, when the underlying oxide layer comprises tantalum pentoxide, that a higher substrate bias power can be employed during the tungsten overetch step. The use of a higher bias power (about 100 W up to about 300 W) during the overetch step provides improved profile control (i.e., a more vertical profile is obtained), while maintaining a high selectivity (at least 75:1) for etching tungsten relative to the underlying tantalum pentoxide. Typically, a plasma source gas having a volumetric percentage of O[0037] 2 within the range of about 20% to about 50% is employed, with a plasma density within the range of about 2.0×1010 e/cm3 to about 1.8×1011 e/cm3. In the exemplary DPS system, this can be achieved using a plasma source power within the range of about 200 W to about 1800 W, a substrate bias power within the range of about 100 W to about 200 W, and a process chamber pressure within the range of about 2 mTorr to about 10 mTorr. Tungsten etch rates of greater than 1000 Å per minute are typically obtained using this process regime to etch tungsten over an underlying tantalum pentoxide layer.
  • As a preface to the detailed description of the Examples, it should be noted that, as used in this specification and the appended claims, the singular forms “a”, “an”, and “the” include plural referents, unless the context clearly dictates otherwise. Thus, for example, the term “a semiconductor” includes a variety of different materials which are known to have the behavioral characteristics of a semiconductor. [0038]
  • 1. An Apparatus for Practicing the Invention [0039]
  • The embodiment etch processes described herein were carried out in a CENTURA® Integrated Processing System, available from Applied Materials, Inc., of Santa Clara, Calif. Although the etch process chamber used in the EXAMPLES presented herein is shown in schematic in FIG. 1, any of the etch processors available in the industry should be able to take advantage of the etch chemistry described herein, with some adjustment to other process parameters. The equipment shown in schematic in FIG. 1 includes a Decoupled Plasma Source (DPS) of the kind described by Yan Ye et al. at the Proceedings of the Eleventh International Symposium of Plasma Processing, May 7, 1996, and as published in the Electrochemical Society Proceedings, Volume 96-12, pp. 222-233 (1996). The plasma processing chamber enables the processing of an 8 inch (200 mm) diameter wafer. [0040]
  • FIG. 1 shows a schematic of a side view of an individual CENTURA® DPS™ [0041] polysilicon etch chamber 100. The etch chamber 100 consists of an upper chamber 104 having a ceramic dome 106, and a lower chamber 108. The lower chamber 108 includes a monopolar electrostatic chuck (ESC) cathode 110. Gas is introduced into the chamber via gas injection nozzles 114 for uniform gas distribution. Chamber pressure is controlled by a closed-loop pressure control system (not shown) using a throttle valve 118. During processing, a substrate 120 is introduced into the lower chamber 108 through inlet 122. The substrate 120 is held in place by means of a static charge generated on the surface of electrostatic chuck (ESC) cathode 110 by applying a DC voltage to a conductive layer (not shown) located under a dielectric film (not shown) on the chuck surface. The cathode 110 and substrate 120 are then raised by means of a wafer lift 124 and sealed against the upper chamber 104 in position for processing. Etch gases are introduced into the upper chamber 104 via gas injection nozzles 114. The etch chamber 100 uses an inductively coupled plasma source power 126 and matching network 128 operating at 12.56 MHz for generating and sustaining a medium to high density plasma. The wafer is biased with an RF source 130 and matching network 132 operating at 13.56 MHz. Plasma source power 126 and substrate biasing means 130 are controlled by separate controllers (not shown).
  • II. EXAMPLES OF EMBODIMENTS OF THE INVENTION
  • FIG. 2A shows a cross-sectional side view schematic of an etched [0042] tungsten structure 200, where the etched pattern is lines 203 and spaces 205. The line width is approximately 0.165 μm, and the space width is approximately 0.21 μm. The structure includes a thin (≈45 A) silicon oxide layer 213 on a silicon substrate 202, overlying silicon oxide layer 213 is a 1650 Å thick layer of tungsten 204, a 400 Å thick image-focusing antireflective coating (ARC) layer 206, and the residue 208 of a photoresist layer which was used to pattern the etched structure 200. The tungsten layer 204 includes a thin (˜100 Å) wetting layer of tungsten nitride (not shown) which aids in adhesion of the tungsten to the silicon oxide layer 213. The tungsten nitride is etched during the same etch process as the tungsten. Therefore, as used herein, the term “tungsten layer” refers to a layer of tungsten, optionally in combination with a thin underlying layer of tungsten nitride.
  • FIG. 2B shows a more three-dimensional view of the same [0043] etched structure 200, showing the surface finish 222 of the etched tungsten in the bottom of a trench (space 205), and the smoother upper surface 224 of the overlying photoresist layer residue 208. Both Figures show a remaining unetched tungsten thickness 214 overlying upper surface 210 of silicon oxide layer 213. The unetched tungsten thickness 214 is about 0.023 μm.
  • The [0044] tungsten 204 etch was carried out using only a single etch chemistry, in which the etchant species in the plasma were SF6 at 30 sccm and N2 at 50 sccm. (There was no second etch chemistry used to etch the final portion of the tungsten layer 204 to the surface 210 of oxide layer 213, i.e., there was no overetch carried out.) Other etch process conditions were as follows: The etch process chamber pressure was about 4 mTorr; the substrate temperature was about 50° C.; the plasma source power was about 500 W; the substrate bias power was about 80 W. The etch profile obtained was good, with the sidewall angle of the etched lines 203 from silicon oxide layer 213 surface 210 being about 89°; however, there was some tapering of the profile at the base of the line, since the tungsten was not etched all the way to the surface 210 of silicon oxide layer 203. The tungsten etch rate was about 1500 Å per minute. The term “tapered” profile, with reference to an etched pattern of lines and spaces, refers to a cross-sectional profile where the width of the line is wider at the base of the line than at the top surface of the line. A “vertical profile” is one where the side walls of the lines are perpendicular to the surface of the silicon oxide substrate. An “undercut” profile is one where the width of the line is more narrow at the base of the line than at the top surface of the line. A vertical profile is typically preferred, because it enables closer placement of device structures on a given surface area.
  • As shown in FIG. 2B, the etched [0045] tungsten surface 222 at the bottom of spaces 205 exhibited a rougher finish than the line 203 upper photoresist residue 208 surface 224.
  • FIG. 3 shows a schematic of a photomicrograph of etched [0046] tungsten 300 where there is a change in the etch chemistry toward the end of the tungsten 304 etching, and etching is permitted to continue to the surface 310 of the thin silicon oxide layer 313. Again, the etched tungsten structure was a pattern of lines 303 and spaces 305. The line width is approximately 0.120 μm, and the space width is approximately 0.165 μm. The structure included a thin (≈45 Å) silicon oxide layer 313 on a silicon substrate 302, a 1650 Å thick overlying layer of tungsten 304 (i.e., tungsten/tungsten nitride, as described above with reference to FIG. 2), a 400 Å thick image-focusing antireflective coating (ARC) layer 306, and a photoresist layer residue 308.
  • The [0047] tungsten 304 etch was carried out using two etch chemistries. During the first portion of the etching, the chemically reactive etchant species in the plasma were SF6 at sccm and N2 at 50 sccm (i.e., 37.5 volume % SF6, 62.5 volume % N2). Other etch process conditions were as follows: The etch process chamber pressure was about 4 mTorr; the substrate temperature was about 50° C.; the plasma source power was 500 W; the substrate bias power was about 80 W. The etch profile obtained was good, with the sidewall angle of the etched lines 303 from silicon oxide substrate 302 surface 310 being about 89°. The tungsten etch rate was about 1650 Å per minute. Approximately 1500 Å of the initial 1650 Å thickness of the tungsten layer 304 was etched using this first etch chemistry.
  • Etching of the remaining 150 Å of [0048] tungsten layer 304 was carried out using a plasma in which the chemically reactive etchant species were produced from a source gas of Cl2 at a flow rate of about 70 sccm and O2 at a flow rate of about 40 sccm. Other etch process conditions were as follows: The etch process chamber pressure was about 6 mTorr; the substrate temperature was about 50° C.; the plasma source power was 600 W; the substrate bias power was about 80 W. The etch profile obtained was excellent, with the sidewall angle of the etched lines 303 from silicon oxide substrate 302 surface 310 being about 89° to 90°. The tungsten etch rate was about 1500 Å per minute. The etching was allowed to continue until the upper surface of the silicon oxide substrate 310 was slightly etched. It was determined that the silicon oxide etch rate was about 19 Å per minute. The etch rate selectivity of tungsten:silicon oxide was about 79:1. Tungsten residue was cleared off the space 305 open areas, but there was a slight tungsten “foot” (not shown) at the bottom of tungsten lines 303 in the areas where the spacing between lines was less than that shown in FIG. 3 (in the more dense areas). Subsequent experimentation demonstrated that adjustment of the O2 flow rate to 45 sccm, the plasma source power to 1800 W, and the process chamber pressure to 3 mTorr results in removal of the “foot”.
  • FIG. 4 is a [0049] graph 400 showing the etch rate (shown on axis 404) of silicon oxide as a function of the plasma source gas oxygen flow rate (shown on axis 402). The data shown in graph 400 were obtained by etching a layer of silicon oxide only, which was deposited on a silicon wafer. The total flow of Cl2 and O2 used was 110 sccm, and the volume % of oxygen in the plasma source gas may be calculated by dividing the sccm shown on axis 402 by the total gas flow 100 sccm and multiplying by 100. The other etch process conditions used during the silicon oxide etching were as follows: The etch process chamber pressure was about 6 mTorr; the substrate temperature was about 50° C.; the plasma source power was about 1600 W; the substrate bias power was about 80 W. Graph 400 indicates that there is a diminishing effect obtained by increasing the O2 flow rate, with the etch rate leveling out at about 19 Å per minute between about 35 sccm and 40 sccm of O2. We later discovered that it was necessary to increase the plasma density (plasma source power) to obtain the full benefit of an increase in the O2 flow rate over about 35 sccm.
  • FIG. 5A is a [0050] graph 500 showing the effect of increasing the plasma source power (shown in Watts on axis 502), on the etch rate of tungsten (W) (shown by curve 508) and on the etch rate of SiOx (shown by curve 510), at a constant O2 flow rate of about 20 sccm. The etch rate units in each case are shown on axis 504. Graph 500 also shows the selectivity for W:SiOx as a function of the plasma source power, illustrated by curve 512, at the constant flow rate of 20 sccm. The nominal selectivity is shown on axis 506. As can be observed from graph 500, an increase in plasma source power results in an increase in tungsten etch rate, a decrease in SiOx etch rate, and an increase in selectivity. However, at an O2 flow rate of 20 sccm, up to a plasma source power of about 1600 W, the selectivity of W:SiOx is only about 40:1. The process chamber pressure was about 6 mTorr, and the substrate temperature was about 50° C.
  • FIG. 5B is a three-[0051] dimensional graph 530 showing tungsten etch rate in an overetch step, as a function of plasma source power and oxygen flow rate, all other variables held constant. In particular, the wafer etched was a sputtered tungsten layer overlying a silicon wafer. The process chamber pressure was 6 mTorr, and the substrate temperature was about 50° C. The tungsten etch rate units (A/min.) are shown on axis 534, the plasma source power units (W) are shown on axis 532, and the O2 flow rate units (sccm) are shown on axis 536. Curve 538 clearly shows that an increase in O2 flow rate alone from about 30 sccm to about sccm, with plasma source power held constant at about 1,600 W, increased the tungsten etch rate from about 1170 Å/min. to about 1500 Å/min. A simultaneous increase in O2 flow rate from about 30 sccm to about 45 sccm, and increase in plasma source power from about 1600 W to about 1800 W, increased the tungsten etch rate from about 1170 Å/min. to about 1750 Å/min.
  • FIG. 5C is a three-[0052] dimensional graph 540 showing silicon oxide etch rate in an overetch step, as a function of plasma source power and oxygen flow rate, all other variables held constant. In particular, the wafer etched was a silicon substrate having a layer of thermal silicon oxide on its surface. The process chamber pressure was 6 mTorr, and the substrate temperature was about 50° C. The silicon oxide etch rate units (Å/min.) are shown on axis 544, the plasma source power units (W) are shown on axis 542, and the O2 flow rate units (sccm) are shown on axis 546. Curve 538 shows that an increase in O2 flow rate alone from about 20 sccm to about 40 sccm, with plasma source power held constant at about 1600 W, decreased the silicon oxide etch rate from about 37 Å/min. to about 19 Å/min. A simultaneous increase in O2 flow rate from about 20 sccm to about 45 sccm, and increase in plasma source power from about 1600 W to about 1800 W, decreased the silicon oxide etch rate from about 37 Å/min. to about 10 Å/min.
  • FIG. 5D is a three-[0053] dimensional graph 550 showing selectivity (etch rate ratio of W:SiOx) as a function of plasma source power and oxygen flow rate, all other variables held constant. FIG. 5D is derived from FIGS. 5B and 5C, and makes apparent the striking increase in selectivity which can be achieved by increasing both the oxygen flow rate and the plasma source power simultaneously. The selectivity (W:SiOx) nominal units are shown on axis 554, the plasma source power units (W) are shown on axis 552, and the O2 flow rate units (sccm) are shown on axis 556. Curve 558 shows that an increase in O2 flow rate alone from about 30 sccm to about 40 sccm, with plasma source power held constant at about 1600 W, increased the selectivity from about 50:1 to about 80:1. A simultaneous increase in oxygen flow rate from about 30 sccm to about 45 sccm, and increase in plasma source power from about 1600 W to about 1800 W, increased the selectivity from about 50:1 to about 175:1. For example, a selectivity of about 100:1 is obtained when the O2 content is about 40%, and the plasma source power is about 1670 W. A selectivity of about 175:1 is obtained when the O2 content is about 45% and the plasma source power is about 1800 W. An increase in the selectivity to 175:1 was unexpected in view of the much smaller increase in selectivity obtained when only the oxygen flow rate was increased.
  • To better appreciate this surprising increase in selectivity, it is helpful to compare FIG. 5D with FIG. 5A. FIG. 5A showed that when the oxygen flow rate was held constant at about 20 sccm, and the plasma source power was increased from about 800 W up to about 1600 W, the selectivity of W:SiO[0054] x increased from about 19:1 to about 40:1. Further, as illustrated in FIG. 5D, an increase in oxygen flow rate from about 30 sccm to about 40 sccm, with the plasma source power held constant at 1600 W, provided a selectivity increase from about 50:1 to about 80:1. It was only with the synergistic combination of increased oxygen flow rate and increased plasma source power that a selectivity of 175:1 was achieved.
  • Table I, below, provides a summary of various process conditions and the tungsten (or tungsten nitride) etch rate which is expected to be obtained at those process conditions. Table I also shows the selectivity relative to silicon oxide which is expected to be obtained, and the etched sidewall profile angle which is expected to be obtained. [0055]
    TABLE I
    Typical Process Conditions During Final Portion Etching (Overetch)
    of Tungsten or Tungsten Nitride, With Underlying Silicon Oxide Layer
    Process Condition Process Condition
    Process Condition and Broad Range Preferred Range
    Result and Results and Results
    Total Gas Flow 50-200  75-125
    (sccm)
    O2 Flow Rate >20-60  30-50
    (sccm)
    Vol. % O2 in mixt. of O2 >20-50  30-40
    and Cl2
    Substrate 20-100 40-60
    Temperature (° C.)
    Process Chamber 2-20 3-6
    Pressure (mTorr)
    Source Power (W) 800-3000 1400-1800
    Substrate Bias Power (W) 40-200  80-100
    Etch Rate W or WN2 1000-3000  1500-2000
    (Å/min)
    Selectivity 10:1 to 200:1 100:1 to 175:1
    W:SiOx
    Etched Profile, Vertical or 88-90° vertical profile
    Tapered or Undercut (°) 89-90°
  • The dielectric layer underlying the tungsten or tungsten nitride layer may alternatively comprise tantalum pentoxide, zirconium oxide, or silicon oxynitride, instead of silicon oxide. FIG. 6 illustrates an embodiment of the method of the invention for etching tungsten, when the underlying dielectric layer is tantalum pentoxide. FIG. 6A shows a beginning [0056] semiconductor structure 600 prior to performance of the method of the invention. The structure 600 includes a thin (50 Å) tantalum pentoxide layer 604 on a silicon substrate 602, overlying tantalum pentoxide layer 604 is a 300 Å thick wetting layer of tungsten nitride 606, a 700 Å thick layer of tungsten 608, a 300 Å thick image-focusing antireflective coating (ARC) layer 610 (in this case, silicon oxynitride), and a 1500 Å thick silicon nitride hard mask layer 612, which is used to pattern etch the structure 600. The silicon nitride hard mask layer 612 and silicon oxynitride ARC layer 610 have been previously patterned using techniques known in the art.
  • Etching of the [0057] tungsten 608/tungsten nitride 606 was carried out using two etch chemistries. During the first portion of the etching, the chemically reactive etchant species in the plasma were SF6 at 20 sccm and N2 at 45 sccm (i.e., 31 volume % SF6, 69 volume % N2). Other etch process conditions were as follows: The etch process chamber pressure was about 4 mTorr; the substrate temperature was about 50° C.; the plasma source power was 200 W; the substrate bias power was about 175 W. The tungsten/tungsten nitride etch rate was about 2000 Å per minute. As shown in FIG. 6B, almost all (at least 950 Å) of the initial 1000 Å combined thickness of the tungsten 608/tungsten nitride 606 was etched using this first etch chemistry, with a small amount of tungsten/tungsten nitride residue remaining at the bottom of the feature.
  • Etching of the remaining [0058] tungsten 608/tungsten nitride 606 was carried out using a plasma in which the chemically reactive etchant species were produced from a source gas of Cl2 at a flow rate of about 72 sccm and O2 at a flow rate of about 18 sccm. Other etch process conditions were as follows: The etch process chamber pressure was about 4 mTorr; the substrate temperature was about 50° C.; the plasma source power was 400 W; the substrate bias power was about 175 W. The tungsten/tungsten nitride etch rate was about 1871 per minute. The etching was allowed to continue until the upper surface of the tantalum pentoxide layer 604 was slightly etched, as shown in FIG. 6C. It was determined that the tantalum pentoxide etch rate was about 20 Å per minute. The etch rate selectivity of tungsten tantalum pentoxide was about 94:1. The etch profile obtained was about 89° to 90°.
  • When the underlying oxide layer comprises tantalum pentoxide, we have discovered that we can use the same source gas composition and process conditions during the tungsten overetch step as those which were used when silicon oxide was used as the underlying layer. Since the tantalum pentoxide is resistant to ion bombardment which occurs during anisotropic etching, we can achieve an almost infinite selectivity for etching tungsten relative to an underlying tantalum pentoxide layer. This extraordinarily high tungsten:tantalum pentoxide etch selectivity allows a thinner tantalum pentoxide layer to be used (relative to a corresponding silicon oxide layer). The tantalum pentoxide layer typically has thickness of less than about 100 Å, preferably within the range of about 30 Å to about 50 Å. The thinness of the oxide layer can be important in terms of increasing a semiconductor device speed. [0059]
  • Our discovery that tantalum pentoxide is more resistant to ion bombardment than silicon oxide permits a higher substrate bias power to be used during the tungsten overetch step over an underlying tantalum pentoxide layer. The use of a high bias power (from about 100 W up to about 300 W) during the overetch step provides improved profile control (i.e., a more vertical profile is obtained), while maintaining a high selectivity for etching tungsten relative to the underlying tantalum pentoxide. When a higher bias power is employed, a plasma source gas having a lower oxygen content can be used. [0060]
  • When the underlying oxide layer comprises tantalum pentoxide, a tungsten etch rate of about 2000 Å per minute can be achieved while maintaining a tungsten:tantalum pentoxide etch selectivity of about 75:1 or better using a plasma source gas having a volumetric percentage of O[0061] 2 of about 20%, with a plasma density within the range of about 4.0×1010 e/cm3 to about 6.0×1010 e/cm3, which may be achieved in the exemplary DPS chamber using a plasma source power within the range of about 400 W to about 600 W, a substrate bias power of about 175 W, and a process chamber pressure within the range of about 4 mTorr. To enable maintenance of feature profile while removing residual tungsten “feet” at the base of a feature, it may be advantageous to adjust the etch conditions toward the end of the etch. For example, the final etch conditions may provide a selectivity of at least 175:1 tungsten:tantalum pentoxide, where the tungsten etch rate is less than about 1000 Å per minute. This etch selectivity and etch rate can be obtained by using a plasma source gas having a volumetric percentage of O2 of about 20%, with a plasma density of about 2.0×1010 e/cm3, which can be achieved in the exemplary DPS chamber using a plasma source power of about 200 W, a substrate bias power of about 175 W, and a process chamber pressure of about 6 mTorr.
  • Experimental results obtained by varying particular process parameters (O[0062] 2 flow rate, process chamber pressure, plasma source power, substrate bias power) during tungsten overetching are presented in Table II, below.
    TABLE II
    Tungsten Overetch with Underlying Tantalum Pentoxide Layer,
    Development Data
    Run #
    1 2 3 4 5 6 7
    Cl2 Flow Rate 72 72 72 72 72 72 72
    (sccm)
    O2 Flow Rate 18 18 18 22 26 18 18
    (sccm)
    Vol. % O 2 20 20 20 23.4 26.5 20 20
    Process Chamber 4 4 6 4 4 4 4
    Pressure (mTorr)
    Plasma Source 200 200 200 200 200 400 600
    Power (W)
    Substrate Bias 175 100 175 175 175 175 175
    Power (W)
    Substrate 50 50 50 50 50 50 50
    Temperature (° C.)
    W Etch Rate 634 344 1014 481 42 1871 2198
    (Å/min.)
    Ta2O5 Etch Rate 22 12 5.7 5.3 4.7 20 28
    (Å/min.)
    W:Ta2O5 Etch 29:1 29:1 178:1 90:1 9:1 94:1 79:1
    Selectivity
  • Table III, below, provides a summary of various process conditions and the tungsten (or tungsten nitride) overetch rate which is expected to be obtained at those process conditions. Table III also shows the selectivity for etching tungsten/tungsten nitride relative to tantalum pentoxide which is expected to be obtained, and the etched sidewall profile angle which is expected to be obtained. [0063]
    TABLE III
    Typical Process Conditions During Final Portion
    Etching (Overetch) of Tungsten or Tungsten Nitride, With
    Underlying Tantalum Pentoxide Layer
    Process Condition Process Condition
    Process Condition and Broad Range Preferred Range
    Result and Results and Results
    Total Gas Flow 30-150  90-120
    (sccm)
    O2 Flow Rate 15-50  20-50
    (sccm)
    Vol % O2 in mixt. of O2 15-50  20-30
    and Cl2
    Substrate 40-60  40-60
    Temperature (° C.)
    Process Chamber 2-10 4-8
    Pressure (mTorr)
    Source Power (W) 200-1800  400-1800
    Substrate Bias Power (W) 60-300  60-200
    Etch Rate W or WN2 300-2200 1000-2000
    (Å/min)
    Selectivity 10:1 to 1000:1 30:1 to 600:1
    W:Ta2O5
    Etched Profile, Vertical or Vertical Vertical
    Tapered or Undercut (°)
  • The above described embodiments are not intended to limit the scope of the present invention, as one skilled in the art can, in view of the present disclosure, expand such embodiments to correspond with the subject matter of the invention claimed below. [0064]

Claims (61)

We claim:
1. A method of plasma etching tungsten or tungsten nitride, wherein an etch selectivity of greater than about 75:1 is obtained relative to an adjacent silicon oxide layer by using a plasma source gas comprising chemically functional etchant species which are generated from Cl2 and O2, wherein the volumetric percentage of O2 in said plasma source gas is at least 35%, and wherein a plasma density is at least 1.6×1011 e/cm3.
2. The method of claim 1, wherein said plasma density is obtained by applying a source power of at least 1600 W.
3. The method of claim 1, wherein said etch selectivity is greater than about 100:1, said volumetric percentage of O2 is at least 40%, and said plasma density is at least 1.65×1011 e/cm3.
4. The method of claim 3, wherein said plasma density is obtained by applying a source power of at least 1650 W.
5. The method of claim 1, wherein said etch selectivity is greater than about 175:1, said volumetric percentage of O2 is at least 45%, and said plasma density is at least 1.8×1011 e/cm3.
6. The method of claim 5, wherein said plasma density is obtained by applying a source power of at least 1800 W.
7. A method of selectively etching tungsten or tungsten nitride relative to an underlying oxide layer in semiconductor structures, comprising:
plasma etching a first majority portion of said tungsten or tungsten nitride using a first plasma source gas comprising at least one halogen-based chemically functional etchant species; and
plasma etching a remaining portion of said tungsten or tungsten nitride using a second plasma source gas comprising chemically functional etchant species generated from Cl2 and O2.
8. The method of claim 7, wherein said underlying oxide is selected from the group consisting of silicon oxide, silicon oxynitride, tantalum pentoxide, zirconium oxide, and combinations thereof.
9. The method of claim 8, wherein said halogen is selected from the group consisting of fluorine, chlorine, and combinations thereof.
10. The method of claim 9, wherein said first majority portion of said plasma etching is carried out using a first plasma source gas selected from the group consisting of a combination of SF6 and N2, and a combination of NF3, Cl2, and CF4.
11. The method of claim 9, wherein said underlying oxide comprises silicon oxide, and wherein a volumetric percentage of O2 in said second plasma source gas is greater than 20% by volume.
12. The method of claim 11, wherein said O2 volumetric percentage ranges from greater than 20% to about 45%.
13. The method of claim 9, wherein said underlying oxide comprises silicon oxide, and wherein a plasma density of said etchant plasma is at least 8.0×1010 e/cm3.
14. The method of claim 13, wherein said plasma density ranges from about 8.0×1010 e/cm3 to about 3.0×1011 e/cm3.
15. The method of claim 14, wherein said plasma density ranges from about 8.0×1010 e/cm3 to about 2.0×1011 e/cm3.
16. The method of claim 13, wherein a plasma source power ranges from about 800 W to about 3000 W.
17. The method of claim 16, wherein said plasma source power ranges from about 800 W to about 2000 W.
18. The method of claim 9, wherein said underlying oxide comprises silicon oxide, and wherein said etching which is carried out using said plasma source gas comprising said chemically functional etchant species generated from Cl2 and O2 is carried out in two steps, wherein a volumetric concentration of O2 in a first step ranges from greater than 20% by volume to about 35% by volume, and wherein a volumetric concentration of O2 in a second step ranges from greater than about 35% by volume to about 45% by volume.
19. The method of claim 9, wherein said underlying oxide comprises tantalum pentoxide, and wherein a volumetric percentage of O2 in said second plasma source gas ranges from about 20% to about 50%.
20. The method of claim 19, wherein said underlying oxide comprises tantalum pentoxide, and wherein a plasma density of said etchant plasma ranges from about 2.0×1010 e/cm3 to about 1.8×1011 e/cm3.
21. The method of claim 20, wherein a plasma source power ranges from about 200 W to about 1800 W.
22. The method of claim 19, wherein said underlying oxide comprises tantalum pentoxide, and a substrate bias power ranges from about 60 W to about 300 W.
23. A method of selectively etching tungsten or tungsten nitride relative to an underlying oxide layer in semiconductor structures, comprising:
plasma etching a first majority portion of said tungsten or tungsten nitride using a first plasma source gas comprising fluorine species; and
plasma etching a remaining portion of said tungsten or tungsten nitride using a second plasma source gas comprising chemically functional etchant species generated from Cl2 and O2.
24. The method of claim 23, wherein said underlying oxide is selected from the group consisting of silicon oxide, silicon oxynitride, tantalum pentoxide, zirconium oxide, and combinations thereof.
25. The method of claim 24, wherein said first majority portion of said plasma etching is carried out using a first plasma source gas selected from the group consisting of a combination of SF6 and N2, and a combination of NF3, Cl2, and CF4.
26. The method of claim 25, wherein said first plasma source gas comprises SF6 and N2, and wherein a volumetric ratio of SF6:N2 in said first plasma source gas ranges from about 2:5 to about 6:1.
27. The method of claim 24, or claim 25, or claim 26, wherein said underlying oxide comprises silicon oxide, and wherein a volumetric percentage of O2 in said second plasma source gas is greater than 20% by volume.
28. The method of claim 27, wherein said O2 volumetric percentage ranges from greater than 20% to about 45%.
29. The method of claim 27, wherein a plasma density of said etchant plasma is at least 8.0×1010 e/cm3.
30. The method of claim 29, wherein said plasma density ranges from about 8.0×1010 e/cm3 to about 3.0×1011 e/cm3.
31. The method of claim 30, wherein said plasma density ranges from about 8.0×1010 e/cm3 to about 2.0×1011 e/cm3.
32. The method of claim 27, wherein a plasma source power ranges from about 800 W to about 3000 W.
33. The method of claim 32, wherein said plasma source power ranges from about 800 W to about 2000 W.
34. The method of claim 28, wherein a plasma density of said etchant plasma is at least 8.0×1010 e/cm3.
35. The method of claim 34, wherein said plasma density ranges from about 8.0×1010 e/cm3 to about 3.0×1011 e/cm3.
36. The method of claim 34, wherein a plasma source power ranges from about 800 W to about 3000 W.
37. The method of claim 24, wherein said underlying oxide comprises silicon oxide, and wherein said etching which is carried out using said plasma source gas comprising chemically functional etchant species generated from Cl2 and O2 is carried out in two steps, wherein a volumetric concentration of O2 in a first step ranges from greater than 20% by volume to about 35% by volume, and wherein the volumetric concentration of O2 in a second step ranges from greater than about 35% by volume to about 45% by volume.
38. The method of claim 37, wherein a plasma density during said first step ranges from about 8×1010 e/cm3 to about 1.6×1011 e/cm3, and wherein a plasma density during said second step ranges from about 1.6×1011 e/cm3 to about 3.0×1011 e/cm3.
39. The method of claim 37, wherein a plasma source power during said first step ranges from about 800 W to about 1600 W, and wherein a plasma source power during said second step ranges from about 1600 W to about 3000 W.
40. The method of claim 24, wherein said underlying oxide comprises tantalum pentoxide, and wherein a volumetric percentage of O2 in said second plasma source gas ranges from about 20% to about 50%.
41. The method of claim 40, wherein said underlying oxide comprises tantalum pentoxide, and wherein a plasma density of said etchant plasma ranges from about 2.0×1010 e/cm3 to about 1.8×1011 e/cm3.
42. The method of claim 41, wherein a plasma source power ranges from about 200 W to about 1800 W.
43. The method of claim 40, wherein said underlying oxide comprises tantalum pentoxide, and a substrate bias power ranges from about 60 W to about 300 W.
44. A method of selectively etching tungsten nitride relative to silicon oxide during the etching of semiconductor structures, comprising:
plasma etching a majority portion of said tungsten nitride using a plasma source gas comprising fluorine species; and
plasma etching a remaining portion of said tungsten nitride using a second plasma source gas comprising chemically functional etchant species generated from Cl2 and O2, wherein said O2 concentration is about 35% by volume or greater, and wherein a plasma density of said etchant plasma is about 1.6×1011 e/cm3 or greater.
45. The method of claim 44, wherein said first majority portion of said plasma etching is carried out using a first plasma source gas selected from the group consisting of a combination of SF6 and N2, and a combination of NF3, Cl2, and CF4.
46. The method of claim 44, wherein said plasma density is created by application of a plasma source power of 1600 W or greater.
47. The method of claim 44, wherein said O2 concentration is about 40% by volume or greater, and wherein a plasma density of said etchant plasma is about 1.8×1011 e/cm3 or greater.
48. The method of claim 47, wherein said plasma density is created by application of a plasma source power of 1800 W or greater.
49. A method of plasma etching tungsten or tungsten nitride, wherein an etch selectivity of greater than about 75:1 is obtained relative to an adjacent tantalum pentoxide layer by using a plasma source gas comprising chemically functional etchant species which are generated from Cl2 and O2, wherein the volumetric percentage of O2 in said plasma source gas ranges from about 20% to about 50%, and wherein a plasma density ranges from about 2.0×1010 e/cm3 to about 1.8×1011 e/cm3.
50. The method of claim 49, wherein said plasma density is obtained by applying a source power within the range of about 200 W to about 1800 W.
51. The method of claim 49, wherein a substrate bias power ranges from about 60 W to about 300 W.
52. The method of claim 51, wherein a substrate bias power ranges from about 60 W to about 200 W.
53. The method of claim 52, wherein a substrate bias power ranges from about 100 W to about 200 W.
54. A method of selectively etching tungsten nitride relative to tantalum pentoxide during the etching of semiconductor structures, comprising:
plasma etching a majority portion of said tungsten nitride using a plasma source gas comprising fluorine species; and
plasma etching a remaining portion of said tungsten nitride using a second plasma source gas comprising chemically functional etchant species generated from Cl2 and O2, wherein said O2 concentration ranges from about 20% to about 50% by volume, and wherein a plasma density of said etchant plasma ranges from about 2.0×1010 e/cm3 to about 1.8×1011 e/cm3.
55. The method of claim 54, wherein said first majority portion of said plasma etching is carried out using a first plasma source gas selected from the group consisting of a combination of SF6 and N2, and a combination of NF3, Cl2, and CF4.
56. The method of claim 54, wherein said plasma density is obtained by applying a source power within the range of about 200 W to about 1800 W.
57. The method of claim 54, wherein a substrate bias power ranges from about 60 W to about 200 W.
58. The method of claim 51, wherein a substrate bias power ranges from about 60 W to about 200 W.
59. The method of claim 52, wherein a substrate bias power ranges from about 100 W to about 200 W.
60. A semiconductor gate structure comprising a layer of tungsten and an underlying layer of tantalum pentoxide, deposited on a silicon substrate, wherein said tantalum pentoxide layer has thickness of less than about 100 Å.
61. The semiconductor gate structure of claim 60, wherein said tantalum pentoxide layer has a thickness within the range of about 30 Å to about 50 Å.
US10/140,637 2000-07-12 2002-05-07 Method of etching tungsten or tungsten nitride in semiconductor structures Expired - Fee Related US6579806B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/140,637 US6579806B2 (en) 2000-07-12 2002-05-07 Method of etching tungsten or tungsten nitride in semiconductor structures

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/614,396 US6423644B1 (en) 2000-07-12 2000-07-12 Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
US09/755,522 US6440870B1 (en) 2000-07-12 2001-01-05 Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
US10/140,637 US6579806B2 (en) 2000-07-12 2002-05-07 Method of etching tungsten or tungsten nitride in semiconductor structures

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US09/755,522 Continuation US6440870B1 (en) 2000-07-12 2001-01-05 Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures

Publications (2)

Publication Number Publication Date
US20030003757A1 true US20030003757A1 (en) 2003-01-02
US6579806B2 US6579806B2 (en) 2003-06-17

Family

ID=25039504

Family Applications (2)

Application Number Title Priority Date Filing Date
US09/755,522 Expired - Fee Related US6440870B1 (en) 2000-07-12 2001-01-05 Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
US10/140,637 Expired - Fee Related US6579806B2 (en) 2000-07-12 2002-05-07 Method of etching tungsten or tungsten nitride in semiconductor structures

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US09/755,522 Expired - Fee Related US6440870B1 (en) 2000-07-12 2001-01-05 Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures

Country Status (5)

Country Link
US (2) US6440870B1 (en)
EP (1) EP1350265A1 (en)
JP (1) JP2004519102A (en)
KR (1) KR20030066673A (en)
WO (1) WO2002065539A1 (en)

Cited By (150)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030180634A1 (en) * 2001-03-16 2003-09-25 Alex Buxbaum Apparatus for reshaping a patterned organic photoresist surface
US20060278608A1 (en) * 2003-05-16 2006-12-14 Hoffman Daniel J Method of determining plasma ion density, wafer voltage, etch rate and wafer current from applied bias voltage and current
US20070080139A1 (en) * 2003-05-16 2007-04-12 Hoffman Daniel J Method of controlling a chamber based upon predetermined concurrent behavior of selected plasma parameters as a function of source power, bias power and chamber pressure
US20070080140A1 (en) * 2003-05-16 2007-04-12 Hoffman Daniel J Plasma reactor control by translating desired values of m plasma parameters to values of n chamber parameters
US20070080138A1 (en) * 2003-05-16 2007-04-12 Hoffman Daniel J Method of characterizing a chamber based upon concurrent behavior of selected plasma parameters as a function of plural chamber parameters
US20070080137A1 (en) * 2003-05-16 2007-04-12 Hoffman Daniel J Method of characterizing a chamber based upon concurrent behavior of selected plasma parameters as a function of source power, bias power and chamber pressure
US20070095788A1 (en) * 2003-05-16 2007-05-03 Hoffman Daniel J Method of controlling a chamber based upon predetermined concurrent behavoir of selected plasma parameters as a function of selected chamber paramenters
US20070272655A1 (en) * 2001-11-14 2007-11-29 Hitoshi Sakamoto Barrier metal film production method
US20070281477A1 (en) * 2006-06-02 2007-12-06 Applied Materials, Inc. Process for etching tungsten silicide overlying polysilicon particularly in a flash memory
US20130034961A1 (en) * 2010-05-26 2013-02-07 Spp Technologies Co., Ltd. Plasma Etching Method
US20140054791A1 (en) * 2012-08-21 2014-02-27 Semiconductor Manufacturing International Corp. Through silicon via packaging structures and fabrication method
US20140273451A1 (en) * 2013-03-13 2014-09-18 Applied Materials, Inc. Tungsten deposition sequence
US9117855B2 (en) 2013-12-04 2015-08-25 Applied Materials, Inc. Polarity control for remote plasma
US9136273B1 (en) 2014-03-21 2015-09-15 Applied Materials, Inc. Flash gate air gap
US9132436B2 (en) 2012-09-21 2015-09-15 Applied Materials, Inc. Chemical control features in wafer process equipment
US9153442B2 (en) 2013-03-15 2015-10-06 Applied Materials, Inc. Processing systems and methods for halide scavenging
US9159606B1 (en) 2014-07-31 2015-10-13 Applied Materials, Inc. Metal air gap
US9165786B1 (en) 2014-08-05 2015-10-20 Applied Materials, Inc. Integrated oxide and nitride recess for better channel contact in 3D architectures
US9190293B2 (en) 2013-12-18 2015-11-17 Applied Materials, Inc. Even tungsten etch for high aspect ratio trenches
US9209012B2 (en) 2013-09-16 2015-12-08 Applied Materials, Inc. Selective etch of silicon nitride
US9236265B2 (en) 2013-11-04 2016-01-12 Applied Materials, Inc. Silicon germanium processing
US9236266B2 (en) 2011-08-01 2016-01-12 Applied Materials, Inc. Dry-etch for silicon-and-carbon-containing films
US9245762B2 (en) 2013-12-02 2016-01-26 Applied Materials, Inc. Procedure for etch rate consistency
US9263278B2 (en) 2013-12-17 2016-02-16 Applied Materials, Inc. Dopant etch selectivity control
US9269590B2 (en) 2014-04-07 2016-02-23 Applied Materials, Inc. Spacer formation
US9287134B2 (en) 2014-01-17 2016-03-15 Applied Materials, Inc. Titanium oxide etch
US9287095B2 (en) 2013-12-17 2016-03-15 Applied Materials, Inc. Semiconductor system assemblies and methods of operation
US9293568B2 (en) 2014-01-27 2016-03-22 Applied Materials, Inc. Method of fin patterning
US9299575B2 (en) 2014-03-17 2016-03-29 Applied Materials, Inc. Gas-phase tungsten etch
US9299538B2 (en) 2014-03-20 2016-03-29 Applied Materials, Inc. Radial waveguide systems and methods for post-match control of microwaves
US9299537B2 (en) 2014-03-20 2016-03-29 Applied Materials, Inc. Radial waveguide systems and methods for post-match control of microwaves
US9299583B1 (en) 2014-12-05 2016-03-29 Applied Materials, Inc. Aluminum oxide selective etch
US9309598B2 (en) 2014-05-28 2016-04-12 Applied Materials, Inc. Oxide and metal removal
US9324576B2 (en) 2010-05-27 2016-04-26 Applied Materials, Inc. Selective etch for silicon films
US9343272B1 (en) 2015-01-08 2016-05-17 Applied Materials, Inc. Self-aligned process
US9349605B1 (en) 2015-08-07 2016-05-24 Applied Materials, Inc. Oxide etch selectivity systems and methods
US9355863B2 (en) 2012-12-18 2016-05-31 Applied Materials, Inc. Non-local plasma oxide etch
US9355856B2 (en) 2014-09-12 2016-05-31 Applied Materials, Inc. V trench dry etch
US9355862B2 (en) 2014-09-24 2016-05-31 Applied Materials, Inc. Fluorine-based hardmask removal
US9362130B2 (en) 2013-03-01 2016-06-07 Applied Materials, Inc. Enhanced etching processes using remote plasma sources
US9368364B2 (en) 2014-09-24 2016-06-14 Applied Materials, Inc. Silicon etch process with tunable selectivity to SiO2 and other materials
US9373522B1 (en) 2015-01-22 2016-06-21 Applied Mateials, Inc. Titanium nitride removal
US9373517B2 (en) 2012-08-02 2016-06-21 Applied Materials, Inc. Semiconductor processing with DC assisted RF power for improved control
US9378978B2 (en) 2014-07-31 2016-06-28 Applied Materials, Inc. Integrated oxide recess and floating gate fin trimming
US9378969B2 (en) 2014-06-19 2016-06-28 Applied Materials, Inc. Low temperature gas-phase carbon removal
US9384997B2 (en) 2012-11-20 2016-07-05 Applied Materials, Inc. Dry-etch selectivity
US9385028B2 (en) 2014-02-03 2016-07-05 Applied Materials, Inc. Air gap process
US9390937B2 (en) 2012-09-20 2016-07-12 Applied Materials, Inc. Silicon-carbon-nitride selective etch
US9396989B2 (en) 2014-01-27 2016-07-19 Applied Materials, Inc. Air gaps between copper lines
US9406523B2 (en) 2014-06-19 2016-08-02 Applied Materials, Inc. Highly selective doped oxide removal method
US9412608B2 (en) 2012-11-30 2016-08-09 Applied Materials, Inc. Dry-etch for selective tungsten removal
US9418858B2 (en) 2011-10-07 2016-08-16 Applied Materials, Inc. Selective etch of silicon by way of metastable hydrogen termination
US9425058B2 (en) 2014-07-24 2016-08-23 Applied Materials, Inc. Simplified litho-etch-litho-etch process
US9437451B2 (en) 2012-09-18 2016-09-06 Applied Materials, Inc. Radical-component oxide etch
US9449845B2 (en) 2012-12-21 2016-09-20 Applied Materials, Inc. Selective titanium nitride etching
US9449846B2 (en) 2015-01-28 2016-09-20 Applied Materials, Inc. Vertical gate separation
US9472417B2 (en) 2013-11-12 2016-10-18 Applied Materials, Inc. Plasma-free metal etch
US9478432B2 (en) 2014-09-25 2016-10-25 Applied Materials, Inc. Silicon oxide selective removal
US9496167B2 (en) 2014-07-31 2016-11-15 Applied Materials, Inc. Integrated bit-line airgap formation and gate stack post clean
US9493879B2 (en) 2013-07-12 2016-11-15 Applied Materials, Inc. Selective sputtering for pattern transfer
US9499898B2 (en) 2014-03-03 2016-11-22 Applied Materials, Inc. Layered thin film heater and method of fabrication
US9502258B2 (en) 2014-12-23 2016-11-22 Applied Materials, Inc. Anisotropic gap etch
US9553102B2 (en) 2014-08-19 2017-01-24 Applied Materials, Inc. Tungsten separation
US9576809B2 (en) 2013-11-04 2017-02-21 Applied Materials, Inc. Etch suppression with germanium
US9607856B2 (en) 2013-03-05 2017-03-28 Applied Materials, Inc. Selective titanium nitride removal
US9659753B2 (en) 2014-08-07 2017-05-23 Applied Materials, Inc. Grooved insulator to reduce leakage current
US9691645B2 (en) 2015-08-06 2017-06-27 Applied Materials, Inc. Bolted wafer chuck thermal management systems and methods for wafer processing systems
US9721789B1 (en) 2016-10-04 2017-08-01 Applied Materials, Inc. Saving ion-damaged spacers
US9728437B2 (en) 2015-02-03 2017-08-08 Applied Materials, Inc. High temperature chuck for plasma processing systems
US9741593B2 (en) 2015-08-06 2017-08-22 Applied Materials, Inc. Thermal management systems and methods for wafer processing systems
US9768034B1 (en) 2016-11-11 2017-09-19 Applied Materials, Inc. Removal methods for high aspect ratio structures
US9773648B2 (en) 2013-08-30 2017-09-26 Applied Materials, Inc. Dual discharge modes operation for remote plasma
US9842744B2 (en) 2011-03-14 2017-12-12 Applied Materials, Inc. Methods for etch of SiN films
US9847289B2 (en) 2014-05-30 2017-12-19 Applied Materials, Inc. Protective via cap for improved interconnect performance
US9865484B1 (en) 2016-06-29 2018-01-09 Applied Materials, Inc. Selective etch using material modification and RF pulsing
US9881805B2 (en) 2015-03-02 2018-01-30 Applied Materials, Inc. Silicon selective removal
US9885117B2 (en) 2014-03-31 2018-02-06 Applied Materials, Inc. Conditioned semiconductor system parts
US9887096B2 (en) 2012-09-17 2018-02-06 Applied Materials, Inc. Differential silicon oxide etch
US9934942B1 (en) 2016-10-04 2018-04-03 Applied Materials, Inc. Chamber with flow-through source
US9947549B1 (en) 2016-10-10 2018-04-17 Applied Materials, Inc. Cobalt-containing material removal
US10026621B2 (en) 2016-11-14 2018-07-17 Applied Materials, Inc. SiN spacer profile patterning
US10043674B1 (en) 2017-08-04 2018-08-07 Applied Materials, Inc. Germanium etching systems and methods
US10043684B1 (en) 2017-02-06 2018-08-07 Applied Materials, Inc. Self-limiting atomic thermal etching systems and methods
US10049891B1 (en) 2017-05-31 2018-08-14 Applied Materials, Inc. Selective in situ cobalt residue removal
US10062587B2 (en) 2012-07-18 2018-08-28 Applied Materials, Inc. Pedestal with multi-zone temperature control and multiple purge capabilities
US10062585B2 (en) 2016-10-04 2018-08-28 Applied Materials, Inc. Oxygen compatible plasma source
US10062575B2 (en) 2016-09-09 2018-08-28 Applied Materials, Inc. Poly directional etch by oxidation
US10062578B2 (en) 2011-03-14 2018-08-28 Applied Materials, Inc. Methods for etch of metal and metal-oxide films
US10062579B2 (en) 2016-10-07 2018-08-28 Applied Materials, Inc. Selective SiN lateral recess
US10128086B1 (en) 2017-10-24 2018-11-13 Applied Materials, Inc. Silicon pretreatment for nitride removal
US10163696B2 (en) 2016-11-11 2018-12-25 Applied Materials, Inc. Selective cobalt removal for bottom up gapfill
US10170336B1 (en) 2017-08-04 2019-01-01 Applied Materials, Inc. Methods for anisotropic control of selective silicon removal
US10170282B2 (en) 2013-03-08 2019-01-01 Applied Materials, Inc. Insulated semiconductor faceplate designs
US10224210B2 (en) 2014-12-09 2019-03-05 Applied Materials, Inc. Plasma processing system with direct outlet toroidal plasma source
US10242908B2 (en) 2016-11-14 2019-03-26 Applied Materials, Inc. Airgap formation with damage-free copper
US10256112B1 (en) 2017-12-08 2019-04-09 Applied Materials, Inc. Selective tungsten removal
US10283321B2 (en) 2011-01-18 2019-05-07 Applied Materials, Inc. Semiconductor processing system and methods using capacitively coupled plasma
US10283324B1 (en) 2017-10-24 2019-05-07 Applied Materials, Inc. Oxygen treatment for nitride etching
US10297458B2 (en) 2017-08-07 2019-05-21 Applied Materials, Inc. Process window widening using coated parts in plasma etch processes
US10319649B2 (en) 2017-04-11 2019-06-11 Applied Materials, Inc. Optical emission spectroscopy (OES) for remote plasma monitoring
US10319739B2 (en) 2017-02-08 2019-06-11 Applied Materials, Inc. Accommodating imperfectly aligned memory holes
US10319600B1 (en) 2018-03-12 2019-06-11 Applied Materials, Inc. Thermal silicon etch
US10354889B2 (en) 2017-07-17 2019-07-16 Applied Materials, Inc. Non-halogen etching of silicon-containing materials
US10403507B2 (en) 2017-02-03 2019-09-03 Applied Materials, Inc. Shaped etch profile with oxidation
US10431429B2 (en) 2017-02-03 2019-10-01 Applied Materials, Inc. Systems and methods for radial and azimuthal control of plasma uniformity
US10468267B2 (en) 2017-05-31 2019-11-05 Applied Materials, Inc. Water-free etching methods
US10490406B2 (en) 2018-04-10 2019-11-26 Appled Materials, Inc. Systems and methods for material breakthrough
US10490418B2 (en) 2014-10-14 2019-11-26 Applied Materials, Inc. Systems and methods for internal surface conditioning assessment in plasma processing equipment
US10497573B2 (en) 2018-03-13 2019-12-03 Applied Materials, Inc. Selective atomic layer etching of semiconductor materials
US10504754B2 (en) 2016-05-19 2019-12-10 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10504700B2 (en) 2015-08-27 2019-12-10 Applied Materials, Inc. Plasma etching systems and methods with secondary plasma injection
US10522371B2 (en) 2016-05-19 2019-12-31 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10541184B2 (en) 2017-07-11 2020-01-21 Applied Materials, Inc. Optical emission spectroscopic techniques for monitoring etching
US10541246B2 (en) 2017-06-26 2020-01-21 Applied Materials, Inc. 3D flash memory cells which discourage cross-cell electrical tunneling
US10546729B2 (en) 2016-10-04 2020-01-28 Applied Materials, Inc. Dual-channel showerhead with improved profile
US10566206B2 (en) 2016-12-27 2020-02-18 Applied Materials, Inc. Systems and methods for anisotropic material breakthrough
US10573527B2 (en) 2018-04-06 2020-02-25 Applied Materials, Inc. Gas-phase selective etching systems and methods
US10573496B2 (en) 2014-12-09 2020-02-25 Applied Materials, Inc. Direct outlet toroidal plasma source
US10593523B2 (en) 2014-10-14 2020-03-17 Applied Materials, Inc. Systems and methods for internal surface conditioning in plasma processing equipment
US10593560B2 (en) 2018-03-01 2020-03-17 Applied Materials, Inc. Magnetic induction plasma source for semiconductor processes and equipment
US10615047B2 (en) 2018-02-28 2020-04-07 Applied Materials, Inc. Systems and methods to form airgaps
US10629473B2 (en) 2016-09-09 2020-04-21 Applied Materials, Inc. Footing removal for nitride spacer
US10672642B2 (en) 2018-07-24 2020-06-02 Applied Materials, Inc. Systems and methods for pedestal configuration
US10679870B2 (en) 2018-02-15 2020-06-09 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus
US10699879B2 (en) 2018-04-17 2020-06-30 Applied Materials, Inc. Two piece electrode assembly with gap for plasma control
US10727080B2 (en) 2017-07-07 2020-07-28 Applied Materials, Inc. Tantalum-containing material removal
US10755941B2 (en) 2018-07-06 2020-08-25 Applied Materials, Inc. Self-limiting selective etching systems and methods
US10854426B2 (en) 2018-01-08 2020-12-01 Applied Materials, Inc. Metal recess for semiconductor structures
US10872778B2 (en) 2018-07-06 2020-12-22 Applied Materials, Inc. Systems and methods utilizing solid-phase etchants
US10886137B2 (en) 2018-04-30 2021-01-05 Applied Materials, Inc. Selective nitride removal
US10892198B2 (en) 2018-09-14 2021-01-12 Applied Materials, Inc. Systems and methods for improved performance in semiconductor processing
US10903054B2 (en) 2017-12-19 2021-01-26 Applied Materials, Inc. Multi-zone gas distribution systems and methods
US10920320B2 (en) 2017-06-16 2021-02-16 Applied Materials, Inc. Plasma health determination in semiconductor substrate processing reactors
US10920319B2 (en) 2019-01-11 2021-02-16 Applied Materials, Inc. Ceramic showerheads with conductive electrodes
US10943834B2 (en) 2017-03-13 2021-03-09 Applied Materials, Inc. Replacement contact process
US10964512B2 (en) 2018-02-15 2021-03-30 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus and methods
US11024486B2 (en) 2013-02-08 2021-06-01 Applied Materials, Inc. Semiconductor processing systems having multiple plasma configurations
US11049755B2 (en) 2018-09-14 2021-06-29 Applied Materials, Inc. Semiconductor substrate supports with embedded RF shield
US11062887B2 (en) 2018-09-17 2021-07-13 Applied Materials, Inc. High temperature RF heater pedestals
US11121002B2 (en) 2018-10-24 2021-09-14 Applied Materials, Inc. Systems and methods for etching metals and metal derivatives
US11239061B2 (en) 2014-11-26 2022-02-01 Applied Materials, Inc. Methods and systems to enhance process uniformity
US11257693B2 (en) 2015-01-09 2022-02-22 Applied Materials, Inc. Methods and systems to improve pedestal temperature control
US11276559B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Semiconductor processing chamber for multiple precursor flow
US11276590B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Multi-zone semiconductor substrate supports
US11328909B2 (en) 2017-12-22 2022-05-10 Applied Materials, Inc. Chamber conditioning and removal processes
US11417534B2 (en) 2018-09-21 2022-08-16 Applied Materials, Inc. Selective material removal
US11437242B2 (en) 2018-11-27 2022-09-06 Applied Materials, Inc. Selective removal of silicon-containing materials
US11594428B2 (en) 2015-02-03 2023-02-28 Applied Materials, Inc. Low temperature chuck for plasma processing systems
US11682560B2 (en) 2018-10-11 2023-06-20 Applied Materials, Inc. Systems and methods for hafnium-containing film removal
US11721527B2 (en) 2019-01-07 2023-08-08 Applied Materials, Inc. Processing chamber mixing systems

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1070346A1 (en) * 1998-04-02 2001-01-24 Applied Materials, Inc. Method for etching low k dielectrics
US6670695B1 (en) * 2000-02-29 2003-12-30 United Microelectronics Corp. Method of manufacturing anti-reflection layer
US7192532B2 (en) * 2001-04-19 2007-03-20 Tokyo Electron Limited Dry etching method
US6933243B2 (en) * 2002-02-06 2005-08-23 Applied Materials, Inc. High selectivity and residue free process for metal on thin dielectric gate etch application
JP2004031546A (en) * 2002-06-25 2004-01-29 Matsushita Electric Ind Co Ltd Method for manufacturing semiconductor device
US20060060565A9 (en) * 2002-09-16 2006-03-23 Applied Materials, Inc. Method of etching metals with high selectivity to hafnium-based dielectric materials
KR100540475B1 (en) * 2003-04-04 2006-01-10 주식회사 하이닉스반도체 Method for fabrication of semiconductor device capable of forming fine pattern
US6764927B1 (en) * 2003-04-24 2004-07-20 Taiwan Semiconductor Manufacturing Co., Ltd Chemical vapor deposition (CVD) method employing wetting pre-treatment
US7368392B2 (en) * 2003-07-10 2008-05-06 Applied Materials, Inc. Method of fabricating a gate structure of a field effect transistor having a metal-containing gate electrode
DE10331526A1 (en) * 2003-07-11 2005-02-03 Infineon Technologies Ag A method of anisotropically etching a recess in a silicon substrate and using a plasma etching
US7349567B2 (en) * 2004-03-05 2008-03-25 Electro Scientific Industries, Inc. Method and apparatus for determining angular pose of an object
US7652321B2 (en) * 2004-03-08 2010-01-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method of the same
JP3872069B2 (en) * 2004-04-07 2007-01-24 エルピーダメモリ株式会社 Manufacturing method of semiconductor device
KR100663355B1 (en) * 2005-01-25 2007-01-02 삼성전자주식회사 Method of forming a metal layer pattern and method of fabricating a image sensor device using the same
KR100663357B1 (en) 2005-02-22 2007-01-02 삼성전자주식회사 Methods of forming a transistor having a metal nitride layer pattern
WO2009004919A1 (en) 2007-06-29 2009-01-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US8569168B2 (en) 2012-02-13 2013-10-29 International Business Machines Corporation Dual-metal self-aligned wires and vias
WO2013180780A2 (en) * 2012-03-08 2013-12-05 D-Wave Systems Inc. Systems and methods for fabrication of superconducting integrated circuits
WO2014158955A1 (en) * 2013-03-12 2014-10-02 Applied Materials, Inc. Pinhole evaluation method of dielectric films for metal oxide semiconductor tft
JP6339963B2 (en) 2015-04-06 2018-06-06 東京エレクトロン株式会社 Etching method
US10367471B2 (en) * 2015-05-21 2019-07-30 Samsung Electro-Mechanics Co., Ltd. Resonator package and method of manufacturing the same
WO2018144601A1 (en) 2017-02-01 2018-08-09 D-Wave Systems Inc. Systems and methods for fabrication of superconducting integrated circuits
US11062897B2 (en) * 2017-06-09 2021-07-13 Lam Research Corporation Metal doped carbon based hard mask removal in semiconductor fabrication
US20200152851A1 (en) 2018-11-13 2020-05-14 D-Wave Systems Inc. Systems and methods for fabricating superconducting integrated circuits
US12102017B2 (en) 2019-02-15 2024-09-24 D-Wave Systems Inc. Kinetic inductance for couplers and compact qubits

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4786360A (en) * 1987-03-30 1988-11-22 International Business Machines Corporation Anisotropic etch process for tungsten metallurgy
US5338398A (en) 1991-03-28 1994-08-16 Applied Materials, Inc. Tungsten silicide etch process selective to photoresist and oxide
JP3210359B2 (en) 1991-05-29 2001-09-17 株式会社東芝 Dry etching method
EP0528564A2 (en) * 1991-08-20 1993-02-24 National Semiconductor Corporation Self-aligned stacked gate EPROM cell using tantalum oxide control gate dielectric
JPH05175170A (en) * 1991-12-20 1993-07-13 Nippon Steel Corp Method for etching tungsten
EP0575280A3 (en) * 1992-06-18 1995-10-04 Ibm Cmos transistor with two-layer inverse-t tungsten gate structure
JP2864967B2 (en) * 1993-11-01 1999-03-08 日本電気株式会社 Dry etching method for refractory metal film
JPH07147271A (en) * 1993-11-26 1995-06-06 Nec Corp Manufacture of semiconductor device
US5521119A (en) * 1994-07-13 1996-05-28 Taiwan Semiconductor Manufacturing Co. Post treatment of tungsten etching back
JP3028927B2 (en) 1996-02-16 2000-04-04 日本電気株式会社 Dry etching method for refractory metal film
JP3897372B2 (en) 1996-03-01 2007-03-22 芝浦メカトロニクス株式会社 Etching method of metal film
US6004874A (en) 1996-06-26 1999-12-21 Cypress Semiconductor Corporation Method for forming an interconnect
US5866483A (en) * 1997-04-04 1999-02-02 Applied Materials, Inc. Method for anisotropically etching tungsten using SF6, CHF3, and N2
US5907780A (en) * 1998-06-17 1999-05-25 Advanced Micro Devices, Inc. Incorporating silicon atoms into a metal oxide gate dielectric using gas cluster ion beam implantation
JP4060450B2 (en) 1998-07-10 2008-03-12 アプライド マテリアルズ インコーポレイテッド Dry etching method
US6033962A (en) 1998-07-24 2000-03-07 Vanguard International Semiconductor Corporation Method of fabricating sidewall spacers for a self-aligned contact hole
US6140023A (en) * 1998-12-01 2000-10-31 Advanced Micro Devices, Inc. Method for transferring patterns created by lithography
US6399507B1 (en) 1999-09-22 2002-06-04 Applied Materials, Inc. Stable plasma process for etching of films
US6277763B1 (en) * 1999-12-16 2001-08-21 Applied Materials, Inc. Plasma processing of tungsten using a gas mixture comprising a fluorinated gas and oxygen
US6423644B1 (en) * 2000-07-12 2002-07-23 Applied Materials, Inc. Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures

Cited By (216)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6931619B2 (en) * 2001-03-16 2005-08-16 Applied Materials, Inc. Apparatus for reshaping a patterned organic photoresist surface
US20030180634A1 (en) * 2001-03-16 2003-09-25 Alex Buxbaum Apparatus for reshaping a patterned organic photoresist surface
US20070272655A1 (en) * 2001-11-14 2007-11-29 Hitoshi Sakamoto Barrier metal film production method
US7659209B2 (en) * 2001-11-14 2010-02-09 Canon Anelva Corporation Barrier metal film production method
US20060278609A1 (en) * 2003-05-16 2006-12-14 Applied Materials, Inc. Method of determining wafer voltage in a plasma reactor from applied bias voltage and current and a pair of constants
US20070095788A1 (en) * 2003-05-16 2007-05-03 Hoffman Daniel J Method of controlling a chamber based upon predetermined concurrent behavoir of selected plasma parameters as a function of selected chamber paramenters
US20070029282A1 (en) * 2003-05-16 2007-02-08 Applied Materials, Inc. Method of processing a workpiece by controlling a set of plasma parameters through a set of chamber parameters using surfaces of constant value
US20070080139A1 (en) * 2003-05-16 2007-04-12 Hoffman Daniel J Method of controlling a chamber based upon predetermined concurrent behavior of selected plasma parameters as a function of source power, bias power and chamber pressure
US20070080140A1 (en) * 2003-05-16 2007-04-12 Hoffman Daniel J Plasma reactor control by translating desired values of m plasma parameters to values of n chamber parameters
US20070080138A1 (en) * 2003-05-16 2007-04-12 Hoffman Daniel J Method of characterizing a chamber based upon concurrent behavior of selected plasma parameters as a function of plural chamber parameters
US20070080137A1 (en) * 2003-05-16 2007-04-12 Hoffman Daniel J Method of characterizing a chamber based upon concurrent behavior of selected plasma parameters as a function of source power, bias power and chamber pressure
US20060283835A1 (en) * 2003-05-16 2006-12-21 Applied Materials, Inc. Method of operating a plasma reactor chamber with respect to two plasma parameters selected from a group comprising ion density, wafer voltage, etch rate and wafer current, by controlling chamber parameters of source power and bias power
US7795153B2 (en) 2003-05-16 2010-09-14 Applied Materials, Inc. Method of controlling a chamber based upon predetermined concurrent behavior of selected plasma parameters as a function of selected chamber parameters
US20060278610A1 (en) * 2003-05-16 2006-12-14 Applied Materials, Inc. Method of controlling chamber parameters of a plasma reactor in accordance with desired values of plural plasma parameters, by translating desired values for the plural plasma parameters to control values for each of the chamber parameters
US7910013B2 (en) 2003-05-16 2011-03-22 Applied Materials, Inc. Method of controlling a chamber based upon predetermined concurrent behavior of selected plasma parameters as a function of source power, bias power and chamber pressure
US7470626B2 (en) * 2003-05-16 2008-12-30 Applied Materials, Inc. Method of characterizing a chamber based upon concurrent behavior of selected plasma parameters as a function of source power, bias power and chamber pressure
US20060278608A1 (en) * 2003-05-16 2006-12-14 Hoffman Daniel J Method of determining plasma ion density, wafer voltage, etch rate and wafer current from applied bias voltage and current
US7901952B2 (en) * 2003-05-16 2011-03-08 Applied Materials, Inc. Plasma reactor control by translating desired values of M plasma parameters to values of N chamber parameters
US20070281479A1 (en) * 2006-06-02 2007-12-06 Applied Materials, Inc. Process including silo-chloro passivation for etching tungsten silicide overlying polysilicon
US7754610B2 (en) * 2006-06-02 2010-07-13 Applied Materials, Inc. Process for etching tungsten silicide overlying polysilicon particularly in a flash memory
US20070281477A1 (en) * 2006-06-02 2007-12-06 Applied Materials, Inc. Process for etching tungsten silicide overlying polysilicon particularly in a flash memory
US20130034961A1 (en) * 2010-05-26 2013-02-07 Spp Technologies Co., Ltd. Plasma Etching Method
US8628676B2 (en) * 2010-05-26 2014-01-14 Spp Technologies Co., Ltd. Plasma etching method
US9324576B2 (en) 2010-05-27 2016-04-26 Applied Materials, Inc. Selective etch for silicon films
US9754800B2 (en) 2010-05-27 2017-09-05 Applied Materials, Inc. Selective etch for silicon films
US10283321B2 (en) 2011-01-18 2019-05-07 Applied Materials, Inc. Semiconductor processing system and methods using capacitively coupled plasma
US9842744B2 (en) 2011-03-14 2017-12-12 Applied Materials, Inc. Methods for etch of SiN films
US10062578B2 (en) 2011-03-14 2018-08-28 Applied Materials, Inc. Methods for etch of metal and metal-oxide films
US9236266B2 (en) 2011-08-01 2016-01-12 Applied Materials, Inc. Dry-etch for silicon-and-carbon-containing films
US9418858B2 (en) 2011-10-07 2016-08-16 Applied Materials, Inc. Selective etch of silicon by way of metastable hydrogen termination
US10062587B2 (en) 2012-07-18 2018-08-28 Applied Materials, Inc. Pedestal with multi-zone temperature control and multiple purge capabilities
US10032606B2 (en) 2012-08-02 2018-07-24 Applied Materials, Inc. Semiconductor processing with DC assisted RF power for improved control
US9373517B2 (en) 2012-08-02 2016-06-21 Applied Materials, Inc. Semiconductor processing with DC assisted RF power for improved control
US20140054791A1 (en) * 2012-08-21 2014-02-27 Semiconductor Manufacturing International Corp. Through silicon via packaging structures and fabrication method
US8853077B2 (en) * 2012-08-21 2014-10-07 Semiconductor Manufacturing International Corp Through silicon via packaging structures and fabrication method
US9887096B2 (en) 2012-09-17 2018-02-06 Applied Materials, Inc. Differential silicon oxide etch
US9437451B2 (en) 2012-09-18 2016-09-06 Applied Materials, Inc. Radical-component oxide etch
US9390937B2 (en) 2012-09-20 2016-07-12 Applied Materials, Inc. Silicon-carbon-nitride selective etch
US9132436B2 (en) 2012-09-21 2015-09-15 Applied Materials, Inc. Chemical control features in wafer process equipment
US9978564B2 (en) 2012-09-21 2018-05-22 Applied Materials, Inc. Chemical control features in wafer process equipment
US10354843B2 (en) 2012-09-21 2019-07-16 Applied Materials, Inc. Chemical control features in wafer process equipment
US11264213B2 (en) 2012-09-21 2022-03-01 Applied Materials, Inc. Chemical control features in wafer process equipment
US9384997B2 (en) 2012-11-20 2016-07-05 Applied Materials, Inc. Dry-etch selectivity
US9412608B2 (en) 2012-11-30 2016-08-09 Applied Materials, Inc. Dry-etch for selective tungsten removal
US9355863B2 (en) 2012-12-18 2016-05-31 Applied Materials, Inc. Non-local plasma oxide etch
US9449845B2 (en) 2012-12-21 2016-09-20 Applied Materials, Inc. Selective titanium nitride etching
US11024486B2 (en) 2013-02-08 2021-06-01 Applied Materials, Inc. Semiconductor processing systems having multiple plasma configurations
US9362130B2 (en) 2013-03-01 2016-06-07 Applied Materials, Inc. Enhanced etching processes using remote plasma sources
US10424485B2 (en) 2013-03-01 2019-09-24 Applied Materials, Inc. Enhanced etching processes using remote plasma sources
US9607856B2 (en) 2013-03-05 2017-03-28 Applied Materials, Inc. Selective titanium nitride removal
US10170282B2 (en) 2013-03-08 2019-01-01 Applied Materials, Inc. Insulated semiconductor faceplate designs
US20140273451A1 (en) * 2013-03-13 2014-09-18 Applied Materials, Inc. Tungsten deposition sequence
US9704723B2 (en) 2013-03-15 2017-07-11 Applied Materials, Inc. Processing systems and methods for halide scavenging
US9449850B2 (en) 2013-03-15 2016-09-20 Applied Materials, Inc. Processing systems and methods for halide scavenging
US9659792B2 (en) 2013-03-15 2017-05-23 Applied Materials, Inc. Processing systems and methods for halide scavenging
US9153442B2 (en) 2013-03-15 2015-10-06 Applied Materials, Inc. Processing systems and methods for halide scavenging
US9493879B2 (en) 2013-07-12 2016-11-15 Applied Materials, Inc. Selective sputtering for pattern transfer
US9773648B2 (en) 2013-08-30 2017-09-26 Applied Materials, Inc. Dual discharge modes operation for remote plasma
US9209012B2 (en) 2013-09-16 2015-12-08 Applied Materials, Inc. Selective etch of silicon nitride
US9576809B2 (en) 2013-11-04 2017-02-21 Applied Materials, Inc. Etch suppression with germanium
US9236265B2 (en) 2013-11-04 2016-01-12 Applied Materials, Inc. Silicon germanium processing
US9472417B2 (en) 2013-11-12 2016-10-18 Applied Materials, Inc. Plasma-free metal etch
US9711366B2 (en) 2013-11-12 2017-07-18 Applied Materials, Inc. Selective etch for metal-containing materials
US9520303B2 (en) 2013-11-12 2016-12-13 Applied Materials, Inc. Aluminum selective etch
US9472412B2 (en) 2013-12-02 2016-10-18 Applied Materials, Inc. Procedure for etch rate consistency
US9245762B2 (en) 2013-12-02 2016-01-26 Applied Materials, Inc. Procedure for etch rate consistency
US9117855B2 (en) 2013-12-04 2015-08-25 Applied Materials, Inc. Polarity control for remote plasma
US9263278B2 (en) 2013-12-17 2016-02-16 Applied Materials, Inc. Dopant etch selectivity control
US9287095B2 (en) 2013-12-17 2016-03-15 Applied Materials, Inc. Semiconductor system assemblies and methods of operation
US9190293B2 (en) 2013-12-18 2015-11-17 Applied Materials, Inc. Even tungsten etch for high aspect ratio trenches
US9287134B2 (en) 2014-01-17 2016-03-15 Applied Materials, Inc. Titanium oxide etch
US9396989B2 (en) 2014-01-27 2016-07-19 Applied Materials, Inc. Air gaps between copper lines
US9293568B2 (en) 2014-01-27 2016-03-22 Applied Materials, Inc. Method of fin patterning
US9385028B2 (en) 2014-02-03 2016-07-05 Applied Materials, Inc. Air gap process
US9499898B2 (en) 2014-03-03 2016-11-22 Applied Materials, Inc. Layered thin film heater and method of fabrication
US9299575B2 (en) 2014-03-17 2016-03-29 Applied Materials, Inc. Gas-phase tungsten etch
US9564296B2 (en) 2014-03-20 2017-02-07 Applied Materials, Inc. Radial waveguide systems and methods for post-match control of microwaves
US9299538B2 (en) 2014-03-20 2016-03-29 Applied Materials, Inc. Radial waveguide systems and methods for post-match control of microwaves
US9299537B2 (en) 2014-03-20 2016-03-29 Applied Materials, Inc. Radial waveguide systems and methods for post-match control of microwaves
US9837249B2 (en) 2014-03-20 2017-12-05 Applied Materials, Inc. Radial waveguide systems and methods for post-match control of microwaves
US9136273B1 (en) 2014-03-21 2015-09-15 Applied Materials, Inc. Flash gate air gap
US9903020B2 (en) 2014-03-31 2018-02-27 Applied Materials, Inc. Generation of compact alumina passivation layers on aluminum plasma equipment components
US9885117B2 (en) 2014-03-31 2018-02-06 Applied Materials, Inc. Conditioned semiconductor system parts
US9269590B2 (en) 2014-04-07 2016-02-23 Applied Materials, Inc. Spacer formation
US10465294B2 (en) 2014-05-28 2019-11-05 Applied Materials, Inc. Oxide and metal removal
US9309598B2 (en) 2014-05-28 2016-04-12 Applied Materials, Inc. Oxide and metal removal
US9847289B2 (en) 2014-05-30 2017-12-19 Applied Materials, Inc. Protective via cap for improved interconnect performance
US9378969B2 (en) 2014-06-19 2016-06-28 Applied Materials, Inc. Low temperature gas-phase carbon removal
US9406523B2 (en) 2014-06-19 2016-08-02 Applied Materials, Inc. Highly selective doped oxide removal method
US9425058B2 (en) 2014-07-24 2016-08-23 Applied Materials, Inc. Simplified litho-etch-litho-etch process
US9773695B2 (en) 2014-07-31 2017-09-26 Applied Materials, Inc. Integrated bit-line airgap formation and gate stack post clean
US9159606B1 (en) 2014-07-31 2015-10-13 Applied Materials, Inc. Metal air gap
US9496167B2 (en) 2014-07-31 2016-11-15 Applied Materials, Inc. Integrated bit-line airgap formation and gate stack post clean
US9378978B2 (en) 2014-07-31 2016-06-28 Applied Materials, Inc. Integrated oxide recess and floating gate fin trimming
US9165786B1 (en) 2014-08-05 2015-10-20 Applied Materials, Inc. Integrated oxide and nitride recess for better channel contact in 3D architectures
US9659753B2 (en) 2014-08-07 2017-05-23 Applied Materials, Inc. Grooved insulator to reduce leakage current
US9553102B2 (en) 2014-08-19 2017-01-24 Applied Materials, Inc. Tungsten separation
US9355856B2 (en) 2014-09-12 2016-05-31 Applied Materials, Inc. V trench dry etch
US9355862B2 (en) 2014-09-24 2016-05-31 Applied Materials, Inc. Fluorine-based hardmask removal
US9368364B2 (en) 2014-09-24 2016-06-14 Applied Materials, Inc. Silicon etch process with tunable selectivity to SiO2 and other materials
US9478434B2 (en) 2014-09-24 2016-10-25 Applied Materials, Inc. Chlorine-based hardmask removal
US9837284B2 (en) 2014-09-25 2017-12-05 Applied Materials, Inc. Oxide etch selectivity enhancement
US9613822B2 (en) 2014-09-25 2017-04-04 Applied Materials, Inc. Oxide etch selectivity enhancement
US9478432B2 (en) 2014-09-25 2016-10-25 Applied Materials, Inc. Silicon oxide selective removal
US10593523B2 (en) 2014-10-14 2020-03-17 Applied Materials, Inc. Systems and methods for internal surface conditioning in plasma processing equipment
US10707061B2 (en) 2014-10-14 2020-07-07 Applied Materials, Inc. Systems and methods for internal surface conditioning in plasma processing equipment
US10796922B2 (en) 2014-10-14 2020-10-06 Applied Materials, Inc. Systems and methods for internal surface conditioning assessment in plasma processing equipment
US10490418B2 (en) 2014-10-14 2019-11-26 Applied Materials, Inc. Systems and methods for internal surface conditioning assessment in plasma processing equipment
US11637002B2 (en) 2014-11-26 2023-04-25 Applied Materials, Inc. Methods and systems to enhance process uniformity
US11239061B2 (en) 2014-11-26 2022-02-01 Applied Materials, Inc. Methods and systems to enhance process uniformity
US9299583B1 (en) 2014-12-05 2016-03-29 Applied Materials, Inc. Aluminum oxide selective etch
US10573496B2 (en) 2014-12-09 2020-02-25 Applied Materials, Inc. Direct outlet toroidal plasma source
US10224210B2 (en) 2014-12-09 2019-03-05 Applied Materials, Inc. Plasma processing system with direct outlet toroidal plasma source
US9502258B2 (en) 2014-12-23 2016-11-22 Applied Materials, Inc. Anisotropic gap etch
US9343272B1 (en) 2015-01-08 2016-05-17 Applied Materials, Inc. Self-aligned process
US11257693B2 (en) 2015-01-09 2022-02-22 Applied Materials, Inc. Methods and systems to improve pedestal temperature control
US9373522B1 (en) 2015-01-22 2016-06-21 Applied Mateials, Inc. Titanium nitride removal
US9449846B2 (en) 2015-01-28 2016-09-20 Applied Materials, Inc. Vertical gate separation
US9728437B2 (en) 2015-02-03 2017-08-08 Applied Materials, Inc. High temperature chuck for plasma processing systems
US11594428B2 (en) 2015-02-03 2023-02-28 Applied Materials, Inc. Low temperature chuck for plasma processing systems
US12009228B2 (en) 2015-02-03 2024-06-11 Applied Materials, Inc. Low temperature chuck for plasma processing systems
US10468285B2 (en) 2015-02-03 2019-11-05 Applied Materials, Inc. High temperature chuck for plasma processing systems
US9881805B2 (en) 2015-03-02 2018-01-30 Applied Materials, Inc. Silicon selective removal
US10468276B2 (en) 2015-08-06 2019-11-05 Applied Materials, Inc. Thermal management systems and methods for wafer processing systems
US9741593B2 (en) 2015-08-06 2017-08-22 Applied Materials, Inc. Thermal management systems and methods for wafer processing systems
US10607867B2 (en) 2015-08-06 2020-03-31 Applied Materials, Inc. Bolted wafer chuck thermal management systems and methods for wafer processing systems
US10147620B2 (en) 2015-08-06 2018-12-04 Applied Materials, Inc. Bolted wafer chuck thermal management systems and methods for wafer processing systems
US11158527B2 (en) 2015-08-06 2021-10-26 Applied Materials, Inc. Thermal management systems and methods for wafer processing systems
US9691645B2 (en) 2015-08-06 2017-06-27 Applied Materials, Inc. Bolted wafer chuck thermal management systems and methods for wafer processing systems
US9349605B1 (en) 2015-08-07 2016-05-24 Applied Materials, Inc. Oxide etch selectivity systems and methods
US10424463B2 (en) 2015-08-07 2019-09-24 Applied Materials, Inc. Oxide etch selectivity systems and methods
US10424464B2 (en) 2015-08-07 2019-09-24 Applied Materials, Inc. Oxide etch selectivity systems and methods
US10504700B2 (en) 2015-08-27 2019-12-10 Applied Materials, Inc. Plasma etching systems and methods with secondary plasma injection
US11476093B2 (en) 2015-08-27 2022-10-18 Applied Materials, Inc. Plasma etching systems and methods with secondary plasma injection
US11735441B2 (en) 2016-05-19 2023-08-22 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10504754B2 (en) 2016-05-19 2019-12-10 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US10522371B2 (en) 2016-05-19 2019-12-31 Applied Materials, Inc. Systems and methods for improved semiconductor etching and component protection
US9865484B1 (en) 2016-06-29 2018-01-09 Applied Materials, Inc. Selective etch using material modification and RF pulsing
US12057329B2 (en) 2016-06-29 2024-08-06 Applied Materials, Inc. Selective etch using material modification and RF pulsing
US10062575B2 (en) 2016-09-09 2018-08-28 Applied Materials, Inc. Poly directional etch by oxidation
US10629473B2 (en) 2016-09-09 2020-04-21 Applied Materials, Inc. Footing removal for nitride spacer
US9934942B1 (en) 2016-10-04 2018-04-03 Applied Materials, Inc. Chamber with flow-through source
US10224180B2 (en) 2016-10-04 2019-03-05 Applied Materials, Inc. Chamber with flow-through source
US9721789B1 (en) 2016-10-04 2017-08-01 Applied Materials, Inc. Saving ion-damaged spacers
US10546729B2 (en) 2016-10-04 2020-01-28 Applied Materials, Inc. Dual-channel showerhead with improved profile
US10541113B2 (en) 2016-10-04 2020-01-21 Applied Materials, Inc. Chamber with flow-through source
US11049698B2 (en) 2016-10-04 2021-06-29 Applied Materials, Inc. Dual-channel showerhead with improved profile
US10062585B2 (en) 2016-10-04 2018-08-28 Applied Materials, Inc. Oxygen compatible plasma source
US10062579B2 (en) 2016-10-07 2018-08-28 Applied Materials, Inc. Selective SiN lateral recess
US10319603B2 (en) 2016-10-07 2019-06-11 Applied Materials, Inc. Selective SiN lateral recess
US9947549B1 (en) 2016-10-10 2018-04-17 Applied Materials, Inc. Cobalt-containing material removal
US10770346B2 (en) 2016-11-11 2020-09-08 Applied Materials, Inc. Selective cobalt removal for bottom up gapfill
US9768034B1 (en) 2016-11-11 2017-09-19 Applied Materials, Inc. Removal methods for high aspect ratio structures
US10186428B2 (en) 2016-11-11 2019-01-22 Applied Materials, Inc. Removal methods for high aspect ratio structures
US10163696B2 (en) 2016-11-11 2018-12-25 Applied Materials, Inc. Selective cobalt removal for bottom up gapfill
US10026621B2 (en) 2016-11-14 2018-07-17 Applied Materials, Inc. SiN spacer profile patterning
US10600639B2 (en) 2016-11-14 2020-03-24 Applied Materials, Inc. SiN spacer profile patterning
US10242908B2 (en) 2016-11-14 2019-03-26 Applied Materials, Inc. Airgap formation with damage-free copper
US10566206B2 (en) 2016-12-27 2020-02-18 Applied Materials, Inc. Systems and methods for anisotropic material breakthrough
US10431429B2 (en) 2017-02-03 2019-10-01 Applied Materials, Inc. Systems and methods for radial and azimuthal control of plasma uniformity
US10903052B2 (en) 2017-02-03 2021-01-26 Applied Materials, Inc. Systems and methods for radial and azimuthal control of plasma uniformity
US10403507B2 (en) 2017-02-03 2019-09-03 Applied Materials, Inc. Shaped etch profile with oxidation
US10043684B1 (en) 2017-02-06 2018-08-07 Applied Materials, Inc. Self-limiting atomic thermal etching systems and methods
US10325923B2 (en) 2017-02-08 2019-06-18 Applied Materials, Inc. Accommodating imperfectly aligned memory holes
US10529737B2 (en) 2017-02-08 2020-01-07 Applied Materials, Inc. Accommodating imperfectly aligned memory holes
US10319739B2 (en) 2017-02-08 2019-06-11 Applied Materials, Inc. Accommodating imperfectly aligned memory holes
US10943834B2 (en) 2017-03-13 2021-03-09 Applied Materials, Inc. Replacement contact process
US10319649B2 (en) 2017-04-11 2019-06-11 Applied Materials, Inc. Optical emission spectroscopy (OES) for remote plasma monitoring
US11276559B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Semiconductor processing chamber for multiple precursor flow
US11276590B2 (en) 2017-05-17 2022-03-15 Applied Materials, Inc. Multi-zone semiconductor substrate supports
US11361939B2 (en) 2017-05-17 2022-06-14 Applied Materials, Inc. Semiconductor processing chamber for multiple precursor flow
US11915950B2 (en) 2017-05-17 2024-02-27 Applied Materials, Inc. Multi-zone semiconductor substrate supports
US10468267B2 (en) 2017-05-31 2019-11-05 Applied Materials, Inc. Water-free etching methods
US10497579B2 (en) 2017-05-31 2019-12-03 Applied Materials, Inc. Water-free etching methods
US10049891B1 (en) 2017-05-31 2018-08-14 Applied Materials, Inc. Selective in situ cobalt residue removal
US10920320B2 (en) 2017-06-16 2021-02-16 Applied Materials, Inc. Plasma health determination in semiconductor substrate processing reactors
US10541246B2 (en) 2017-06-26 2020-01-21 Applied Materials, Inc. 3D flash memory cells which discourage cross-cell electrical tunneling
US10727080B2 (en) 2017-07-07 2020-07-28 Applied Materials, Inc. Tantalum-containing material removal
US10541184B2 (en) 2017-07-11 2020-01-21 Applied Materials, Inc. Optical emission spectroscopic techniques for monitoring etching
US10354889B2 (en) 2017-07-17 2019-07-16 Applied Materials, Inc. Non-halogen etching of silicon-containing materials
US10593553B2 (en) 2017-08-04 2020-03-17 Applied Materials, Inc. Germanium etching systems and methods
US10043674B1 (en) 2017-08-04 2018-08-07 Applied Materials, Inc. Germanium etching systems and methods
US10170336B1 (en) 2017-08-04 2019-01-01 Applied Materials, Inc. Methods for anisotropic control of selective silicon removal
US11101136B2 (en) 2017-08-07 2021-08-24 Applied Materials, Inc. Process window widening using coated parts in plasma etch processes
US10297458B2 (en) 2017-08-07 2019-05-21 Applied Materials, Inc. Process window widening using coated parts in plasma etch processes
US10128086B1 (en) 2017-10-24 2018-11-13 Applied Materials, Inc. Silicon pretreatment for nitride removal
US10283324B1 (en) 2017-10-24 2019-05-07 Applied Materials, Inc. Oxygen treatment for nitride etching
US10256112B1 (en) 2017-12-08 2019-04-09 Applied Materials, Inc. Selective tungsten removal
US10903054B2 (en) 2017-12-19 2021-01-26 Applied Materials, Inc. Multi-zone gas distribution systems and methods
US11328909B2 (en) 2017-12-22 2022-05-10 Applied Materials, Inc. Chamber conditioning and removal processes
US10861676B2 (en) 2018-01-08 2020-12-08 Applied Materials, Inc. Metal recess for semiconductor structures
US10854426B2 (en) 2018-01-08 2020-12-01 Applied Materials, Inc. Metal recess for semiconductor structures
US10679870B2 (en) 2018-02-15 2020-06-09 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus
US10964512B2 (en) 2018-02-15 2021-03-30 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus and methods
US10699921B2 (en) 2018-02-15 2020-06-30 Applied Materials, Inc. Semiconductor processing chamber multistage mixing apparatus
US10615047B2 (en) 2018-02-28 2020-04-07 Applied Materials, Inc. Systems and methods to form airgaps
US10593560B2 (en) 2018-03-01 2020-03-17 Applied Materials, Inc. Magnetic induction plasma source for semiconductor processes and equipment
US11004689B2 (en) 2018-03-12 2021-05-11 Applied Materials, Inc. Thermal silicon etch
US10319600B1 (en) 2018-03-12 2019-06-11 Applied Materials, Inc. Thermal silicon etch
US10497573B2 (en) 2018-03-13 2019-12-03 Applied Materials, Inc. Selective atomic layer etching of semiconductor materials
US10573527B2 (en) 2018-04-06 2020-02-25 Applied Materials, Inc. Gas-phase selective etching systems and methods
US10490406B2 (en) 2018-04-10 2019-11-26 Appled Materials, Inc. Systems and methods for material breakthrough
US10699879B2 (en) 2018-04-17 2020-06-30 Applied Materials, Inc. Two piece electrode assembly with gap for plasma control
US10886137B2 (en) 2018-04-30 2021-01-05 Applied Materials, Inc. Selective nitride removal
US10872778B2 (en) 2018-07-06 2020-12-22 Applied Materials, Inc. Systems and methods utilizing solid-phase etchants
US10755941B2 (en) 2018-07-06 2020-08-25 Applied Materials, Inc. Self-limiting selective etching systems and methods
US10672642B2 (en) 2018-07-24 2020-06-02 Applied Materials, Inc. Systems and methods for pedestal configuration
US10892198B2 (en) 2018-09-14 2021-01-12 Applied Materials, Inc. Systems and methods for improved performance in semiconductor processing
US11049755B2 (en) 2018-09-14 2021-06-29 Applied Materials, Inc. Semiconductor substrate supports with embedded RF shield
US11062887B2 (en) 2018-09-17 2021-07-13 Applied Materials, Inc. High temperature RF heater pedestals
US11417534B2 (en) 2018-09-21 2022-08-16 Applied Materials, Inc. Selective material removal
US11682560B2 (en) 2018-10-11 2023-06-20 Applied Materials, Inc. Systems and methods for hafnium-containing film removal
US11121002B2 (en) 2018-10-24 2021-09-14 Applied Materials, Inc. Systems and methods for etching metals and metal derivatives
US11437242B2 (en) 2018-11-27 2022-09-06 Applied Materials, Inc. Selective removal of silicon-containing materials
US11721527B2 (en) 2019-01-07 2023-08-08 Applied Materials, Inc. Processing chamber mixing systems
US10920319B2 (en) 2019-01-11 2021-02-16 Applied Materials, Inc. Ceramic showerheads with conductive electrodes

Also Published As

Publication number Publication date
WO2002065539A1 (en) 2002-08-22
US20020028582A1 (en) 2002-03-07
JP2004519102A (en) 2004-06-24
US6579806B2 (en) 2003-06-17
KR20030066673A (en) 2003-08-09
EP1350265A1 (en) 2003-10-08
US6440870B1 (en) 2002-08-27

Similar Documents

Publication Publication Date Title
US6440870B1 (en) Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
US6423644B1 (en) Method of etching tungsten or tungsten nitride electrode gates in semiconductor structures
US6380095B1 (en) Silicon trench etch using silicon-containing precursors to reduce or avoid mask erosion
US5164330A (en) Etchback process for tungsten utilizing a NF3/AR chemistry
US5958801A (en) Anisotropic etch method
US5935877A (en) Etch process for forming contacts over titanium silicide
US6589879B2 (en) Nitride open etch process based on trifluoromethane and sulfur hexafluoride
US7361607B2 (en) Method for multi-layer resist plasma etch
US6531404B1 (en) Method of etching titanium nitride
US6503845B1 (en) Method of etching a tantalum nitride layer in a high density plasma
US7413992B2 (en) Tungsten silicide etch process with reduced etch rate micro-loading
JP3028312B2 (en) Dry etching method for multilayer film of semiconductor device
US20030092280A1 (en) Method for etching tungsten using NF3 and Cl2
US20020132488A1 (en) Method of etching tantalum
JP2003332312A (en) Manufacturing method of semiconductor device
TW501199B (en) Method for enhancing etching of TiSix
EP0933805A2 (en) Process for anisotropic etching of nitride layer with selectivity to oxide
WO2000029640A1 (en) Method for residue-free anisotropic etching of aluminum and its alloys
JPH08339987A (en) Wiring forming method
JP3358179B2 (en) Plasma etching method for polysilicon layer
JP3283611B2 (en) Method for manufacturing semiconductor device
KR980012064A (en) A monocrystalline silicon etching method
JPH08340004A (en) Wiring forming method
JP2003303817A (en) Etching method
KR20050063058A (en) Method for forming capacitor of semiconductor device

Legal Events

Date Code Title Description
REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20070617