TWI584264B - Display control circuit and operation method thereof - Google Patents

Description

Display control circuit and operation method thereof

The present invention relates to a display control circuit, and more particularly to a display control circuit including a charging unit, a writing unit, and a holding unit so as to control the state of charge of the liquid crystal capacitor.

In the field of liquid crystal display, in a display control circuit (for example, a pixel control circuit of a liquid crystal display), a driving transistor serving as a source follower can control whether a data voltage is written to a liquid crystal capacitor. However, this driving transistor is prone to ageing with long-term use, resulting in an influence on the gray scale accuracy of the liquid crystal display.

At present, the display control circuit of the six-transistor-two-capacitor (also known as 6T2C) architecture can be seen in the art, which can detect the threshold voltage drift of the source follower transistor and compensate it, thereby alleviating the influence of the aging of the transistor. The display control circuit of the 6T2C architecture consists of six transistors and two capacitors, four control lines and three reference power lines, for a total of seven signal lines.

In addition, at present, a display control circuit of a six-transistor-three capacitor (also known as 6T3C) architecture can be seen in the art, which can also be used to compensate for the threshold voltage drift of the driving transistor. The display control circuit of the 6T3C architecture consists of six transistors and three capacitors, three control lines and two reference power lines, for a total of five signal lines.

As mentioned above, current display control circuits typically include at least six transistors and five to seven signal lines. The display control circuits of the above 6T2C architecture and 6T3C architecture are complicated in structure, and the number of components and signal lines is too large, resulting in an aperture ratio being too low and a light transmission effect being poor. Therefore, there is still a need for a better solution in the field of liquid crystal display to increase the aperture ratio, simplify the circuit structure, reduce the number of components and signal lines, and avoid the deterioration of display gray scale due to aging of the transistor.

An embodiment of the present invention provides a display control circuit including a liquid crystal capacitor, a charging unit, a writing unit, a sustaining unit, and a first capacitor. The liquid crystal capacitor includes a first end and a second end, and the second end of the liquid crystal capacitor is coupled to a common voltage terminal for displaying according to a data voltage. The charging unit includes a first end, a control end and a second end, and the second end of the charging unit is coupled to the first end of the liquid crystal capacitor. The writing unit includes a first end, a second end, and a control end, and the first end of the writing unit is configured to receive the data voltage. The sustaining unit includes a first end, a second end, and a control end. The first end of the holding unit is coupled to the second end of the writing unit, and the second end of the maintaining unit is coupled to the first end of the liquid crystal capacitor. The first capacitor includes a first end and a second end. The first end of the first capacitor is coupled to the control end of the charging unit, and the second end of the first capacitor is coupled to the second end of the writing unit.

Another embodiment of the present invention provides a method of operating a display control circuit. The display control circuit includes a liquid crystal capacitor, a charging unit, a writing unit, a maintaining unit, a switch and a first capacitor. The first end of the charging unit is configured to receive an operating voltage, and the first end of the liquid crystal capacitor is coupled to the second end of the charging unit The second end of the liquid crystal capacitor is coupled to the common voltage terminal, the switch has a first switch and a second end, and the control end of the charging unit is coupled to the second end of the switch, and the first end of the first capacitor is coupled to the charging unit The second end of the first capacitor is coupled to the second end of the write unit, and the first end of the write unit is configured to receive the data voltage, and the operation method comprises: maintaining the write unit off during the reset phase State, open the switch and the maintenance unit, adjust the level of the first end of the switch to turn on the charging unit, and adjust the operating voltage to reset the level of the first end of the liquid crystal capacitor; during the compensation phase after the reset phase, the adjustment operation The voltage is charged to the first end of the liquid crystal capacitor through the charging unit, so that the first end of the liquid crystal capacitor is charged to a predetermined level; in the writing stage after the compensation phase, the maintaining unit and the switch are turned off, and the opening is performed. Writing the unit such that the first end of the first capacitor is raised to the sum of the data voltage and the threshold voltage; in the sustain phase after the writing phase, the writing unit is turned off to make the level of the first end of the liquid crystal capacitor substantially The upper portion corresponds to the data voltage; and during the display phase after the sustain phase, the level of the first end of the switch is adjusted to turn off the charging unit.

Another embodiment of the present invention provides a method for operating a display control circuit. The display control circuit includes a charging unit, a writing unit, a maintaining unit, a first capacitor, a third switch, and a liquid crystal capacitor. The charging unit includes a charging unit. a first switch and a second switch, the first end of the second switch is configured to receive an operating voltage, and the second end of the second switch is coupled to the first end of the first switch and the third switch One end of the first switch is coupled to the second end of the first switch and the first end of the first switch, and the second end of the first switch is coupled to the first end of the liquid crystal capacitor and The second end of one of the liquid crystal capacitors is coupled to a common voltage terminal, and the first end of the one of the sustaining units is coupled to the second end of the first capacitor and the second end of the writing unit The first end of the writing unit is configured to receive a data voltage, and the operating method includes: turning on the second and third switches, the writing unit, and the maintaining unit to reset the second end of the first capacitor during a reset phase And resetting the second end of the first switch to a predetermined level, The level difference between the control end and the second end of the first switch is greater than a threshold value, thereby turning on the first switch; in a compensation phase after the reset phase, the writing unit is turned off to charge the first end of the first capacitor Go to a first potential, and charge the second end of the first capacitor to a difference between the first potential and the threshold; in a write phase after the compensation phase, turn off the third switch and the sustain unit, and turn on the write a unit, wherein the data voltage is written to the second end of the first capacitor, and the level of the first end of the first capacitor is raised to a sum of the data voltage and the threshold value; and the write phase is turned off during a sustain period after the writing phase The unit is input such that the level of the second end of the first switch corresponds to the data voltage; and the second switch is turned off during a display phase subsequent to the sustain phase.

The display control circuit provided by the embodiment of the present invention can have a simplified structure, a smaller number of components, and a smaller number of signals, so that the aperture ratio can be improved and the display efficiency can be improved. In addition, the display control circuit provided by the embodiment of the present invention can still compensate. The critical voltage drift of the transistor.

1 is a schematic diagram of a display control circuit 100 in accordance with an embodiment of the present invention. The display control circuit 100 includes a liquid crystal capacitor 110, a charging unit 120, a writing unit 130, a sustaining unit 140, a first capacitor 150, and a second capacitor 160. The liquid crystal capacitor 110 includes a first end and a second end, and the second end is coupled to the common voltage terminal V _{COM for} displaying according to the data voltage Vd. The charging unit 120 can include a first end, a control end, and a second end coupled to the first end of the liquid crystal capacitor 110. The writing unit 130 can include a first end, a second end, and a control end, and the first end can be used to receive the data voltage Vd. The sustaining unit 140 can include a first end, a second end, and a control end. The first end of the holding unit 140 is coupled to the second end of the writing unit 130, and the second end is coupled to the first end of the liquid crystal capacitor 110. The first capacitor 150 can include a first end and a second end. The first end is coupled to the control end of the charging unit 120 , and the second end is coupled to the second end of the writing unit 130 . The second capacitor 160 can include a first end and a second end, and the first end is coupled to the second end of the first capacitor 150.

Fig. 2 is a schematic diagram of a display control circuit 100a according to another embodiment of the present invention. The display control circuit 100a has an architecture similar to the display control circuit 100, but may further include a sustain capacitor 170. The sustaining capacitor 170 can include a first end and a second end. The first end is coupled to the first end of the liquid crystal capacitor 110, and the second end is coupled to the common voltage terminal V _COM . The sustain capacitor 170 can help the liquid crystal capacitor 110 maintain the level, which can be used as needed. The liquid crystal capacitor 110 is used to indicate the capacitance corresponding to the liquid crystal element, and the liquid crystal element is used for light-emitting display.

FIG. 3 is a schematic diagram of a display control circuit 300 in accordance with an embodiment of the present invention. The display control circuit 300 can be composed of a plurality of switches, capacitors, and signal lines based on the architectures of FIGS. 1 and 2. In the display control circuit 300, the charging unit 120 can include a first switch T1, which can include a first end for receiving the operating voltage V _DD and a second end coupled to the first end of the liquid crystal capacitor 110. The writing unit 130 can include a second switch T2. The second switch T2 can include a first end, a control end, and a second end. The first end is configured to receive the data voltage Vd, the control end is controlled by the control signal S2, and the second end is coupled. Connected to the first end of the second capacitor 160. The maintenance unit 140 may include a third switch T3, the maintenance unit 140 may include a first end, a second end, and a control end, the first end is coupled to the second end of the second switch T2, and the control end is configured to receive the control signal S1, The second end is coupled to the second end of the first switch T1. The display control circuit 300 may further include a fourth switch T4. The fourth switch T4 can include a first end, a second end, and a control end. The first end is coupled to the second end of the second capacitor 160. The control end is coupled to the control end of the third switch T3 and is also controlled by the control signal S1. Control, the second end is coupled to the control end of the first switch T1. In this embodiment, the first end of the fourth switch T4 and the second end of the second capacitor 160 are coupled to the reference potential V _REF .

Fig. 4 is an operational waveform diagram of the display control circuit 300 of the embodiment of Fig. 3. 5 to 9 are operational explanatory views of the display control circuit 300 of the embodiment of Fig. 3. In Fig. 4, the waveforms of the control signals S1, S2, the operating voltage V _DD , and the reference potential V _REF correspond to the reset phase P1, the compensation phase P2, the writing phase P3, the sustain phase P4, and the display phase P5. This five stages can be cycled.

The fifth map may correspond to the reset phase P1 after the display phase P5. The components of the cross (symbol □) indicate off (off), and the uncrossed components indicate on (on), and the following figures are similar. In the reset phase P1, the second switch T2 can be turned off by the control signal S2, and the third switch T3 and the fourth switch T4 can be turned on by the control signal S1, so that the reference potential V _{REF of the} high level V _{REF_H} is turned on at the first switch T1. To reset the level of the first end (node C) of the liquid crystal capacitor 110. At this time, the operating voltage V _DD can be adjusted to the low level V _DDL , so the level of the first end (node C) of the liquid crystal capacitor 110 can be reset to the low level V _DDL through the first switch T1 that is turned on, The first end (node B) of the three switch T3 can also be reset to the low level V _DDL through the turned-on third switch T3.

Figure 6 may correspond to the compensation phase P2 after the reset phase P1. In the compensation phase, the operating voltage V _DD can be adjusted to a high level V _DDH , and the second switch T2 can be continuously turned off by the control signal S2, and the third switch T3 and the fourth switch T4 can be continuously turned on by the control signal S1, thereby At this time, the reference potential V _{REF of the} high level V _{REF — H} continues to turn on the first switch T1 to charge the first end (node C) of the liquid crystal capacitor 110 through the first switch T1 to make the first end of the liquid crystal capacitor 110 (node C) And the first end (node B) of the third switch T3 is charged to a predetermined level at which the first switch T1 is turned off. The predetermined level can be the difference between the reference potential V _REF and the threshold voltage V _TH of the first switch T1, that is, (V _REF -V _TH ). The reference potential V _{REF at} this stage can be the high level V _{REF — H} , so the first end of the liquid crystal capacitor 110 (node C) and the first end of the third switch T3 (node B) can be charged to (V _{REF _H} - V _The potential of _TH ), at this time, the potential difference between the first end (node A) of the first capacitor 150 and the first end (node B) of the third switch T3 is the threshold voltage V _TH .

Figure 7 may correspond to the write phase P3 after the compensation phase P2. In the writing phase P3, the control signals S1, S2 can be adjusted to turn off the third switch T3 and the fourth switch T4, and turn on the second switch T2. Since the first capacitor 150 already has a potential difference of the threshold voltage V _TH , the first end (node A) of the first capacitor 150 can be raised to the sum of the data voltage Vd and the threshold voltage V _TH , that is, (Vd+V _TH ).

The eighth figure may correspond to the sustain phase P4 after the writing phase P3. In the sustaining phase P4, the control signal S2 can be adjusted to turn off the second switch T2, and the third switch T3 and the fourth switch T4 can be continuously turned off by the control signal S1. At this time, the control terminal and the second terminal of the first switch T1 may have a voltage difference of the threshold voltage V _TH , so the level of the second end (node C) of the first switch T1 may be the level of the node A minus the threshold. Voltage V _TH . The operating voltage V _DD can be maintained at a high level V _DDH to continuously charge the node C through the first switch T1, so that the level of the node C is charged to [(Vd+V _TH )-V _{TH in} the sustain phase P4] , that is, the data voltage Vd. Therefore, according to the embodiment of the present invention, the level of the first end (node C) of the liquid crystal capacitor 110 can be substantially corresponding to the data voltage Vd in the sustaining phase P4, so that the liquid crystal capacitor 110 is displayed according to the data voltage Vd.

The ninth figure may correspond to the display phase P5 after the maintenance phase P4. In the display phase P5, the reference level V _REF can be adjusted to the low level V _REF — _L , and the second switch T2, the third switch T3 and the fourth switch T4 can be continuously turned off by the control signal S1 and the control signal S2 to make the node B The second capacitor 160 is coupled to a low level. Since nodes A and B are floating to each other through the first capacitor 150 at this time, they can be regarded as nodes A and B in series. Therefore, the node A can also be coupled to the low level through the first capacitor 150, so that the first switch T1 can be turned off. As shown in FIG. 9, in the display phase P5, the liquid crystal capacitor 110 can control the liquid crystal molecules sandwiched therebetween according to the data voltage Vd, thereby controlling the polarization of the light passing through the liquid crystal molecules, thereby achieving the effect of controlling the gray scale of the pixels. Moreover, the first switch T1 to the fourth switch T4 are all turned off, so that the aging of the transistor in the switch can be slowed down, and the leakage of the node C can be suppressed.

Fig. 10 is a graph showing the measurement results of the examples of Figs. 3 to 9. The horizontal axis of Fig. 10 may be time, the unit may be microseconds (μsec), the vertical axis may be voltage, and the unit may be Volt. The curves VA0, VA3, VA3' can be the voltage changes of node A of the third, fifth, and fifth diagrams, respectively. The curves VC0, VC3, VC3' can be the voltage changes of node C of the third, fifth, and fifth diagrams, respectively. The curves VA0 and VC0 may be the difference between the threshold voltage V _{TH of the} transistor and the predetermined level being 0 volts, that is, the measurement result when the threshold voltage is not offset, and the curves VA3 and VC3 may be the threshold voltage of the transistor. The difference between V _TH and the predetermined level is +3 volts, that is, the measurement result when the threshold voltage is shifted by +3 volts, and the curves VA3' and VC3' may be the difference between the threshold voltage V _{TH of the} transistor and the predetermined level. The value is -3 volts, which is the measurement result when the threshold voltage is shifted by -3 volts. In addition, the waveform diagram of FIG. 10 can also be seen as the control signal S2, and the control signal S2 can be corresponding to the writing phase P3 when it is in the high state. As can be seen from Fig. 10, when the threshold voltage _VTH varies from -3 to +3 volts, the levels of the curves VC0, VC3, and VC3' are almost the same in the post-maintenance phase P4 and the display phase P5. In other words, according to the embodiments of the third to ninth embodiments of the present invention, the level of the first end (node C) of the liquid crystal capacitor 110 can be illuminated corresponding to the data voltage Vd, and can be reduced by the drift variation of the threshold voltage _VTH .

In the third to ninth views, it can be seen that in this embodiment, if the first switch T1 to the fourth switch T4 are all transistors, the display control circuit 300 has four transistors. Since the sustain capacitor 170 can be selectively used or omitted, the display control circuit 300 includes three capacitors of the liquid crystal capacitor 110, the first capacitor 150, and the second capacitor 160. Therefore, the embodiments of FIGS. 3 to 9 can provide a display control circuit of a four-transistor-three-capacitor (referred to as 4T3C) architecture. The signal line has four signal lines corresponding to the operating voltage V _DD , the reference potential V _REF , the control signal S1 and the control signal S2. Therefore, the number of components and the number of signal lines of the display control circuit provided by the embodiments of the present invention are small compared to the foregoing 6T2C architecture (at least seven signal lines are required) or the 6T3C architecture (at least five signal lines are required). The aperture ratio, and still has the effect of compensating for the drift variation of the threshold voltage _VTH , thereby maintaining the grayscale accuracy of the display.

Figure 11 is a flow chart showing the operational steps of the display control circuit 300 of the embodiment of the present invention. Steps 1110 to 1150 may correspond to the stages of Figures 5 to 9, respectively:

Step 1110: In the reset phase P1 after the display phase P5, maintaining the closed state of the second switch T2, turning on the third switch T3 and the fourth switch T4, adjusting the reference level V _REF to the high level V _{REF_H} to turn on the first switch T1, and adjusting the operating voltage V _DD to the low level V _DDL to reset the level of the first end of the liquid crystal capacitor 110;

Step 1120: Adjust the operating voltage V _DD to the high level V _DDH during the compensation phase P2 after the reset phase P1 to charge the first end of the liquid crystal capacitor 110 through the first switch T1, so that the first end of the liquid crystal capacitor 110 is Charging to a predetermined level;

Step 1130: In the writing phase P3 after the compensation phase P2, the third switch T3 and the fourth switch T4 are turned off, and the second switch T2 is turned on, so that the first end of the first capacitor 110 is raised to approximately the data voltage Vd. And the sum of the threshold voltages V _TH ;

Step 1140: In the sustain phase P4 after the writing phase P3, the second switch T2 is turned off, so that the level of the first end of the liquid crystal capacitor 110 substantially corresponds to the data voltage Vd;

Step 1150: In the display phase P5 after the sustain phase P4, the reference level V _{REF is} adjusted to the low level V _REF — _L to turn off the charging unit 120 to prevent leakage.

Figure 12 is a schematic illustration of a display control circuit 1100 in accordance with another embodiment of the present invention. The display control circuit 1100 can be composed of a plurality of switches, capacitors, and signal lines based on the architectures of FIGS. 1 and 2. As shown in the first, second and eleventh diagrams, in the display control circuit 1100, the charging unit 120 may include a first switch T1 and a second switch T2. The first switch T1 can include a first end, a second end, and a control end. The second end of the first switch T1 can be the second end of the charging unit 120, and the control end of the first switch T1 can be the control end of the charging unit 120. . The second switch T2 can include a first end, a second end, and a control end. The first end of the second switch T2 can be the first end of the charging unit 120, and the second end of the second switch T2 can be coupled to the first switch. The first end of T1 and the control end of the second switch T2 can be controlled by the control signal S1. The writing unit 130 includes a fifth switch T5. The fifth switch T5 can include a first end, a second end, and a control end. The first end of the fifth switch T5 can be used to receive the data voltage Vd, and the control end of the fifth switch T5 can be controlled by the control signal S3, and the fifth switch T5. The second end is coupled to the second end of the first capacitor 150. The maintaining unit 140 may include a fourth switch T4, and the control end of the fourth switch T4 may be controlled by the control signal S2. The display control circuit 1100 can further include a third switch T3. The third switch T3 can include a first end, a second end, and a control end. The first end of the third switch T3 can be coupled to the first end of the first transistor T1. The control terminal of the third switch T3 is coupled to the control terminal of the maintenance unit 140, and is also controlled by the control signal S2. The second end of the third switch T3 can be coupled to the first end of the first capacitor 150. According to an embodiment of the invention, the second end of the second capacitor 160 of the display control circuit 1100 can be coupled to the common voltage terminal V _{COM ,} but not limited to.

Fig. 13 is an operation waveform diagram of the display control circuit 1100 of the embodiment of Fig. 12. 14 to 18 are operational explanatory diagrams of the display control circuit 1100 of the embodiment of Fig. 12. In Fig. 13, the waveforms of the control signals S1, S2 and S3 and the operating voltage V _DD can be adjusted to correspond to the reset phase P1, the reset phase P1, the compensation phase P2, the write phase P3, the sustain phase P4, and the display phase P5. . This five stages can be cycled.

The 14th figure may correspond to the reset phase P1 after the display phase P5. In the reset phase P1, the second to fifth switches T2-T5 may be turned on, and the data voltage Vd may reset the first end (node C) of the second capacitor 160 and the second end (node B) of the first switch T1 To a predetermined level, such as a sufficiently low level. When the potential difference between the node A and the node B reaches the threshold voltage V _TH of the first switch T1, the first switch T1 can be turned on.

Figure 15 may correspond to the compensation phase P2 after the reset phase P1. In the compensation phase P2, the control signal S3 can be adjusted to turn off the fifth switch T5, so that the operating voltage V _DD charges the first end (node A) of the first capacitor 150 to the first potential (eg, the operating voltage V _DD is high) The level V _DDH ), and the second end (node C) of the first capacitor 150 is charged to a difference between the first potential and the threshold value V _TH1 . Therefore, the operating voltage V _DD can pass through the first switch T1 and the second switch T2 to charge the potentials of the nodes B and C to the level of (V _DDH -V _TH1 ), so that the first capacitor 150 stores the threshold value V _TH1 . Potential difference. The threshold value V _TH1 may be the threshold voltage V _TH of the first switch T1.

Figure 16 may correspond to the write phase P3 after the compensation phase P2. In the writing phase P3, the control signals S2, S3 can be controlled to turn off the third switch T3 and the fourth switch T4, and turn on the fifth switch T5, so that the data voltage Vd is written to the second end of the first capacitor 150 (node C), and raising the level of the first end (node A) of the first capacitor 150 to the sum of the data voltage Vd and the threshold value V _TH1 . At this time, the operating voltage V _DD can be adjusted to the low level V _DDL , so the node B can be pulled to the low level V _DDL through the first switch T1 and the second switch T2 to make the control end and the second end of the first switch T1 The voltage difference at the terminals is sufficient to ensure that the first switch T1 is turned on.

The 17th figure may correspond to the sustaining phase P4 after the writing phase P3. At this stage, the control signal S3 can be adjusted to turn off the fifth switch T5. The operating voltage V _DD can be adjusted to a high level V _DDH to charge the first end (node B) of the liquid crystal capacitor 110 through the first switch T1 and the second switch T2. At this time, the first switch T1 and the second switch T2 may be source followers, and the node B may be charged to the level of the node A and the threshold value V _TH1 by the low level V _{DDL of the} writing phase P3. The difference, ie {(Vd+V _TH1 )-V _TH1 }, is the data voltage Vd. Therefore, the sustain phase P4 can control the length of time for charging the node B, and can make the level of the second end of the first switch T1 correspond to the data voltage Vd.

The figure 18 may correspond to the display phase P5 after the maintenance phase P4. In the display phase P5, the control signal S1 can be adjusted to turn off the second switch T2 to prevent leakage of the node B. Thereby achieving the effect of inhibiting the aging of the transistor.

Fig. 19 is a graph showing the measurement results of the examples of Figs. 11 to 17. Similarly, in Figure 10, the horizontal axis can be time (in microseconds) and the vertical axis can be voltage (in volts). The curves VA0, VB0, and VC0 are the level changes of the nodes A, B, and C of FIG. 12, respectively, which may correspond to the threshold voltage V _{TH of the} switch and the difference of the predetermined level is 0 volts (ie, the threshold voltage is not offset) The circuit of the transistor. The curves VA3, VB3, and VC3 are the level changes of the nodes A, B, and C of FIG. 12, respectively, which may correspond to the threshold voltage V _{TH of the} switch and the difference of the predetermined level is +3 volts (ie, the threshold voltage offset) +3 volt) circuit of the transistor. According to FIG. 18, the curves VB0 and VB3 are almost superposed in the latter stage of the sustaining phase P4 to the display phase P5, so that the level of the node B can be prevented from being affected by the drift of the threshold voltage _VTH , thereby maintaining the accurate gray scale of the liquid crystal capacitor 110. degree. The display control circuit 1100 of the embodiment of FIGS. 12 to 19 includes five transistors (T1 to T5) and three capacitors (110, 150, 160), which may be referred to as a 5T3C architecture, and the signal lines must be at least four (corresponding to Control signal S1-S3 and operating voltage V _DD ), therefore, the display control circuit provided by the embodiment of the present invention is compared with the conventional 6T2C architecture (at least seven signal lines are required) or the 6T3C architecture (at least five signal lines are required) The number of components and the number of signal lines are small, the aperture ratio can be increased, and the effect of compensating for the drift variation of the threshold voltage V _TH can be maintained, thereby maintaining the gray scale accuracy of the display.

Figure 20 is a flow chart showing the operation of the display control circuit 1100 shown in Figures 12 to 18. Steps 2010 to 2050 may correspond to the 14th to 18th drawings: Step 2010: In the reset phase P1 after the display phase P5, the second to fifth switches T2-T5 are turned on to set the first end of the second capacitor 160 and the first The second end of the switch T1 is reset to a predetermined level, so that the level difference between the control end and the second end of the first switch T1 is greater than the threshold value V _TH1 , thereby turning on the first switch T1; step 2020: in the reset phase In the compensation phase P2 after P1, the fifth switch T5 is turned off to charge the first end of the first capacitor 150 to the first potential (such as the high level V _DDH ), and the second end of the first capacitor 150 is charged to The difference between the first potential and the threshold value V _TH1 , such as (V _DDH -V _TH1 ); Step 2030: In the writing phase P3 after the compensation phase P2, the third switch T3 and the fourth switch T4 are turned off, and the fifth is turned on. The switch T5 is configured to write the data voltage Vd to the second end of the first capacitor 150, and raise the level of the first end of the first capacitor 150 to a sum of the data voltage Vd and the threshold value V _TH1 ; step 2040: In the sustain phase P4 after the writing phase P3, the fifth switch T5 is turned off, so that the level of the second end of the first switch T1 corresponds to Voltage Vd is material; and Step 2050: in stage P5 after displaying the maintenance phase P4, turn off the second switch T2, to prevent leakage.

For each of the above switches, a normally-off or normally-on transistor can be used, and the N-type gold-oxygen half-field effect transistor and the P-type gold-oxygen half-field effect transistor can be selected according to the needs of the developer. Crystal, bipolar junction transistor or other switching element of similar principle. The display control circuit provided by the embodiment of the invention can be applied to a general liquid crystal display, and can also be applied to a blue phase liquid crystal.

In summary, the display control circuit provided by the embodiment of the present invention can have a simplified structure, a smaller number of components, and a smaller number of signals, so that the aperture ratio can be improved and the display efficiency can be improved. In addition, the display control circuit provided by the embodiment of the present invention is provided. The threshold voltage drift of the transistor can still be compensated, so that the gray scale accuracy of the liquid crystal display can be maintained, which is helpful for improving the lack of the display control circuit known in the art. The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

100, 100a, 300, 1100‧‧‧ display control circuit

110‧‧‧Liquid Crystal Capacitor

120‧‧‧Charging unit

130‧‧‧Write unit

140‧‧‧Maintenance unit

150‧‧‧first capacitor

160‧‧‧second capacitor

170‧‧‧Maintenance capacitor

Vd‧‧‧ data voltage

V _COM ‧‧‧Common voltage terminal

V _DD ‧‧‧ operating voltage

V _DDH , V _{REF_H} ‧‧‧ high level

V _DDL , V _{REF_L} ‧‧‧ low level

S1, S2, S3‧‧‧ control signals

V _REF ‧‧‧ reference potential

VA0, VA3, VA3', VC0, VC3, VC3', VB0, VB3‧‧‧ curves

V _TH ‧‧‧ threshold voltage

V _TH1 ‧‧‧ threshold

A, B, C‧‧‧ nodes

P1‧‧‧Reset phase

P2‧‧‧ Compensation phase

P3‧‧‧writing stage

P4‧‧‧Maintenance phase

P5‧‧‧ display stage

T1‧‧‧ first switch

T2‧‧‧ second switch

T3‧‧‧ third switch

T4‧‧‧fourth switch

T5‧‧‧ fifth switch

1110 to 1150, 2010 to 2050‧‧ steps

Figure 1 is a schematic diagram of a display control circuit in accordance with an embodiment of the present invention. Figure 2 is a schematic diagram of a display control circuit in accordance with another embodiment of the present invention. Figure 3 is a schematic diagram of a display control circuit in accordance with an embodiment of the present invention. Fig. 4 is a waveform diagram showing the operation of the display control circuit of the embodiment of Fig. 3. Figures 5-9 may be operational illustrations of the display control circuit of the embodiment of Figure 3. Fig. 10 is a graph showing the measurement results of the examples of Figs. 3 to 9. Figure 11 is a flow chart showing the operational steps of the display control circuit of the embodiment of the present invention. Figure 12 is a schematic diagram of a display control circuit in accordance with another embodiment of the present invention. Fig. 13 is an operation waveform diagram of the display control circuit of the embodiment of Fig. 12. Fig. 14-18 is an operation explanatory diagram of the display control circuit of the embodiment of Fig. 12. Fig. 19 is a graph showing the measurement results of the examples of Figs. 11 to 17. Figure 20 is a flow chart showing the operation of the display control circuit shown in Figures 12 to 18.

100‧‧‧Display control circuit

110‧‧‧Liquid Crystal Capacitor

120‧‧‧Charging unit

130‧‧‧Write unit

140‧‧‧Maintenance unit

150‧‧‧first capacitor

160‧‧‧second capacitor

Vd‧‧‧ data voltage

V _COM ‧‧‧Common voltage terminal

V _DD ‧‧‧ operating voltage

Claims (9)

A display control circuit comprising: a liquid crystal capacitor, comprising a first end, and a second end coupled to a common voltage terminal for displaying according to a data voltage; a charging unit comprising a first end, a control And the second end is coupled to the first end of the liquid crystal capacitor; the writing unit includes a first end for receiving the data voltage, a second end, and a control end; The unit includes a first end coupled to the second end of the write unit, a second end coupled to the first end of the liquid crystal capacitor, and a control end; a first capacitor comprising The first end is coupled to the control end of the charging unit, and the second end is coupled to the second end of the writing unit; and a second capacitor, the second capacitor includes a first end, The second end of the first capacitor is coupled to the second end, and the second end is coupled to the common voltage terminal. The display control circuit of claim 1, further comprising a sustaining capacitor, the sustaining capacitor comprising a first end coupled to the first end of the liquid crystal capacitor, and a second end coupled to the common voltage end. The display control circuit of claim 1 or 2, wherein the charging unit comprises a first switch, the first switch has a first end for receiving an operating voltage, and a second end coupled to the a first end of the liquid crystal capacitor and a control end; the write unit includes a second switch, the second switch has a first end for receiving the data voltage, and a second end; the maintenance unit includes a third switch having a first end coupled to the second switch The second end and the second end are coupled to the second end of the first switch and a control end; and the display control circuit further includes a fourth switch, the fourth switch has a first end The control terminal, the control terminal coupled to the third switch, and the second terminal are coupled to the control terminal of the first switch. The display control circuit of claim 3, wherein the second open relationship is used for a reset phase, a compensation phase, a sustain phase, and a display phase to be turned off, and is turned on in a write phase; The third open relationship is used for the reset phase and the compensation phase is turned on, and is closed during the write phase, the maintenance phase and the display phase; and the fourth open relationship is used for the reset phase and the compensation The phase is turned on and is turned off during the write phase, the sustain phase, and the display phase. The display control circuit of claim 1 or 2, wherein the charging unit comprises: a first switch comprising a first end, a second end and a control end, wherein the second end of the first switch is used The second end of the charging unit is the control end of the charging unit; and the second switch includes a first end, a second end, and a control end. The first end of the second switch is used as the first end of the charging unit, the second end of the second switch is coupled to the first end of the first switch; the writing unit includes a fifth end a switch, the fifth switch includes a first end and a second end, the first end of the fifth switch is configured to receive the data voltage, and the second end of the fifth switch is coupled to the The second terminal of the first capacitor; the display unit further includes a third switch, the third switch includes a first end, a control end and a second end, The first end of the third switch is coupled to the first end of the first transistor, the control end of the third switch is coupled to the control end of the third unit, and the second end of the third switch The end is coupled to the first end of the first capacitor. The display control circuit of claim 5, wherein the second open relationship is used for a reset phase, a compensation phase, a write phase, and a sustain phase, and is turned off during a display phase; The third open relationship is opened during the reset phase and the compensation phase, and is closed during the write phase, the maintenance phase and the display phase; the fourth open relationship is used for the reset phase and the compensation The phase is opened, and the write phase, the maintenance phase and the display phase are closed; and the fifth open relationship is used for the reset phase and the write phase to be turned on, and during the compensation phase, the maintenance The phase and the display phase are closed. The display control circuit of claim 1, wherein the liquid crystal capacitor comprises a liquid crystal display medium. An operation method of a display control circuit, the display control circuit includes a liquid crystal capacitor, a charging unit, a writing unit, a sustaining unit, a switch and a first capacitor, and the first end of the charging unit is configured to receive a The operating voltage, the first end of the liquid crystal capacitor is coupled to the second end of the charging unit, and the second end of the liquid crystal capacitor is coupled to a common voltage end, the switch has a first And a second end, the control end of the charging unit is coupled to the second end of the switch, and the first end of the first capacitor is coupled to the control end of the charging unit, the first capacitor A second end is coupled to the second end of the write unit, and the first end of the write unit is configured to receive a data voltage, the method includes: maintaining the write unit in a reset phase Turning off the switch and the maintaining unit, adjusting the level of the first end of the switch to turn on the charging unit, and adjusting the operating voltage to reset the level of the first end of the liquid crystal capacitor; a compensation phase after the reset phase, adjusting the operating voltage to charge the first end of the liquid crystal capacitor through the charging unit, so that the first end of the liquid crystal capacitor is charged to a predetermined level; a subsequent writing phase, turning off the sustaining unit and the switch, and turning on the writing unit, so that the first end of the first capacitor is raised to a sum of the data voltage and a threshold voltage; Close the maintenance phase after the phase And entering the unit such that the level of the first end of the liquid crystal capacitor substantially corresponds to the data voltage; and in a display stage after the maintaining phase, adjusting the level of the first end of the switch to close the Charging unit. A display control circuit includes a charging unit, a writing unit, a maintaining unit, a first capacitor, a third switch and a liquid crystal capacitor, the charging unit including a first switch and a a second switch, the first end of the second switch is configured to receive an operating voltage, and the second end of the second switch is coupled to the first end of the first switch and the first end of the third switch The first end of the first switch is coupled to the second end of the third switch and the first end of the first capacitor, and the second end of the first switch is coupled to one of the liquid crystal capacitors a first end and a second end of the sustaining unit, wherein the second end of the liquid crystal capacitor is coupled to a common voltage terminal, and the maintaining unit a first end is coupled to the second end of the first capacitor, and the second end of the writing unit, the first end of the writing unit is configured to receive a data voltage, and the operation method includes: In a reset phase, the second and third switches, the writing unit and the maintaining unit are turned on to reset the second end of the first capacitor and the second end of the first switch to a predetermined level a bit such that the level difference between the control terminal and the second terminal of the first switch is greater than a threshold value, thereby turning on the first switch; in a compensation phase after the reset phase, the writing unit is turned off to Charging the first end of the first capacitor to a first potential, and charging the second end of the first capacitor to a difference between the first potential and the threshold; one after the compensation phase In the writing phase, the third switch and the sustaining unit are turned off, and the writing unit is turned on to write the data voltage to the second end of the first capacitor, and the first end of the first capacitor The level is raised to the sum of the data voltage and the threshold; a maintenance after the writing phase Section, close the writing unit, so that the level of the second terminal of the first switch of the voltage corresponding to the data; and a display phase to the maintenance phase after closing the second switch.