TWI424413B - Pixel circuit of an active matrix organic light-emitting diode display device - Google Patents
Pixel circuit of an active matrix organic light-emitting diode display device Download PDFInfo
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本發明係有關於一種主動矩陣有機發光二極體顯示器之像素電路，更明確的說，係有關於一種改善磁滯效應所造成影像殘留之主動矩陣有機發光二極體顯示器之像素電路。The present invention relates to a pixel circuit of an active matrix organic light emitting diode display, and more particularly to a pixel circuit of an active matrix organic light emitting diode display for improving image sticking caused by hysteresis.
請參考第1圖。第1圖係為傳統的主動矩陣有機發光二極體顯示器(Active Matrix Organic Light-Emitting Diode,AMOLED)之像素電路100之示意圖。像素電路100係為兩電晶體一電容(2T1C)的電路，包含一N型薄膜電晶體102、一P型薄膜電晶體104、一電容106及一有機發光二極體108。N型薄膜電晶體102係為開關，P型薄膜電晶體104係提供有機發光二極體108驅動電流IOLED 。N型薄膜電晶體102根據掃描訊號Ss將資料電壓Sd寫入至電容106。當像素電路100驅動像素時，藉由改變P型薄膜電晶體104的閘極電壓來控制流過有機發光二極體108的驅動電流IOLED 達到顯示不同灰階的目的，其中面板上每個像素之像素電路100的接地端OVSS都電連接在一起，而電源端OVDD亦電連接在一起。Please refer to Figure 1. FIG. 1 is a schematic diagram of a pixel circuit 100 of a conventional Active Matrix Organic Light-Emitting Diode (AMOLED). The pixel circuit 100 is a circuit of two transistors and a capacitor (2T1C), and includes an N-type thin film transistor 102, a P-type thin film transistor 104, a capacitor 106, and an organic light-emitting diode 108. The N-type thin film transistor 102 is a switch, and the P-type thin film transistor 104 is provided with an organic light-emitting diode 108 driving current I OLED . The N-type thin film transistor 102 writes the data voltage Sd to the capacitor 106 in accordance with the scanning signal Ss. When the pixel circuit 100 drives the pixel, the driving current I OLED flowing through the organic light emitting diode 108 is controlled to change the driving voltage I OLED of the P type thin film transistor 104 to achieve different gray scales, wherein each pixel on the panel The ground terminal OVSS of the pixel circuit 100 is electrically connected together, and the power supply terminal OVDD is also electrically connected together.
當像素電路100驅動像素時，驅動電流IOLED 持續流過P型薄膜電晶體104至有機發光二極體108，因此P型薄膜電晶體104持續承受電壓應力(voltage stress)，使P型薄膜電晶體104產生磁滯效應 (hysteresis)而導致面板切換灰階畫面時會有影像殘留的現象發生；尤其當P型薄膜電晶體104持續承受電壓應力的時間越長，面板切換灰階畫面時之影像殘留現象亦趨嚴重。When the pixel circuit 100 drives the pixel, the driving current I OLED continues to flow through the P-type thin film transistor 104 to the organic light emitting diode 108, so the P-type thin film transistor 104 continues to withstand voltage stress, so that the P-type thin film is electrically The crystal 104 generates a hysteresis effect, which causes image sticking when the panel switches the gray scale image; especially when the P-type thin film transistor 104 continues to withstand the voltage stress for a long time, the panel switches the gray scale image. The residual phenomenon is also becoming more serious.
本發明揭露一種主動矩陣有機發光二極體顯示器之像素電路。該像素電路包含一資料開關、一第一開關、一第二開關、一第三開關、一第四開關、一電容以及一有機發光二極體。該資料開關具有一第一端、一第二端及一第三端，該第一端用以接收一資料電壓，該第二端用以接收一掃描訊號。該第一開關，具有一第一端、一第二端及一第三端，該第一端用以接收一第一電壓，該第二端用以接收一第一開關訊號。該第二開關具有一第一端、一第二端及一第三端，該第一端用以接收該第一電壓，該第二端用以接收一第二開關訊號。該第三開關具有一第一端、一第二端及一第三端，該第一端耦接於該第一開關之該第三端，該第二端耦接於該資料開關之該第三端。該第四開關具有一第一端、一第二端及一第三端，該第一端耦接於該第二開關之該第三端，該第二端耦接於該資料開關之該第三端。該電容具有一第一端及一第二端，該第一端用以接收該第一電壓，該第二端耦接於該資料開關之該第三端。該有機發光二極體，具有一第一端及一第二端，該第一端耦接於該第三開關及該第四開關之該第三端，該第二端用以接收一第二電壓。The invention discloses a pixel circuit of an active matrix organic light emitting diode display. The pixel circuit includes a data switch, a first switch, a second switch, a third switch, a fourth switch, a capacitor, and an organic light emitting diode. The data switch has a first end, a second end and a third end. The first end is for receiving a data voltage, and the second end is for receiving a scan signal. The first switch has a first end, a second end, and a third end. The first end is configured to receive a first voltage, and the second end is configured to receive a first switching signal. The second switch has a first end, a second end, and a third end. The first end is configured to receive the first voltage, and the second end is configured to receive a second switching signal. The third switch has a first end, a second end, and a third end. The first end is coupled to the third end of the first switch, and the second end is coupled to the data switch. Three ends. The fourth switch has a first end, a second end, and a third end, the first end is coupled to the third end of the second switch, and the second end is coupled to the data switch Three ends. The capacitor has a first end for receiving the first voltage, and a second end coupled to the third end of the data switch. The OLED has a first end and a second end, the first end is coupled to the third end of the third switch and the fourth switch, and the second end is configured to receive a second end Voltage.
本發明另揭露一種主動矩陣有機發光二極體顯示器之像素電路。該像素電路包含一資料開關、一有機發光二極體、一第一開關、一第二開關、一第三開關、一第四開關以及一電容。該資料開關具有一第一端、一第二端及一第三端，該第一端用以接收一資料電壓，該第二端用以接收一掃描訊號。該有機發光二極體具有一第一端及一第二端，該第一端用以接收一第一電壓。該第一開關具有一第一端、一第二端及一第三端，該第一端耦接於該有機發光二極體之該第二端，該第二端用以接收一第一開關訊號。該第二開關具有一第一端、一第二端及一第三端，該第一端耦接於該有機發光二極體之該第二端，該第二端用以接收一第二開關訊號。該第三開關具有一第一端、一第二端及一第三端，該第一端耦接於該第一開關之該第三端，該第二端耦接於該資料開關之該第三端，該第三端用以接收一第二電壓。該第四開關具有一第一端、一第二端及一第三端，該第一端耦接於該第二開關之該第三端，該第二端耦接於該資料開關之該第三端，該第三端用以接收該第二電壓。該電容具有一第一端及一第二端，該第一端耦接於該資料開關之該第三端，該第二端用以接收該第二電壓。The invention further discloses a pixel circuit of an active matrix organic light emitting diode display. The pixel circuit includes a data switch, an organic light emitting diode, a first switch, a second switch, a third switch, a fourth switch, and a capacitor. The data switch has a first end, a second end and a third end. The first end is for receiving a data voltage, and the second end is for receiving a scan signal. The organic light emitting diode has a first end and a second end, and the first end is configured to receive a first voltage. The first switch has a first end, a second end, and a third end, the first end is coupled to the second end of the organic light emitting diode, and the second end is configured to receive a first switch Signal. The second switch has a first end, a second end, and a third end. The first end is coupled to the second end of the organic light emitting diode, and the second end is configured to receive a second switch. Signal. The third switch has a first end, a second end, and a third end. The first end is coupled to the third end of the first switch, and the second end is coupled to the data switch. The third end is configured to receive a second voltage. The fourth switch has a first end, a second end, and a third end, the first end is coupled to the third end of the second switch, and the second end is coupled to the data switch The third end is configured to receive the second voltage. The capacitor has a first end and a second end. The first end is coupled to the third end of the data switch, and the second end is configured to receive the second voltage.
本發明另揭露一種主動矩陣有機發光二極體顯示器之像素電路。該像素電路包含一資料開關、一第三開關、一第四開關、一電容以及一有機發光二極體。該資料開關具有一第一端、一第二端及一第三端，該第一端用以接收一資料電壓，該第二端用以接收一掃描訊號。該第三開關具有一第一端、一第二端及一第三端，該第一端用以接收一第一電壓，該第二端耦接於該資料開關之該第三端。第四開關具有一第一端、一第二端及一第三端，該第一端用以接收一第二電壓，該第二端耦接於該資料開關之該第三端。電容具有一第一端及一第二端，該第一端用以接收一參考電壓，該第二端耦接於該資料開關之該第三端。有機發光二極體具有一第一端及一第二端，該第一端耦接於該第三開關及該第四開關之該第三端，該第二端用以接收一第三電壓。The invention further discloses a pixel circuit of an active matrix organic light emitting diode display. The pixel circuit includes a data switch, a third switch, a fourth switch, a capacitor, and an organic light emitting diode. The data switch has a first end, a second end and a third end. The first end is for receiving a data voltage, and the second end is for receiving a scan signal. The third switch has a first end, a second end, and a third end. The first end is configured to receive a first voltage, and the second end is coupled to the third end of the data switch. The fourth switch has a first end, a second end, and a third end. The first end is configured to receive a second voltage, and the second end is coupled to the third end of the data switch. The capacitor has a first end and a second end. The first end is configured to receive a reference voltage, and the second end is coupled to the third end of the data switch. The OLED has a first end and a second end. The first end is coupled to the third end of the third switch and the fourth switch, and the second end is configured to receive a third voltage.
本發明提供之主動矩陣有機發光二極體顯示器之像素電路係利用不同時序之開關訊號或不同時序之電壓源，切換驅動電流流經於交替之開關。當像素電路驅動像素顯示灰階時，驅動電流並不會持續流過單一開關，因此各開關對應之薄膜電晶體並未持續承受電壓應力，進而避免產生磁滯效應。The pixel circuit of the active matrix organic light emitting diode display provided by the invention uses different timing switching signals or voltage sources of different timings to switch the driving current through the alternating switches. When the pixel circuit drives the pixel to display the gray scale, the driving current does not continuously flow through the single switch, so the thin film transistor corresponding to each switch does not continuously withstand the voltage stress, thereby avoiding the hysteresis effect.
請參考第2圖。第2圖係為說明本發明之主動矩陣有機發光二極體顯示器之像素電路200之一實施例之示意圖。像素電路200包含一資料開關SWd、一第一開關SW1、一第二開關SW2、一第三開關SW3、一第四開關SW4、一電容C及一有機發光二極體L。資料開關SWd具有一第一端用以接收一資料電壓Sd，一第二端用以接收一掃描訊號Ss，以及一第三端。第一開關SW1具有一第一端用以接收一第一電壓Vdd、一第二端用以接收一第一開關訊號S1，及一第三端。第二開關SW2具有一第一端用以接收第一電壓Vdd，一第二端用以接收一第二開關訊號S2，以及一第三端。第三開關SW3具有一第一端耦接於第一開關SW1之第三端，一第二端耦接於資料開關SWd之第三端，以及一第三端。第四開關SW4具有一第一端耦接於第二開關SW2之第三端，一第二端耦接於第二開關SW2之第三端，以及一第三端。電容C具有一第一端用以接收第一電壓Vdd，以及一第二端，耦接於資料開關SWd之第三端。有機發光二極體L具有一第一端同時耦接於第三開關SW3及第四開關SW4之第三端，以及一第二端用以接收一第二電壓Vss。於本實施例中，資料開關SWd、第一開關SW1、第二開關SW2、第三開關SW3及第四開關SW4為P型薄膜電晶體。第一電壓Vdd之電位高於第二電壓Vss之電位。第一開關訊號S1及第二開關訊號S2具有不同時序。Please refer to Figure 2. 2 is a schematic diagram showing an embodiment of a pixel circuit 200 of an active matrix organic light emitting diode display of the present invention. The pixel circuit 200 includes a data switch SWd, a first switch SW1, a second switch SW2, a third switch SW3, a fourth switch SW4, a capacitor C, and an organic light emitting diode L. The data switch SWd has a first end for receiving a data voltage Sd, a second end for receiving a scan signal Ss, and a third end. The first switch SW1 has a first end for receiving a first voltage Vdd, a second end for receiving a first switching signal S1, and a third end. The second switch SW2 has a first end for receiving the first voltage Vdd, a second end for receiving a second switching signal S2, and a third end. The third switch SW3 has a first end coupled to the third end of the first switch SW1, a second end coupled to the third end of the data switch SWd, and a third end. The fourth switch SW4 has a first end coupled to the third end of the second switch SW2, a second end coupled to the third end of the second switch SW2, and a third end. The capacitor C has a first end for receiving the first voltage Vdd, and a second end coupled to the third end of the data switch SWd. The organic light emitting diode L has a first end coupled to the third end of the third switch SW3 and the fourth switch SW4, and a second end for receiving a second voltage Vss. In this embodiment, the data switch SWd, the first switch SW1, the second switch SW2, the third switch SW3, and the fourth switch SW4 are P-type thin film transistors. The potential of the first voltage Vdd is higher than the potential of the second voltage Vss. The first switching signal S1 and the second switching signal S2 have different timings.
請參考第3圖。第3圖係為說明本發明第2圖之第一開關訊號S1及第二開關訊號S2具有不同時序之示意圖。如圖所示，第一開關訊號S1及第二開關訊號S2具有相反時序，舉例來說，於第一圖框F1中，第一開關訊號S1為低電位，而第二開關訊號S2為高電位；於第二圖框F2中，第一開關訊號S1為高電位，而第二開關訊號S2為低電位。第一開關SW1及第二開關SW2之第二端，也就是其P型薄膜電晶體之閘極端，分別接收第一開關訊號S1及第二開關訊號S2，因此第一開關SW1及第二開關SW2根據第一開關訊號S1及第二開關訊號S2，在不同時序開啟。更明確的說，第一開關SW1之開啟時序相反於第二開關SW2之開啟時序。Please refer to Figure 3. FIG. 3 is a schematic diagram showing the different timings of the first switching signal S1 and the second switching signal S2 in FIG. 2 of the present invention. As shown in the figure, the first switching signal S1 and the second switching signal S2 have opposite timings. For example, in the first frame F1, the first switching signal S1 is low, and the second switching signal S2 is high. In the second frame F2, the first switching signal S1 is at a high potential, and the second switching signal S2 is at a low potential. The second ends of the first switch SW1 and the second switch SW2, that is, the gate terminals of the P-type thin film transistors, respectively receive the first switching signal S1 and the second switching signal S2, so the first switch SW1 and the second switch SW2 According to the first switching signal S1 and the second switching signal S2, they are turned on at different timings. More specifically, the turn-on timing of the first switch SW1 is opposite to the turn-on timing of the second switch SW2.
當像素電路200驅動像素顯示灰階時，資料開關SWd根據掃描訊號Ss將資料電壓Sd傳至第三開關SW3及第四開關SW4之第二端。然而，第一開關SW1及第二開關SW2在不同時序開啟，故第一電壓Vdd產生之驅動電流在一圖框內僅會經由第一開關SW1或第二開關SW2，流經對應之第三開關SW3及第四開關SW4，以驅動有機發光二極體L。舉例來說，於第一圖框F1中，第一開關訊號S1為低電位以開啟第一開關SW1，而第二開關訊號S2為高電位以關閉第二開關SW2。於第二圖框F2中，第一開關訊號S1為高電位以關閉第一開關SW1，而第二開關訊號S2為低電位以開啟第二開關SW2。When the pixel circuit 200 drives the pixel display gray scale, the data switch SWd transmits the data voltage Sd to the second ends of the third switch SW3 and the fourth switch SW4 according to the scan signal Ss. However, the first switch SW1 and the second switch SW2 are turned on at different timings, so the driving current generated by the first voltage Vdd flows through the corresponding third switch only through the first switch SW1 or the second switch SW2 in a frame. The SW3 and the fourth switch SW4 drive the organic light emitting diode L. For example, in the first frame F1, the first switching signal S1 is low to turn on the first switch SW1, and the second switching signal S2 is high to turn off the second switch SW2. In the second frame F2, the first switching signal S1 is high to turn off the first switch SW1, and the second switching signal S2 is low to turn on the second switch SW2.
一般來說，資料電壓Sd約等於1V，第一電壓Vdd約等於4V而第二電壓Vss約等於-4V。於第一圖框F1中，第一開關SW1會開啟，第三開關SW3對應之P型薄膜電晶體之閘極接收資料電壓Sd而源極接收第一電壓Vdd。當(Vgs<-Vt)時，P型薄膜電晶體開啟之原理對熟悉該項技藝者為已知，由於Vt約為0.7V~1V，因此針對第三開關SW3，(Sd－Vdd)<-Vt，第三開關SW3亦會開啟。然而由於第二開關SW2在第一圖框F1時會關閉，雖然第四開關SW4對應之P型薄膜電晶體之閘極接收資料電壓Sd，其源極仍為浮接，也因此第一電壓Vdd產生之驅動電流會經由第一開關SW1流經第三開關SW3以驅動有機發光二極體L。於第二圖框F2中，第一開關SW1會關閉，因此第三開關SW3對應之P型薄膜電晶體之閘極雖接收資料電壓Sd，其源極仍為浮接。而第二開關SW2會開啟，且第四開關SW4對應之P型薄膜電晶體之閘極接收資料電壓Sd而源極接收第一電壓Vdd。因此針對第四開關SW4，(Sd－Vdd)<-Vt，第四開關SW4亦會開啟，也因此第一電壓Vdd產生之驅動電流會經由第二開關SW2流經第四開關SW4以驅動有機發光二極體L。In general, the data voltage Sd is approximately equal to 1V, the first voltage Vdd is approximately equal to 4V and the second voltage Vss is approximately equal to -4V. In the first frame F1, the first switch SW1 is turned on, the gate of the P-type thin film transistor corresponding to the third switch SW3 receives the data voltage Sd and the source receives the first voltage Vdd. When (Vgs < -Vt), the principle of P-type thin film transistor turn-on is known to those skilled in the art. Since Vt is about 0.7V~1V, for the third switch SW3, (Sd-Vdd)<- Vt, the third switch SW3 will also be turned on. However, since the second switch SW2 is turned off at the first frame F1, although the gate of the P-type thin film transistor corresponding to the fourth switch SW4 receives the data voltage Sd, the source thereof is still floating, and thus the first voltage Vdd The generated driving current flows through the third switch SW3 via the first switch SW1 to drive the organic light emitting diode L. In the second frame F2, the first switch SW1 is turned off, so that the gate of the P-type thin film transistor corresponding to the third switch SW3 receives the data voltage Sd, and the source thereof is still floating. The second switch SW2 is turned on, and the gate of the P-type thin film transistor corresponding to the fourth switch SW4 receives the data voltage Sd and the source receives the first voltage Vdd. Therefore, for the fourth switch SW4, (Sd-Vdd)<-Vt, the fourth switch SW4 is also turned on, and therefore the driving current generated by the first voltage Vdd flows through the fourth switch SW4 via the second switch SW2 to drive the organic light. Diode L.
因此，於第一圖框F1中，第一電壓Vdd產生之驅動電流經由第一開關SW1流經第三開關SW3以驅動有機發光二極體L。於第二圖框F2中第一電壓Vdd產生之驅動電流經由第二開關SW2流經第四開關SW4以驅動有機發光二極體L。由於驅動電流係根據第一開關訊號S1及第二開關訊號S2來對應切換於流經於第三開關SW3或第四開關SW4，因此驅動電流並不會持續流過第三開關SW3或第四開關SW4至有機發光二極體L。換言之，第三開關SW3及第四開關SW4並不會持續承受電壓應力，而避免產生磁滯效應。Therefore, in the first frame F1, the driving current generated by the first voltage Vdd flows through the third switch SW3 via the first switch SW1 to drive the organic light emitting diode L. The driving current generated by the first voltage Vdd in the second frame F2 flows through the fourth switch SW4 via the second switch SW2 to drive the organic light emitting diode L. Since the driving current is switched according to the first switching signal S1 and the second switching signal S2 to flow through the third switch SW3 or the fourth switch SW4, the driving current does not continuously flow through the third switch SW3 or the fourth switch. SW4 to organic light-emitting diode L. In other words, the third switch SW3 and the fourth switch SW4 do not continue to withstand voltage stress, thereby avoiding hysteresis.
請參考第4圖。第4圖係為說明第2圖之像素電路200之另一實施例之示意圖。像素電路400相似於第2圖之像素電路200，不同的是，像素電路400另包含一第五開關SW5及一第六開關SW6。第五開關SW5具有一第一端用以接收第二電壓Vss，一第二端用以接收第二開關訊號S2，以及一第三端耦接於第三開關SW3之第一端。第六開關SW6具有一第一端用以接收第二電壓Vss，一第二端用以接收第一開關訊號S1，以及一第三端耦接於第四開關SW4之第一端。第五開關SW5及第六開關SW6為P型薄膜電晶體。第一開關訊號S1及第二開關訊號S2具有不同時序。Please refer to Figure 4. Fig. 4 is a schematic view showing another embodiment of the pixel circuit 200 of Fig. 2. The pixel circuit 400 is similar to the pixel circuit 200 of FIG. 2, except that the pixel circuit 400 further includes a fifth switch SW5 and a sixth switch SW6. The fifth switch SW5 has a first end for receiving the second voltage Vss, a second end for receiving the second switching signal S2, and a third end coupled to the first end of the third switch SW3. The sixth switch SW6 has a first end for receiving the second voltage Vss, a second end for receiving the first switching signal S1, and a third end coupled to the first end of the fourth switch SW4. The fifth switch SW5 and the sixth switch SW6 are P-type thin film transistors. The first switching signal S1 and the second switching signal S2 have different timings.
舉例來說，於第一圖框F1中，第一開關訊號S1為低電位而第二開關訊號S2為高電位，故第一開關SW1及第六開關SW6開啟而第二開關SW2及第五開關SW5關閉。第三開關SW3對應之P型薄膜電晶體之閘極接收資料電壓Sd而源極接收第一電壓Vdd。第四開關SW4對應之P型薄膜電晶體之閘極接收資料電壓Sd而源極接收第二電壓Vss。針對第三開關SW3，(Sd－Vdd)<-Vt，第三開關SW3開啟。針對第四開關SW4，(Sd－Vss)>-Vt，第四開關SW4不開啟。因此第一圖框F1中第一電壓Vdd產生之驅動電流經由第一開關SW1流經第三開關SW3以驅動有機發光二極體L。For example, in the first frame F1, the first switch signal S1 is low and the second switch signal S2 is high, so the first switch SW1 and the sixth switch SW6 are turned on and the second switch SW2 and the fifth switch are turned on. SW5 is off. The gate of the P-type thin film transistor corresponding to the third switch SW3 receives the data voltage Sd and the source receives the first voltage Vdd. The gate of the P-type thin film transistor corresponding to the fourth switch SW4 receives the data voltage Sd and the source receives the second voltage Vss. For the third switch SW3, (Sd - Vdd) < - Vt, the third switch SW3 is turned on. For the fourth switch SW4, (Sd - Vss) > - Vt, the fourth switch SW4 is not turned on. Therefore, the driving current generated by the first voltage Vdd in the first frame F1 flows through the third switch SW3 via the first switch SW1 to drive the organic light emitting diode L.
於第二圖框F2中，第一開關訊號S1為高電位而第二開關訊號S2為低電位，故第一開關SW1及第六開關SW6關閉而第二開關SW2及第五開關SW5開啟。第三開關SW3對應之P型薄膜電晶體之閘極接收資料電壓Sd而源極接收第二電壓Vss。針對第三開關SW3，(Sd－Vss)>-Vt，第三開關SW3不開啟。第四開關SW4對應之P型薄膜電晶體之閘極接收資料電壓Sd而源極接收第一電壓Vdd。因此針對第四開關SW4，(Sd－Vdd)<-Vt，因此第四開關SW4開啟。因此第二圖框F2中第一電壓Vdd產生之驅動電流經由第二開關SW2流經第四開關SW4以驅動有機發光二極體L。In the second frame F2, the first switching signal S1 is high and the second switching signal S2 is low, so the first switch SW1 and the sixth switch SW6 are turned off and the second switch SW2 and the fifth switch SW5 are turned on. The gate of the P-type thin film transistor corresponding to the third switch SW3 receives the data voltage Sd and the source receives the second voltage Vss. For the third switch SW3, (Sd - Vss) > - Vt, the third switch SW3 is not turned on. The gate of the P-type thin film transistor corresponding to the fourth switch SW4 receives the data voltage Sd and the source receives the first voltage Vdd. Therefore, for the fourth switch SW4, (Sd - Vdd) < - Vt, the fourth switch SW4 is turned on. Therefore, the driving current generated by the first voltage Vdd in the second frame F2 flows through the fourth switch SW4 via the second switch SW2 to drive the organic light emitting diode L.
因此，由於第一電壓Vdd產生之驅動電流係根據第一開關訊號S1及第二開關訊號S2來對應切換於流經於第三開關SW3或第四開關SW4。驅動電流並不會持續流過第三開關SW3或第四開關SW4至有機發光二極體L。第三開關SW3及第四開關SW4並不會持續承受電壓應力，進而避免產生磁滯效應。且藉由第六開關SW6於第一圖框F1的開啟及第五開關SW5於第二圖框F2的開啟，可於第一圖框F1關閉第四開關SW4及於第二圖框F2關閉第三開關SW3。Therefore, the driving current generated by the first voltage Vdd is switched to flow through the third switch SW3 or the fourth switch SW4 according to the first switching signal S1 and the second switching signal S2. The driving current does not continuously flow through the third switch SW3 or the fourth switch SW4 to the organic light emitting diode L. The third switch SW3 and the fourth switch SW4 do not continue to withstand voltage stress, thereby avoiding hysteresis. The fourth switch SW4 is turned off in the first frame F1 and the fourth frame F2 is closed in the first frame F1 by the opening of the sixth switch SW6 in the first frame F1 and the opening of the fifth switch SW5 in the second frame F2. Three switches SW3.
請參考第5圖。第5圖係為說明第2圖之像素電路200之另一實施例之示意圖。像素電路500相似於第2圖之像素電路200，不同的是，像素電路500並無包含第一開關SW1及第二開關SW2，而電容C之第一端則用以接收一參考電壓Vref。另外，第三開關SW3之第一端以及第四開關SW4之第一端分別用以接收一第一電壓Vdd1以及一第二電壓Vdd2，而有機發光二極體L之第二端用以接收一第三電壓VSS。於本實施例中，假設第一電壓Vdd1以及第二電壓Vdd2之正負電位約為4V及-4V，第三電壓VSS約等於-4V，而參考電壓Vref之電位相異於第一電壓Vdd1以及第二電壓Vdd2。Please refer to Figure 5. Fig. 5 is a schematic view showing another embodiment of the pixel circuit 200 of Fig. 2. The pixel circuit 500 is similar to the pixel circuit 200 of FIG. 2, except that the pixel circuit 500 does not include the first switch SW1 and the second switch SW2, and the first end of the capacitor C is used to receive a reference voltage Vref. In addition, the first end of the third switch SW3 and the first end of the fourth switch SW4 are respectively configured to receive a first voltage Vdd1 and a second voltage Vdd2, and the second end of the organic light emitting diode L is configured to receive a first end The third voltage VSS. In this embodiment, it is assumed that the positive and negative potentials of the first voltage Vdd1 and the second voltage Vdd2 are about 4V and -4V, the third voltage VSS is approximately equal to -4V, and the potential of the reference voltage Vref is different from the first voltage Vdd1 and the first Two voltages Vdd2.
請參考第6圖。第6圖係為說明本發明第5圖之第一電壓Vdd1及第二電壓Vdd2之示意圖。如圖所示，第一電壓Vdd1為正電位之時序對應第二電壓Vdd2為負電位之時序，而第一電壓Vdd1為負電位之時序對應第二電壓Vdd2為正電位之時序。舉例來說，於第一圖框F1中，第一電壓Vdd1為負電位，而第二電壓Vdd2為正電位；第三開關SW3對應之P型薄膜電晶體之閘極接收資料電壓Sd而源極接收負電位之第一電壓Vdd1。第四開關SW4對應之P型薄膜電晶體之閘極接收資料電壓Sd而源極接收正電位之第二電壓Vdd2。針對第三開關SW3，[Sd－Vdd1]>-Vt，第三開關SW3不開啟。針對第四開關SW4，[Sd－Vdd2]<-Vt，第四開關SW4開啟。因此第一圖框F1中第二電壓Vdd2產生之驅動電流流經第四開關SW4以驅動有機發光二極體L。Please refer to Figure 6. Fig. 6 is a view showing the first voltage Vdd1 and the second voltage Vdd2 in Fig. 5 of the present invention. As shown in the figure, the timing at which the first voltage Vdd1 is a positive potential corresponds to the timing at which the second voltage Vdd2 is a negative potential, and the timing at which the first voltage Vdd1 is at a negative potential corresponds to a timing at which the second voltage Vdd2 is at a positive potential. For example, in the first frame F1, the first voltage Vdd1 is a negative potential, and the second voltage Vdd2 is a positive potential; the gate of the P-type thin film transistor corresponding to the third switch SW3 receives the data voltage Sd and the source The first voltage Vdd1 of the negative potential is received. The gate of the P-type thin film transistor corresponding to the fourth switch SW4 receives the data voltage Sd and the source receives the second voltage Vdd2 of the positive potential. For the third switch SW3, [Sd-Vdd1] > -Vt, the third switch SW3 is not turned on. For the fourth switch SW4, [Sd-Vdd2] < - Vt, the fourth switch SW4 is turned on. Therefore, the driving current generated by the second voltage Vdd2 in the first frame F1 flows through the fourth switch SW4 to drive the organic light emitting diode L.
於第二圖框F2中，第一電壓Vdd1為正電位，而第二電壓Vdd2為負電位。第三開關SW3對應之P型薄膜電晶體之閘極接收資料電壓Sd而源極接收正電位之第一電壓Vdd1。第四開關SW4對應之P型薄膜電晶體之閘極接收資料電壓Sd而源極接收負電位之第二電壓Vdd2。針對第三開關SW3，[Sd－Vdd1]<-Vt，第三開關SW3開啟。針對第四開關SW4，[Sd－Vdd2]>-Vt，第四開關SW4不開啟。因此第二圖框F2中第一電壓Vdd1產生之驅動電流流經第三開關SW3以驅動有機發光二極體L。In the second frame F2, the first voltage Vdd1 is a positive potential and the second voltage Vdd2 is a negative potential. The gate of the P-type thin film transistor corresponding to the third switch SW3 receives the data voltage Sd and the source receives the first voltage Vdd1 of the positive potential. The gate of the P-type thin film transistor corresponding to the fourth switch SW4 receives the data voltage Sd and the source receives the second voltage Vdd2 of the negative potential. For the third switch SW3, [Sd-Vdd1] < - Vt, the third switch SW3 is turned on. For the fourth switch SW4, [Sd-Vdd2] > -Vt, the fourth switch SW4 is not turned on. Therefore, the driving current generated by the first voltage Vdd1 in the second frame F2 flows through the third switch SW3 to drive the organic light emitting diode L.
當第一電壓Vdd1為正電位時，第一電壓Vdd1產生之驅動電流經第三開關SW3至有機發光二極體L；當第二電壓Vdd2為正電位時，第二電壓Vdd2產生之驅動電流經第四開關SW4至有機發光二極體L。由於第一電壓Vdd1之正負電位時序相異於第二電壓Vdd2，因此驅動電流並不會持續流過第三開關SW3或第四開關SW4至有機發光二極體L。第三開關SW3及第四開關SW4並不會持續承受電壓應力而造成磁滯效應。When the first voltage Vdd1 is a positive potential, the driving current generated by the first voltage Vdd1 passes through the third switch SW3 to the organic light emitting diode L; when the second voltage Vdd2 is a positive potential, the driving current generated by the second voltage Vdd2 is The fourth switch SW4 is to the organic light emitting diode L. Since the positive and negative potential timings of the first voltage Vdd1 are different from the second voltage Vdd2, the driving current does not continuously flow through the third switch SW3 or the fourth switch SW4 to the organic light emitting diode L. The third switch SW3 and the fourth switch SW4 do not continue to withstand voltage stress and cause a hysteresis effect.
請參考第7圖。第7圖係為說明第5圖之像素電路500之另一實施例之示意圖。像素電路700相似於像素電路500，不同的是，像素電路700包含一第一電容C1及一第二電容C2，以取代電容C。第一電容C1具有一第一端用以接收第一電壓Vdd1，以及一第二端耦接於資料開關SWd之第三端。第二電容C2具有一第一端用以接收第二電壓Vdd2，以及一第二端耦接於資料開關SWd之第三端。於本實施例中，第一電容C1及第二電容C2之電容量分別約為電容C之電容量之一半。像素電路700之運作原理相似於第5圖之像素電路500，於此不贅述。Please refer to Figure 7. Fig. 7 is a schematic view showing another embodiment of the pixel circuit 500 of Fig. 5. The pixel circuit 700 is similar to the pixel circuit 500 except that the pixel circuit 700 includes a first capacitor C1 and a second capacitor C2 instead of the capacitor C. The first capacitor C1 has a first end for receiving the first voltage Vdd1, and a second end coupled to the third end of the data switch SWd. The second capacitor C2 has a first end for receiving the second voltage Vdd2, and a second end coupled to the third end of the data switch SWd. In this embodiment, the capacitances of the first capacitor C1 and the second capacitor C2 are respectively about one-half of the capacitance of the capacitor C. The operation principle of the pixel circuit 700 is similar to that of the pixel circuit 500 of FIG. 5, and details are not described herein.
請參考第8圖。第8圖係為說明本發明之主動矩陣有機發光二極體顯示器之像素電路800之一實施例之示意圖。像素電路800包含一資料開關SWd、一第一開關SW1、一第二開關SW2、一第三開關SW3、一第四開關SW4、一電容C及一有機發光二極體L。資料開關SWd具有一第一端用以接收一資料電壓Sd，一第二端用以接收一掃描訊號Ss，以及一第三端。有機發光二極體L具有一第一端用以接收一第一電壓Vdd，以及一第二端。第一開關SW1具有一第一端耦接於有機發光二極體L之第二端，一第二端用以接收一第一開關訊號S1，以及一第三端。第二開關SW2具有一第一端耦接於有機發光二極體L之第二端，一第二端用以接收一第二開關訊號S2，以及一第三端。第三開關SW3具有第一端耦接於第一開關SW1之第三端，一第二端耦接於資料開關SWd之第三端，以及一第三端用以接收一第二電壓Vss。第四開關SW4具有一第一端耦接於第二開關SW2之第三端，一第二端耦接於資料開關SWd之第三端，以及一第三端用以接收第二電壓Vss。電容C具有一第一端耦接於資料開關SWd之第三端，以及一第二端用以接收第二電壓Vss。於本實施例中，資料開關SWd、第一開關SW1、第二開關SW2、第三開關SW3及第四開關SW4為N型薄膜電晶體。第一電壓Vdd之電位高於第二電壓Vss之電位。第一開關訊號S1及第二開關訊號S2具有不同時序。Please refer to Figure 8. Figure 8 is a schematic diagram showing an embodiment of a pixel circuit 800 of an active matrix organic light emitting diode display of the present invention. The pixel circuit 800 includes a data switch SWd, a first switch SW1, a second switch SW2, a third switch SW3, a fourth switch SW4, a capacitor C, and an organic light emitting diode L. The data switch SWd has a first end for receiving a data voltage Sd, a second end for receiving a scan signal Ss, and a third end. The organic light emitting diode L has a first end for receiving a first voltage Vdd and a second end. The first switch SW1 has a first end coupled to the second end of the organic light emitting diode L, and a second end for receiving a first switching signal S1 and a third end. The second switch SW2 has a first end coupled to the second end of the organic light emitting diode L, a second end for receiving a second switching signal S2, and a third end. The third switch SW3 has a first end coupled to the third end of the first switch SW1, a second end coupled to the third end of the data switch SWd, and a third end for receiving a second voltage Vss. The fourth switch SW4 has a first end coupled to the third end of the second switch SW2, a second end coupled to the third end of the data switch SWd, and a third end for receiving the second voltage Vss. The capacitor C has a first end coupled to the third end of the data switch SWd, and a second end configured to receive the second voltage Vss. In this embodiment, the data switch SWd, the first switch SW1, the second switch SW2, the third switch SW3, and the fourth switch SW4 are N-type thin film transistors. The potential of the first voltage Vdd is higher than the potential of the second voltage Vss. The first switching signal S1 and the second switching signal S2 have different timings.
當像素電路800驅動像素顯示灰階時，第一開關SW1及第二開關SW2根據第一開關訊號S1及第二開關訊號S2在不同時序開啟，故第一電壓Vdd產生之驅動電流在一圖框內僅會經由第一開關SW1或第二開關SW2，流經對應之第三開關SW3或第四開關SW4，以驅動有機發光二極體L。因此，驅動電流並不會持續流過第三開關SW3或第四開關SW4，意即第三開關SW3及第四開關SW4不會持續承受電壓應力。When the pixel circuit 800 drives the pixel to display the gray scale, the first switch SW1 and the second switch SW2 are turned on at different timings according to the first switching signal S1 and the second switching signal S2, so the driving current generated by the first voltage Vdd is in a frame. Only the first switch SW1 or the second switch SW2 will flow through the corresponding third switch SW3 or fourth switch SW4 to drive the organic light emitting diode L. Therefore, the driving current does not continuously flow through the third switch SW3 or the fourth switch SW4, that is, the third switch SW3 and the fourth switch SW4 do not continuously withstand voltage stress.
綜上所述，本發明提供之主動矩陣有機發光二極體顯示器之像素電路，藉由利用不同時序之開關訊號或不同時序之電壓源，切換驅動電流流經於交替之薄膜電晶體。因此當像素電路驅動像素顯示灰階時，驅動電流並不會持續流過單一薄膜電晶體，故並未持續承受電壓應力，進而避免產生磁滯效應，而造成面板切換灰階畫面時影像殘留的現象發生。In summary, the pixel circuit of the active matrix organic light emitting diode display provided by the present invention switches the driving current through the alternating thin film transistors by using switching signals of different timings or voltage sources of different timings. Therefore, when the pixel circuit drives the pixel to display the gray scale, the driving current does not continuously flow through the single thin film transistor, so the voltage stress is not continuously withstood, thereby avoiding the hysteresis effect, and the image remains when the panel switches the gray scale image. A phenomenon occurs.
以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.
100、200、400、500、700、800．．．像素電路100, 200, 400, 500, 700, 800. . . Pixel circuit
102．．．N型薄膜電晶體102. . . N type thin film transistor
104．．．P型薄膜電晶體104. . . P-type thin film transistor
IOLED ．．．驅動電流I OLED . . . Drive current
OVDD．．．電源端OVDD. . . Power terminal
OVSS．．．接地端OVSS. . . Ground terminal
SWd．．．資料開關SWd. . . Data switch
SW1．．．第一開關SW1. . . First switch
SW2．．．第二開關SW2. . . Second switch
SW3．．．第三開關SW3. . . Third switch
SW4．．．第四開關SW4. . . Fourth switch
C、106．．．電容C, 106. . . capacitance
L、108．．．有機發光二極體L, 108. . . Organic light-emitting diode
Sd．．．資料電壓Sd. . . Data voltage
Ss．．．掃描訊號Ss. . . Scanning signal
Vdd、Vdd1．．．第一電壓Vdd, Vdd1. . . First voltage
Vss、Vdd2．．．第二電壓Vss, Vdd2. . . Second voltage
VSS．．．第三電壓VSS. . . Third voltage
S1．．．第一開關訊號S1. . . First switching signal
S2．．．第二開關訊號S2. . . Second switching signal
Vref．．．參考電壓Vref. . . Reference voltage
F1．．．第一圖框F1. . . First frame
F2．．．第二圖框F2. . . Second frame
C1．．．第一電容C1. . . First capacitor
C2．．．第二電容C2. . . Second capacitor
第1圖係為傳統的主動矩陣有機發光二極體顯示器之畫素像素電路之示意圖。Figure 1 is a schematic diagram of a pixel pixel circuit of a conventional active matrix organic light emitting diode display.
第2圖係為說明本發明之主動矩陣有機發光二極體顯示器之像素電路之一實施例之示意圖。2 is a schematic view showing an embodiment of a pixel circuit of an active matrix organic light emitting diode display of the present invention.
第3圖係為說明本發明第2圖之第一開關訊號及第二開關訊號具有不同時序之示意圖。Figure 3 is a schematic diagram showing the different timings of the first switching signal and the second switching signal in Figure 2 of the present invention.
第4圖係為說明第2圖之像素電路之另一實施例之示意圖。Fig. 4 is a view showing another embodiment of the pixel circuit of Fig. 2.
第5圖係為說明第2圖之像素電路之另一實施例之示意圖。Fig. 5 is a schematic view showing another embodiment of the pixel circuit of Fig. 2.
第6圖係為說明本發明第5圖之第一電壓及第二電壓之示意圖。Fig. 6 is a view showing the first voltage and the second voltage in Fig. 5 of the present invention.
第7圖係為說明第5圖之像素電路之另一實施例之示意圖。Figure 7 is a schematic view showing another embodiment of the pixel circuit of Figure 5.
第8圖係為說明本發明之主動矩陣有機發光二極體顯示器之像素電路之一實施例之示意圖。Figure 8 is a schematic diagram showing an embodiment of a pixel circuit of an active matrix organic light emitting diode display of the present invention.
200．．．像素電路200. . . Pixel circuit
SWd．．．資料開關SWd. . . Data switch
SW1．．．第一開關SW1. . . First switch
SW2．．．第二開關SW2. . . Second switch
SW3．．．第三開關SW3. . . Third switch
SW4．．．第四開關SW4. . . Fourth switch
C．．．電容C. . . capacitance
L．．．有機發光二極體L. . . Organic light-emitting diode
Sd．．．資料電壓Sd. . . Data voltage
Ss．．．掃描訊號Ss. . . Scanning signal
Vdd．．．第一電壓Vdd. . . First voltage
Vss．．．第二電壓Vss. . . Second voltage
S1．．．第一開關訊號S1. . . First switching signal
S2．．．第二開關訊號S2. . . Second switching signal
Claims (9)
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| TW099146239A TWI424413B (en) | 2010-12-28 | 2010-12-28 | Pixel circuit of an active matrix organic light-emitting diode display device |
| CN2011100354017A CN102054436A (en) | 2010-12-28 | 2011-01-31 | Pixel circuit of active matrix organic light emitting diode display |
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| TW099146239A TWI424413B (en) | 2010-12-28 | 2010-12-28 | Pixel circuit of an active matrix organic light-emitting diode display device |
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| CN102982764A (en) * | 2012-11-30 | 2013-03-20 | 南京中电熊猫液晶显示科技有限公司 | Active matrix organic light-emitting diode display and driving method thereof |
| CN103985354B (en) * | 2014-05-15 | 2016-08-17 | 深圳市华星光电技术有限公司 | A kind of array base palte and display floater |
| TWI537919B (en) * | 2014-05-23 | 2016-06-11 | 友達光電股份有限公司 | Display and sub-pixel driving method thereof |
| TWI556211B (en) * | 2015-05-15 | 2016-11-01 | 友達光電股份有限公司 | Pixel circuit and driving method thereof |
| CN107818759B (en) | 2016-09-14 | 2023-09-19 | 合肥鑫晟光电科技有限公司 | Pixel driving circuit, pixel driving method, array substrate and display device |
| CN110033730B (en) * | 2018-04-18 | 2020-08-04 | 友达光电股份有限公司 | Composite driving display panel |
| TWI696163B (en) | 2019-03-25 | 2020-06-11 | 友達光電股份有限公司 | Control circuit |
| CN110047435B (en) * | 2019-04-23 | 2020-12-04 | 京东方科技集团股份有限公司 | Pixel driving circuit, driving method thereof, display panel and display device |
| CN110930943A (en) | 2019-12-02 | 2020-03-27 | 深圳市华星光电半导体显示技术有限公司 | Pixel driving circuit and display panel |
| CN111613178A (en) * | 2020-06-29 | 2020-09-01 | 京东方科技集团股份有限公司 | Pixel circuit, driving method thereof, display substrate and display device |
| CN116403521A (en) * | 2023-03-28 | 2023-07-07 | 重庆惠科金渝光电科技有限公司 | Display driving circuit, display driving method and display panel |
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