TWI378548B - Semiconductor multi-package module having wire bond interconnection between stacked packages - Google Patents

Description

</ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; The application for this application also claims the priority of the following US applications, each of which was filed on August 2, 2003: US application number 1〇/632,549, entitled “Semiconductor Multiples with Wire Junction Interconnects in Stacked Packages " Semiconductor multi-package module having wire bond interconnection between stacked packages"; US Application No. 10/632,568, entitled "Package with Stacked on Ball Grid Array Package" and Between Packages "Semiconductor multi-package module having package stacked over ball grid array package and having wire bond interconnection between stacked packages"; US application number 10/632, 55 1 'name " " Semiconductor multi-package module having wire bond interconnect between stacked packages and having electrical shield"; US application number l〇/632,552 , named "with stacked die-up flip-chips Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond ("semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond" Interconnect between stacked packages") 144476.doc 1378548; U.S. Application Serial No. 10/632,553, entitled "Package with Stacked on Chip-Back Flip-Chip Ball Grid Array Package, with Wire Contacts Between Stacked Packages "r Sernic〇nduct〇r multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages"; US application number 1 0/ 632,550, " Semiconductor mufti-package module including stacked-die packages and having wire bond interconnect between stacked packages" "); each of them is referenced here For reference. TECHNICAL FIELD OF THE INVENTION The present invention relates to semiconductor packages. [Prior Art] Portable electronic products, such as mobile phones, mobile computing devices, and a variety of consumer products, all require a high degree of semiconductor function and performance, minimum thickness and weight, and have a minimum in a limited order. the cost of. This will drive the industry to increase integration on individual semiconductor wafers. Recently, the industry has begun to implement integration on the “z-axis”, that is, by stacking wafers, 1 has been used in a package to stack up to five wafers. This provides a dense wafer structure with a single wafer package trace ranging from 5x5 mm to 40x40 mm' and its thickness has been continuously reduced from 2.3 mm to 〇5 mm. The cost of a stacked die package is only = the cost of adding more than a single die package, and the assembly yield is quite high 144476.doc 1378548 is enough to guarantee a competition' compared to packaging the die The final cost of force in individual packages. In fact, for a stackable-stacked grain seal, the main limitation is the number of the most B# strong day wafers in the stack, and the yield in the package should be good. It is inevitable to seal [Do not have a certain disadvantage, so the final package test yield will be individual die ^ 1 ΛΛ〇 / . 卞 &lt; Block 00 'each of which is small, 00 /. In particular, it causes a problem, even if two crystal grains are stretched together, only the stacking ratio in the package. U--by (iv) the complexity or the technology has low heat, and there is no obvious heat dissipation path from one die. Another limitation is the low power dissipation of the package. To the other, in addition to the solder ball to the motherboard, the other is limited to the electromagnetic interference between the stacked grains, especially in RF and digital crystals. Between the grains, since each die does not have electrical shielding, the mode is i-joined on the "z-axis" to stack the die packages to form a multi-package module. Stacked packages offer multiple benefits over stacking. For example, 'Each package with RF die can be electrically tested and rejected before stacking the packages, unless it shows satisfactory performance, so the final packaged multi-package module yield Can be maximized. (d) A more efficient cooling can be provided in a stacked package by inserting a heat sink between the package and the top of the module. The slab stack 4 allows electromagnetic shielding of the RF dies and avoids interference with other dies in the module. 144476.doc Each Ba particle, or more than one die, can be packaged in a different package using stacking commands such as wire contacts that use the most efficient first-order interconnect technology for the die type and configuration. Or flip chip to maximize performance: and minimize cost. &gt; The Z-interconnection between packages in a package is a key technology in terms of manufacturing flexibility and cost. The z-interconnects that have been proposed include a peripheral solder ball connection and a flexible substrate that is bent at the top of the bottom package. The use of peripheral solder balls for Z interconnects in stacked multi-package modules limits the number of connections that can be made and limits design flexibility and results in thicker, higher cost packages. Although the use of a flexible curved substrate can in principle provide design flexibility, there is no established manufacturing mechanism for the bending process. Furthermore, the use of a flexible curved substrate requires one or two metal layer flexible substrates 'which are very expensive. In addition, the curved flexible substrate method is limited by the low pin count application due to the limitation of the winding circuit on the two metal substrate. The different steps of the z-interconnect are described in detail with reference to the steps of Figures 1-4. Figure 1 shows a cross-sectional view of a structure of a standard ball grid array ("BGA") that has been well established in the industry as a bottom package in a stacked multi-package module ("MPM"). As shown in Fig. 1, the BGa includes a die 14 attached to a substrate 12 having at least one metal layer. It can use a variety of substrate types including, for example, a plywood having a 2-6 metal layer, or an enlarged substrate having a 4-8 metal layer, or a flexible polyimide having a 12 metal layer, or a ceramic Multilayer substrate. The substrate 12, shown by way of example, has two metal layers 121, 123, each of which is patterned to provide suitable

14&lt;W76.dOC 1378548 when the circuit' is connected by the via 122. The die is conventionally attached to a surface of the substrate using an adhesive, which is basically referred to as a die attach epoxide, as shown in FIG. 1 of FIG. 1, and in the configuration of FIG. The surface of the substrate to which the die is attached may be referred to as the "upper" surface, and the metal layer on the surface may be referred to as an "upper" metal layer, although the die attach surface does not need to have any specificity in use. The direction. In the BGA of Figure 1, the die tie contacts the wire contact side of the metal layer above the substrate to establish an electrical connection. The die 14 and the wire bonds 16 are coated with a molding compound 17, which provides protection against ambient and mechanical stresses to facilitate processing and provides a surface for identification. Tan Ball _ re-welded to the contacts on the metal layer below the substrate to provide interconnection to the final product of the motherboard (not shown in the figure, such as the electric moon a welding cap 125, 127 system patterning Above the metal layer 121'(2), the metal under the contact is exposed as an electrical connection, for example, the wire contact and the junction material 16 and the solder ball 18. &quot; : A cross-sectional view of the exemplary structure of the Λ Λ , , , , , , , , , , 在 Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ Μ , a strong, 廿,, the first package (which can be called "bottom" seal!) is similar to a standard ΒΓτ A, last, _ "Art τ system:) ^ ° Figure does not (and use a similar reference The number can be called ^, "features of the material". - The second package (which is a private part of the 4" package) is stacked on the bottom structure similar to the bottom mounted on the top package base ^ The known ball system does not interfere with the cladding of the bottom BGA. In particular, the top seal 144476.doc 13/8548 of Figure 2 includes a die 24 attached to a substrate 22 having at least one metal layer. The top package substrate 22, as shown, for example, in Fig. 2, has two metal layers 221, 223' each patterned to provide a suitable circuit and connected by vias 222. The die is conventionally attached to a surface of the substrate by an adhesive (the surface of the substrate is substantially referred to as the die attach epoxide) as shown in FIG. . In the top package of the MPM of Figure 2, as in the bottom package, the M-grain line contacts are connected to the line contacts on the metal layer above the substrate to establish an electrical connection. The top package die 24 and wire contacts 26 are covered by a top package molding compound 27. Solder balls 28 are reflowed over the contact pads on the peripheral voids of the underlying metal layers of the top package substrate to provide z interconnects to the bottom package. The solder masks 225, 227 are patterned onto the metal layers 221, 223 to be electrically connected to the underlying metal exposed at the contacts, such as the line contacts and the contact pads to engage the Wire contact 26 and solder ball 28 °. The z interconnection in the MPM of Figure 2 can be soldered to the bottom BGa by soldering the solder ball of the peripheral contact pad attached to the underlying metal layer on the top package substrate. The peripheral contact pads on the upper metal layer. In this configuration, the distance h between the top and bottom packages must be at least as large as the cladding height of the bottom package, which may be 0.3 mm or higher 'and substantially less than 〇 5 mm Between 1.5 mm range. The solder balls 28 must therefore have a sufficiently large diameter when reflowed, and have good contact with the contact pads of the bottom BGA; that is, the solder balls 28 must have a larger diameter than the cladding. height. A larger ball diameter defines a larger ball pitch, which therefore limits the number of balls placed in the available space. In addition, the perimeter of the solder balls is configured such that the bottom BGA is significantly larger than a standard BGA mold cover. In a small BGA, which is commonly referred to as a wafer level package ("CSP"), the wafer body is 1.7 mm larger than the die. In a standard BGA, the body size is about 2 mm larger than the mold cover. In this configuration, the top package substrate must have at least two metal layers to facilitate the electrical connection. Figure 3 is a cross-sectional view showing an exemplary structure of a known 2-stack flip chip MPM, which is generally indicated as 3 〇. In this configuration, the bottom bg A flip chip package includes a substrate 32 having a patterned metal layer 31 on which the die 34 is connected by the flip chip bumps 36, such as solder. A bump, a gold button bump, or an anisotropic conductive film or paste. The flip chip bumps are attached to an array of patterned bump pads on the active surface of the die, and because the active surface of the die faces down the patterned metal layer on one side of the substrate This configuration can be referred to as a "down" flip-up aa chip package. Filling the polymer side between the die and the substrate 3 provides protection for the week and adds mechanical integration to the structure. The flip-chip aa chip package has a metal layer on the upper surface only, and is connected to the lower layer circuit by solder balls 38 connected to the metal layer through the solder vias 35 (for example) a motherboard, which is not shown in the figure.) The top BGA in this configuration is similar to the bottom BGA except that the top 4 BGA has z-connected to a metal layer i only around the top substrate Solder balls 338 (via solder vias in the top substrate). Solder balls 338 are soldered back to the metal layer 331 of the bottom substrate to provide the 2 interconnects, in this configuration, The top BGA includes a substrate 332 'I44476.doc 1378548 having a beta-patterned metal layer 323, on which the top BGA die 334 is connected by flip chip bumps 336. The top BGA crystal A polymer side is filled between the particles and the substrate 333. The structure of Figure 3 is more suitable for high electricity; 纟 can be applied, but it has similar limitations to the configuration of the type shown in Figure 2: The configuration of Figure 2 has been improved in that the bottom BGA is not molded, allowing it to be around the top BGA. A smaller diameter (h) solder ball is used to connect between the packages. φ Figure 4 shows a cross-sectional view of an exemplary structure of a known 2·stacked curved flexible substrate MPM, as shown at 40. The bottom package in the configuration of Figure 4 has a 2-metal layer flexible substrate on which the die is bonded to the first metal layer of the substrate through the post. The second metal layer of the bottom package substrate The solder balls are carried to be connected to the lower layer circuit, such as a motherboard (not shown). The substrate is large enough to be bent at the top of the package, thereby upwards (胄) interconnects They can be connected to the top package by an array of solder balls on the top package (as exemplified below). The space between the die and the die and the bent substrate is covered. The protection and strength are provided. Referring to FIG. 4, the 2-metal layer bottom package substrate 42 includes a first metal layer 141 and a second metal layer (4), each of which is patterned to provide a suitable path: a hole 142. The portion of the first metal layer above a portion of the bottom base Z Processing (e.g., using a perforated array) to present an array of cantilevers or sheets 46 configured to correspond to an array of interconnects on the active surface of the bottom package (4). On such portions of the substrate, It can be referred to as the "die attach portion", and the first metal layer (4) I44476.doc 1378548 is facing upward. The die is aligned on the die attach portion of the substrate with the active surface down. And engaging the cantilever beam and the corresponding interconnect pad, typically by, for example, using a combination of pressure, heat, and ultrasonic energy

* ''V Sound Process' to complete the electrical connection. The die 44 is attached to the die attaching portion of the flexible substrate 42 using an adhesive 43. The second metal layer 143 of the bottom package substrate 42 faces downward into the die attach portion of the substrate. Solder balls 48 are reflowed into contact pads on an array of lower portions of the second metal layer 143 to provide interconnection of the MPM to the underlying circuitry (not shown). A solder mask 147 is patterned over the second metal layer 143 to expose the underlying metal as a contact for electrical connection, comprising a contact pad connected to the underlying circuit by solder balls 48, and The solder pads are attached to the contact pads of the top package as described below. Another portion of the bottom package substrate 42 extends adjacent the die attach portion 'which is bent upward' and is positioned over the bottom package die 44. Above the portion of the flexible substrate 42 that is bent over, the first metal layer 143 faces upward. In the configuration of Figure 4, the top package is generally similar to the BGA of Figure 1, wherein the die tie contacts are in place at line contacts on the metal layer above the substrate to establish an electrical connection. In particular, the top package die 14 is attached to a substrate 12 having two metal layers 121, 123 (in this example), each of which is patterned to provide a suitable circuit and through vias. Come connect. The sigma die is conventionally attached to the upper surface of the top P package substrate using an adhesive 丨3, which is typically a die attach epoxide. The die 14 and the wire contacts 16 are coated with a molding compound 17, which provides protection against ambient and mechanical stresses for handling operations, and 144476.doc -J2- 丄: provides a surface The mark is used to identify the upper side of the bottom package substrate of the bottom package between the top and bottom packages. The solder balls 18 are reflowed to the contact pad 143 which is bent over the genus layer to be connected. The structure of FIG. 4 has the advantage that the substrate bent on the upper surface can provide a sufficient area above the upper surface of the bottom package base (4) bent to accommodate the complete solder (four) and the (four) seal The more complex interconnection of money is between the four packages. It also provides a small package. This configuration

The disadvantage is that the cost of the wire board is high and the bending technology and equipment cannot be obtained. The common feature of some stacked package configurations is that they protect each package and provide production Mm with a higher final test yield. [Summary of the Invention]

1 Ming _ in the multi-package model with stacked materials. According to this issue = ^ the stack of materials in the house "the z-interconnection between the lines is the line junction = quasi. In general, the present invention is characterized by having a plurality of different stacks of the same configuration: and stacking and interconnecting by means of a Z-junction dominated by wire contacts. In a multi-package module according to the present invention, the package may comprise a plurality of BGA packages and/or any of a type of platform flip CM package): the package stack may include wire contacts and/or flip chip The stacked stack may include - (4) generated in or on the stack - the package stack may include a wire contact to the job or UU (a) == - a flip chip die - or a plurality of packages; The package of the cracked stack in the stack or the side-by-side package has more than - or a plurality of BW packages; the stack 144476.doc 13

The plywood or the electromagnet that is encased to form the Z-package may comprise any substrate. *·__£' which provides interconnection pads by bonding to the packages. In a general aspect, the invention is characterized by having a stacked lower and upper: package multiple package modules, each of which includes a die attached to a substrate, wherein the upper and lower substrates are connected by wire contacts By interconnecting the present invention, the present invention can provide excellent manufacturability, high design flexibility, and low cost to manufacture a stacked package module having a low profile and a small track. The line contact 2 interconnection technology has been well established in the industry; it is the lowest cost connection technology and can be directly applied without the need for significant modification, and the multiple package modules of the present invention can be used. It provides design flexibility for the relative dimensions of the BGA to which it can be bridged by the length of the wire. With the available technology and sigh, the wire in the wire contact can be as short as 〇 $ claws, or up to 5 mm. The configuration of the z interconnect pads can be implemented by using one or more of the BGA and LGA substrates. In addition, using the wire contacts according to the present invention, the turns can be formed between pads that are not precisely aligned with each other by so-called out of sequence bonding, which is currently used In this industry, the line-to-point spacing is the finest technology in the industry at 50 microns and is expected to reach 25 microns. This can result in a large number of interconnects. Both manufacturability and design flexibility can contribute to MpM. The minimum trajectory of a typical BGA or LGA is 丨7 mm larger than the grain size. The addition of the ζ interconnect pad in accordance with the present invention will increase the BGA by a minimum of 0.8 mm. The typical BGA thickness is io mm, and the LGA The thickness is 0.8 mm ° A typical adhesive thickness ranges from 〇〇25 mm to 0.10 〇mm. • Η· 144476.doc 1378548 = Execution and thickness of the stacked package MPM according to the present invention for most applications All of them may fall within an acceptable range. In some specific examples, the multi-package module includes three or more packages that are sequentially fixed to form a stack. In another aspect, the invention features - Stacked first ("bottom = second ("top") packaged multi-package module, each package including a die attached to a substrate and connected to the substrate by wire contacts, wherein the top cap and the bottom The package base (4) is interconnected by wire contacts. In some embodiments, each package is completely covered with a __ molding material, and in other embodiments, at least one package is only coated to a certain To the extent that the wire contacts between the die and the substrate are protected during subsequent processing and testing. In some embodiments, the: package is -lga package' and in some such implementations In an example, the haihai (3) eight-package substrate is a single metal layer substrate. In another aspect, the invention features a multi-package module stacked with a first ("bottom") and a second ("top") package. The bottom package is a BGA package [each package includes a die attached to the substrate, wherein the top package substrate and the BGA package substrate are interconnected by wire contacts. In another aspect, the invention is characterized in that One multi-package module with stacked packages At least one of the packages has an electrical shield. In some such configurations, the electrical shield can be additionally configured as a heat sink. In two specific embodiments, the package having an electrical shield includes :rf die' and the mask is used to limit electromagnetic interference between the RF die and the die in the multi-package module. In some implementations, the bottom material 144476.doc -15- 1378548 With an electric shield. = Another aspect, the characteristics of the transition are the second ("top") package of the "with (the bottom)" - the upper die configuration - flip a sub-assembly', and The bottom package is a flip chip BGA package in which the top substrate and the bottom portion are 3 pieces, and in the embodiment, the top package is interconnected by contacts. In some embodiments, the crystals in the stack are mounted in separate spacers. In some and some of the day plates can be electrically shielded by intervening wafer dies. The inverted package substrate on the bottom package includes an embedded connector: in some embodiments, the bottom portion is used for heat dissipation and as an electrical shield. The ground plane is arranged to be in another aspect, the special seal of the present invention and the second ("top") seal are multiple seals and have / ("bottom") - the lower die configuration t - ... And the '5 hai bottom package is in the middle of the dome Qiu 萁 4, and the daily film - flip chip BGA package, and ^ top ° 卩 substrate and the bottom package through the line contacts to each other, the car is eight. The bottom (four) mounted flip chip die has an electric shield. In another aspect, the present invention is characterized in that the _ &amp; crystal + two (top) seal I has the first (bottom) and the first plate:: Each of the packages includes a base-substrate substrate attached by a wire contact to the package substrate and the top package, at least one of which is a stack of two or two of which are included in the bottom package. The bottom -..., body. The order is a stacking die seal 144476.doc -16·iJ/0J40. In the aspect of the invention, the invention is characterized in that a multi-package module is fabricated, and the substrate is packaged in the - (bottom) package. The upper surface includes at least a die (first) package placed over the first package and a second (top &!) package including on a second (top) package substrate A wire contact 2 interconnection is formed between at least the die and the second (top and bottom) substrate. Preferably, the packages can be tested prior to assembly, which can discard packages that are not of this or reliability, so it is preferred that the first and second packages tested as "good" are used for the assembly. In the module. In one aspect, the invention features a method of fabricating a multi-package module that includes a lga package stacked on a -bga package, wherein the u and bottom packages are interconnected by wire contacts. In accordance with this aspect, a BGA package is provided which is generally identified as "good" by an undivided strip of a molded BGA package, preferably a BGA package in the strip for performance and reliability testing. The package is subjected to subsequent processing; the adhesive is dispensed onto the upper surface of the "good" BGA closure; a simulated molded platform grid array package is provided; preferably, the lga package is tested. Recognized as "good"; these "good" lga packages are the adhesive placed over the molding on the &lt;sub"BGA package and cure the adhesive as needed and preferably, The top of the stack [when the wire contacts 2 are interconnected between the bottom and the bottom package, the plasma cleaning is performed as needed and preferably, an additional electrical damage cleaning can be performed, in order to form the MPM mode. system. Further steps include attaching a second layer of interconnected solder balls to the underside of the module; testing and separating the completed module from the strip, such as by sawing apart or by punching; and for other uses I44476.doc -17- 1378548 Package. In some embodiments, the LGA (top) package is fully molded, having a generally planar upper surface of the LGA package; in other embodiments, the line contacts, but not the LGA The entire upper die surface of the package is molded, and the LGA is molded by dispensing the molding compound only around the die and near the gap of the LGA package substrate. In another aspect, the invention features a method of stacking a multi-package module on a LGA package over a BGA package, wherein the top and bottom packages are interconnected by wire contacts, and Wherein the bottom package has an electromagnetic shielding. According to this aspect, a ball grid array package is provided, which is typically a strip of undivided strips of a BGA package; the BGA packages have a shield that is fixed over the die; the car is preferably in the strip The BGA package is tested for performance and reliability and identified as "good" for subsequent processing; the adhesive is dispensed over the upper surface of the "good" BGA package; the supplied-separated mode Platform grid array package; preferably 'test the LGA seal and identify it as "good"; the = good = lGA package, the adhesive placed on the shield, 1 curing the test: (4) As needed and preferably, a line is formed between the top _ and the bottom package of the stack. The post-printing 仃-plasma cleaning operation, as needed, and preferably, can be done first.额外 An additional plasma cleaning, connected: as: molded. The step of the step further includes attaching = the underside of the module; testing and separating the completed mode: package. The heart is separated by punching; and for other uses 144476.doc 13/8548 In some specific embodiments, the 兮·*·, + A m ^ ° method includes the use of the multi-sealing core set-heat sink The steps. In this aspect of the invention, the process of making = has an extra step of inserting - "falling into" the mode of action 1 to support the heat sink, or inserting - "falling in" mode (4) female split simple Planar heat sink; 戋, :: to the mounting of the adhesive to the top of the package molding surface, or a spacer on the top of the package to fix the planar heat sink to the adhesive. In another aspect, the invention features a method of grouping, including stacking a top package that replaces a bottom package of a day-to-day wafer flip-chip BGA, wherein the tops are electrically connected . According to this aspect, 'provide the granules (10) to be loaded by wire joints, if necessary, 〃 B 曰 倒 倒 倒 倒 B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B The mantle h and the "" 曰曰 球 球 球 球 及 及 及 及 及 可靠 可靠 ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠 可靠• Lifting 8% of the upper surface of the 忒 die, which can be packaged as needed = top (eg, platform grid array), and identified as "good, the adhesion on the test-like mask of the package" The core encapsulation is placed there, and the adhesive is cured; a line connection between the LGA and the bottom bga package is formed as needed, and preferably, the cleaning operation is possible; Step J: Washing, then forming the pottery. Test and divide two: attach the second layer of interconnected solder balls to the lower side of the module to the module and the strip, for example by staggering the split or J44476.doc • 19- by the /t hole Separate; and package for other uses. The invention is characterized in that it comprises a multi-encapsulation m 卩 and a bottom seal (four) on the bottom package of the top-package module, the second package, and the bottom package (four). Electric shielding. According to this, similar to the foregoing processing for going to + and performing the Flip-chip bottom package of the ancient part, February, an additional step is inserted to install the mask to the bottom package flip-on day and day. Providing a bottom die-wafer BGA bottom package for patterning; sa &amp; seeing '*', lower die flip chip ball grid array bottom package, preferably in the strip A package for performance and reliability: #八^ = line processing; adhesive n is good" BGA package on the upper surface (back side) of the die provides a separate top (eg platform grid array) package, It is intended to be molded; preferably, the test is carried out by the T A A 4+ Zhuang You 疋 6 6 L LGA package and identified as J; the "good" LGA package is placed in the occlusion Overlying and curing the lacquer; forming, as needed and preferably, forming a line junction z interconnection between the top stack of the LGA and the bottom BGA package: an electropolymer cleaning operation is performed An additional electro-ignition cleaning may be performed as needed and preferably, followed by forming a second layer of interconnected solder balls attached to the underside of the module for forming the Mp_; measuring the second module and the strip, for example Separating by sawing or by punching; and packaging for other uses. In another aspect, the invention features a top package comprising a top package mounted on a bottom package of a flip chip BGA, which = 144476.doc • 20- the top and bottom packages are connected by wire bonds Electrical interconnection. In accordance with this aspect, an upper die-flip wafer ball grid array package is provided which is typically unmolded and which is passed through an undivided strip of an upper die-flip wafer ball array package; The BGA package in the strip is tested for performance and reliability, and the seal identified as "good" is subject to subsequent processing; the adhesive is divided into the substrate on the "good" BGA package. Above the surface; providing a second package, which in some embodiments may be a stacked die package 'which may be as needed and typically molded; preferably, the lga package is tested and identified as "good" The "good" LGA package is placed on the adhesive on the BGA substrate and cures the adhesive; it is desirably placed between the top of the side stack and the bottom package. After the contact Z is interconnected, a plasma cleaning operation is performed; as needed and performed - additional electric cleaning, followed by formation of the MPM molding. The further step includes attaching a second layer of interconnected solder balls to the underside of the module; = the completed module and the strip, for example, by splitting or lapping, and for other uses. Group = 2 aspects 'The invention is characterized by a method of fabricating a multi-package mold comprising a top seal stacked on top of the bottom of the stack. The top and bottom packages are interconnected by wire contacts. . According to the generally provided die-stacked die (10) package, which is typically molded, and is preferably an undivided strip of a St-stacked die-ball grid array package, the identification::: the long package The performance and reliability test is assigned to two: the "good" package is subject to subsequent processing; the adhesive is U is good" (four) ^ grain BG read the above table J44476.doc -21 - 1378548 is usually molded in the package A second package that is often planarly separated, usually molded, replenished, and considered to be a stacked die package; preferably the test: package, and (4) "good" The "good" second package is placed on the adhesive on the upper surface of the BGA to smear the bond (4); it is preferably formed between the top and bottom packages of the stack as needed. After the wire contacts Z are interconnected, an electropolymer cleaning operation is performed; it is preferably carried out as needed - additional plasma cleaning, followed by formation of (iv) PM molding. The step of stepping includes attaching a second layer of interconnected solder balls to the underside of the module; testing and separating the completed module from the long stop, for example by splitting or by punching; and for other Use for packaging. In some embodiments of the method, two or more first-molded packages are provided in the un-separated strip, and two or more modules are assembled on the strip, And separating the two or more modules after the assembly is completed. / In a method of fabricating a multi-package module in accordance with the present invention, the electrical connections between the stacked packages use conventional wire contacts to form z-interconnects between the upper and lower package substrates in the stack. Special benefits include the use of established manufacturing architectures, low production costs, design flexibility and thin packaging. ". 6 hai z interconnect contacts can be conjugated in a variety of package and module configurations by pulling the wires from the bumps formed by a conductive pad on the second package substrate to the first a conductive pad on the package substrate; or a bump formed on a conductive pad on the first package substrate to pull the wire to a conductive pad on the second package substrate. 144476.doc -22· 1378548 ” This is a package that provides more than one semiconductor at a minimum cost and highest final test yield in a form of a minimum and minimum package. Further, according to the present invention The stacked configuration allows for high thermal performance, high electrical performance or electrical isolation of the digital components from the components. Other stacked configurations provide very thin structures for dry or defensive products. All are provided for assembly. The method allows the individual tests of the stack (4) to maximize the final yield of the module.

Additional processing steps will be used to complete the multiple package module in accordance with the present invention. For example, it is preferred that the solder balls for the connection of the lowermost package in the stack do not adhere to the motherboard, but until the final step of the MPM is divided, for example, the electric cleaning can be performed. In many places in the process: point, for example, after the adhesive has cured, and before the coating, and before and/or after the z interconnect contacts. Preferably, the individual packages are provided as strips of several packages that are connected in a column for ease of processing during manufacture, and the multiple package modules are separated after completion of the process steps. In the method according to the present invention, the package stacks can be formed on a non-single-packaged-length strip of a select= by a fixedly separated second package, and until the formation of the groups is completed. After the process, the Z interconnection of the line contact is performed, and then the 5th seek module is separated. The MPM in accordance with the present invention can be used to construct computers, telecommunications equipment, and consumer and industrial electronic devices. [Embodiment] The present invention will now be described in further detail with reference to the accompanying drawings, in which: FIG. The drawings are merely illustrative and illustrate the relationship between the features of the present invention and other features and structures, and are not drawn to scale. In order to improve the clarity of the presentation, in the drawings illustrating the specific embodiments of the present invention, the elements corresponding to the elements shown in the other drawings are not specifically renumbered, although they are clear in all drawings. Identification. Referring now to FIG. 5A, there is shown a cross-sectional view at 50 in a specific embodiment of a multiple package module in accordance with one aspect of the present invention, including a stacked first ("bottom") and a second (" Top") packages in which the stacked packages are interconnected by wire contacts. In the particular embodiment shown in Figure 5A, the bottom. The P package 400 is a conventional BGA package, as shown, for example. Thus, in this embodiment, the bottom package 400 includes a die 414 attached to a bottom package substrate 412 having at least one metal layer. It may use any one of the types of substrate types, for example, including: a plywood having a 2-6 metal layer, or a construction substrate having a 4-8 metal layer, or a flexible polyimide layer having a 1-metal layer, Or a ceramic multiple layer substrate. The bottom package substrate 412, shown by the example of Fig. 5A, has two metal layers 421, 423, each of which is patterned to provide a suitable circuit and connected through a via. The die is conventionally attached to the surface of the substrate using an adhesive, which is basically referred to as a die attach epoxide, as shown by 413 in Figure 5A, and in the configuration of the figure. The surface of the substrate to which the crystal grains are attached is the upper surface, and the metal layer on the surface may be referred to as a metal layer, although the surface adhesion surface of the substrate is not required for use and has any specific Directionality. 144476.doc •24- 1378548 In the bottom BGA package of Figure 5A, the die tie contacts the wire contacts on the metal layer above the substrate to establish an electrical connection. The die 414 and the wire contact 416 are coated with a molding compound @惠包-, which provides protection against ambient and mechanical stresses for processing operations and provides a bottom package upper surface 419 to a stackable The second ("top") package. Solder balls 418 are reflowed to the pad pads of the underlying metal layer of the substrate to provide a sub-layer circuit (e.g., a computer) that is interconnected to a motherboard (not shown) such as a final product. A solder mask 4 1 5, 427 is patterned over the metal layers 42 1 , 423 to expose the underlying metal at the contacts for electrical connection, such as at the line contacts, and for bonding the line contacts 416 And the contact point of the solder ball 418. In the embodiment shown in FIG. 5A, the top package 5A is a platform grid array (LGA) package, which can be similar to a BGA package, such as shown in Figure j, but without solder balls mounted to The contacts on the lower surface of the substrate are on top. Particularly in this example, the top package 500 includes a die 514 attached to a top package substrate 512 having at least one metal layer. It can use any of a variety of substrate types; the top package substrate 512 shown by the example of FIG. 5A has two metal layers 521, 523, each of which is patterned to provide a suitable circuit 'through the via 522 connection. The die is conventionally attached to a surface of the substrate using an adhesive, substantially referred to as a die attach epoxide, as shown by 513 in Figure 5A, and in Figure 5 In the configuration of A, the surface of the substrate to which the die is attached may be referred to as an "upper" surface, and the metal layer on the surface may be referred to as a "top" metal layer, although the die attach surface is in use. There is no need to have any specific directionality. 144476.doc -25- 1378548 In the top LGA package of the embodiment of Figure 5A, the die tie contacts to the line contacts of the metal layer above the substrate to establish an electrical connection. The die 5 14 and the sinuous wire contact 51 6 are coated with a molding compound 5丨7, which provides protection against ambient and mechanical stress for processing work and has a top package upper surface 519. The top package 500 is stacked on top of the bottom package 400 and attached using an adhesive 5〇3. The solder masks us, 527 are patterned over the metal layers 521, 523 such as shai to expose the underlying metal at the contacts for electrical connection, such as at the line contacts to engage the line contacts 5 1 6. The z-interconnect between the top package 500 and the bottom package 4A of the stack is made by wire contacts 518 that connect the top metal layers of the individual package substrates. The 'mother wire contacts 5 18 are electrically connected to the upper surface of the pad on the metal layer 521 above the top package substrate 5 i 2 , and on the other hand, each wire contact is connected to the bottom package substrate 41 2 The upper surface of the pad on the metal layer 42. The wire contacts can be formed by any of the wire contact techniques known in the art, for example, as described in U.S. Patent No. 5,226,582, the disclosure of which is incorporated herein by reference. The package-to-package z-interconnect line is illustrated by the example in FIG. 5, which is formed by forming a bump or bump on a surface of a pad on the upper metal layer of the top substrate, and then The wire is pulled down and fused to a pad of the metal layer above the base substrate. As described below, the wire contact can be completed in the reverse direction, that is, by forming a bump or bump on the surface of a pad of the metal layer above the base substrate, and then pulling the wire toward the wire And fused to a pad on the metal layer above the top substrate. As described below, the choice of the wire contact strategy for the package 2 interconnect will be determined by the geometry of the gap between the stacked substrates such as DH and the bonding surface thereon. Stack 3 in s: In a specific embodiment, the position and order of the interconnects on the individual package substrates disposed on the upper metal layer near the gap of the package substrate are generally configured to The z interconnects on the top 4 package substrate substantially cover the corresponding 2 interconnect pads on the bottom package when the packages are stacked. Conventionally, the top package 500 has a smaller substrate track than the bottom package 400 to allow voids in the wire contacts from shorting to the edges of the metal layer of the substrate. Once the .Z interconnect junctions have been formed, a module package is formed to cover and protect the Z interconnect contacts and provide mechanical integration of the completed modules. The arrangement of the two interconnects on the top and bottom package substrates is shown by way of example in the plan views of Figures 5B and 5C, respectively. Referring to FIG. 5B, the top package 2 interconnect pads 524 are formed by patterning regions of the upper metal layer at the voids 5〇1 on the upper surface 525 of the top package substrate 512. The void 〇1 extends beyond the edge 526 of the top package cladding material and has an upper surface 519. Referring now to Figure %, the bottom package Z interconnect pad 424 is formed by patterning the area of the upper metal layer at the gap 4〇1 on the top surface 425 of the top package substrate 412. The void 401 extends beyond the trace 511 of the stack and overlies the top package substrate 512 and further extends beyond the edge 426 of the bottom package cladding material having an upper surface 419. As shown in Figures 5A, 5B and 5C, the Z interconnect between the top and bottom seals 144476.doc -27-1378548 in accordance with the present invention is interconnected by a top package in the gap 〇1 of the top package substrate. A pad 524 and a line contact between the bottom package interconnect pads 424 (upper or lower contact) in the gap 4 of the bottom package substrate are formed. The multi-package module structure is protected by forming a module cover 5〇7, and the solder balls 418 are soldered back to the solder ball pads exposed on the metal layer under the bottom package substrate to be connected to the lower layer circuit. For example, a motherboard (not shown). As previously mentioned, the structure according to the present invention allows the BGA and LGA to be pre-tested in the assembly of the multi-package package 4 to allow for the exclusion of non-compliant packages prior to assembly, thereby ensuring a higher final module test. Yield. To improve heat dissipation from the multi-package module, a heat sink can be provided on the top package. The top heat sink is formed of a thermally conductive material that has more central regions in at least its upper surface to expose the upper surface of the MPM to the surrounding environment for more efficient heat exchange of the MpM. For example, the top heat sink can be a sheet of metal (e.g., a copper sheet) that can be secured to the MpM cladding during the molding material curing process. Or 'the heat sink may have a portion that is generally + faceted on the top seal' and a portion of the surrounding branch, or a branch placed on or near the upper surface of the bottom seal substrate component. By Fig. 5E is shown a front view of a stacked BGA + LGA MPM 54 in accordance with another aspect of the present invention, wherein a "top" heat sink is provided at the top table of the MpM. The structure of the package stacked in the MPM 54, is generally similar to the MPM 5 in Figure 5A, and similar similar numbers can be identified in the figure by similar reference numbers. A + e — J,. Structure. The top heat sink in this case is formed of a thermally conductive material having a 144476.doc -28- =i:t544 located above the top package and extending over the bottom package junction Surface of the watch:: piece 546. The upper surface of the planar portion 544 is attached to, for example, the surroundings to efficiently feed the tropics. For example, the top heat sink can be formed by a full-length piece (e.g., copper), such as a fault. The support members 5 are fixed to the bottom package base... "To use the upper surface of the adhesive package" (not shown in the figure, the multiple package can be formed - the module is covered by 5) 7 to protect, and the diffuser 卩 卩 破 破 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在A stepped recessed feature (4) is provided to allow for a mechanical integration of the soil structure, and is less separate from the molding compound, and the surface below the 544 is associated with the LGA mold. The space between the upper surfaces 519 is filled with the MpM molded thin layer. Further, the top heat sink may be fixed to the LGA molded upper surface as shown in the cross-sectional view of Fig. 5D. The structure of the stacked package is generally similar to that of MpM 5 in Figure 5A, and similar structures can be identified by similar reference numbers in the drawings. The top heatsink 504 in the example of Figure 5D is a generally planar a sheet of thermally conductive material having at least a more central region of its upper surface exposed to The surrounding environment is more efficient to take the tropical MPM' as shown in the example of Figure 5E. For example, the top heat sink can be a metal plate (such as copper). However, here the top heat sink 5〇4 is used An adhesive 506 is attached to the upper surface 519 of the upper package wrap 517. The adhesive 506 can be a thermally conductive adhesive to provide improved heat dissipation. Typically after the top package molding has been at least partially cured, The 144476.doc •29· 1378548 top heater is fixed to the top package molding material for the MPM cladding 5〇7 injection of &amp; 4 ^ in the molding material ... 〇 7 shot. The top radiator The mold-cut material can be wrapped around it. In the embodiment of Figure 5D, a stepped recessed feature 5〇5 is provided around the heat sink 15504 to allow for a good mechanical integration of the structure. 'Without the molding compound; in another option, as in the MPM of Figure 5A, it may have a single planar heat sink' without a branch member that is not attached to the top package molding Upper surface. In these specific embodiments, as in In the embodiment, the top heat sink can be a generally planar heat conductive material sheet such as, for example, a metal sheet (e.g., copper), and at least a more intermediate (four) region of the upper surface of the planar heat sink is exposed. To the surroundings to bring the teaching away from the MPM more efficiently. Here, the space between the surface 519 on the surface of the surface mold (4) 7 under the simple planar heat sink is filled with a thin layer of MpM molding, and The simple planar heat sink can be secured during the curing process of the molding material. The surface cladding 507 is fixed. The unattached simple flat top heat sink can be coated with the MPM molding material as if The planar heat sink attached to the Figure can be provided with a stepped recessed feature 505 on the periphery to allow for better mechanical integration with the structure and less separation from the molding compound. An MPM having a heat sink, as shown in Figure 5D '5E, provides improved thermal performance. Referring now to FIG. 6A, there is shown a cross-sectional view of a packaged multi-package module in accordance with an aspect of the present invention having a 144476.doc • 30·^/8548-heart top package on a BGA bottom package, wherein The top package lga is partially covered. That is, the molding material of the top LGA package is applied to a limited area and is limited in amount to protect the line contacts during subsequent processing: particularly during subsequent performance testing. In other respects, the configuration of Figure 实质上 is essentially shown in Figure 5At. Thus, in this embodiment, the bottom package is of a structure as illustrated in Figure 5A, and the structure of the top package is substantially as shown in Figure 5A, except in the difference of the top package w. In particular, the top package 600 includes a die 614 attached to a top seal substrate 612 having at least one metal layer. It can use any of a variety of base (four) spoons, and the top package substrate 512 shown by the example of FIG. 6A has two metal layers 621, 623 'each of which are patterned to provide appropriate circuitry and pass through The holes 622 are connected. The die is conventionally attached to a surface of the substrate using an adhesive, which is basically referred to as a die attach epoxide as shown by 613 in Figure ,, and in the configuration of Figure The surface of the substrate to which the die is attached may be referred to as a "top" surface, and the metal layer on the surface may be referred to as an "upper" or "top" metal layer, although the die attach surface is in use. There is no need to have any specific directionality. In the top LGA package of the embodiment of Figure 6A, the die tie contacts to the line contacts of the metal layer above the substrate to establish an electrical connection. The crystal 614 and the wire contact 616 are coated with a molding compound 6丨7 which provides protection against ambient and mechanical stresses to facilitate handling operations. The formation of the cladding 617 in this embodiment is only used to cover the wire contacts and their individual connections to the top package substrate and the top package die, so the 144476.doc 31 ^78548 crystal Most of the upper surface of the pellet 614 is not covered by the coating. The top seal 600 is stacked on top of the bottom package and secured with an adhesive. The masks 615, 62 7 are patterned over the metal layers 62 1 , 623 to expose the underlying metal at the contacts for electrical connection, such as at the line contacts to engage the line contacts 6丨 6. The z-interconnect between the top package 600 and the bottom package 4A of the stack is formed by connecting the wire contacts 6丨8 of the top metal layer of the individual package substrates. The module is covered with 6〇7 to protect, and Tan ball 418 is re-welded to the 烨 ball pad exposed on the metal layer under the bottom package substrate to connect to the τ layer circuit, for example, the motherboard (not shown) The light key is to reduce the cost/mouth. It is said that it is only possible to handle it (for example, by passing through a fine nozzle, like: a syringe with a hollow needle), and thus providing a higher flow rate, the dream m cladding Material. After the part is covered, the top LGA: :° * and rearranged into a special treatment can be the top package line contact. The light phase, for example, in order to improve the ribs in Figure 6A _ _ The ^4, ^^, and 埶 熟 埶 埶 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重 多重Will expose the upper surface of the MPM to the more central area of the surrounding surface (four) chest strap away. For example, the top is two More efficiently, the heat d can be solidified during the curing process of the molding material: a metal plate (e.g., copper), the heat sink can have a generally flat surface on the top C.苟I44476.doc -32. 1378548 parts, and a surrounding support portion, or a support member placed on or near the upper surface of the bottom package substrate. By way of example, Figure 6B shows another embodiment in accordance with the present invention. A cross-sectional view of a stacked BGA+LGA MPM 62 on the one hand, wherein a top P-type e-heater is provided at the upper surface of the MpM. The structure of the package stacked in the MPM 62 is generally similar to the MPM 6 in Figure 6A.类似, and similar structures can be identified by similar reference numbers in the figures. The top heatsink in this example is formed of a thermally conductive material that has a generally planar central portion above the top package. And a surrounding branch member 646 extending to an upper surface of the bottom package structure 412. The upper surface of the planar portion 646 is attached to the upper surface of the MPM to be exposed to the surrounding 'to effectively make the tropical interest. For example 忒The top heat sink can be made of a metal piece (for example To form, for example, f is stamped. The material support member 646 can be used as needed - the adhesive is fixed to the upper surface of the bottom package substrate (not shown). The multi-package stack structure can form a module The cover 6 〇 7 is protected, and the heat sink fulcrum member is embedded in the MpM cladding 6 〇 7 during the molding material curing process. In the embodiment of Fig. 6B, the surface of the heat sink A stepped recessed feature (4) is provided around the upper portion (4) to allow for a more sturdy mechanical integration without being separated from the molding compound. In this embodiment, The space between the lower surface of the heat sink 644 and the upper surface of the die 614 may be filled by a layer of MPM molded, which is sufficiently thick that the heat sink 644 does not interfere with the surrounding lga molding. In the MpM of this embodiment of 6A, there is a simple planar heat sink that does not have a support member and is not attached to the top surface of the top I44476.doc 33-1378548. In these embodiments, as in the eight-body embodiment of the figure, the top heat sink can be a generally planar sheet of thermally conductive material, such as, for example, a sheet of metal (eg, copper), and at least the planar heat sink. The more central area of the j surface is exposed to the surroundings to more efficiently bring the tropics to the MPM. Here, as shown in the embodiment of FIG. 6B, the space between the surface under the planar heat dissipation state and the upper surface of the die 614 is filled with a layer of MPM, which is sufficiently thick so that the heat sink does not Will interfere with the surrounding LGA molding 617. While in the particular embodiment of Figure 6B, such a simple planar heat sink can be secured to the bribe cover 607 during the molding material curing process. This unattached, simple planar top heat sink = can be covered with the MPM molding material, as in the plane heat sink H attached to the figure, and can provide a stepped concave feature on the circumference to Allows better mechanical integration with the structure and less separation from the compound. , x, as in FIG. 6A - another embodiment of the embodiment, which allows attachment of a planar planar heat sink to the top package _ between the surface of the simple planar top and the upper surface of the die 614 Available - spacer. The spacer may be secured to the die using an adhesive: 'The spacer may be formed as part of the unit, and the :: 7 portion of the heat sink, and in these embodiments, the heat sink The spacer portion of the device is damaged: the surface can be fixed to the upper surface of the die by using an adhesive. The spacer is preferably made of a good ancestor to provide an improved, fascinating/and viscous agent - a thermally conductive adhesive. In these embodiments, the top heat sink can be attached to the top package after the top package molding has been at least partially cured, but it is coated with the molding material for the MPM. 〇7 shooting 义 j j sentence. The top of the top heat sink may be coated with the MPM molding material. As in the embodiment of Figure 5D, a stepped recessed feature is provided around the simple planar heat sink to allow for a preferred structure: mechanical integration without being separated from the molding compound. . For example, the MpM structure with a heat sink shown in Figure 6B provides improved thermal performance. Figure 7 is a cross-sectional view of a stacked multi-package module in accordance with another aspect of the present invention having a top LGA package stacked over a - BGA bottom package, wherein a single metal layer substrate is used for the top LGA package. In other respects, the configuration of Figure 7 is substantially as shown in Figure 5A. Therefore, in this embodiment, the structure of the bottom package is as shown in the reference drawing, and the structure of the top package 7 is substantially as shown in FIG. 5A except for the structure of the top package substrate. There are differences. In particular, the top package 7A includes a die »714 attached to a top package substrate 712 having a metal layer 72, which is patterned to provide the appropriate circuitry. The die is conventionally attached to the surface of the substrate using an adhesive, which is basically referred to as a die attach epoxide, as shown at 713 of Figure 7, and in the configuration of Figure 7, The surface of the substrate to which the crystal grains are attached may be referred to as an "upper surface". Therefore, the metal layer on the substrate may be referred to as an "upper" or "top" metal layer, although the die attach surface does not need to be used in use. Any special direction. In the top LGA package of the embodiment of Figure 7, the die tie contacts to the line contacts of the metal layer above the substrate to establish an electrical connection. The crucible 71 4 and the line contact 7 16 are coated with a molding compound 7丨7, and Dan 0J provides 144476.doc -35-1378548 for protection of the surrounding and mechanical stress for handling. The cover 707 in the embodiment shown in FIG. 7 is disposed as in the specific embodiment of FIG. 5, so the cover 707 covers the die and the wire contacts and their connections, and the package There is a surface 719 overlying the entire die and interconnect. As described below, the cladding herein may be formed as in the specific embodiment of FIG. 6A, that is, it is formed to cover only the wire contacts and their individual connections to the top package substrate and the top package crystal. Granules, so most of the upper surface of the grain is not covered by the coating. The top package 7 is stacked on top of the bottom package 400 and secured thereto using an adhesive, as shown at 703, "The solder mask 71 5 is patterned over the metal layer 721 to contact An underlying metal incoming call is exposed, such as at a line contact for engaging the wire contacts 7 16 . The z-interconnect between the top package 700 and the bottom package 4A of the stack is made by wire contacts 718 connecting the top metal layers of the individual package substrates. The Xuanxi repackaging module structure is protected by forming a module package, and the solder ball 418 is reflowed to the solder ball bump exposed on the metal layer under the bottom package substrate to connect to the lower layer circuit 'for example one Motherboard (not in). The benefit of this configuration is that the cost can be reduced compared to the configuration of the substrate using two metal layers in the top L (M package, because the cost of the single metal layer substrate is lower. This configuration can be additionally provided - The lower package wheel gallery, ^ is a single-gold substrate that is thinner than a substrate having two or more metal layers. FIG. 8A is not a stack of H4476.doc-36- 1378548 according to another aspect of the present invention.

A cross-sectional view of Mm (10) in which a heat sink and electrical shield are provided for the bottom package. The embodiment shown in the example of FIG. 8A has a top platform grid array ("LGA") package 8 (10)' stacked on top of the _ bottom ball thumb array BGA package 402, wherein the top lga package It is typically constructed as the top LGA package in Figure 5A. As described below, an LGA' having a single metal layer is as described with reference to Figure 6-8, which may also be used as the top LGA in the specific embodiment of the Figure. Please refer to this top L (M package_ can be similar to the BGA package, as shown in Figure!, but without solder balls for mounting on the contact pads on the lower surface of the substrate. Especially in this example, the top The package_ includes a die 814 attached to the top package substrate 812 having at least one metal layer. It can use any of a variety of substrate types. The top package substrate 812 shown by the example of FIG. 8A has two The metal layers 821, 823' are each patterned to provide suitable circuitry and are connected through vias 822. The dies are conventionally attached to the surface of the board using an adhesive, which is basically referred to as The die attach epoxide, as shown at 813 in Figure 8A' and in the configuration of the figure, the surface of the substrate to which the die is attached may be referred to as the "upper" surface, and the metal layer on the surface It can be referred to as the "upper, Λ „ j ^ β ° 卩" metal layer, although the die attach surface does not need to have any particular directionality in use. The top LGA package in the embodiment of Figure 8A The die line contacts to the substrate Electrical connections are made at the line contacts of the upper metal layer. The die 814 and the wire contacts 816 are coated with a molding compound 817 to provide protection against ambient and mechanical stress for handling operations and have a The top package top surface 819. The solder masks 815, 827 are patterned over the 144476.doc • 37-1378548 metal layers 821, 823 'to expose the underlying metal at the contacts for electrical connection', for example Bonding the line contacts of the line contacts 816. The bottom BGA package 4〇2 of the embodiment of Figure 8A is a conventional BGA package, such as shown in Figure 1, except for the bottom BgA package of Figure 8A. Not coated with a molding compound; rather, it has a heat sink that can additionally be used as an electrical shield as described below. Thus, in this particular embodiment, the bottom package 402 includes an attachment to have a die 414 on the bottom package substrate 412 of at least one metal layer. Any one of a plurality of substrate types may be used, for example, including: a plywood having a 2-6 metal layer, or a construction substrate having a 4-8 metal layer, or Twisted with a metal layer The yttrium imide tape, or a ceramic multi-layer substrate. The bottom package substrate 4i2 shown by the example of the figure has two metal layers 421, 423, each of which is patterned to provide a suitable circuit and through the through hole 422. The die is conventionally attached to a surface of the substrate using an adhesive, substantially referred to as a die attach epoxide, as shown at 413 in Figure 8A, and in Figure 8A. In the configuration, the surface of the substrate to which the die is attached may be referred to as an "upper" surface, and the metal layer on the surface may be referred to as an "upper" metal layer, although the die attach surface is not in use. It is necessary to have any specific directivity. In the bottom pass package of FIG. 8A, the die line contact is connected to the line contact of the gold layer 1 above the substrate to establish (4) the 4 ball 418 system is returned to Above the substrate (4) on the metal layer to provide circuitry interconnected to the bottom, such as a motherboard for the final product (not shown in Figure t), such as a computer. Solder caps 415, 427 are patterned over the metal layers 421, 423 to expose the underlying metal at 144476.doc • 38-^/8548 contacts for electrical connection, such as at the wire contacts The line contacts 416 and solder balls 418. The bottom BGA package 4〇2 of the multi-package module 80 has a metallized (e.g., copper) heat sink that can additionally serve as an electrical shield to electrically include any electromagnetic radiation from the die in the lower BGA. And thereby preventing interference with the crystal grains in the upper package. The "top" planar portion of the heat sink 4〇6 is supported on the substrate 412 and is placed over the crystal particles 414 by the feet or side walls. A dot or line 408 on the adhesive is used to secure the heat sink support 407 to the upper surface of the base substrate. The adhesive can be a conductive adhesive and can be electrically connected to the top metal layer 421 of the substrate 412, particularly to the ground plane of the circuit, and thereby establishing the heat sink as an electrical shield. Or the adhesive may be non-conductive, and in this group, the heat sink is only used as a heat sink. The support portion and the top portion of the heat sink 406 enclose the die 414 and the wire contact 416 and can be used to protect those structures for ambient and mechanical stresses to facilitate handling operations, particularly in the MPM. Subsequent testing before assembly. The top package 8 of the multi-package module 80 is stacked on top of the bottom package 4〇2 on the flat surface of the heat sink/mask 406 and secured thereto using an adhesive 8〇3. The adhesive 8〇3 can be thermally conductive to ensure good heat dissipation;

The adhesive 803 can be electrically conductive to establish an electrical connection between the heat sink 406 and the underlying metal layer of the LGA package substrate, or it can be electrically insulated, thereby preventing electrical connections. The z-interconnect between the top package 8A and the bottom package 4A2 according to the present invention is made up of a top package interconnect in the gap of the ?? top package substrate 812 and I44476.doc • 39-1378548 in the bottom package A line contact 818 between the bottom package interconnect pads in the gap of the substrate 402 is formed. The line contacts can be formed by means of a contact or a lower contact. The multiple package structure is protected by forming a module covering 8〇7

. An opening may be provided in the support portion 407 of the heat sink to allow the MpM molding material to be filled in the enclosed space during cladding. Solder balls 418 are reflowed onto the exposed solder ball pads on the metal layer below the bottom package substrate 412 for connection to a lower layer circuit, such as a motherboard (not shown). As previously mentioned, the structure according to the present invention allows the BGA and LGA to be pre-tested prior to assembly into the multi-package module to allow for the exclusion of non-compliant packages prior to assembly, thereby ensuring a high final module test. The rate is improved by the heat dissipation from the multi-package module, and a heat sink can be provided on the top package. The top heat sink is formed of a conductive material that exposes its upper surface to at least a more central region at the upper surface of the MPM to the surrounding environment to more effectively move the tropics away from the MPM. For example, the top heat sink can be a sheet of metal (e.g., copper)&apos; and it can be secured to the hall during the curing process of the molding material. Alternatively, the device may have a generally planar portion over the top package and a surrounding support portion or support member disposed on or above the upper surface of the bottom package substrate.藉 By way of example, FIG. 8B shows a BGA+LGA MPM Ri ^ ^ π ^ λ. according to another aspect of the present invention and a "82 wearing surface view" in which the top surface of the crucible is at the top of the "one top" radiator . The occlusion of the stack is generally similar to that of Figure 10 (10), and similar structures can be identified in the figure by a similar number = 144476.doc 1378548. The top heat sink in this example is formed of a thermally conductive material having a generally planar central portion 804' positioned over the top package and a peripheral support member extending to the upper surface of the bottom package substrate 412. 806. The top surface of the plane portion 8〇4 is attached to the upper surface of the MPM to be exposed to the surrounding image, and the LV 士· & 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 For example, the top heat sink can be formed by a sheet of metal (e.g., copper), e.g., by stamping. The support members 806 can be secured to the upper surface of the bottom package substrate (not shown) using an adhesive as needed. The multi-package module structure can be protected by a form-module wrap 807, and the heat sink brace component is embedded in the (4) PM wrap during the curing process of the sizing material. In the embodiment of Figure 8B, a stepped recessed feature 8〇5 is provided around the planar upper portion 804 of the heat sink to allow for better mechanical integration of the structure without The molding compound is separated: in this embodiment, the space between the lower surface of the heat sink_ and the upper surface 819 of the LGA molding 817 is filled with the MpM molded thin layer. Alternatively, the top heat sink can be a thermally conductive material, such as a sheet metal (e.g., copper), which is typically a flat sheet, which does not require a support member. At least the more central region of the upper surface of the face radiator is exposed to the surrounding environment to more effectively remove the tropics from the MpM. Such a simple planar heat sink is shown at 844 in Figure 8C, wherein the heat sink is secured to the top; the outer surface of the package is molded. However, in the figure, the heat sink is not attached to the upper surface of the dome P seal. Rather, the space between the lower surface of the simple planar heat sink and the upper surface 819 of the LGA molding 817 is filled with a thin layer of MPM molding, and the simple planar heat sink can be used in the molding material. 144476.doc 1378548 is fixed to the MPM wrap 807 during the curing process. A trip. . The periphery of the non-early planar top heat sink may be coated with the MPM molding material, for example, in the embodiment of Figure 8B, and may have a stepped concave feature (a simple plane in Figure 8C). The heat sink _ is referred to as a recessed feature (4) to allow the structure to have better mechanical integration without being detached from the molding compound. &amp; In addition, a top heat sink can be attached to the upper surface of the LGA molding, as in the cross-section of Figure 8C. The structure of the stack in MpM &amp; is generally similar to the MPM8 in circle 8A, and may be similar in the figure. Refer to the number to identify similar structures. The top 844 in the example of Fig. 8C is a generally planar plate of thermally conductive material that exposes at least the more central region of the face to the surrounding to more effectively remove the tropics from the MPM' as in Figure 8B. In the example. For example, the top heat sink can be a metal piece (for example, copper W Dan, where the heat sink is fixed to the upper surface 819 of the upper package cover 817. The adhesive 846? Agent to provide an improved heat dissipation effect. Usually after the at least partial curing has been made, the top heat sink is the package mold f' but before the molding material is injected for the ΜΡΜ = the top heat sink can be In the particular embodiment of the _ = ,, the heat sink is circumferentially mechanically shaped to allow for a preferred configuration of 5 degrees and less detachment from the molding compound. =8 wide: The benefits of the structure shown in 8B, 8C are obvious thermal performance, visible *, there is electrical shielding at the bottom package 'for example, in combination 144476.doc -42 · 1378548 RF and digital The MPM towel is even more important. For all applications, it does not need to have both a bottom package heat sink and a top heat sink. The material 'is suitable according to the needs of the end product.

Fig. 9A shows a cross-sectional sheet BGA of a multi-package module in which a flip chip of a lower die is stacked on an LGA according to another aspect of the present invention. Under the

In the square BGA, the die is a flip chip connected to the substrate of the substrate, and the space between the die and the substrate is filled sideways. This BGA can be tested before being assembled into the face. The back side of the die can be used to attach the top LGA with an adhesive. The top LGA is interconnected with the module substrate 2, and the MPM is molded through the line contacts. The main benefit of this configuration is that the flip chip connection on the bga provides high electrical performance.

Referring to FIG. 9A, the bottom BGA flip chip package includes a substrate 312 having a patterned metal layer 321 such as solder bumps and gold bumps on which the die 314 is bonded by flip chip bumps 316. Point bumps, or directional conductive enamels or pastes. It is possible to use any substrate type; the bottom package substrate 312 shown by the example of Fig. 9 has two metal layers 321, 323, each of which is patterned to provide a suitable circuit and connected through the via 322. The flip chip bumps are attached to a patterned bump pad array on the active surface of the die and serve as an active surface of the die for the upwardly patterned metal layer of the substrate Face down, this configuration can be called - "lower die" flip chip package 填 fills a polymer side between the die and the substrate to provide protection against the surrounding, and adds mechanical integration to 5 Mysterious structure. 144476.doc • 43- 1378548 The top LGA package 900 of the multi-package module 90 is typically constructed as a top LGA package 700 similar to the multi-package module 70 of FIG. In particular, the top package 900 includes a die 914 attached to a top package substrate 912 having a metal layer 92 1 that is patterned to provide suitable circuitry. The die is conventionally attached to the surface of the substrate using an adhesive, which is essentially referred to as a die attach ring germanide, as shown in 913 of Figure 9A, and in the configuration of Figure 9A. The surface of the substrate to which the die is attached may be referred to as an "upper" surface. Therefore, the metal layer on the substrate may be referred to as an "upper" or "top" metal layer, although the die attach surface is not used. Need to have any special direction. In the top LGA package of the embodiment of Figure 9A, the die tie contacts to the line contacts of the metal layer above the substrate to establish an electrical connection. The crystal 914 and the wire contact 916 are overmolded with a molding compound 917 which provides protection from ambient and mechanical stresses to facilitate handling operations. The cladding 907 in the embodiment illustrated in Figure 9 occupies the die and the wire contacts and their connections, and the cladding has a surface 919 over the entire die and interconnect. As described below, the coating herein may be formed in the same manner as the embodiment of Fig. 6A. The image may be formed to cover only the wire contacts, and the individual wires are connected to the top package substrate and the (four) package die, so that the upper surface of most of the die is not covered by the package. . The top package 9 is stacked on top of the bottom package 300 and secured thereto using an adhesive, as in 9〇3. A solder mask 915 5 is patterned over the metal layer to expose an underlying metal call connection at the junction, such as at a line junction for bonding the line contacts 916. 144476.doc -44 - "The interconnect between the top package 900 and the bottom package 300 of the stack is made up of wire contacts 918 connecting the top metal layers of the individual package substrates. Protected by forming a module package, and = ball 3 18 is soldered to the solder ball bump exposed on the metal layer under the bottom package substrate to connect to the underlying circuit, for example - the final product motherboard (not Not in the figure), like a computer. The solder masks 3 15, 327 are patterned over the layer 321 , 323 'to expose the underlying metal at the contacts for electrical connection, for example in the line The junctions 918 and the solder 318 are bonded to the contacts. The structure having lga stacked on a flip chip bga having the lower die is, for example, as shown in FIG. 9A, which can combine a heat sink and an electric shield. As shown in FIG. 8B or FIG. 8C, FIG. 9B is a perspective view of a multiple-sealing module according to another aspect of the present invention, wherein the flip chip of the lower die is classified as an LGA, as shown in FIG. 9A. And § * 杳 ^ v, body through the example 'and where the lower bga has a heat sink / shade. Special Yes, please refer to FIG. 9B, the bottom bga package of the multi-package module 92 has a metallized (e.g., copper) heat sink, which additionally serves as an electric shield to include any of the orders from the below. The electromagnetic light of the die is 'and thereby prevents interference with the die in the upper package. The "top" planar portion of the heat spreader 906 is supported on the substrate 312 and supported by the foot or sidewall 909. On the die 314. — Adhesive point or line 908 is used to secure the heat sink branch 909 to the upper surface of the base substrate. The adhesive may be a conductive adhesive and may be electrically connected to the top metal layer 321 ' of the substrate 312', particularly to the ground plane of the circuit, and thereby establish 144476.doc • 45-1378548 For an electric shield. Alternatively, the adhesive can be a non-conductive, and in this configuration, the heat sink is only used as a heat sink. The support and top portions of the heat sink 906 enclose the die 314 and can be used to protect those structures against ambient and mechanical stresses to facilitate processing operations, particularly subsequent testing prior to assembly of the MPM. The top package 900 of the multi-package module 92 is stacked on the bottom package 3〇〇 on the flat surface of the heat sink/shield 906 and is fixed there using an adhesive 903. The adhesive 9〇3 can be used. Thermal conductivity to improve heat dissipation; and the adhesive 903 can be electrically conductive to establish electrical connection between the heat sink 9〇6 and the underlying metal layer of the =ga package substrate, or it can be electrically insulated, thereby preventing electricity The z-interconnection between the top package 9A and the bottom package 300 according to the present invention is formed by the top package interconnection pad in the gap of the top package substrate 912 and the bottom portion in the gap between the bottom package substrate 3? The wire contacts 918 are formed between the package interconnection pads. The wire contacts can be connected to the contacts or the lower contacts. The structure of the re-package module is formed by forming a module. 7. Protection is provided. An opening is provided in the support portion 9〇7 of the heat sink to allow the enamel molding material to be filled in the enclosed space during the coating. The solder ball 318 is reflowed to the bottom package. a solder ball on the exposed metal layer under the substrate 3 To the lower layer, for example, a motherboard (not shown). * As described, the structure according to the present invention allows the BGA and LGA to be pre-tested prior to assembly into the multiple package mold to allow for assembly prior to assembly. Excluding the package of the Q, thereby ensuring a higher final module test yield. I44476.doc -46-^/«548 in the flip-chip according to this aspect of the invention; may for example ... - usually ASi: The device can be packaged in a memory package or in a batch of eight. ^When the top package-memory package is packaged, it can be packaged as +. 07 日日日记愫44 enemy flip chip The lower die bottom package is particularly suitable for more than 5 catches of geese-masking, especially for RF processing, for example in (iv) communication applications. Application ': as needed' 纟 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒 晶粒Figure 9B is the bottom of the bottom. P package J 4 Ή - heat dissipation and. In order to improve the multiple 2 Du heat dissipation shown in the example in Figure 9Α or 9Β, on the top package can provide / ϋ 〆, .. &amp;; hot f 5 ° 5 Hai top scattered titanium crying is formed by a conductive material, which will be placed on the ',,, ~ clothing Exposing at least a more t-centered area at the upper surface of the MPM to the surrounding environment to more effectively remove the tropics from the MPM. For example, 'the top heat sink can be - metal ^ such as copper' and it can The molding material is fixed to the fun cladding during the curing process. Or the heat dissipation may have a generally planar portion on the top package, and a surrounding portion or a bottom package substrate. A branch member on or near the upper surface. By way of example, Figure 9C shows a worn view of a BGA+LGA MPM 94 in accordance with another aspect of the present invention, in the above table of the MpM: Provide a "top" radiator. The structure of the package stacked in the MPM 94 is generally similar to the MPM 92' in Figure 9B and a similar structure can be identified in the figure by similar reference numbers. The top thermal write in this example is formed of a thermally conductive material that has a generally planar central portion 944 over the top package and extends over the bottom package substrate 312. Table I44476.doc • 47- 1378548 The surrounding support member 946. The upper surface of the planar portion 944 is attached to the upper surface of the Mm to be exposed to the surroundings to efficiently discharge the tropics. For example, the top heat sink can be formed by a sheet of metal, such as copper, for example by stamping. The sub-building components 946 can be secured with an adhesive as needed to the upper surface of the bottom package substrate (not shown). The multi-package stack structure is protected by forming a module cover 9〇7, and the heat sink support member is embedded in the MpM cladding 9〇7 during the molding material curing process. In the particular embodiment of Figure 9C, a stepped recessed feature 945 is provided around the upper portion 944 of the planar surface of the heat sink to permit this. The structure has a good mechanical integration and is less likely to be separated from the molding compound. In this embodiment, the space between the lower surface of the heat sink 944 and the upper surface of the die 914 is filled with a layer of MpM molding, which is thick enough that the heat sink 944 does not interfere with the surrounding lGA. Molding 917 ^ In addition, the mpm in a particular embodiment like 9A or 9B can have a simple planar heat sink that does not have a support member. This simple planar heat sink can be secured to the upper surface 519 of the top package module 517 using an adhesive. Alternatively, the MpM of the embodiment of Figure 9A or Figure 9B may have a simple planar heat sink that does not adhere to the top surface of the top package molding. In these embodiments, as in the embodiment of FIG. 5A, the top heat sink can be a generally planar sheet of thermally conductive material, such as, for example, a sheet of metal (eg, copper), and at least the planar heat sink The more central area of the upper surface is exposed to the surroundings to more effectively displace the tropics. Here, in the embodiment of Fig. 9C, the space between the lower surface of the planar heat sink and the top package 900 may be filled with a layer of MpM. And such a simple planar heat sink as in the embodiment of Figures 9c 144476.doc • 48-1378548, which can be secured to the MPM cladding during the molding material curing process. The unattached early-surface flat top heat sink may be covered with the MPM molding material as the planar heat sink attached in FIG. 5D, and may provide a stepped concave feature on the circumference to Better mechanical integration with the structure is allowed and less separated from the molding compound.

For example, Figure 9C does not have a heat sink MpM that provides thermal performance for the cover. The bottom package of the MPM according to the present invention may be a flip chip package in an upper die set with the bottom package die carried on the lower surface of the bottom package substrate. Typically the bottom seal grain attachment area in such a configuration is tied to approximately the center of the substrate area, and the second order interconnecting ball can be disposed on the perimeter close to two or generally more of the The edge of the substrate. The upper die flip chip and its flip chip interconnect structure are in the second order

The anchorage height within the interconnect structure&apos; and therefore the bottom seal in this configuration does not contribute to the overall thickness of the wrapped PM. Moreover, the upper die configuration avoids a net column reversal effect, which is essentially the result of the lower die configuration. ~ In particular, by way of example, FIG. 10A is a cross-sectional view of a multi-package module 101 according to another aspect of the present invention, in which a stacked die platform grid array package surface-on-die configuration 3G2 The stack is stacked on top of a flip chip: a BGA and the stacked packages are interconnected by wire contacts. In the bottom BGA package 3〇2, the die 344 is attached to the lower side of the bga substrate 3 = . 144476.doc -49· ^78548 As shown in the figure, this structure provides a thinner ^^1> because the bottom package is between the solder ball and the bottom of the bottom package. In this area, this configuration can have a higher electrical performance, not only because it uses a flip-chip connection, but also because it provides a more direct electrical connection of the die to the ball, for The connection between the die and the spheroidal ball has a (four) metal trace 'and no through hole is required (as required in the configuration of the figure or 叩). In addition, the upper die configuration allows the package to be compatible with wire contacts on the grid as needed in some applications. The net is listed as the sum of all the connection pairs between the die and the solder balls. When the grain faces up, "the lower jaw, when it has a connected pattern, which is the same type of mirror image in the same grain when the grain faces down" . In the panel of Figure A, the top LGA package is attached to the upper side of the 4BGA with an adhesive and then the wire contacts and molding. In the particular embodiment shown in the examples of &lt;RTI ID=0.0&gt;&gt;&gt;&gt;&quot;&quot;&quot;&quot;&quot;&quot;&quot;&quot;&quot; Stacked die encapsulation is well established in the industry. ▲ These versions can be found in packages with up to 5 stacked die X grains, in different sizes, and in a stacked die package. The grains T have the same or different relative sizes. The grains are substantially square or rectangular, and the rectangular and square grains of the 冋 size can be stacked in a MW (four) package. When the crystal grains are rectangular or have different sizes, the crystal grains can be crystallized from the inner crystal grains, so that the voids of a lower crystal grain in the stack are more than one pile of the upper crystal grains in the stack. The gap. Figure HA shows an example where the seesaw is the same size. In these embodiments, or in the case where the upper die is larger than a lower die, in the example, a spacer is assembled in the die. The line contacts of all the dies are formed to the LGA substrate. Figure 1B shows an example of the upper::lower grain in the stack; or alternatively the die is stacked such that the gaps in the perimeter protrude beyond the voids of the lower die. In the embodiment as shown in the figure, + is required to have a spacer because the line contact at the line contact of the underlying grain of the underlying crystal allows the line contact to not interfere with the grain. Referring to FIG. 1A, the bottom flip chip BGA package 3〇2 includes a substrate 342 having a patterned metal layer 353, which is connected to the die 344 by a flip chip bump 346. Parts such as solder bumps, gold bumps or anisotropic conductive films or pastes. It can use any of a variety of substrate types: The bottom package substrate (4) shown in the example of Figure 10A has two metal layers 351, 353, each of which is patterned to provide a suitable circuit. The bottom package substrate 342 additionally has a metal layer 355 sandwiched between the dielectric layers. The metal layer 355 has voids at selected locations to allow the metal layers 351, 353 to pass through the via connections, such that selected portions of the patterned metal layer 35 1 , 353 are connected by vias The substrate layers 354, 356, and the voids in the metal layer 355 sandwiched therein. The selected portion of the patterned metal layer 353 is connected through the substrate layer 356 to the sandwiched metal layer 355 by vias. Flip-chip bump 346 is attached to a patterned bump pad on the active surface of the die, and because the active surface of the die faces upward with respect to a patterned metal layer of the substrate facing down, This configuration can be referred to as an "upper die" flip chip package. Filling a polymer side between the die and the die attach region 144476.doc 1378548 of the substrate provides protection against the surrounding and adds mechanical integration to the structure. As described above, the metal layers 351, 353 are patterned to provide a suitable circuit ' and the sandwiched metal layer 355 has voids at selected locations to allow selection on the upper and lower metal layers 351, 353 Interconnection is allowed between the traces (not touching the sandwiched metal layer 355). In particular, for example, the underlying metal layer is patterned in the die attach region to provide adhesion to the flip chip interconnect bump 343; and for example, the underlying metal layer is patterned to be more sinister to the bottom package substrate 342 The gap provides the attachment of the second-order interconnect 348, whereby the completed mpm is attached by solder reflow to the underlying circuit (not shown). For example, 'the upper metal layer is patterned to # near the gap of the bottom package substrate 342 to provide attachment of the wire contacts to the top package to the bottom package. The grounding wire of the circuit of the metal layer 353 is connected to the sandwiched metal layer milk through the through hole; some of the selected soldering clothes 8 are grounding balls, which are attached to the lower layer circuit when the device is mounted. Ground wire. Therefore, the sandwiched metal layer of milk is made: the ground plane of the crucible. Selected in the solder balls 348 are input/output balls or power balls 'so' these are attached to the solder balls of the input/output or power lines, respectively, in the circuit of the metal layer 353. Still referring to Figure 1, 兮, 兮 w w, λ package looo is a stacked die platform grid array package, pot &amp; a, 〆, 日日粒10丨4 ' 1024 by a spacer 1〇15 Separated and stacked on a top seal and a substrate. The top package substrate includes a dielectric layer 1012 having a metal layer on the surface of the pad and patterned to provide traces, for example, having an attachment for the The top package 144476.doc -52 - 1378548 substrate line contacts are interconnected to the stacked die and the line contacts for the top package are interconnected to the bottom package substrate. The lower die 1〇14 is adhered to a die attach region of the top package substrate, for example, a grain adhesion epoxide. The die 1014 is electrically coupled to the top substrate by wire contacts 1016, connected at line contacts on the active surface of the die to the line contacts on the selected trace 1011. A spacer 1〇15 is fixed to the upper surface of the lower die 1〇14 using an adhesive (not shown) and the upper die 1024 is fixed to the upper die 1024 using an adhesive (not shown). The upper surface of the spacer 1015. The spacer is selected to have a sufficient thickness to provide a void so that the protruding voids of the upper die 1024 do not invade the wire bonds 1016. The die 1 24 is connected to the top substrate by wire bonds 1 〇 26 which are connected at line contacts on the active surface of the die to the line contacts on the selected trace 1011. The stacked die and the wire contact assembly on the top package substrate are coated on a molding material 1〇17_, providing a top package upper surface 1〇19, leaving the exposed Interconnect the traces of the traces &quot; The top package 1000 can be tested at this point and then stacked to the die attach area of the upper surface of the bottom package substrate and secured thereto using an adhesive 1003. The electrical interconnections of the top and bottom packages to the line contacts on the traces exposed on the traces 10 of the top package substrate and the traces on the traces of the metal layer above the bottom package substrate The line contact 101 8 is affected. The MPM assembly is then wrapped in a molded 1007 to protect the package-to-package wire contacts and provide mechanical integration in the completed mpm 1〇1. As noted above, stacked die top packages stacked on top of the upper die flip chip 144476.doc • 53-1378548 chip package in these embodiments may have a variety of configurations depending, for example, on the stack The number of crystal grains in and according to the size of the crystal grains. For example, in a plan view, the perimeter 10B is not another mpm configuration 103, wherein the LGA has two stacked 曰#, i 日日日粒, and wherein the upper die 1044 is sized It is not smaller than the lower die 1〇3, at least in the plane of the cross-sectional view. In this configuration, there is no gap between the wire contacts in the gaps of the grains below the 玄 没有, and there is no need to include a spacer. The bottom seal 3〇2 in Fig. 10Β1ΜΡΜ3 is substantially similar to the bottom seal in Fig. 101, and the corresponding part is similar to that shown in Fig. 10. The top package in _1〇3 is a stacked die platform grid array package having dies 34, 34, 1 〇 44 stacked on top of a top package substrate. The top package substrate includes a dielectric layer, which has a metal layer on the surface of the upper substrate, and is patterned to provide traces, such as 1031, straight and attached to Lutian/, and has an attached surface. The top package substrate line contacts are interconnected to the stacked die ' and the line contacts for the top package are interconnected to the bottom package substrate. The lower die 1 〇 34 is attached to the die attach region of the top package substrate using an adhesive, such as a die attach epoxide. The die 1034 is electrically coupled to the top substrate by wire bonds 1 〇 36 which are connected at line contacts on the active surface of the die and at line contacts on the selected trace. The upper die is attached to the upper surface of the lower die 1034 using an adhesive (10). The die 1 〇 44 is connected to the top substrate by a wire contact which is connected at a line contact on the active surface of the die to a line contact on the selected trace 1 〇 31. The stacked die and wire contact assembly on the top package substrate is wrapped in a molding material 1037 that provides a top surface of the top package 1 〇 39 of the 144476.doc -54· 1378548, leaving the exposed The void portion of the interconnect trace 1031. The top package 1〇3〇 can be tested at this time, and then stacked to the die attach area of the upper surface of the bottom package substrate, which is fixed by an adhesive 丨003. The electrical interconnections of the top and bottom packages are exposed at line contacts on the traces exposed on the traces 1 〇 31 of the top package substrate and traces on the traces hi of the metal layer above the bottom package substrate The line contact 1018 is affected. The device is then overmolded in a molded 1007 to protect the package-to-package wire contacts and provide mechanical integration in the finished MPM 103. The processor die in the flip chip bottom package in accordance with this aspect of the invention can be, for example, an ASIC, GPU or CPU; and the top package can be a body package, particularly for example in Figures 10A and 1B. One of the illustrated layers stacks the grain memory package I. The bottom-of-the-bottom wafer layout allows for a very thin die and is especially suitable for higher speed applications such as mobile communications.

As described below, the ground plane 355, such as the V1PM portion package substrate t, additionally acts as an electromagnetic shield to significantly reduce the interference between the BGA die and the covered LGA die, and is particularly interesting. The application in which the die is applied to the bottom is a high frequency die (e.g., radio frequency) application t. In some applications, it is also required to shield the BGA die in the bottom package from the underlying circuitry to which the MPM is attached. Figure (4) shows an example of a multi-package module 1〇5, in which a stacked die platform grid array package is stacked in the upper die configuration 3〇2 stacked on the “(4) wafer position, I44476. Doc-55- 1378548 wherein the stacked packages are interconnected by wire contacts, wherein an electromagnetic shield is provided at the flip chip BGA to limit radiation downward toward the underlying circuitry (not shown). In the MPM 1〇5 of FIG. 10C, the top package 1〇〇〇 and the bottom package 302 are constructed in a manner similar to the MpM 1〇1 of FIG. 1A, and the corresponding features can be correspondingly illustrated. Identification. The bottom package 3 of the MPM 1〇5 has a metallized (e.g., copper) electrical shield that electrically includes electromagnetic radiation from the die in the lower BGA and thereby prevents interference under the installed MPM. Circuit. The lower planar portion of the occlusion is supported by the foot or side wall 305. An adhesive dot or line 3〇6 is used to secure the heat sink support 3 05 to the lower surface of the bottom substrate. The adhesive can be a conductive adhesive&apos; and can be electrically connected to traces of the metal layer under the substrate, particularly to the ground traces of the circuit. The portion of the branch and the underlying planar portion of the shield enclose the die 344 and, in addition to being shielded beneath the finished device, can be used to protect the underlying die for ambient and mechanical stress to facilitate Process the job' and especially during subsequent testing prior to assembly, or prior to installation. Additionally, as described below, the masking described with reference to Figure 1GC can be used to mask the top die wafer bottom package 300 in the MPM, which has other male and positive grain tops. The p-sealing m, for example, the stacked die top package does not have a spacer between adjacent grains as shown in 1030 of Figure 10B. And additionally, the masking as described with reference to Figures 1C can be used to shield the die-flip wafer bottom package in the MPM, except for the top package of the stacked die tops. For example, the top package can be a - platform grid array 144476.doc - 56 - 1378548 package 'for example, like the 5 ga top package in U5A. In order to improve the multi-package module, the function of the multi-package module is provided in Fig. 1GA, and a heat sink can be provided on the top package. The heat sink is shaped by a conductive material. At least the upper surface of the surface of the MPM; the upper surface is exposed to the more central area to the surrounding environment to efficiently remove the tropics from the ΜΡΜβ. For example, the top heat sink may be a metal sheet (eg Copper), and it may be fixed to the crucible coating during the molding material curing process. Alternatively, the heat sink can be over the top package and have a generally planar portion, and a surrounding portion of the perimeter or support member disposed on or near the upper surface of the bottom package substrate. Hunting is illustrated by the example 'FIG. 1GE' as a cross-sectional view of a stacked MGM 109 comprising a stacked die top package stacked on top of the upper die BFM, where the top surface of the MPM is provided - "Top "heat sink. The structure of the top and bottom packages in the MPM 109 is generally similar to that in Figure (7). The MPM 1G5' in the middle can be similarly identified in the drawing by a similar reference number. The top heat sink in this example is formed of a thermally conductive material having a generally planar central portion 1〇04 positioned above the top seal and extending over the upper surface of the bottom package substrate 342 The surrounding part of the building is secreted. The plane part is removed from the upper surface to record the upper surface of the MPM to be exposed to the surroundings to efficiently discharge the MpM into the tropics. For example, the top heatsink can be formed from a sheet of metal (e.g., copper), e.g., by stamping. These branches. P piece 1046 can be secured to the upper surface of the bottom package substrate (not shown) using an adhesive as needed. The multi-package module structure can be protected by the shape H_tl〇〇7 and the heat sink branch component is embedded in the MPM cladding 1〇〇7 during the material curing process of the mold 144476.doc 57-1378548. In the embodiment of FIG. 10E, a stepped recessed feature 丨 045 is provided around the upper portion of the plane of the heat sink 1 〇 44 to allow for better mechanical integration of the structure, and less Detached from the molding compound. In this embodiment, the space between the lower surface of the heat sink 1044 and the upper surface 1019 of the 1GA molded 1 〇 17 is filled into the thin layer of the mpm molding. Alternatively, the top heat sink can be a thermally conductive material, typically a flat sheet, such as, for example, a sheet of metal (e.g., copper) that does not require a support member. At least a more central region of the upper surface of the planar heat sink is exposed to the surrounding environment for more efficient removal of the tropics from the MPM. This simple planar heat sink is shown in Figure 4D, which is fixed to the top surface of the top package molding. The structure of the package stacked in the MPM 107 is generally similar to the MPM 109 in Fig. 10E, and similar structures can be identified by similar reference numerals in the drawings. The top heat sink W〇4 in the example of Fig. 10D is a generally planar sheet of thermally conductive material having at least a more central region of its upper surface exposed to the surrounding environment for more efficient tropical deployment. MPM, as shown in the example in Figure 〇E. For example, the top heat sink can be a metal sheet (e.g., copper). However, here, the top heat sink 1 4 is fixed to the upper surface 1019 of the upper package cladding 1 using an adhesive 1006. The adhesive 丨006 can be a thermally conductive adhesive to provide improved heat dissipation. Typically, after the top package molding has been at least partially cured, the top heat sink (four) is _ top package molded 'but it is attached to the mold The material was prepared for the MPM cladding just before the shot. The MPM molding material can be wrapped around the top (four). In the embodiment of FIG. 1D, 144476.doc -58-1378548 is provided with a stepped recessed feature 1005 around the heat sink 1004 to allow for better mechanical integration of the structure, but less Will be separated from the molded character. σ A simple planar heat sink, such as 1〇〇4 in Figure 10D, is attached to the top surface of the top package molding to be attached, and the surface of the early planar heat sink is molded with the LGA. The space between the top and bottom surfaces of 1〇17 is filled with a thin layer of MPM molding, and such a simple planar heat sink can be fixed to the MpM cladding (10) 7 during the curing process of the wheel material. The surrounding area of the monolithic top-surface heat sink can be coated with the MPM molding material and can have a stepped concave feature around the periphery (simple plane heat dissipation in FIG. 10D). The device is referred to as a recessed feature (10) to allow the structure to have better mechanical integration without the detachment of the compound. The advantage of the structure in Figure Lake, 1() E is that it can improve heat. Efficiency. For all applications, it is not necessary to have both a bottom seal and a top heat sink. In addition, depending on the needs of the end product, there are several suitable ones. Figure 11 shows the flaw according to the present invention (i.e. A cross-sectional view of another embodiment of 110) wherein the stacked die LGA top package is stacked on top of the stacked die BGA and the top and bottom packages are interconnected by wire contacts. In the particular embodiment illustrated in FIG. u, the bottom BGA package 408 is in the stack and the lands are π m Η M — n and the top 1 ga package has two dies in the stack. The configuration of the structure is particularly suitable for - fixed The trajectory needs 144476.doc -59· To high memory and the memory type, the stacking dies can be the same or different, including I flash, SRAM, PSRAM 箄. Please refer to Figure 1丨The top ❹ phase view in 10A is essentially constructed to resemble the n1GGG' identified by the figure number and the similar features are encapsulated by a similar reference Grid Array package to form a stacked die platform, medium grain 1014, 1〇24 are difficult to be separated by a spacer 1〇15 and stacked on a top substrate. The top package substrate includes a dielectric layer 1012, Futai #, 8. The upper substrate has a surface a metal layer and patterned to provide traces, such as 1&quot;, with attachments for the upper package substrate line contacts interconnected to the stacked die and for the wire contacts of the upper package The substrate is packaged at the bottom of 4. The lower die (8)* is adhered to the die attach region of the top package substrate using an adhesive 1〇13, for example, a grain adhesion % oxide grain 丨Q i 4 is connected by wire bonding Point 1G16 is electrically connected to the top substrate, and is connected to the active form of the die The line contact on the surface is fixed to the lower die 1〇14 at the line contact on the selected trace 1G11, using the adhesive (not shown). The upper surface, while the upper die 1024 is secured to the upper surface of the spacer 1 15 using an adhesive (not shown). The spacer is selected to have a sufficient thickness to provide a void, so the upper die The protrusion gap of 1 024 does not invade the line contact 1016. The die 1024 is connected to the top substrate by wire contacts 1〇26, which are connected at the line contacts on the active surface of the die and are selected a wire contact on the trace 丨〇丨j. The stacked die and the wire contact assembly on the top package substrate are wrapped in a molding material 1 〇1 7 to provide a The top surface of the top package is 1 〇1 9 ' and the interconnected traces of the turbulent path 1 〇1 1 are examined by 144476.doc -60 · 1378548. The top package 1000 is tested at this point and then stacked over the bottom package 408&apos; as described in detail below. The structure of the bottom package 4〇8 of the MPM 11 is similar to the top package; 1〇00. In particular, the bottom package 4〇8 is a stacked platform grid array package that separates the dies 444, 454 from a spacer and is stacked on a bottom package substrate. The bottom package substrate serves as the interconnected substrate of the completed Mpm, and it can be constructed in a manner similar to, for example, the bottom substrate 412 of the bottom package of the MPM 5 in Fig. 5A. In particular, in this specific embodiment, the bottom package 408 includes a bottom package substrate 442 having at least one metal layer. It can use any of a variety of substrate types including, for example, a plywood having a 2-6 metal layer, or a construction substrate having a 4-8 metal layer, or a flexible polyimide tape having a 1-2 metal layer. Or a ceramic multiple layer substrate. The bottom package substrate 4 shown by the example of Fig. 11 has two metal layers 451, 453, each of which is patterned to provide appropriate circuitry and connected by a 452. The lower die 444 is conventionally used - the adhesive 443 is attached to an "upper" surface of the substrate, which is basically referred to as the die attach epoxide, as shown at 443 in FIG. The lower die is electrically connected to the base substrate by wire contacts 446 that are connected at line contacts in the active surface of the die 444 to line contacts on the selected trace 451. A spacer is attached to the upper surface of the lower die 444 using an adhesive (not shown), and the upper die 454 is stacked thereon and fixed thereto using an adhesive (not shown). The upper surface of the spacer. The spacer is selected to be sufficiently thick to provide a void so that the protruding voids of the upper die Μ* do not conflict with the wire contact 446. The upper die is connected to the bottom substrate by a 144476.doc -61 - 1378548 wire bond 456 that is connected to the line on the active surface of the die 454 and to the selected trace 451. Point. The _P package lower die 444 and the upper die 454, and the wire contacts 446, 456 are coated with a mold compound 447' which provides protection against ambient and mechanical stress for processing operations and provides the The top stacked die package 00 can be stacked on top of the upper surface of the package. The solder balls are reflowed over the contact pads on the metal layer below the substrate to provide circuitry to the bottom, such as a motherboard for the final product (not shown). The solder mask Us II 57 series is patterned in the metal (10)! On top of (5), to make a violent road at the junction. The underlying metal is used for electrical connection, such as bonding the dedicated contact and solder ball 41 8 at the line contact. The top package can be tested and then stacked onto the die attach area on the top surface of the bottom package substrate and secured thereto using an adhesive 丨1〇3. The electrical interconnections of the top and bottom packages are routed at line contacts on the traces exposed on traces 1011 of the top package substrate and traces on traces 451 of the metal layer above the bottom package substrate. The contact 1118 is affected. The MPM assembly is then wrapped in a molded 11〇7 to protect the wire bonds of the package and provide mechanical integrity in the finished MPM 11®. ° The MPM packaged at the top and in the bottom package, or both in the top and bottom packages, is particularly well suited for high memory small track applications. For example, a multi-package module of FIG. 11 can include a stacked die memory top package on a stacked ASIC bottom package; or both top and bottom seals can be stacked die memory packages. Constituting a high-density memory phantom 144476.doc • 62· 1378548 Other stacked die package configurations may be applied to the bottom or top stack # of the grain package according to this aspect of the invention, which is based, for example, on: The number of grains in the crucible and according to the grain size in the stack. Example: ?: The upper die in a bottom package stack may have a smaller size than a lower die. In this configuration, there is no right edge above the wire contact attachment of the lower die, and there is a gap of the upper day grain, so there is no need to include one between the phase and the die. Spacer. In this aspect of the month, other top package configurations can be stacked on top of the die bottom package. For example, and as shown in the specific lean embodiment, a top pack can be stacked on top of the stacked "grain" package. Two: Shanguang has a heat dissipation from the multi-package mold of the stacked die bottom package, for example, π shown in the example of Figure 11. A heat sink can be provided. The top diffuser is formed by a heat-conducting material on the upper part of the package, and has more central areas on the upper surface to expose the _»H surface to the surrounding environment to more efficiently tropic (four) Μρ For example, the top heat sink can be a metal sheet (such as a copper sheet) and it can be fixed to the μρμ cladding during: (iv) curing process. Alternatively, the radiator is suspended as a flat portion, and the portion used is: or a support member placed at or near the bottom cover. n Table The top heat sink shown by the example of Figures 5D and 5 is used in the top two of the 具有 with a stacked die bottom package. (or having a stacked die bottom and top package) heat sink I44476.doc -63- 1378548 For example, referring to the MPM structure of FIG. 11 and the heat sink of FIG. 5, the top heat sink is formed of a heat conductive material. There is a generally planar central portion 544 over the top package and a peripheral leg member 546 that extends to the upper surface of the bottom package substrate 442. The upper surface of the planar portion is attached to the upper surface of the MPM to be exposed to the surroundings to efficiently discharge the tropical MPM. For example, the top heat sink can be formed from a sheet of metal, such as copper, such as by stamping. The support members 546 can be secured to the upper surface of the bottom package substrate using an adhesive as needed. The multi-package module structure can be protected by forming a module cover 1107, and the heat spreader component is embedded in the MpM cladding u〇7 during the molding material curing process. A stepped recessed feature 545 is provided around the planar upper portion 544 of the heat sink to allow for better mechanical integration of the structure without being detached from the molding compound. In this embodiment, the space between the lower surface of the heat sink 544 and the upper surface of the top package molding 1 〇 17 is filled into the thin layer of the MPM molding. In addition, a top heat sink can be used. Fixed to the top surface of the top package molding. Please refer to the structure of Figure U, and refer to the heat sink top heat sink 504 in Figure 5A, which can be a generally planar plate of a thermally conductive material, "to" above it. The more central region of the surface is exposed to the surroundings, and the tropics are efficiently removed from the ΜΡΜβ, for example, the top heat sink can be one: (: j such as copper). However, here the top heat sink 504 is attached using an adhesive: the top package (4) above the table _. The adhesive = a thermally conductive adhesive to provide improved bulk molding has been at least partially cured after the top seal is applied to the I44476.doc -64 - P package _ &amp ;, but it is based on the molding material for the MPM coating 11 07. The MPM molding material may be wrapped around the top heat sink. A stepped recessed feature 505 is provided around the heat sink 504 to allow for better mechanical integration of the structure without being detached from the molding compound. As an alternative, the MPM as in Figure 11 can have a simple flat heat sink that is not ancient, does not have support members, and does not adhere to the top surface of the top package molding. In these embodiments, the top heat sink can be a generally planar plate of thermally conductive material, such as, for example, a metal sheet (eg, copper t and at least a more central region of the upper surface of the planar heat sink). It is more efficient to separate the tropics from the MpM ^ here. The space between the lower surface of the simple planar heat sink and the surface ι 9 of the LGA molded 1 〇 17 is filled into a thin layer. MpM molding, and this simple planar heat dissipation can be fixed to the MPM cladding 1107 during the molding material curing process. The unattached simple planar top heat sink can be coated with the MPM molding. The material 'like the planar heat sink attached in Figure 5D and may provide a stepped recessed feature 505 around the D-shape to allow for better mechanical integration with the structure and less with the molding Compound Separation. As will be understood from the foregoing, in all of the various aspects, the invention features a line junction as a z-interconnect method between stacked packages. In general, 'stacked on-under BGA All LGAs must be smaller for these line contacts BGA (at least one dimension on the x_y plane) to allow for a workaround at the perimeter. The lead edge is usually at a level of 0.025 mm (0.050 to 〇.〇i〇mm 144476.doc -65· 1378548). The wire distance of the edge of the LGA substrate is different in many embodiments, but not less than the diameter of a wire. The relative dimensions of the BGA and LGA are mainly determined by the maximum grain size of each of the die. The thickness of the cover mainly determines how many dies can be stacked in one package. The process for fabricating the BGA package and the LGA package used in the present invention is simultaneously packaged for the line contact and the flip chip type. This industry has been well established. BGA testing has been well established in the industry and is basically done by making contact with the solder ball pads. The LGAs can be tested in one of two ways, ie By accessing the substrate [l^ on the lower surface, which is similar to a solder ball in a BGA; or by approaching a z-interconnect pad on the upper surface of the substrate. Completed MpM assembly can be tested with the same BGA The MPM assembly process is similar for configurations in accordance with various aspects of the present invention. In summary, the process includes the steps of providing a first package substrate and at least one die attached to the first package The first mold of the substrate is mounted and dispensed onto the upper surface of the first mold package, and the second spoon substrate and the at least one die are placed on the upper surface of the first mold package. The lower surface of the second substrate may contact the adhesive on the upper surface of the first package and be connected thereto. Preferably, the packages may form 2 mutual satisfaction between the substrates: energy or reliability requirements The package is so "good" = the package and the first package are used in the module of the assembly. 144476.doc • 66 · 1378548

Figure 12 is a flow chart showing the electrical processing of the multiple package module shown in Figure 5A or Figure 7, for example. In step 12, 2, it provides an undivided strip of a ball matrix array package. The die and wire contacts on the ball grid array package are protected by a pull-f. In the long-term job package, it is preferable to test the performance and reliability before the subsequent steps of the pot process t (not shown in the figure). Only packages identified as "good" will be processed. In step 120, the adhesive is dispensed over the molded upper surface of the "good" bga package. In step (10), a separate platform lattice thumb array package is provided. The separate LGA package is protected by _ molding and is preferably tested (7) and identified as "good". At step 12, a selection and placement operation is performed to place a "good" lga package on the adhesive over the molding of the "good" B G A package. In step 12, the adhesive is cured. In step 1212, a plasma cleaning operation is performed at preliminary step 1214, where a line junction z interconnection is formed between the top LGA and bottom bga packages of the stack. In step 1216, an additional electrosonic cleaning can be performed. The MpM molding is then formed in step 1218. In step 1220, the second-order interconnect solder balls are attached to the bottom side of the module. In step 1222, the completed module is tested (*) and separated by the strip, for example by sawing apart or by punching, and packaged for further use. Figure 13 is a flow chart showing a packaging process of a multi-package module such as that shown in Figure 6A. In step 13A2, an undivided strip of a ball grid array package is provided. The die and wire contact structure on the ball grid array package is protected by a molding. The Bga package in the strip is preferably in the grabbing process of 144476.doc -67-1378548. Perform performance and reliability tests before the next steps (as shown in the figure). Only packages identified as "good" will be subject to subsequent processing. At step 1304 t, the adhesive is dispensed over the molded upper surface on a "good" BGA package. In step (10), a separate platform grid array package is provided. The separate LGA package is protected by a peripheral molding to protect the wire contacts, and is preferably tested (*) and identified as "good". In step 1308, a selection and placement operation is performed to place the "good =" LGA package on the adhesive over the molding of the "good" BGA package. In step 13 10, the adhesive is cured. In step 1312, a plasma cleaning operation is performed during preliminary step 134, wherein a line junction z interconnection is formed between the top LGA and the bottom BGA package of the stack. In step 1316, an additional power cleaning can be performed, followed by formation of the MPM molding in step mg. In step 132, the second-order interconnect solder balls are attached to the bottom side of the module. In step 1322, the completed module is tested (*) and separated by the strip, for example by splitting or by punching apart and being packaged for further use.

Figure 1 4A is a flow chart showing an assembly process such as the multi-package module shown in Figure 8A. In step 1402, an undivided strip of ball grid array package is provided. The BGA enclosures have a shield that is fixed over the die. These masks protect the die and wire contact structures on the ball grid array package, thus eliminating the need for package molding. The bga package in the strip is preferably tested for performance and reliability prior to its subsequent steps in the process (indicated by * in the figure). Only packages identified as "good" will be subject to subsequent processing. Immediately after the step, the adhesive is dispensed over the upper surface of the "good" H I44476.doc -68. In step 1406, a platform grid array package of 2 is provided. The separate LGA package is protected by a mold and is preferably tested (" and identified as "good". In the step ▲ a check and placement operation is placed to place a "good" [Μ And on the adhesive on the molding of the X1 good "BGA package. In step 1410, the adhesive is cured. In step 1412, during the preliminary step, the plasma cleaning operation is performed, wherein A wire connection is formed between the top lig of the stack and the bottom BGA package. An additional plasma cleaning is performed in step Mb, and then the dies are formed in step 14. In step 1420, a De-glazing to break down and remove unwanted organic matter. The shot can be 'can be cleaned by chemical or electropolymerization. At step 1422 t, the second-order interconnect solder ball can be attached to the bottom side of the module. In step 1424, the completed module is tested (* And separated by the strip, for example by (iv) separation or by punching, and packaged for further use. Figure MB shows an assembly of a multi-package module such as shown in the figure. Flowchart of the process. This process is similar to that shown in Figure 14A, with an additional step of inserting the "drop-in" mold operation prior to installation of the heat sink. Similar steps are taken in the process. Identified in a similar reference number. In step 14〇2, 'provide' the undivided strip of the ball grid array package. The material BGA package has a shield fixed on the die. The mask protects the The die and wire contact structure on the ball grid array package' therefore does not require package molding. The bga package in the strip preferably performs efficiency and reliability before it takes the next step in the process. 144476.doc •69· Test (marked in the figure* Only the package identified as "good" will undergo subsequent processing. In step 4, 'the adhesive is dispensed on the "good" hall package over the surface. In step 1406, a separate platform is provided. Grid array package. The separate LGA package is protected by a mold and is preferably tested (7) and identified as "good". In the step, a check and placement operation is placed in the right to place " A good "LGA package is on the adhesive on the mask on the BGA package. In step! 41" the adhesive is cured. In step i4i2, in the preliminary step (4) 4 - electricity A laser cleaning operation, which forms a line junction z interconnection between the top of the stack [Μ and the bottom BGA package. In step 1416, an additional electropolymer cleaning can be performed. In step 1415, the heat sink is dropped into each cavity _ of the mold six-molding apparatus. In step HP, the cleaning package stack from step 1416 falls into the cavity above the heat sink. In step 14 1 9 , the &amp; cladding material is injected into the cavity and cured to form the MPM molding. In step (10), a light removal can be performed to decompose and remove unwanted organic matter. The light removal system is performed by laser or may be chemically or plasma cleaned. In step 1422, a second order interconnect solder ball can be attached to the bottom side of the module. In the step purchase, the completed module is tested. The formula () is separated by 5 mysterious strips, for example by ore separation or by punching, and is packaged for further use. Figure 14C shows a flow chart of an assembly process such as that shown in Figure 8 (a multi-package module. This process is similar to that shown in Figure 14A, which is inserted before the mounting-plane heat sink. The additional step I to the top package is identified in Figure (4) by a similar reference number 144476.doc. In step 1402, an undivided strip of a ball grid array is provided. The package has a shield that is fixed over the die. The shields protect the die and wire contact structures on the ball grid array package and thus are not package molded. The BGA package in the strip is more Good is to test the performance and reliability before the next steps in the process (not shown in the figure). Only the identification is "good" & the package will be processed. In step 1404 t, the adhesive Is disposed on the upper surface of the ant ant on the "good" BGA package. In step 1406, a separate platform lattice array package is provided. The separate LGA package is protected by -molding, and preferably Tested (*)' and identified as "good". In step 1408, a _selection and placement operation is performed to place a "good" pass on the adhesive over the mask on the "good j BGA package. In step 1 * 1 ,, the 4 adhesive is cured. In step 1412, an electrical beam cleaning operation is performed prior to the preliminary step i4i4, wherein a wire contact z interconnection is formed between the top LGA and the bottom bga package of the stack, and then an additional plasma cleaning is performed. 1 'distributes the adhesive onto the top surface of the top L (}A package molding, and in step 1433, performs a selection and placement operation to place the adhesion of the planar heat sink to the top package molding Above the agent, the adhesive is cured in step MM. In step 1416, additional plasma cleaning is performed, and in step 1418, the MPM molding is formed. In step 142, the process can be performed. Light work to decompose and remove unwanted organic matter. This light removal can be performed by laser or chemical and plasma cleaning. In step ,^, the second-order interconnect solder balls can be attached to the module. Bottom side. In step 1424, the completed mode &quot; The test (*) is carried out and separated by the wire, for example by I44476.doc 1378548 or by centrifugation, and packaged for further use. Figure 15 shows, for example, Figure 9A_ A flow chart showing the assembly process of a multiple package module. In step 1502, an undivided strip of the bottom package of the die flip chip ball grid array is provided. The BGA package can be molded. It may or may not have a second-order interconnect solder ball. The BGA package in the strip is preferably tested for performance and reliability before it is carried out in the subsequent steps of the process (as shown in the figure * Show) Only packages identified as "good" will be processed. In step 15〇4, the adhesive is dispensed over the upper surface (back side) of the die on a "good" BGA package at step 506 to provide a separate platform grid array seal. The separate LGA package is protected by -molding and is preferably tested (*) and identified as "good". In step 15-8, a selection and placement operation is performed to place a "good" LGA package on the adhesive over the die on the "good" BGA package. In step 151, the adhesive is cured. At step 1512, a plasma cleaning operation is performed at a preliminary step 1514, wherein a wire interconnection is formed between the top LGA of the stack and the bottom BGA package. In step 1516, an additional plasma cleaning can be performed, followed by forming the MpM molding at step 1518. In step 152, the second-order interconnect solder balls are attached to the bottom side of the module. In step 1522, the completed swap is tested (*) and separated by the strip, for example by recording separation or by punching, and packaged for further use. Figure 16 is a flow chart showing the processing of a multi-package module such as the one shown in Figure _. This process is similar to that shown in Figure 15, which has an additional step of inserting the mask over the bottom mounted flip chip die. Similar steps in the process 144476.doc • 72· 1378548 are identified by the class 1An9tb in the figure, reference number. In the step, the undivided strips of the bottom of the die-chip flip chip array are provided. The BGA package can be used

It is possible to have no second-order interconnection M to connect the ball. The BGA package in the strip is tested for performance and reliability before the subsequent steps in the process (shown as * in the figure). Only those identified as “good” (4) will receive follow-up processing. At step 1603, the electrical shield is attached to the die on the "good" bottom BGA package. 1 In step _, the adhesive (4) is dispensed over the upper surface of the mask on the JBGA package. In the secret of the step, it is known to provide a separate platform grid array package. The separate core package is protected by -molding and is preferably tested (7) and identified as "good". In step 1608, the 'selection and placement operation is performed to place the 4 =" LGA package over the shadow on the "good" BGA package (4). In step 1610, the adhesive is cured. In step (6) 2, a plasma cleaning operation is performed during preliminary step 1614, wherein a wire contact z interconnection is formed between the top LGA of the stack and the bottom BGA package. In step i616, an additional electropolymer cleaning can be performed, followed by forming the MPM molding in step (4). In step 162, the second-order interconnect solder balls are attached to the bottom side of the module. In step 1622, the completed module is tested (*)&apos; and separated by the strip, e.g., by split separation or by punching&apos; and packaged for further use. Figure 17 is a flow chart showing the assembly process of the multiple-seat module, as shown, for example, in Figure 1A or Figure 1B. In step 〇7〇2, an undivided strip of the bottom package of the upper wafer flip chip wafer grid array is provided. The flip-chip H4476.doc-73·1378548 is interconnected by the die and the bottom One side between the die attach surfaces of the substrate is filled or molded to protect, so no overmolding is required. The BGA package in the strip is preferably tested for performance and reliability before the subsequent steps of process 10 (shown as * in the figure). Only packages that are identified as "good" will be processed. In step 17〇4, the second is assigned to the “good” package on the upper surface of the substrate; in 1706, the separated: package is provided, which may be a stacked die package, for example in Tazaki Shown. The separate second package is protected by two moldings, preferably tested (*) and identified as "good". In step 1708, a selection and placement operation is performed to place a "good" package on the adhesive on the substrate of the "good" BGA package. In step 171, the adhesive is cured. In step 1712, a plasma cleaning operation is performed at preliminary step 1714, where the top of the stack (stacked grains) and the bottom die wafer BGA A wire contact 2 interconnection is formed between the packages. In step 1716, an additional electrical cleaning can be performed, followed by formation of the MPM molding in step 1718. In step 1720, the second-order interconnect balls are attached to the bottom side of the module. In step 1722, the completed module is tested (*) and separated by the strip, for example by sawing apart or by punching, and packaged for further use. Figure 18 is a schematic diagram showing the assembly process of the multi-package module shown in Figure u, for example. In step 1 802, an undivided strip of a stacked die ball grid array package is provided. The stacked die B G A package is molded and provides an overlying package surface. The BGA package in the strip is preferably tested for performance and reliability before/after the subsequent steps in the process. H4476.doc • 74· 1378548 (as indicated by * in the figure, it is identified as "good" In the step, the dispensing agent is dispensed and received on the upper surface of the substrate on the subsequent recessed package. In the second package which is separated by the stepped stack, it may be provided for the stacked die package example k. The separation-packaged in Figure 11 can be tested by a molding protection test (*) and identified as "good. Preferably, it is good." In step 18〇8, who is placed and placed Homework to place "good for a check,

The adhesive on the substrate on the hidden package is good. The agent is cured. In step 1812, in step 1810, in the adhesive shoulder 812, a plasma cleaning operation is performed at the preliminary step 1814, where the top of the 6 Xuanfengfeng is stacked in the 兮±4 crystal &amp; κ retort (stacking) A wire contact ζ interconnection is formed between the die and the bottom die-flip wafer BGA package. In step 1816, 'can be done--additional «cleaning, followed by the step-by-step forming of the stencil. In step 182, the second-order interconnect solder balls are attached to the bottom side of the module. In the step assist, the completed module is tested (*) and separated by the strip, for example by ore separation or by punching, and packaged for further use. As described below, the individual steps of many of the steps in the process according to the present invention can be carried out using substantially practical techniques in accordance with the methods described herein, but as described herein, the use of directly modified conventional manufacturing facilities . Variations in these conventional techniques, as well as modifications to conventional manufacturing equipment, can be accomplished using the methods described herein' and do not require experimentation. Other specific embodiments are set forth in the following patent claims. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is not a cross-section through a conventional ball grid array semiconductor package 144476.doc 75 1378548 Figure 2 shows a solder ball z between the stacked ball grid array semiconductor packages A cross-sectional view of a multi-package module is used. Figure 3 is a cross-sectional view of a conventional flip chip multi-package module with solder ball z interconnects between stacked flip chip semiconductor packages. Figure 4 is a cross-sectional view of a conventional multi-package module with a flexible substrate and solder balls z interconnected between stacked semiconductor packages. Figure 5A is a cross-sectional view showing a specific embodiment of a multi-package module having interconnects between the stacked bga and the semiconductor package in accordance with one aspect of the present invention. Figure 5B is a plan view of a bottom substrate having a z-interconnect point 适用 suitable for use in the configuration of the embodiment of the invention as shown. Figure 5C is a plan view of a top LGA substrate having a z-interconnect (4) in a configuration suitable for use in the embodiment of the invention illustrated in Figure 5. 5D is a cross-sectional view of a multi-package module having a wire bond z interconnect between stacked core semiconductor packages in accordance with an aspect of the present invention, which has a A heat sink on the top surface of the top package. Circle 5E shows a cross-sectional view of a specific embodiment of a multi-county module interconnected by a wired junction z between a stacked test and an LGA semiconductor package and having a heat sink according to another aspect of the invention. 6 is a cross-sectional view of another embodiment of a multiple package module having interconnects having wire bonds z between stacked stacked core semiconductor packages in accordance with aspects of the present invention, wherein the top package has Molded around. 144476.doc -76· 1378548 FIG. 6B shows a cross section of another embodiment of a multi-package module having wire bonds z interconnection between stacked bga and lga semiconductor packages in accordance with an aspect of the present invention. The top package has a peripheral molding, and the module has a heat sink. • Figure 7 is a cross-sectional view of another embodiment of a multi-package module having interconnects z-wired between a stacked bga and a semiconductor package in accordance with an aspect of the invention, wherein the top package substrate Has a metal | layer substrate. Figure 8A shows a cross-sectional view of one or more of the embodiments having a wire contact z interconnection between the other semiconductor packages in accordance with the present invention, wherein an electrical mask is provided on the bottom package. • Figure 8B is a cross-sectional view of another embodiment of a multi-package module having a wire bond z interconnect between stacked BGA and GaN semiconductor packages in accordance with an aspect of the present invention, wherein An electrical phantom is provided on the bottom package and the module has a heat sink. 8C is a cross-sectional view of another embodiment of a multi-package module having interconnects between a stacked bga and a semiconductor package in accordance with an aspect of the invention, wherein the bottom package is An electrical shield is provided thereon, and the module has a diffuser fixed to an upper surface of the top package. ''', Figure 9A shows a cross-sectional view of a multi-package module with a wire contact Z interconnection between a stacked flip chip BGA (lower die) and an LGA semiconductor package in accordance with another aspect of the present invention. . 144476.doc 77- 1378548 Figure 9B shows a multiple package with wire bonds z interconnect between stacked flip chip BGA (lower die) and LGA semiconductor package in accordance with another aspect of the present invention. A cross-sectional view of the module in which an electrical shield is provided on the bottom package. 9C is a front view of a multi-package module having interconnects between the stacked flip chip BGA (lower die) and the LGA semiconductor package in accordance with another aspect of the present invention. Wherein an electrical shield is provided on the bottom package and the module has a heat sink.

Figure 10A shows a cross-section of a multi-package module having wire bonds z interconnection between stacked flip chip BGA (upper die) and stacked die LGA semiconductor package in accordance with another aspect of the present invention. The figure wherein adjacent stacked crystal grains in the second package are separated by a spacer.

Figure 10B shows a multi-package module interconnected by a wire bond z between a stacked flip chip BGA (upper die) and a stacked die LGA semiconductor package in accordance with another aspect of the present invention. A cross-sectional view in which adjacent stacked grains in the second package have different scales. The μ side has between the stacked flip-chip packages and wherein the bottom pattern 10C is interconnected by the other die BGA (upper die) according to the present invention and the stacked die LGA half wire contacts z An electrical shield is provided on the cross-sectional package of a multi-package module. The figure is shown as a multi-package module by interconnecting the stacked BGA (upper die) and the stacked die LGA semiconductor package according to another aspect of the present invention. A cross-sectional view, and wherein an electrical shield is provided on the package, and has one of the upper heat sinks of the upper package 4440.doc-78-. Figure 10E is a cross-connect between a stacked flip chip BGA (upper die) and a stacked die LGA semiconductor package in accordance with another aspect of the present invention. A cross-sectional view of an interconnected-multiple package module in which an electrical shield is provided on the bottom package and has a heat sink in accordance with another aspect of the present invention. Figure 11 is a cross-sectional view of a multi-package module having interconnects z connected between a stacked bga (stacked die) and an LGA (stacked die) semiconductor package in accordance with another aspect of the present invention. Figure 12 is a flow chart showing an assembly process of a multi-package module such as that shown in Figure 5A or Figure 7. Figure 13 is not a flow diagram of a package process such as that shown in Figure 6-8. Figure 1 4A is not a flow chart of an assembly process such as the multi-package module shown in Figure 8A. Figure 14B is not a flow chart of an assembly process such as the multiple package module shown in Figure 8B. Figure 14C is not a flow chart of an assembly process for a multi-package module such as that shown in Figure sc. Figure 15 is not a flow diagram of a package process such as the multi-package module shown in Figure 9A. Figure 16 is a flow chart showing the assembly process of a multi-package module such as that shown in Figure 9B. Figure 17 is a flow diagram of an assembly process such as a multi-package 144476.doc 1378548 module shown in Figure 10A or Figure 10B. Figure 18 is a flow chart showing a assembly process of a multi-package module such as that shown in Figure 11. [Main component symbol description] 10 MPM bottom package 12, 22 substrate 13, 23 die attach ring germanium 14 , 24 , 34 , 44 die 16 ' 26 wire contact 17 , 27 , 47 molding compound 18 &gt; 28 ' 38, 48 solder balls 20 stacked MPM 30 2-stack flip chip MPM 33 polymer side filled 35 through holes 36 bumps 40 2-stack curved flexible substrate MPM 42 metal layer bottom package substrate 43 adhesive 46 cantilever beam 50 ' 52 ' 60 ' 70 , 84 multi-package modules 54 , 62 , 82 , 94 BGA + LGA multi-package module 144476.doc -80· 1378548

90 ' 92 , 101 , 103 multiple package module 105 &gt; 107 ' 109 ' 110 multi-package module 121 , 123 metal layer 122 , 142 through hole 125 , 127 , 147 solder mask 141 first metal layer 143 second metal layer 221, 223 metal layer 222 through hole 225, 227 solder mask 300 bottom package 302 bottom BGA package 304 shield 305 side wall 306 line 312 bottom package substrate 314 die 315 &gt; 327 solder mask 3 16 flip chip bump 318 solder ball 321 , 323 metal layer 322 through hole -81 - 144476.doc 1378548 144476.doc 331 metal layer 332 substrate 333 polymer side filled 334 die 335 through hole 336 bump 338 z interconnect solder ball 342 BGA substrate 343 interconnect convex Block 344 die 346 flip chip bump 348 second order interconnect ball 351 metal layer 353 patterned metal layer 354 &gt; 356 dielectric layer 355 metal layer 400 bottom package 401 void 402 bottom ball grid array (BGA) Package 406 Heatsink / Shading 407 Sidewall 408 Line loc -82 - 1378548

412 bottom package substrate 413 die attach epoxide 414 die 415, 427 solder mask 416 wire contact 417 molding compound 418 solder ball 419 bottom package upper surface 421, 423 metal layer 422 through hole 424 bottom package z interconnection pad 425 Upper surface 426 Upper surface 442 Bottom package substrate 443 Adhesive 444, 454 Die 446, 456 Line contact 447 Molding compound 448 Solder ball 451, 453 Metal layer 452 Through hole 455, 457 Solder mask -83 * 144476.doc 1378548 500 Top Package 501 Void 503 ' 506 Adhesive 505 , 545 Recessed Feature 507 Module Wrap 511 Trace 512 Top Package Substrate 513 Die Attachment Epoxide 514 Die 515 Solder Cover 516 Line Contact 517 &lt;Molding Compound / 518 ___ ^ i contact 519 upper surface 521 metal layer 522 through hole 523 metal layer 524 top package z interconnection pad 525 upper surface 526 edge 527 solder mask 544 &gt; 504 heat sink -84- 144476.doc 1378548 546 Floor Assembly 600 Top Package 607 Module Coverage 612 Top Package Substrate 613 Grain Attachment Epoxide 614 Die 615 Solder Mask 616 Line Contact 617 Molding Compound 618 Line Contact 621 Metal Layer 622 Through Hole 623 Metal Layer 627 Solder Cover 644 Heat Sink 645 Recessed Feature 646 Supporting Member 700 Top Package 707 Module Cover 712 Top Package Substrate 713 Crystal Pellet-adhesive epoxide 714 grain 144476.doc 85- 1378548 715 716 717 718 719 721 800 803 804 805 806 807 812 813 814 815, 817 818 819 821 822 823 Solder cap wire joint molding compound wire joint surface metal Layer Top Platform Grid Array (LGA) Package Adhesive Heatsink Recessed Feature Supporting Member Module Wrapped Top Package Substrate Grain Attached Oxide Grain 827 Solder Mask Molding Compound 816 Wire Contact Upper Surface Metal Layer Through Hole Metal Layer 144476.doc -86- 1378548 844 Heatsink 845 Recessed Feature 846 Adhesive 847 Wrapped 900 Top LGA Package 903 Adhesive 907 Module Wrap 908 Line 909 Sidewall 912 Top Package Substrate 913 Grain Attachment Loam 914 Die 915 Solder Mask 917 Molding Compound 918, 916 Line Contact 919 Surface 921 Metal Layer 944 Heat Sink 945 Recessed Features 946 Support Components 1000 Die Platform Grating 1003 '1006 Adhesive-87- 144476.doc 1378548 1004 Heat Sink 1005 Recessed Feature 1007 Module Wrap 1011 Trace 1012 Dielectric Layer 1013 Adhesive 1014 Die 1015 Spacer 1017 Molding Material 1018, 1016, 1026 Line Contact 1019 Upper Surface 1024 Die 1030 Top Package 1031 Trace 1033 Adhesive 1034 Die 1035 Adhesive 1036 Line Contact 1037 Molding Material 1039 Upper Surface 1044 Grain 1045 Recessed Features 144476.doc -88- 1378548 1046 Line contact 1103 Adhesive 1107 Molded 1118 line contact

144476.doc -89-

Claims (1)

1378548 Patent No. 098139252_Request for Chinese Patent Application Replacement (April 101) VII. Patent Application Range: 1 · A multi-package module comprising: a first package having a first die Attached to a first side of a first package substrate; a first package having a second die attached to a second package substrate stacked on the first package. The second package substrate and the first package substrate are interconnected by wire bonding. At least the interconnecting edge near the opposite edges of the second package substrate and the pad on the first side of the first package substrate; and a package covering, completely covering the first package and the second sealing; And: the first package further comprises a solder pad connected to the contact pad of the second side of the first package base. 2. If the multi-package module of claim 1 of the patent color 1 is applied, the wiring of the δ hai package having the die is interconnected to the substrate, at least partially covered. At least one of the wire bonding packages. 4. If you apply for a special money! The multi-f package has a wire having the die interconnected to the substrate. The multi-package module as in item 3 of the patent application is completely covered. The second seal, wherein the second seal is attached to the third line of the patent application, is covered to some extent. The multiple package module, the second seal is sufficient to protect the die and the substrate. 6.144476-I0104U.doc 7. The multi-package module of claim 6 of the patent scope, wherein The array package substrate is a single-metal layer substrate. In the multi-package module of claim 1, the further step comprises a device having a generally planar upper surface exposed to the top of the module. 9. The multi-package module of the patent application scope &quot;, wherein the planar portion of the diffuser is supported by the supporting member on the first package substrate. 如. The multiple package module, wherein the planar portion of the heat sink is fixed to the upper surface of the second package. &quot;• The multi-package module of claim i, further comprising electromagnetic shielding for at least one of the packages. 12. The multiple package module of claim i, further comprising electromagnetic shielding for the first package. 13' The multiple package module of claim 12, wherein the second package is secured to the upper surface of the electromagnetic shield. 14. The method of manufacturing a multi-package module, comprising: providing a BGA first package including a first package substrate, the first package substrate having a contact pad, providing a second package substrate comprising less than a second package of the first package substrate, the second package is stacked on the first package, and the first package and the second are electrically interconnected by a wire connecting the first sealing substrate and the second package substrate Both sides of the package, and 144476-1010411.doc 15. If;: = overlaid to completely cover the first package and the second package. The method of the third aspect of the patent, the first package of the job is a die (1) package having a generally planar upper surface, wherein the stack is mounted on the first package, including application-adhesion The agent is as far as the bite' and the second package is placed over the adhesive. The method of claim 15, wherein the adhesive Α/, dry 4 adhesive is a curable adhesive, and further comprises curing the adhesive. 17. The method of claim 2, wherein the first package of the BGA is provided to include an undivided strip that provides a BGA package. 18. The method of claim 14, wherein the first package of the job includes testing the BGA package for a performance and reliability requirement, and identifying the first package to meet the demand. 19. The method of claim 14, wherein the second package 3 is provided to test the package for the performance and reliability requirements and to identify the second package to meet the demand. 2. The method of claim 14, further comprising attaching a second-order interconnecting ball to the BGA first package substrate. A. The method of claim 14, further comprising cladding the stacked packages in a multi-package module molding. 22. The method of claim 14, further comprising separating the dies 23. The method of claim 14, wherein providing the second package comprises providing a platform grid array package. The method of claim 14, wherein the second package 144476-I0104ll.doc 1378548 is provided to provide a platform grid array package, the platform grid array package being molded in a small portion. μ 25. The platform grid array is completely molded as in the method of claim 24.褒26. According to the method of claim 24, the wire of the grid array package of the platform is molded, and at least one upper part of the upper surface of the die is exposed. The method of item 14, which causes the occlusion to have an electromagnetic shield fixed above the die. In the method of claim 27, the mask has a generally planar upper surface, wherein the second package is stacked on the first package with an application-adhesive agent to The masking upper surface is placed over the upper surface and is placed in the second: a method of claim 28. The method of claim 28, wherein the adhesive adhesive further comprises curing the adhesive. 30. If you apply for the patent range, the 14th half-human device. Wanhao further includes providing a heat sink 31. As claimed in the third paragraph of the patent application, a drop into the mold operation is placed in a mold. The method of providing a heat sink comprising a heat exchanger before forming a module molding, wherein a heat sink includes a portion to the second package - 32. As claimed in claim 3 The method fixes a generally planar upper surface of a generally planar heat sink. I44476-I0l04H.doc