TW592890B - Copper process chemical mechanical polishing method - Google Patents
Copper process chemical mechanical polishing method Download PDFInfo
- Publication number
- TW592890B TW592890B TW91103963A TW91103963A TW592890B TW 592890 B TW592890 B TW 592890B TW 91103963 A TW91103963 A TW 91103963A TW 91103963 A TW91103963 A TW 91103963A TW 592890 B TW592890 B TW 592890B
- Authority
- TW
- Taiwan
- Prior art keywords
- copper
- layer
- mechanical polishing
- chemical
- chemical mechanical
- Prior art date
Links
Landscapes
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
592890 五、發明說明(1) 發明領域 本發:ΐ!ί有關於-種化學機械研磨法’更仔細的說, 這種化學機^於一種改良式的銅製桎之化學機械研磨法, 的平坦度更ϊ Γ磨法可以使得所處理的銅製程之晶圓表面 發明背景 之开ί =體元件的製造中’金屬導線是用在元件電路内 件,並接’換言之,金屬導線係用於連接離散的元 亚猎此形成積體電路。並以絕緣層把金屬導線和 個内連線層絕緣,使用一些洞於兩個内連線傳導層間, 為電性傳導的路徑。在這種繞線的過程中,非f ^ ς古 地形平滑的絕緣層,因為要將影像和圖荦,以- 固 製作在粗糙的絕緣層上是很困難的。:::::的方式 會導致後繼的沈積層之階梯去 形表面 以及穿過階梯的層之不連娣二息(Step Coverage)不良, (V〇1d)結構。由沈積層造^不,f地形特性間產生孔洞 產生的孔洞結構,會導致製 ^产白梯覆蓋和地形特性間 可靠度降低。當半導體電路^ ^ 的降低,和積體電路的 要多階層的繞線,以獲得元^内的繞線密度增加時,带 電質的平坦化,在半導體的”:連線層,因此階層間二 乂轾中,就成了很關鍵的步 第5頁 592890 五、發明說明(2) 驟。而隨著製程的進步,化學祕只m 1 1[子機械研磨(Chemical592890 V. Description of the invention (1) Field of the invention: This is about a kind of chemical mechanical polishing method. More specifically, this chemical machine is based on a modified chemical mechanical polishing method made of copper. The Γ grinding method can make the processed copper surface of the wafer background of the invention open. In the manufacture of body components, 'metal wires are used in component circuit internals, and connected.' In other words, metal wires are used to connect discrete Yuan Yahun formed an integrated circuit. Insulation layers are used to insulate the metal wires from the inner wiring layers, and some holes are used between the two inner wiring conductive layers to provide a path for electrical conduction. In this winding process, the non-f ^ ancient ancient smooth insulation layer, because it is difficult to make images and pictures 荦-solid on the rough insulation layer. The method of ::::: will lead to poor step coverage of the subsequent deposited layer and the step coverage of the layer passing through the step, (V〇1d) structure. No, the hole structure between the topographical characteristics caused by the sedimentary layer will cause the reliability of the white ladder coverage and the topographical characteristics to decrease. When the semiconductor circuit ^ ^ is reduced, and the windings of the integrated circuit require multiple levels of winding to obtain an increase in the winding density within the element ^, the flattening of the charge quality in the semiconductor ": connection layer, so the level In the second two steps, it becomes a very important step. Page 5 592890 V. Description of the invention (2) step. With the progress of the process, the chemical secret m 1 1 [
Mechanical Polish ·· C Μ P)制和竹 > α ^ 士 ^ T ,, _ 1 ^衣#王將在晶圓表面平坦化製程 中,佔有越來越重要的地位。 另外,在大型積 泛的應用在閘極的金 為RC時間常數而產生 使得後續高溫製程得 求下,元件密度越來 (Electromigration) 越來越嚴格,所以用 被廣泛運用。而原本 致無法發展鋼製程乾 機械研磨法的發展而 泛地運用在超大型積 但是傳統的銅製 外觀平整度以及高良 平整度,傳統的銅製 表面。因為在一般傳 圓進行研磨時,其表 合,而形成有一層^ 為大,而且其形成的 不均,所以研磨時不 越被廣 使得因 又可以 小的要 的要求 遂漸漸 質,以 程化學 漸漸廣 屬内連線中, 的時間延遲降 以進行。但是 越高,金屬層 以及RC時間延 銅做為金屬導 銅等金屬不易 =刻方法的缺 得以克服此缺 體電路(ULSI ) 高溫金屬鑛越來 其低阻抗值可以 低,而其高熔點 ,在線寬越來越 電移 遲(t i me delay) 線材料的銅製程 形成高揮發性物 點’也隨著銅製 點,使得銅製程 的製程中。 私化學機械研磨法,無法保持良好的 ,。同時,對回蝕之後的金屬表面的 程化學機械研磨法亦無法形成平整的 統的化學機械研磨法,其對半導體晶 面的金屬銅通常早已經自然地與氧結 氧化銅(Cu〇),其堅硬度遠較金屬銅 厚度亦不是在控制下進行,故其厚度 但會導致對金屬銅的研除率不均勻。Mechanical Polish · · CMP) made of bamboo > α ^ ^ ^ T ,, _ 1 ^ 衣 # 王 will occupy an increasingly important position in the wafer surface planarization process. In addition, in large-scale applications, the gold in the gate is generated by the RC time constant, which makes the subsequent high-temperature process required, and the element density becomes more and more stringent, so it is widely used. However, the development of the dry mechanical grinding method of the steel process could not be developed, and it was widely used in the super large-volume but the traditional copper appearance flatness and high-quality flatness, the traditional copper surface. Because in the general circle grinding, the surface is formed, and a layer of ^ is formed, and the formation is uneven, so it is not widely used during grinding, so that the requirements can be gradually gradual because of the small requirements. As chemistry gradually became more widespread, the time delay of the connection was reduced. However, the higher the metal layer and the RC time-delayed copper as the metal conducting copper, the more difficult it is to overcome the lack of engraving methods. This lack of body circuit (ULSI). High-temperature metal ore increasingly has a low resistance value and a high melting point. The line width is getting more and more ti me delay. The copper process of the line material forms high volatile matter points. With the copper point, the copper process is being made. Private chemical mechanical grinding method can not keep good. At the same time, the chemical mechanical polishing of the metal surface after the etchback cannot form a flat chemical mechanical polishing method. The metal copper of the semiconductor crystal plane has already naturally naturally bonded with oxygen copper oxide (Cu0). Its hardness is much higher than the thickness of metal copper and it is not controlled under control, so its thickness will cause uneven removal rate of metal copper.
第6頁 592890 五、發明說明(3) 也因此,其研磨之後所產生的金屬内逯铪 本 ]哽琛之表面電阻, 會有不平均的現象產生,此亦影響了所 ^ 之特性,甚至元件失敗。 千 更重要的是對於銅製程半導體晶圓研除之後,1 ^ 下來的殘餘氧化銅碎片亦有可能對半暮,a圓主 〃研磨 斧肢日日W表面造成釗Page 6 592890 V. Description of the invention (3) As a result, the surface resistance of the metal produced by grinding] 哽 chen will have uneven surface resistance, which also affects the characteristics and even the component failure . The more important thing is that after the copper wafers are removed from the semiconductor wafer, the remaining copper oxide fragments down to 1 ^ may also cause damage to the surface.
傷,導致量率降低。在以往線寬較寬時,這些缺失尚 J 造成太大影響’但隨著元件密度變大,而線寬變小1:= 所產生的氧化銅殘餘碎片問題’以及晶圓表面均勾度 j 題就變得格外重要。而傳統化學機械研磨法對沉 、 ^積的金 層進行研磨’在研磨時要加入研漿(Siurry),以作為化段 助劑。舉例言之’對金屬銅的CMP回蝕所用的研聚,其+ 以作化學移除(Chemical Rem oval)的成分,3二、 _ . 专疋由一此 氧化劑(Oxidant)與有機溶劑(〇rganic agents)所混合二 成的’而其牽涉到的是極為複雜的化學反應機構,&以°@ 力學(KmeUcs)上的問題,各半導體大廠都在研究當中, 尚處於摸索階段’仍未被徹底瞭解。所以各種製程的曾 體晶圓適合於哪種化學機械研磨製程之研漿,仍然 = 力開發。 而一般傳統經過CMP回蝕之後,晶片表面的清洗工 作,是以一般的CMP製程之後的清洗研漿之方法,亦即, =刷洗(Brush clearing)、噴洗(Spray cleaning)以及超 音波清洗(Ultrasonic cleaning)。但是現在一般CMp製程Injury, resulting in reduced rate. In the past, when the line width was wide, these defects still had a large impact. 'But as the component density becomes larger, the line width becomes smaller 1: = copper oxide residual debris problem' and the wafer surface jitter. The question becomes particularly important. The traditional chemical mechanical grinding method is used to grind the deposited gold layer. When grinding, Siurry is added as a chemical assistant. For example, the research and polymerization used for CMP etchback of metallic copper, + is used as a component of chemical removal (Chemical Rem oval), 32, _. It is specially composed of an oxidant (Oxidant) and an organic solvent (〇 mixed with rganic agents), and it involves extremely complex chemical reaction mechanisms, & with ° @ Mechanics (KmeUcs) problems, major semiconductor manufacturers are studying, still in the exploration stage, still Not thoroughly understood. Therefore, which kind of chemical mechanical polishing process is suitable for polishing wafers of various processes is still under development. In general, after the CMP etchback, the wafer surface is cleaned by a method of cleaning and polishing after the general CMP process, that is, = brush clearing, spray cleaning, and ultrasonic cleaning ( Ultrasonic cleaning). But now the general CMP process
592890 五、發明說明(4) _ 在使用於内連線製程時,仍是屬於關鍵技術 程線寬遠低於0.5_以下的製程時,更顯得舉足輕、疋在衣 以各大半導體技術領先廠商’莫不把CMp技術之^桶= f =技術。特別是CMP製程雖然可以獲得較佳夷 :整1:,是因為-般製麵研聚清除之要求較ΐ;基 :二洗日日片之後,仍會有殘餘的碎片留在晶圓表面而旦7 :::個』程。而當線寬大於0. 時,其影響較小: =線寬早已進到。.13微米的現代,這些問題二得Λ 一般的化 層地形之外。 表面上不同物 成之後,金屬 生平面的金屬 程序,包括抓 化學、溫度和 表面進行旋轉 進行化學反應 所包含之固形 顆粒。除此之 物貝在製程中 應,然後輕易 械方式和化學 化與:磨 其除了可以提供平滑的絕緣 -:ί 磨〉去也可以用來移除半導體晶圓 方式的結合,產π二的過程中’機 了 個極為平坦的研磨平592890 V. Description of the invention (4) _ When it is used in the interconnect process, it is still a key technology. The process with a line width far below 0.5_ is even more important. Leading manufacturers' must take the barrel of CMP technology = f = technology. In particular, although the CMP process can obtain better quality: the whole 1: because the requirements of the general surface polishing research and removal are relatively high; basic: after the second washing day, there will still be residual debris on the wafer surface and 7 :: 个 』程. When the line width is greater than 0, the effect is smaller: = The line width has already reached. .13 microns modern, these two problems are beyond the general stratified terrain. After the formation of different objects on the surface, the metal forms a flat metal process, including grasping chemistry, temperature, and surface rotation for chemical reactions to contain solid particles. In addition to this, the shell should be used in the manufacturing process, and then easily mechanically and chemically. In addition to grinding, it can provide smooth insulation-: ί Grinding can also be used to remove the combination of semiconductor wafer methods, producing π2 During the process, a very flat grinding plane was machined
第8頁 。例如在絕緣物質層上的孔洞結構形 11 ΐ上去,然後再用化學機械研磨法產 住=扩f而§之,傳統的化學機械研磨法的 一個薄的、平坦的半導體晶圓,在 ,、P在控制的條件下,抵著—個濕的研磨 ,以研漿中的化學蝕刻液與所要處理的表面 札亚=研漿中的研磨顆粒進行研除。研: m:1如銘或石夕土,係被用來作為研磨 、水匕合特定的化學物質,而這些化學 :::研工曰圓上不同材質的表面發生化學反 592890Page 8. For example, the hole structure 11 11 on the insulating material layer is grown, and then chemical mechanical polishing is used to produce = ff and § In addition, a traditional chemical mechanical polishing method is a thin, flat semiconductor wafer. Under controlled conditions, P is removed by a wet grinding with the chemical etching solution in the slurry and the surface to be treated. Research: m: 1 such as Ming or Shi Xitu, is used to grind, water, and combine specific chemicals, and these chemistry ::: research workers say that the surface of different materials on the circle is chemically reacted 592890
592890 五、發明說明(6) 發明目的與概述592890 V. Description of the invention (6) Purpose and summary of the invention
本發明的目的之一是為銅製程半導體晶圓上的銅層提 供一種改良式的化學機械研磨法,使其所處理的銅層表面 之薄膜均勻度得以大幅度提高。本發明的另一目的,在對 銅製程半導體晶圓上的銅層提供一種改良式的化學機械研 磨法,使其所處理的銅層表面不再有微粒殘留,以避免影 響製程良率。其次,本發明尚有一個目的,就是在改善銅 製程半導體晶圓上的銅層的化學機械研磨法,使其所處理 的半導體晶圓表面之銅導線層具有較均勻的表面電阻,意 即其表面電阻變化範圍較小,故所形成的電子元件具有較 佳的電性。One of the objectives of the present invention is to provide an improved chemical mechanical polishing method for a copper layer on a copper wafer semiconductor wafer, so that the uniformity of the film on the surface of the copper layer processed can be greatly improved. Another object of the present invention is to provide an improved chemical mechanical grinding method for a copper layer on a semiconductor wafer of a copper process so that the surface of the processed copper layer has no particles remaining thereon, so as to avoid affecting the process yield. Secondly, the present invention has another object, which is to improve the chemical mechanical polishing method of the copper layer on the copper wafer semiconductor wafer, so that the copper wire layer on the surface of the semiconductor wafer to be processed has a relatively uniform surface resistance, which means that The surface resistance change range is small, so the formed electronic component has better electrical properties.
依據上述原因,本發明提出一種應用化學機械研磨以 進行半導體晶圓其銅導線層平坦化之方法,上述之半導體 晶圓具有銅導線形成於介電層中,且介電層上含有多餘之 銅層,此銅層表面含有一層氧化銅。此方法可以包含下列 步驟:首先以化學蝕刻液移除氧化銅,再以含化學蝕刻液 之研漿進行化學機械研磨,以介電層為終止層而移除介電 層上之多餘之銅層,用以裸露出該銅導線。 上述之化學蝕刻液含擰檬酸可與前述之銅層表面的氧 化銅起化學作用,以移除氧化銅,而研漿之成分則包含具 有低研磨顆粒體積比之研磨顆粒以及含檸檬酸之化學蝕刻Based on the above reasons, the present invention proposes a method for applying chemical mechanical polishing to planarize a copper wire layer of a semiconductor wafer. The above semiconductor wafer has copper wires formed in a dielectric layer, and the dielectric layer contains excess copper. Layer, the surface of this copper layer contains a layer of copper oxide. The method may include the following steps: firstly removing copper oxide with a chemical etching solution, then performing chemical mechanical polishing with a slurry containing the chemical etching solution, and removing the excess copper layer on the dielectric layer with the dielectric layer as a stop layer To expose the copper wire. The chemical etching solution containing citric acid can chemically interact with the copper oxide on the surface of the copper layer to remove copper oxide, and the composition of the slurry contains abrasive particles with a low abrasive particle volume ratio and citric acid-containing abrasive particles. Chemical etching
第10頁 592890 五、發明說明(7) 液,利用研漿之化與 較易研磨之鋼的錯=4刻液使銅解離成銅離子並進而形成 機械性之研磨以移除$ ’同時利用研漿之研磨顆粒以進行 化學蝕刻液對銅層=鋼的錯合物。然後,反覆的由研漿之 磨顆粒以進行機械性表面形成銅的錯合物,再以研漿之研 之銅層。 之研磨,以逐漸移除介電層上之多餘 發明詳細說明 本半導體晶圓表 化學機械研磨法, 平坦化的新方法,是使 鬲,避免機械研磨產大所處理的半導體—良式的 ,體晶圓表面電:二殘留粒子,並且 ;= 吕,本發明可以接古不+均的問題。转則9 w。所處理的 戶,、, 挺叼所虛W ΛΛ a 特別疋對於銅p炉 度亚且避免其中的趟=理的銅製裎半導體曰鬥^衣^而 且改盖〆π , ^機械研磨嫵心 ^ 日日圓的均勻 改善經過本發明的:磨機制產生含 :Ί 圓的良ί甘!平均的問題,處理的銅製程半導 4>J '、八中值得注意^^ θ 提升銅製裎半導|Λ a 钢製程半導Μ曰圓炎士、的疋,本發明夕^^ ^體^ 宁Μ ^导體曰曰®為處理對轰,y月之較佳貧施例雖上、 疋於處理銅製程的半導但是本發明的/ 只要化學機械研磨:;:::限定於處理金屬:: 二了 !:發:所提出的化學中之化學普虫 x月的範噚,本發明的方、、矣脸、 及方法者,皆 此進行詳細說明。 :以下列的較佳實施例 苐11頁 592890Page 10 592890 V. Description of the invention (7) Liquid, using the mismatch between the slurry and the steel that is easier to grind = 4 ticks to dissociate copper into copper ions and then form a mechanical grind to remove $ 'while using Grind the abrasive particles to perform a chemical etching solution on the copper layer = steel complex. Then, the abrasive particles of the slurry are repeatedly used to form a copper complex on the mechanical surface, and then the copper layer of the slurry is ground. Grinding to gradually remove the excess invention on the dielectric layer. Detailed description of the chemical mechanical polishing method of the semiconductor wafer surface. The new method of flattening is to prevent the mechanical processing of semiconductors. Good method. Bulk wafer surface electricity: two residual particles, and; = Lv, the present invention can solve the problem of ancient unevenness. Turn 9 w. The households that are being processed are very special W Λ Λ a, especially for copper p furnaces and avoiding them. The copper is made of semi-conductor semiconductors, and the cover is changed to π, ^ mechanical grinding. ^ Improved uniformity of the yen and yen After the invention: the grinding mechanism produces: Ί The goodness of the circle! The average problem, the copper process semiconductor processed 4 > J ', eight middle noteworthy ^^ θ Raise the copper hafnium semiconductor | Λ a The semi-conductor of the steel manufacturing process is called Yan Yanshi, 本, the present invention ^^ ^ body ^ Ning ^ ^ Conductor ® ® For the treatment of the bombardment, the preferred embodiment of the y month is not as good as the treatment. The semi-conductor of the copper process but the invention / as long as the chemical mechanical grinding :::: is limited to the processing of the metal :: two! : Fa: The chemical worm in the proposed chemistry x Fan Fan, the formula, the face, and the method of the present invention are all described in detail. : The following preferred embodiments 页 page 11 592890
^ 、毛明的較佳貫施例用以進行化學機械研磨製程的化 子、械研磨系統’如第一圖所示,包含研磨墊5、研磨頭 乂及研水k供裝置了(用以提供研漿8於研磨墊5上)。首 =將所要處理的半導體晶圓丨〇,參照第一圖,固定於化學 、械研磨裝置的研磨頭6上,使研磨頭6旋轉,故半導體晶 1 1 〇亦隨著其旋轉,然後以本發明的一較佳實施例所提出 的研漿8持續均勻地施於研磨墊5表面上。接著再以研磨頭 、用一控制下的壓力,將整個半導體晶圓丨〇抵住研磨墊5, 並且使研磨頭6 (亦可使研磨墊5 )旋轉。 而半導體晶圓1 0,如第二圖所示,具有銅導線2 2形成 於介電層20之導線溝渠中,且介電層上含有多餘之銅層 22a ’通常,介電層20與銅導線22以及在介電層20與銅層 22a之間具有一阻障層25。而在此銅層22a表面含有一層氧 化鋼2 4。 本發明之實施例所提出的研漿8中,其成分包含了固 形物之研磨顆粒2 8以及化學蝕刻液,而化學蝕刻液中更有 #檬酸(citric acid),依據本發明的實施例所提出之化 學機械研磨製程,先對於前述之半導體晶圓1 〇施以含檸檬 、之化學姓刻液’使化學餘刻液可與銅層2 2 a表面之氧化 鋼2 4進行化學作用,以移除氧化銅2 4。^, Mao Ming ’s preferred embodiment of a chemical and mechanical grinding system for performing a chemical mechanical polishing process, as shown in the first figure, includes a polishing pad 5, a grinding head, and a grinding water supply device (for A slurry 8 is provided on the polishing pad 5). First = Fix the semiconductor wafer to be processed. With reference to the first figure, fix it on the polishing head 6 of the chemical and mechanical polishing device, and rotate the polishing head 6, so the semiconductor crystal 1 1 〇 also rotates with it, and then The slurry 8 provided in a preferred embodiment of the present invention is continuously and uniformly applied on the surface of the polishing pad 5. Then, using the polishing head and a controlled pressure, the entire semiconductor wafer is pressed against the polishing pad 5, and the polishing head 6 (or the polishing pad 5) can be rotated. The semiconductor wafer 10, as shown in the second figure, has copper wires 22 formed in the wire trenches of the dielectric layer 20, and the dielectric layer contains an excess copper layer 22a. Generally, the dielectric layer 20 and copper The conductive line 22 and a barrier layer 25 are provided between the dielectric layer 20 and the copper layer 22a. The surface of the copper layer 22a contains a layer of oxidized steel 24. In the slurry 8 proposed in the embodiment of the present invention, the composition includes solid particles 28 and a chemical etching solution, and the chemical etching solution further contains #citric acid. According to the embodiment of the present invention, In the proposed chemical mechanical polishing process, the aforementioned semiconductor wafer 10 is firstly subjected to a chemical solution containing a lemon and a chemical surname, so that the chemical etching solution can chemically interact with the oxide steel 24 on the surface of the copper layer 2 2 a. To remove the copper oxide 2 4.
第12頁 592890 五、發明說明(9) 再以含研磨顆粒28及包含檸檬酸之化學蝕刻液之研漿 進行化學機械研磨。其中利用研漿之化學蝕刻液使銅解離 成銅離子並進而形成較易研磨之銅的錯合物,此時,銅層 2 2a表面上形成銅的錯合物。再使用研漿成分内之研磨顆 粒28,進行機械性之研磨以移除銅的錯合物,其处果如第 三圖所示。 ^ 然後,反覆的進行如上述第三圖的步冑,再次由研聚 二化學:刻液對銅層223之表面形成銅的錯合物,再以研 ;r之研:Π8人以進行機械性之研磨’以逐漸將銅層22a 移除。取後,以介電層20為終止層而移除介電声 餘之銅層22a與阻障層25,用以裸露曰夕 如第四圖所示。 】夺琛“,其結果 因為本發明所利用的化學蝕刻液當 得所要處理㈤日日日目Μ進行機械性的研 ,使 面的氧化銅已經先與檸檬酸進行化别,,、銅層表 利用研漿之化學蝕刻液使銅解離成銅離子==移除。再 研磨之銅的錯合物,所以在其後以研 形成較易 導體晶圓進行機械性的研磨時,就可以直接研磨顆粒對半 磨顆粒體積比之研漿對銅層進行低研磨 使用具有低研 磨氧化銅所造成的困擾。其中, :,而不會有研 體積比。 所具有低研磨顆粒之Page 12 592890 V. Description of the invention (9) Chemical-mechanical polishing is performed with a slurry containing abrasive particles 28 and a chemical etching solution containing citric acid. Wherein, the chemical etching solution of the slurry is used to dissociate copper into copper ions and further form a complex of copper that is easier to be ground. At this time, a copper complex is formed on the surface of the copper layer 22a. The abrasive particles 28 in the slurry composition are then used for mechanical grinding to remove the copper complex. The results are shown in the third figure. ^ Then, the steps shown in the third figure above are repeatedly performed, and again, the research and development of the second chemical: engraving liquid to form a copper complex on the surface of the copper layer 223, and then research; r research: Π8 people for machinery Abrasion is performed to gradually remove the copper layer 22a. After the removal, the dielectric layer 20 is used as a termination layer to remove the copper layer 22a and the barrier layer 25 of the dielectric layer for exposing the substrate as shown in the fourth figure. 】 Duochen ". As a result, the chemical etching solution used in the present invention should be treated as necessary to conduct mechanical research, so that the copper oxide on the surface has been chemically separated from citric acid. The table uses the chemical etching solution of the slurry to dissociate the copper into copper ions == removed. The re-milled copper complex, so that it can be directly polished by mechanical grinding after the formation of easier conductor wafers. Grinding slurry with a ratio of abrasive particles to semi-abrasive particles. The low-grinding of copper layers caused the use of low-abrasive copper oxide. Among them, there is no grinding volume ratio.
第13頁 592890 五、發明說明(10) " -- 0本务明因為上述的特性,所以能夠大幅提高所處理的 曰=圓上的薄膜之均勻度,依據實驗的結果證實,本發明所 提出的改良式化學機械研磨法所處理的半導體晶圓,其表 面的均勻度可以達到大約5%至1 0%之間。然而依據傳統的 化f機械研磨法所處理的半導體晶圓,其表面的均勻度大 約只在20%至3 5%之間,可見本發明的化學機械研磨法所提 出的研漿確貫能夠提高所處理的晶圓的薄膜均勻度。此 外’因為本發明的提出的研漿成分,依據本發明所提出的 改良式化學機械研磨法所處理的半導體晶圓,其表面上不 會有的殘留粒子。另外,本發明所提出的改良式化學機械 研磨法所處理的半導體晶圓,其表面的金屬層之表面電阻 (Rs )的均勻度(變化範圍)也在1 0 %之内,所以依據本發明 所提出的方法處理過的晶圓製成的半導體元件,會具有較 佳的電子特性曲線,亦即其電性較佳。 以上所述僅為本發明之較佳實施例而已,並非用以限 定本發明之申請專利範圍;凡其它未脫離本發明所揭示之 精神下所完成之等效改變或修飾,例如使用不同的化學機 械研磨機台,或是將本發明應用於不同的製程中,只要利 用本發明所提出的研漿主要成分以及方法,以在化學機械 研磨製程中,移除半導體晶圓表面上的金屬層者或是使金 屬表面平坦化者,即包含在本發明的精神與範圍之中,故 其均應包含在下述之申請專利範圍内。P.13 592890 V. Description of the invention (10) "-0 This matter shows that the uniformity of the thin film on the circle can be greatly improved because of the above characteristics. According to the experimental results, it is confirmed that the invention The surface uniformity of the semiconductor wafer processed by the proposed improved chemical mechanical polishing method can reach between about 5% and 10%. However, the semiconductor wafer processed according to the conventional chemical mechanical polishing method has a surface uniformity of only about 20% to 35%. It can be seen that the slurry proposed by the chemical mechanical polishing method of the present invention can consistently improve Thin film uniformity of the processed wafer. In addition, because of the proposed slurry composition of the present invention, there is no residual particle on the surface of the semiconductor wafer processed by the improved chemical mechanical polishing method proposed by the present invention. In addition, the semiconductor wafer processed by the improved chemical mechanical polishing method proposed in the present invention has a uniformity (variation range) of the surface resistance (Rs) of the metal layer on the surface of the semiconductor wafer. Therefore, according to the present invention, A semiconductor element made of a wafer processed by the proposed method will have a better electronic characteristic curve, that is, its electrical property is better. The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of patent application for the present invention; any other equivalent changes or modifications made without departing from the spirit disclosed by the present invention, such as using different chemistry Mechanical polishing machine, or applying the present invention to different processes, as long as the main components and methods of the slurry proposed by the present invention are used to remove the metal layer on the surface of the semiconductor wafer in the chemical mechanical polishing process Those who flatten the metal surface are included in the spirit and scope of the present invention, so they should all be included in the scope of patent application described below.
第14頁 592890 圖式簡單說明 第一圖顯示將銅製程晶圓置於化學機械研磨裝置中時,銅 製程半導體晶圓與化學機械研磨裝置的侧視圖; 第二圖顯示半導體晶圓之結構示意圖; 第三圖顯示利用研漿進行化學機械研磨以移除銅層的示意 圖;以及 第四圖顯示利用化學機械研磨半導體晶圓以介電層為終止 層而移除介電層上之多餘之銅層與阻障層之結構示 意圖。Page 592890 Brief description of the diagram The first diagram shows the side view of the copper wafer semiconductor wafer and the chemical mechanical grinding device when the copper wafer is placed in the chemical mechanical polishing device. The second diagram shows the structure of the semiconductor wafer. Three figures show a schematic diagram of chemical mechanical polishing using a slurry to remove the copper layer; and the fourth figure shows a chemical mechanical polishing semiconductor wafer with a dielectric layer as a termination layer to remove the excess copper layer on the dielectric layer and Schematic diagram of the structure of the barrier layer.
圖號說明 研磨頭- 6 研漿-8 介電層-20 銅層-22a 阻障層-2 5 研磨墊- 5 研漿提供裝置- 7 半導體晶圓-10 銅導線-2 2 氧化銅-2 4 研磨顆粒-2 8Drawing number description Polishing head-6 slurry-8 dielectric layer-20 copper layer-22a barrier layer-2 5 polishing pad-5 slurry supply device-7 semiconductor wafer-10 copper wire-2 2 copper oxide-2 4 Abrasive particles-2 8
第15頁Page 15
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW91103963A TW592890B (en) | 2002-03-04 | 2002-03-04 | Copper process chemical mechanical polishing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW91103963A TW592890B (en) | 2002-03-04 | 2002-03-04 | Copper process chemical mechanical polishing method |
Publications (1)
Publication Number | Publication Date |
---|---|
TW592890B true TW592890B (en) | 2004-06-21 |
Family
ID=34075465
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW91103963A TW592890B (en) | 2002-03-04 | 2002-03-04 | Copper process chemical mechanical polishing method |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW592890B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI402904B (en) * | 2006-11-03 | 2013-07-21 | 羅門哈斯電子材料Cmp控股公司 | Curved grooving of polishing pads |
-
2002
- 2002-03-04 TW TW91103963A patent/TW592890B/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI402904B (en) * | 2006-11-03 | 2013-07-21 | 羅門哈斯電子材料Cmp控股公司 | Curved grooving of polishing pads |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI252534B (en) | Copper CMP defect reduction by extra slurry polish | |
KR100514536B1 (en) | A method of polishing | |
US6346144B1 (en) | Chemical-mechanical polishing slurry | |
US6719614B2 (en) | Method and chemistry for cleaning of oxidized copper during chemical mechanical polishing | |
TW550699B (en) | Method of chemical mechanical polishing with high throughput and low dishing | |
TW200539330A (en) | Ozone vapor clean method | |
JP3303544B2 (en) | Semiconductor device manufacturing method, wiring layer surface polishing slurry, and wiring layer surface polishing slurry manufacturing method | |
JP2003115474A (en) | Substrate processor and processing method | |
JP2000183003A (en) | Polishing composition for copper metal and manufacture of semiconductor device | |
US7494931B2 (en) | Method for fabricating semiconductor device and polishing method | |
JP2000208443A (en) | Method and apparatus for manufacturing electronic device | |
US20040121583A1 (en) | Method for forming capping barrier layer over copper feature | |
WO2007002915A2 (en) | Slurry for chemical mechanical polishing of aluminum | |
US6530824B2 (en) | Method and composition for polishing by CMP | |
KR100729972B1 (en) | A method for cleaning and treating a semiconductor wafer after chemical mechanical polishing | |
JP2003297812A (en) | Semiconductor manufacturing equipment and method of manufacturing semiconductor element | |
TW592890B (en) | Copper process chemical mechanical polishing method | |
US7413989B2 (en) | Method of manufacturing semiconductor device | |
JP2004022855A (en) | Process for producing semiconductor device | |
US20040043611A1 (en) | Method of reducing a defect level after chemically mechanically polishing a copper-containing substrate by rinsing the substrate with an oxidizing solution | |
TW396439B (en) | Manufacturing method of semiconductor device | |
TW442928B (en) | Manufacturing method of damascene copper | |
JP2001057367A (en) | Surface flattening method of semiconductor device | |
Wang et al. | Integrated tungsten chemical mechanical polishing process characterization for via plug interconnection in ultralarge scale integrated circuits | |
TWI601198B (en) | Method of chemical mechanical polishing a substrate |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK4A | Expiration of patent term of an invention patent |