MXPA06008906A - Temperature compensated voltage controlled oscillator - Google Patents

Abstract

A VCO with temperature compensation is achieved using reverse biased diodes. The VCO includes an amplifier that provides the required signal gain, a resonator tank circuit that provides the required phase shift, and at least one frequency tuning circuit for tuning the frequency of the oscillator signal. Each frequency tuning circuit includes at least one tuning capacitor and at least one MOS pass transistor that connects or disconnects the tuning capacitor(s) to/from the resonator tank circuit. Each reverse biased diode may be a parasitic diode that is formed at a drain or source junction of a MOS transistor. The reverse biased diodes have capacitance that can be controlled by a reverse bias voltage to compensate for drift in the VCO oscillation frequency over temperature.

Description

"OSCILLATOR CONTROLLED BY COMPENSATED TEMPERATURE VOLTAGE" FIELD OF THE INVENTION The present invention relates in general terms to circuits, and more specifically to a voltage controlled oscillator (VCO) with temperature compensation.

BACKGROUND OF THE INVENTION VCOs are an integral part of many electronic circuits and are particularly important in communication circuits. For example, VCOs are frequently used to generate local oscillator (LO-local oscillator) signals, which are used by the transmitter and receiver subsystems for overconversion and frequency downconversion, respectively. VCOs are also used to generate clock signals for synchronous circuits (for example, flip-flops). A wireless device (e.g., a cellular telephone) in a wireless communication system may employ multiple VCOs to generate LO signals for the transmitter and receiver circuitry and clock signals for the digital circuitry. A VCO typically employs one or more variable capacitors (varactors) to allow adjustment of the oscillation frequency for the VCO. The tuning range of the VCO refers to the range of oscillation frequencies reached when varactors vary. The tuning range is used to (1) ensure that the VCO can operate the frequency or frequency range required and (2) compensate for changes in oscillation frequency due to component tolerances, integrated circuit process variations (IC integrated circuit), etcetera. The circuit components of a VCO normally change with temperature. Consequently, the oscillation frequency of the VCO typically varies with the variation in temperature. For many applications (eg, wireless communications), temperature dependent frequency variation is a matter of importance and is a product of the VCO design with an extra tuning range to cover this frequency variation. The extra tuning range can degrade the phase noise performance of the VCO. Phase noise refers to random short-term frequency fluctuations of an oscillator signal and is a parameter used to describe the quality of the oscillator signal. If the frequency variation dependent on the temperature can be reduced or minimized, then it may be possible to improve the overall performance of the VCO. Therefore, there is a need in the matter for a VCO with temperature compensation.

BRIEF DESCRIPTION OF THE INVENTION A VCO with temperature compensation is obtained using inversely polarized diodes. The oscillation frequency of a VCO typically falls as the temperature increases. This phenomenon occurs mainly because the capacitors and inductors that determine the frequency of oscillation increase in value with temperature. An inverted polarized diode, which is a diode that has an applied reverse bias voltage, has a capacitance that varies with the amount of reverse bias voltage. This characteristic of the reverse polarized diode can be used to achieve temperature compensation for the VCO. One embodiment provides an integrated circuit comprising a VCO and at least one inversely polarized diode. The VCO provides an oscillator signal that has a frequency. In an exemplary design, the VCO includes an amplifier that provides the required signal gain, a parallel resonant circuit that provides the required phase change, and at least one frequency tuning circuit used to tune the signal frequency of oscillator. Each frequency tuning circuit includes at least one tuning capacitor and at least one step transistor of the metal oxide semiconductor (MOS) that connects or disconnects the tuning capacitor (s) to / from the parallel resonant circuit. At least one reverse polarized diode has a capacitance that can be controlled by a reverse bias voltage to compensate for the variation in the oscillation frequency over the temperature. Each inverted polarized diode can be a parasitic diode that is formed in a drain junction or source of a MOS transistor (for example, a MOS pass transistor in the frequency tuning circuit). A bias voltage generator generates the appropriate reverse bias voltage for at least one reverse polarized diode.

BRIEF DESCRIPTION OF THE DRAWINGS The characteristics and nature of the present invention will become more apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters are correspondingly identified throughout the description. same and where: Figures IA and IB show two VCO designs; Figure 2 shows a CMOS design for the VCO in Figure IA; Figures 3 and 5 show two coarse tuning circuits for the VCO; Figures 4A and 4B show a frequency tuning circuit and its equivalent circuit; Figures 5A and 6B show another frequency tuning circuit and its equivalent circuit; Figure 7 shows graphical representations of the capacitance against the reverse bias voltage for a diode; Figures 8 and 10 show two bias voltage generators; Figure 9 shows graphical representations of bias voltage versus temperature for the bias voltage generator in Figure 8; Figure 11 shows a process for performing temperature compensation for a VCO that uses inversely polarized diodes; Figure 12 shows a wireless device; and Figure 13 shows a digital signal processor (DSP) within the wireless device.

DETAILED DESCRIPTION OF THE INVENTION A VCO can be implemented with various designs known in the art. Some VCO designs are more suitable for radio frequency (RF), manufacturing in an IC, or to provide better phase noise performance. A VCO can also be designed to operate at a specific frequency or frequency range, depending on the requirements of the application for which the VCO will be used. Figure IA shows a schematic diagram of a VCO 100 for a first design. The VCO 100 includes an amplifier 110 and a parallel resonant circuit 120, which is comprised of an inductor 130 and a variable capacitor (varactor) 140. The amplifier 110 provides the signal gain necessary for oscillation. The amplifier 110 and the parallel resonant circuit of 120 collectively provide the 360 ° phase change necessary for oscillation. The VCO 100 provides an oscillator signal (Ose) having a fundamental frequency of oscillation. The oscillation frequency fosc is determined predominantly by the inductance (L) of the inductor 130 and the capacitance (C) of the varactor 140 and can be expressed as: Figure IB shows a schematic diagram of a VCO 150 for a second design. The VCO 150 includes an amplifier 160 and a parallel resonant circuit 170, which is comprised of an inductor 180 and the varactors 190 and 192. The amplifier 160 provides the signal gain necessary for oscillation. Amplifier 160 and parallel resonant circuit 170 collectively provide the phase change necessary for oscillation. The oscillation frequency fO? it is determined predominantly by the values of the inductor 180 and the varactors 190 and 192, as shown in equation (1). Figures IA and IB show two VCO designs by way of example. Other designs can also be used for the VCO. For simplicity, Figures IA and IB show only the basic circuit components of the VCOs 100 and 150. A VCO typically includes other support circuitry for providing polarization, frequency control, and so on. The support circuitry is not shown in Figures IA and IB. The VCOs 100 and 150 can be implemented in various ways and can be manufactured with various IC process technologies such as complementary metal oxide semiconductor (CMOS), bipolar junction transistor (BJT - bipolar junction transistor), CMOS-bipolar (BiCMOS), silicon germanium (SiGe), gallium arsenide (GaAs), etc. Figure 2 shows a schematic diagram of a VCO 100a, which is a CMOS design as an example for the VCO 100 in Figure 1A. The VCO 100a includes an amplifier 110a and a parallel resonant circuit 120a, which are a mode of the amplifier 110 and the parallel resonant circuit 120, respectively, in Figure IA. The VCO 100a can be manufactured in a CMOS IC. The amplifier 110a which is composed of N-channel MOS (N-MOS) 210a and 210b MOS transistors and P-channel MOS (P-MOS) transistors 212a and 212b. The transistors 210a and 212a forming a first inverter, and the transistors 210b and 212b form a second inverter. The transistor 210a has its source coupled to the ground of the circuit, its drain coupled to the drain of the transistor 212a, and its gate coupled to a node V + out. The transistor 212a has its source coupled to a power supply, VDD, its drain coupled to the drain of the transistor 210a, and its gate coupled to a V + Said node. The transistors 210b and 212b are coupled in a similar manner to the transistors 210a and 212a. The Vianda and V ~ output nodes represent the input and output, respectively, of the first inverter. The nodes V ~ sallda and V + sa ida also represent the input and output, respectively, of the second inverter. Consequently, the first and second inverters are coupled in series and in a closed circuit configuration. The nodes V + sativa and V ~ sallda also represent the differential output of the VCO 100a. The parallel resonant circuit 120a is composed of an inductor 230, a varactor 240, and a coarse tuning circuit 250, which all are coupled in parallel and between the nodes V ~ satida and the inductor 230 and the varactor 240 may be incorporated factory on a chip or can be implemented with external circuit components. The varactor 240 can be adjusted to obtain the desired oscillation frequency for the VCO 100a. For example, the varactor 240 can be used for (1) to account for the frequency variation due to variations in power supply, temperature, etc., and (2) to track the input frequency of a received RF signal. The varactor 240 can be replaced with multiple varactors, which can be coupled in series or in parallel, in order to provide a wider range of tuning. The coarse tuning circuit 250 may be used to select different operating frequencies or different operating frequency bands.

For example, a wireless device may be able to communicate with multiple wireless communication systems. Each system can be associated with a different operating frequency. Then, the coarse tuning circuit 250 can be used to tune the oscillation frequency of the VCO to the frequency of the system with which the wireless device is communicating. As another example, the wireless device can communicate with a single wireless communication system that can transmit over multiple frequency bands. Then, the coarse tuning circuit 250 can be controlled such that the VCO operates in the desired frequency band. A bias voltage generator 260 generates a bias voltage Vpoarization for the coarse tuning circuit 250. A controller 270 provides a control signal of L bits S [1..L] for the coarse tuning circuit 250 and a control signal of M bits G [1..M] for the bias voltage generator 260. In general, L = l and M = l. Some exemplary designs for the bias voltage generator 260 are described below. Figure 3 shows a schematic diagram of a coarse tuning circuit 250a, which is a mode of the coarse tuning circuit 250 in Figure 2. The coarse tuning circuit 250a includes L frequency tuning circuits 310a to 3101 for L branches of tuning. Each frequency tuning circuit 310 is controlled by a respective control signal S [x] from the controller 270, where x = 1..L. Each frequency tuning circuit 310 includes the tuning capacitors 312 and 314 and a transistor 316 of N-MOS pitch, which all are coupled in series and between the nodes V "output and V + output. step receives the control signal S [x] which enables or disables the transistor The step transistor 316 operates as a switch either to connect or disconnect the tuning capacitors 312 and 314 to / from the nodes V "output and ^ output- When the step transistor 316 is enabled by the control signal S [x], the signal path is closed through the tuning capacitors 312 and 314. These capacitors are then connected between the nodes V ~ satida and V + output and directly affect the oscillation frequency of VCO 100a. For the embodiment shown in Figure 3, the L frequency tuning circuits 310a to 3101 are increased with binary decoding (ie, binary weighting). For binary decoding, the capacitors 312a and 314a for the frequency tuning circuit 310a have a capacitance of Ct, the capacitors 312b and 314b for the frequency tuning circuit 310b have a capacitance of 2CT, and so on, and the capacitors 3121 and 3141 for the frequency tuning circuit 3101 have a capacitance of 2L_1, CT. The frequency tuning circuit 310a for the least significant bit (LSB - least significant bit) has the smallest tuning capacitance, and the frequency tuning circuit 3101 for the most significant bit (MSB - most significant bit) has the capacitance of greater tuning. Thermal decoding can also be used for the coarse tuning circuit 250a. In this case, the tuning capacitors in each of the L frequency tuning circuits 310a to 3101 have the same capacitance of Ct. The quality factor (Q) for each tuning branch or expressed as: ß = Ec (2 '2pfCbRb where Cb is the total tuning capacitance for the branch, and Rb is the series resistance for the branch. In order to achieve the same quality factor for each of the branches, the transistor 316 for each branch has a dimension that is determined by the tuning capacitance for the branch. For binary decoding, the tuning capacitance for the second branch (circuit 310b) is double that of the first branch (circuit 310a). To reach the same Q for the second branch, the series resistance for this branch is reduced by a factor of two relative to that of the first branch. This reduction in resistance can be achieved by doubling the width of the step transistor 316b (at 2W) relative to the width (W) of the transistor 316a. The transistor sizes of the other branches are dimensioned similarly in order to achieve the same Q, as shown in Fig. 3. For simplicity, Fig. 3 only shows the basic circuit components for circuit 250a. Other circuitry for controlling the pitch transistors and for polarizing the tuning capacitors is not shown in Figure 3 for simplicity. Figure 4A shows a schematic diagram of a frequency tuning circuit 310x, which is one of the L frequency tuning circuits 310 in Figure 3. The circuit 310x includes the tuning capacitors 312x and 314x and the transistor 316x of step, which are coupled in series and between the nodes V ~ sa? ida and V'saüda as described previously. The circuit 310x further includes a 320x inverter and resistors 322x and 324x, which are used to provide polarization for the 312x and 314x tuning capacitors and the step transistor 316x. The resistors 322x and 324x have one end coupled to the output of the inverter 32Ox and the other end coupled to the source and drain, respectively, of the step transistor 316x. The inverter 320x receives the control signal S [x] for the circuit 310x at its signal input and the polarization voltage Vpoiarization at its power input and provides a Bx bias signal to the resistors 322x and 324x. The frequency tuning circuit 310x operates as explained below. When the control signal S [x] is at a logical high, the bias signal Bx has a voltage of zero, the step transistor 316x is turned on, and the tuning capacitors 312x and 314x are connected to the nodes V ~ Saiida and ^ output- Conversely, when the control signal S [x] is in logic low, the bias signal Bx is in the bias voltage Vpoiarization / the pass transistor 316x turns off, and the tuning capacitors 312x and 314x are floating and do not connect to the nodes V ~ Sai? da and Valida- The source and drain junctions of the step 316x transistor are inversely polarized by Vp0? volts when the transistor is off. This reverse bias voltage ensures that the pass transistor 316x is completely off and further reduces the parasitic capacitance of the transistor. In most VCOs, such as VCO 100a, the oscillation frequency drops as the temperature increases. The main reason for this phenomenon is that the values of the capacitors and inductors that predominantly determine the frequency of oscillation increase with temperature. The increase in capacitance with temperature is due to increased electronic mobility and potential voltage changes at a higher temperature. Since the oscillation frequency is inversely related to the capacitance and the inductance, as shown in equation (1), increasing the capacitance and / or the inductance will cause the oscillation frequency to fall. For a VCO manufactured inside an integrated circuit, parasitic diodes are formed in the source and drain junctions of a MOS transistor that is reverse polarized. For example, in Figure 4A, when the bias signal Bx is in the Vpoiarization voltage and the control signal S [x] is in a logical low, the source and drain junctions of the transistor 316x of N-MOS pitch are polarized conversely, and parasitic diodes 332x and 334x are formed at the inversely polarized source and drain junctions, respectively. The parasitic diodes 332x and 334x have a capacitance that also increases with temperature. The capacitance of parasitic diodes 332x and 334x can be a main source (and in some cases, a dominant source) of the total capacitance variation over temperature. Figure 4B shows a schematic diagram of a circuit equivalent to 311x for the frequency tuning circuit 310x when the pass transistor 31ßx is off. For the 311x equivalent circuit, the passive transistor 316x is removed but parasitic diodes 332x and 334x are present and are modeled with parasitic capacitors 412x and 414x, respectively, which have a capacitance of Cdiode- The 312x and 412x capacitors are coupled in series and between the node ~? aiida AND the earth of the circuit. Similarly, capacitors 314x and 414x are coupled in series and between the node V + output and the. Earth of the circuit. Since the parasitic junction capacitance is typically much smaller than the tuning capacitance (ie, "Cx"), the total capacitance of the 312x and 412x capacitors coupled in series is basically determined by the parasitic junction capacitance. The parasitic junction capacitance Cdi0do is determined by the size of the parasitic diodes 332x and 334x, which in turn are determined by the size of the step transistor 316x. The parasitic diodes 332x and 334x may be relatively large if the drainage and source area of the step transistor 316x is large, which may be the case in order to achieve a higher quality factor for the tuning branch. Consequently, the parasitic junction capacitance can have a non negligible impact on the oscillation frequency but can be compensated, as described below. Figure 5 shows a schematic diagram of a coarse tuning circuit 250b, which is another embodiment of the coarse tuning circuit 250 in Figure 2. The coarse tuning circuit 250b includes L frequency tuning circuits 510a to 5101, each of which is controlled by a respective control signal S [x] from the controller 270. The coarse tuning circuit 250b which provides a "tap" tuning capacitance to the circuit ground while the circuit 250a provides a capacitance of "parallel" tuning between the nodes V ~ output Y Validate • The coarse tuning circuit 250b can also be used for the VCO design shown in Figure IB. Each frequency tuning circuit 510 includes tuning capacitors 512 and 514 and the N-MOS transistors 516 and 518. The step transistors 516 and 518 have their sources coupled to the ground of the circuit, their gates coupled together, and their drains coupled to one end of the tuning capacitors 512 and 514, respectively. The other end of the tuning capacitors 512 and 514 are coupled to the nodes V "output and Valida./ respectively The transistors of step 516 and 518 receive the control S [x] and operate as switches either to connect or disconnect the capacitors of tuning 512 and 514 to / from the nodes V "output and v output • For the mode shown in Figure 5, the L frequency tuning circuits 510a to 5101 are incremented with binary decoding, as described above for Figure 3. Figure 6A shows a schematic diagram of a 510x frequency tuning circuit, which is one of the L frequency tuning circuits 510 in Figure 5. The 51Ox circuit includes the 512x and 514x tuning capacitors and the 516x and 518x step transistors, which are coupled as described above, the 510x circuit further includes an inverter 520x and the resistors 522x and 524x, which are used to provide polarization for the tuning capacitors 512x and 514x and the step transistors 516x and 518x, as was also described with The parasitic diodes 532x and 534x are formed in the drains of the transistors of step 516x and 518x when these transistors are turned off and applied. a reverse bias voltage at the junction of the drain. Figure 6B shows a schematic diagram of an equivalent circuit 511x for the frequency tuning circuit 510x when the step transistors 516x and 518x are off. For the 511x equivalent circuit, the transistors 516x and 518x are removed but the parasitic diodes 532x and 534x are present and are modeled with the parasitic capacitors 612x and 614x, respectively, which have a capacitance of Cdioo- The 512x and 612x capacitors they are coupled in series and between the V ~ sailed node and the earth of the circuit. Similarly, the 514x and 614x capacitors are coupled in series and between the V + node and the earth of the circuit. The circuit equivalent to 511x resembles a 311x equivalent circuit in Figure 4B. The capacitance of the inversely polarized diodes, such as the parasitic diodes 332x and 334x in Figure 4A and the parasitic diodes 532x and 534x in Figure 6A, increases with temperature. This causes the oscillation frequency to fall as the temperature increases. The amount of frequency drop can be relatively large. For example, in a VCO design as an example, the capacitance of parasitic diodes 332x and 334x retained an increase of 0.8 percent (or approximately 11 femto-Farads) over a specified temperature range, which causes the frequency The oscillation rate falls by 8 MHz from a nominal frequency of 2 GHz. This amount of frequency variation can be considered large for some applications, such as wireless communications, where frequency stability is important to achieve good system performance. Temperature compensation for VCOs, such as VCO 100a, can be achieved using reverse polarized diodes. In general, the reverse polarized diodes can be manufactured within an integrated circuit specifically for temperature compensation or they can be parasitic diodes such as those formed at the junctions of the MOS transistors. The capacitance of an inverted polarized diode decreases when the reverse bias voltage is increased. By applying an appropriate reverse bias voltage, the capacitance of the diode can be decreased by an appropriate amount in order to compensate for any increase in diode capacitance and possibly other VCO circuit components due to temperature. The temperature compensation using reversed polarized diodes is described in detail below. Figure 7 shows graphical representations of the capacitance against the reverse bias voltage for an inverted polarized diode. The vertical axis represents the capacitance (Cdioo) of the inversely polarized diode, and the horizontal axis represents the inverse polarization voltage (Vrb) for the diode. For a given temperature, a graphical representation of the capacitance against the reverse bias voltage for the reverse polarized diode can be obtained based on a computer simulation, empirical measurements, etc. In Figure 7, the graphic representation 712 shows the capacitance against the reverse bias voltage for a low temperature (e.g., 25 ° Celsius), and the graphical representation 714 shows the capacitance against the inverse bias voltage for a high temperature ( for example, 90 ° Celsius). These graphical representations indicate that the capacitance of the reverse bias diode decreases when a larger reverse bias voltage is applied to the diode. These graphical representations also indicate that the shape of the graphic representations for different temperatures is approximately the same. However, the graphical representation 714 for high temperature is increased in relation to the graphical representation 712 for a low temperature. The inversely polarized diode has a capacitance of Cd? at low temperature when applied with a reverse bias voltage of Vrb ?. The capacitance of the reverse polarized diode is increased to Cd2 at a high temperature if the same reverse bias voltage Vrb is applied? to the diode. This increase in capacitance from C to Cd2 causes a drop in the oscillation frequency, as described above. The capacitance of Cd? it can be obtained at high temperature by applying a reverse bias voltage of rb2 to the diode. Consequently, increase the inverse bias voltage of Vrb? At Vrb2, the capacitance of the reverse polarized diode remains approximately constant over the low to high temperature range. In an exemplary design, the diode capacitance can decrease by 9 femto-Farads by increasing the inverse bias voltage from 2.0 to 2.4 volts. Reverse polarized diodes can also be used to compensate for changes in other circuit components of VCOs. For example, referring again to Figures 4A and 4B, parasitic diode 332x can be used to compensate for changes in the capacitance of diode 332x as well as the capacitance of the tuning capacitor 312x, such that the total capacitance of the branch is approximately constant over temperature. Parasite diodes for all branches disabled in the coarse tuning circuit 250a may also be used to compensate for changes in the inductor 230, the varactor 240, and other circuit components of the VCO 100a such as the transistors 210a, 210b, 212a and 212b . Inductors and capacitors manufactured within an integrated circuit are typically not as sensitive to temperature and can change little (percentage- wise) over temperature. Diodes manufactured inside an integrated circuit are more sensitive to temperature (than inductors and capacitors) and their capacitance generally changes more (in percentage) with temperature. Consequently, the temperature-dependent changes for inductors and capacitors can be compensated with inversely polarized diodes. For the VCO 100a, the coarse tuning circuit 250 may be the dominant source of frequency change with temperature. However, the number and size of the reverse polarized diodes available for temperature compensation is related to the number and size of the diodes that cause the frequency change dependent on the temperature. For example, the frequency tuning circuit 3101 for the most significant bit of tuning control S [L] has the largest parasitic diodes (resulting from the largest pitch transistors) and consequently causes the frequency change more dependent on the temperature. However, the largest reverse junction capacitance is also available for the frequency tuning circuit 3101 in order to perform the temperature compensation. As another example, when more branches are disabled, more parasitic diodes are available both to cause the change of frequency dependent on the temperature and to perform the temperature compensation. A suitable polarization voltage can be applied to the parasitic diodes of the pitch transistors to achieve a temperature compensation for the VCO 100a. The appropriate bias voltage is dependent on (1) the amount of change in capacitance desired for the parasitic diodes and (2) a function for the reverse junction capacitance against the reverse bias voltage. The desired capacitance change can be dependent on various factors such as the VCO design, the VCO circuit components, and so on. The function for the capacitance against the reverse bias voltage can also be dependent on various factors such as the design of the MOS transistors, the IC process, and so on. In any case, a general function for the reverse bias voltage against the temperature that the temperature compensation obtains for the VCO can be determined by computer simulation, empirical measurements, etc. Referring again to Figure 4A, the Bx bias signal from the inverter 320x provides the reverse bias voltage for the stray diodes 332x and 334x when the pass transistor 316x is off. The voltage of the bias signal Bx is determined by the polarization voltage Vpolarization the energy input of the inverter 320x. The polarization voltage Vpoi ization can be generated in various ways, some of which are described below. Figure 8 shows a schematic diagram of a bias voltage generator 260a, which is a mode of a bias voltage generator 260 in Figure 2. The generator 260a can generate the bias voltage Vpolarization for the parasitic diodes of the step transistors. Polarization voltage generator 260a includes a current source 810, a P-MOS transistor 812, M + l P-MOS transistors 814a to 814b, M switches 816a to 816m for transistors 814a to 814m, respectively, and a resistor 818 charge regulator. In general, M can be any one or more integer. The transistor 812 has its source coupled to the power supply, VDD / and its gate coupled to its drain. The current source 810 has one end coupled to the drain of the transistor 812 and the other end coupled to the ground of the circuit. The transistor 814n has its source coupled to the power supply, its gate coupled to the gate of the transistor 812, and its drain coupled to a node for the bias voltage Vp0? Arization. Each of the transistors 814a to 814m has its source coupled to the power supply, its gate coupled to the gate of the transistor 812, and its drain coupled to one end of a respective switch 816. The other end of the switches 816a to 816m is Coupling to the Polarization Node • The load regulator resistor 818 is coupled between the voltage node V and the earth of the circuit. The bias voltage generator 260a operates as explained below. The current source 810 provides a polarization current Ipoiarization • The transistor 812 and the transistors 814a to 814n form a smaller current. Each of the transistors 814a to 814n provides a version of the polarization current Ipoi ization. In particular, the current for each of the transistors 814a 814n is dependent on the polarization current Ipoiarization Y of the ratio of the size of the transistor 814 to the size of the transistor 812. The transistors 814a to 814m can be implemented with binary decoding (i.e. with larger transistor sizes) or with thermal decoding (ie, with transistors of the same size). Transistor 814n is always on and supplies its current to resistor 818 charge controller. The switches 816a to 816m receive the control signals G [l] to G [M], respectively, which open and close these switches. When a particular switch 816 is closed, the current through the associated transistor 814 is provided to the load-regulating resistor 818. The voltage at the node of Vp0? Arization is dependent on (1) the total current provided by all the enabled transistors 814 to charge the resistor 818 and (2) the resistance of the resistor 818. When more switches 816 are enabled, it is provided more current to resistor 818 charge regulator and a higher voltage is obtained for the bias voltage Vpolarization • A polarization voltage may be obtained depending on the temperature, whether with a temperature-dependent current or with a temperature-dependent resistor. For example, the load regulator resistor 818 can be a fixed value and the polarization current Ipoiarization can be proportional to the absolute temperature (PTAT - proportional to absolute temperature), which means that the current increases linearly with the absolute temperature determined in degrees Kelvin. Alternatively, the polarization current Ioiarization can be a fixed value and the resistor 818 charge regulator can have a resistance that is proportional to the absolute temperature. Figure 9 shows graphical representations of the bias voltage Velarization against the temperature for the bias voltage generator 260a in Figure 8. When all the switches 816a to 816m are turned off, only the transistor 814n supplies power to the regulator resistor 818. the load, and the graphic representation 914n shows the polarization voltage Vpoarization against the temperature for this case. The polarization voltage Vpoarization increases linearly with the temperature that increases because the polarization current Ipoiarization increases linearly with the increasing temperature. When the switch 81 b is on, the transistors 814 a and 814 n supply current to the charge regulator resistor 818, and the graphical representation 914 a shows the bias voltage V p to the temperature for this case. The graphical representation 914a has a steeper slope than the graphical representation 914n because more current is supplied to the load regulator resistor 818 by the additional transistor 814a. The graphical representations 914b to 914m have progressively higher slopes as more switches 816 are turned on and more transistors 814 provide their current to the charge regulator resistor 818. The desired general function of obtaining the temperature compensation for the VCO 100a can be obtained by turning on an appropriate combination of switches 816. Figure 10 shows a diagram of a generator 260b of bias voltage, which is another embodiment of the bias voltage generator 260 in Figure 2. The bias voltage generator 260b includes a look-up table 1012 (LUT) and a digital to analog converter (DAC - digital-to-analog converter) 1014. Query table 1012 stores the general function for the reverse bias voltage against the temperature. The query table 1012 receives a temperature indication (which, for example, can be provided by a PTAT circuit) and provides a corresponding control word. The DAC 1014 receives and converts the control word into a voltage, which is provided as the polarization voltage Vpoiarization • The bias voltage generator 260b can provide greater flexibility to generate the bias voltage Vpoiaization • The query table 1012 can implement any linear or non-linear function and can be modified linearly with a new function. In the past, two exemplary designs were described to generate polarization polarization voltage so that polarized diodes / parasites achieve temperature compensation for a VCO. The polarization voltage Vpoiarization can also be generated in other ways, and this is within the scope of the invention. Figure 11 shows a process 1100 for performing temperature compensation for a VCO using inversely polarized diodes. The temperature of the VCO is calculated, for example, based on a circuit component that has a characteristic that is proportional to the absolute temperature (block 1112). Then an inverse bias voltage is generated for the temperature calculated based on a function of the reverse bias voltage against the temperature (block 1114). The reverse bias voltage is applied to at least one reverse polarized diode to compensate for the variation in the oscillation frequency over the temperature (block 1116). The reverse bias voltage adjusts the capacitance of the polarized diode (s) inversely to compensate for changes in the VCO capacitance due to temperature. VCOs that achieve temperature compensation using reverse polarized diodes can be used in various systems and applications such as communications, networks, computing, consumer electronics, etc. For example, these temperature compensated VCOs can be used in wireless communication systems such as the Code Division Multiple Access (CDMA) system, a Time Division Multiple Access (TDMA - Time Multiple Division) system. Access), a Global System for Mobile Communications (GSM -Global System for Mobile Communications), an Advanced Mobile Phone System (AMPS - Advanced Mobile Phone System), Global Positioning System (GPS), a system of multiple multiple input input (MIMO), an orthogonal frequency division multiplexing (OFDM) system, an orthogonal frequency division multiple access system (OFDMA - orthogonal frequency multiple division) access), a wireless local area network (WLAN - wireless local area network), and so on. The use of compensated temperature VCOs for wireless communications is described below. Figure 12 shows a block diagram of a wireless device 1200 that can be used for wireless communications. The wireless device 1200 can be a cell phone, a terminal, a handset, or some other device or design. The wireless device 1200 is capable of providing bidirectional communications through a transmission path and a reception path. In the transmission path, a digital signal processor (DSP) 1210 processes data to be transmitted and provides a chip flow to a transceiver unit 1220. In the transceiver unit 1220, one or more digital to analogue converters ( DACs) 1222 converts (n) the chip flow into one or more analog signals. The analog signal (s) is filtered by a filter 1224, amplified by a variable gain amplifier 1226 (VGA), and overconverts in frequency from the baseband in RF by a mixer 1228 to generate an RF signal. The overconversion of frequencies is carried out with an overconversion LO signal from a VCO 1230. The RF signal is filtered by a 1232 filter, amplified by a power amplifier (PA-power amplifier) 1234, routed through a duplicator (D) 1236, and is transmitted from an antenna 1240. In the reception path, a modulated signal is received by antenna 1240, addressed by duplicator 1236, amplified by a low noise amplifier (LNA - low noise amplifier 1244, is filtered by a filter 1246, and is subverted in frequency from the RF to the baseband by a mixer 1248 with a LO signal of down conversion from a VCO 1250. The down-converted signal is separated by a separator circuit 1252, it filters through a filter 1254, and is digitized by one or more analog to digital converters (ADCs) 1256 to obtain one or more sample flows. The sample stream (s) is provided to the processor 1210 for digital signals for processing. Figure 12 shows a specific transceiver design. In a typical transceiver, the signal conditioning for each path can be performed by one or more amplifier, filter, mixer, etc. stages, as is known in the art. Figure 12 only shows some circuit blocks that can be used for signal conditioning. For the embodiment shown in Figure 12, the transceiver unit 1220 includes two VCOs 1230 and 1250 for the transmission and reception paths, respectively. The VCOs 1230 and 1250 can be implemented with various VCO design, such as the design shown in Figure 2. Each VCO can also be designed to operate at a specific frequency or frequency range. For example, the VCOs 1230 and 1250 can be designed to operate on an integer multiple of (for example, twice) one or more of the following frequency bands: • Personal Communications System Band (PCS - Personal Communication Systems) from 1850 to 1990 MHz, • Cellular band from 824 to 894 MHz, • Digital Cell System Band (DCS - Digital Cellular System) from 1710 to 1880 MHz, • GSM900 Band from 890 to 960 MHz, International Mobile Telecommunications Band-2000 (IMT-2000) from 1920 to 2170 MHz, and Global Positioning System (GPS) Band from 1574.4 to 1576.4 MHz. The VCOs 1230 and 1250 can be designed to operate in multiple frequency bands by providing sufficient tuning capacitors in the coarse tuning circuit. A phase locked circuit (PLL) 1260 receives control information from the digital signal processor 1210 and provides controls for the VCOs 1230 and 1250 in order to generate the appropriate overconversion and downconversion of LO signals, respectively . Figure 13 shows a block diagram of one mode of the DSP 1210. The DSP 1210 includes various processing units such as, for example, a multiply accumulate unit 1322 (MACC multiply-accumulate), an arithmetic logic unit 1324 (ALU - arithmetic logia unit), an internal controller 1326, a processor 1328, a memory unit 1330, and a bus control unit 1332, which are all coupled by a bus 1336. The DSP 1210 also includes a VCO / PLL 1334 having a VCO that can be implemented with the VCO 100a in Figure 2. This VCO generates an oscillator signal that is used to generate clock signals for the processing units within the DSP 1210 and possibly processing units external to the DSP 1210 (for example, a main controller 1340 and a main memory unit 1342). The DSP 1210 can perform (1) the coding, distribution, modulation, code channeling, spectral dispersion, etc., for the transmission path, and (2) regrouping, code channeling, demodulation, grouping, decoding, and so on, for the reception path. The processing by the DSP 1210 is determined by the communication system. The wireless device 1200 can be displayed including a digital portion and an analogous portion. The digital portion (e.g., DSP 1210 and possibly DACs 1222 and ADCs 1256) may be implemented in one or more digital circuits. The analogous portion (e.g., the remaining portion of the transceiver unit 1220) can be implemented in one or more RF integrated circuits (RFICs) and / or with other discrete components. The compensated temperature VCOs described herein may be used for various types of ICs such as RFICs and digital ICs. These VCOs can also be used for DSPs, application-specific integrated circuits (ASICs), processors, controllers, and so on. The temperature compensation techniques described herein can be used for various types of oscillators such as VCOs, current controlling oscillators (ICOs), voltage controlled crystal oscillators (VCXOs), and so on. The temperature compensation techniques described herein can also be used for other types of circuit such as tunable filters and so on. The above description of the described embodiments is provided to enable the person skilled in the art to make or use the present invention. Various modifications to these modalities will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without being insulated from the spirit or scope of the invention. Accordingly, the present invention is not intended to be limited to the embodiments shown herein but should encompass the broadest scope consistent with the principles and novel features described herein.

Claims (26)

1. NOVELTY OF THE INVENTION Having described the invention as antecedent, the content of the following claims is claimed as property CLAIMS 1. An integrated circuit, characterized in that it comprises: a voltage-controlled oscillator (VCO) operative to provide an oscillator signal having a frequency; and at least one reverse polarized diode having a capacitance that is controlled by a reverse bias voltage to compensate for the variation in the frequency of the oscillator signal due to the temperature. The integrated circuit according to claim 1, characterized in that each of at least one reverse polarized diode is formed by a parasitic diode in the integrated circuit. The integrated circuit according to claim 2, characterized in that the parasitic diode is formed in a drain junction or a source junction of a metal oxide semiconductor (MOS) transistor. The integrated circuit according to claim 1, characterized in that the VCO includes an amplifier operative to provide a signal gain for the VCO, a parallel resonant circuit operative to provide a phase change for the VCO, and at least one tuning circuit of operating frequency for tuning the frequency of the oscillator signal, each frequency tuning circuit including at least one tuning capacitor and at least one metal oxide semiconductor (MOS) transistor operative to connect or disconnect at least one tuning capacitor of the parallel resonant circuit. The integrated circuit according to claim 4, characterized in that the VCO includes a plurality of frequency tuning circuits having progressively larger tuning capacitors. The integrated circuit according to claim 5, characterized in that for each plurality of frequency tuning circuits, at least one MOS transistor for the frequency tuning circuit is dimensioned proportional to the capacitance of at least one tuning capacitor for the circuit of frequency tuning. 7. The integrated circuit according to claim 4, characterized in that each of at least one reverse polarized diode is formed by parasitic diodes on at least one MOS transistor. The integrated circuit according to claim 1, further characterized in that it comprises: a bias voltage generator operative to provide the inverse bias voltage for at least one reverse polarized diode. The integrated circuit according to claim 8, characterized in that the bias voltage generator includes: a circuit component having a characteristic that is proportional to the absolute temperature (PTAT), and where the inverse bias voltage is generated based on in the PTAT characteristic of the circuit component. The integrated circuit according to claim 9, characterized in that the circuit component is a current source that provides a bias current that is proportional to the absolute temperature. The integrated circuit according to claim 9, characterized in that the circuit component is a resistor having a resistance that is proportional to the absolute temperature. The integrated circuit according to claim 8, characterized in that the bias voltage generator includes: a source of operating current to provide a bias current; a minor operating current to provide at least one version of the polarization current; and an operating load regulator resistor for receiving at least one version of the bias current and providing the reverse bias voltage. The integrated circuit according to claim 12, characterized in that at least one version of the polarization current is selectable from a plurality of possible versions of the polarization current., and where different voltage functions of reverse bias against temperature are obtained by selecting different combinations of polarization current versions. The integrated circuit according to claim 8, characterized in that the bias voltage generator includes: an operational look-up table for storing a reverse bias voltage function against the temperature, and a digital to analog converter operating to receive a dependent value of the temperature from the lookup table and to provide the reverse bias voltage. The integrated circuit according to claim 1, characterized in that the oscillator signal is a local oscillator (LO) signal that is suitable for overconversion or downconversion of frequencies in a wireless communication systems. 16. The integrated circuit according to claim 15, characterized in that the wireless communication system is a Code Division Multiple Access (CDMA) system. 17. The integrated circuit according to claim 15, characterized in that the wireless communication system is a Global System for Mobile Communications (GSM). 18. A wireless device, characterized in that it comprises: a voltage controlled oscillator (VCO) operative to provide an oscillator signal having a frequency; and at least one reverse polarized diode having a capacitance which is controlled by a reverse bias voltage to compensate for a variation in the frequency of the oscillator signal due to the temperature. The wireless device according to claim 18, characterized in that each of at least one reverse polarized diode is formed by a parasitic diode in a drain junction or a source junction of a metal oxide semiconductor transistor (MOS). The wireless device according to claim 18, further characterized in that it comprises: a bias voltage generator operative to provide the reverse bias voltage for at least one reverse polarized diode, the bias voltage generator including a circuit component having a characteristic that is proportional to the absolute temperature (PTAT), and the inverse polarization voltage being generated based on the PTAT characteristic of the circuit component. 21. An apparatus, characterized in that it comprises: a voltage-controlled oscillator (VCO) operative to provide an oscillator signal having a frequency; and at least one reverse polarized diode having a capacitance which is controlled by an inverse bias voltage to compensate for the variation in frequency of the oscillator signal due to the temperature. The apparatus according to claim 21, characterized in that each of at least one reverse polarized diode is formed by a parasitic diode in a drain junction or a source junction of a metal oxide semiconductor (MOS) transistor. 23. A method for performing temperature compensation for a voltage controlled oscillator (VCO), characterized in that it comprises: calculating the temperature of the VCO; generate a reverse bias voltage for the calculated temperature; and applying the reverse bias voltage to at least one reverse polarized diode to compensate for the variation in oscillation frequency for the VCO due to the temperature. The method according to claim 23, characterized in that the capacitance of at least one inversely polarized diode is adjusted by the reverse bias voltage to compensate for changes in the VCO capacitance due to the temperature. The method according to claim 23, characterized in that the temperature of the VCO is calculated with a circuit component having a characteristic that is proportional to the absolute temperature. 26. The method according to claim 23, characterized in that the inverse bias voltage is generated based on a selectable function of reverse bias voltage versus temperature.