KR20190041863A - Electroluminescence display and driving method thereof - Google Patents

Abstract

The present invention relates to an electroluminescent display device and a driving method thereof. Each of the pixels comprises: a driving element driving a light emitting element; a first switch element turned on according to a first gate signal and supplying a data signal to a gate of the driving element; a first capacitor charging a gate-source voltage of the driving element; and a second capacitor connected between the second gate line and the gate of the driving element to apply an anti-phase signal to the gate of the driving element.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electroluminescent display device,

The present invention relates to an electroluminescent display device having a driving element for driving pixels.

An electroluminescent display device is classified into an inorganic light emitting display device and an organic light emitting display device depending on the material of the light emitting layer. An active matrix type organic light emitting display device includes an organic light emitting diode (OLED) which emits light by itself, and has a high response speed, a high luminous efficiency, a high brightness and a wide viewing angle There are advantages.

The pixels of the organic light emitting display include an OLED and a driving element for driving the OLED by supplying current to the OLED according to the gate-source voltage. An OLED of an organic light emitting display includes an anode and a cathode, and an organic compound layer formed between the electrodes. The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer EIL). When a current flows through the OLED, holes passing through the hole transport layer (HTL) and electrons passing through the electron transport layer (ETL) are transferred to the emission layer (EML) to form excitons. As a result, the emission layer (EML) generates visible light .

The driving device may be implemented by a metal oxide semiconductor field effect transistor (MOSFET) structure transistor. The driving device should have uniform electrical characteristics among all the pixels, but there may be a difference between the pixels due to the process deviation and the device characteristic deviation, and may vary with the elapse of the display driving time. An internal compensation method and an external compensation method may be applied to the electroluminescence display device to compensate for the deviation of electrical characteristics of the driving device. The internal compensation method samples the gate-source voltage (Vgs) of the driving device which varies depending on the electrical characteristics of the driving device and compensates the data voltage by the gate-source voltage thereof. The external compensation method senses the voltage of a pixel which changes according to the electrical characteristics of the driving element and compensates the electrical characteristic deviation of the driving element between the pixels by modulating the data of the input image in the external circuit based on the sensed voltage.

The pixel circuit of the light emitting display may include a plurality of transistors coupled to the signal lines. When the voltage of the gate signal applied to the gate of this transistor is changed, the gate-source voltage (Vgs) of the transistor for the driving element can be lowered due to the kick back caused by the parasitic capacitance between the gate and the source of the transistor have. A decrease in the gate-source voltage (Vgs) of the driving element causes a decrease in the current of the OLED, resulting in a decrease in brightness of the pixels. Kickback due to the parasitic capacitance of the transistor serves as a cause of increasing the luminance difference depending on the position of the display panel when the delay amount of the gate signal varies on the screen of the display panel.

Accordingly, the present invention provides an electroluminescent display device and a driving method thereof that can reduce the influence of a kickback voltage in a pixel circuit and improve brightness uniformity of a screen.

An electroluminescent display of the present invention includes a display panel in which data lines and gate lines are crossed and a plurality of sub-pixels are arranged, a data driver that supplies a data signal to the data lines, And a gate driver for supplying an opposite phase signal to the first gate signal to the second gate line.

Each of the subpixels includes a driving element for driving the light emitting element, a first switch element turned on according to the first gate signal to supply the data signal to the gate of the driving element, And a second capacitor connected between the second gate line and the gate of the driving element to apply the opposite phase signal to the gate of the driving element.

The width of the second gate line is larger than the other positions in the second capacitor.

The gate driver supplies a second gate signal to the third gate line.

Each of the subpixels being turned on in accordance with the second gate signal to connect the driving element to the sensing line and a second switch element connected between the second gate line and the source of the driving element, And a third capacitor for applying a signal to the source of the driving element.

And the width of the second gate line is larger than the other positions in the third capacitor.

 The second gate signal is generated at a gate-on voltage before the first gate signal, and is inverted to a gate-off voltage simultaneously with the first gate signal.

In the electroluminescent display device of the present invention, each of the subpixels includes a driving element for driving the light emitting element, a first switch element turned on according to the first gate signal to supply the data signal to the gate of the driving element, A first capacitor for turning on the second gate signal to connect the driving element to the sensing line, a first capacitor for charging the gate-source voltage of the driving element, a second capacitor connected to the third gate line, Phase signal to the gate of the driving element and a second capacitor connected between the gate of the driving element and the opposite gate of the driving element to apply the opposite phase signal to the gate of the driving element, And a third capacitor to which the second capacitor is applied.

The present invention applies a reverse-phase signal generated in the opposite phase of a gate signal to subpixels to a subpixel through a capacitor to minimize a kickback voltage generated in a voltage of a driving device when a voltage of the gate signal changes, Can be made uniform.

Furthermore, even if a gate signal of a rectangular wave form is applied without modulating the gate signal, the present invention can make the luminance uniform throughout the screen.

1 is a block diagram showing an electroluminescent display device according to an embodiment of the present invention.
2 is a circuit diagram showing a sensing path connected to a pixel circuit and a pixel circuit;
3 is a circuit diagram showing a pixel circuit according to the first embodiment of the present invention.
4 is a detailed view showing the planar structure of the pixel circuit shown in FIG.
5 is a waveform diagram showing the operation of the pixel circuit shown in Figs. 3 and 6. Fig.
6 is a circuit diagram showing a pixel circuit according to a second embodiment of the present invention.
7 is a detailed view showing a planar structure of the pixel circuit shown in FIG.
8A and 8B are waveform diagrams showing waveforms of gate signals.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. It will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims and their equivalents. To fully disclose the scope of the invention, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, and the like disclosed in the drawings for describing the embodiments of the present invention are illustrative, and thus the present invention is not limited to those shown in the drawings. Like reference numerals refer to like elements throughout the specification. In the following description of the present invention, detailed description of known related arts will be omitted when it is determined that the gist of the present invention may be unnecessarily blurred.

Where the term "comprises", "comprising", "having", "having", or the like is used herein, other parts may be added as long as "only" is not used. The singular forms of the components may be construed in plural unless otherwise expressly stated.

In interpreting the constituent elements, it is construed to include the error range even if there is no separate description.

In the case of a description of the positional relationship, for example, if the positional relationship between two components is described as 'on', 'on top', 'under', or 'next to' Quot; directly " or " direct " may be interposed between those components that are not used.

The first, second, etc. may be used to distinguish the components, but these components are not limited to the function or structure of the component or the names of components attached to the components. For example, the ordinal numbers such as the first, second, third, and fourth prefixed to the elements in the pixel circuit of Fig. 4 are based on the order in which the data lines are sequentially charged through the switch elements S1 to S4 It is attached.

The following embodiments can be combined or combined with each other partly or entirely, and technically various interlocking and driving are possible. Each embodiment may be feasible independently of one another and may be feasible in conjunction.

In the electroluminescent display device of the present invention, the pixel circuit includes a driving element and a switching element. The driving element and the switching element may be implemented by at least one of an n-type transistor (NMOS) and a p-type transistor (PMOS). The transistors on the display panel can be implemented as thin film transistors (TFTs). The transistor may be an oxide transistor having an oxide semiconductor pattern or an LTPS transistor having a low temperature poly-silicon (LTPS) semiconductor pattern. A transistor is a three-electrode device including a gate, a source, and a drain. The source is an electrode that supplies a carrier to the transistor. Within the transistor, the carriers begin to flow from the source. The drain is an electrode from which the carrier exits from the transistor. The flow of carriers from the transistor flows from the source to the drain. In the case of an n-type transistor (NMOS), since the carrier is an electron, the source voltage has a voltage lower than the drain voltage so that electrons can flow from the source to the drain. In the n-type transistor (NMOS), the direction of the current flows from the drain to the source side. In the case of a p-type transistor (PMOS), since the carrier is a hole, the source voltage is higher than the drain voltage so that holes can flow from the source to the drain. In a p-type transistor (PMOS), a current flows from the source to the drain because the holes flow from the source to the drain. It should be noted that the source and drain of the transistor are not fixed. For example, the source and the drain may be changed depending on the applied voltage. Therefore, the invention is not limited by the source and the drain of the transistor. In the following description, the source and the drain of the transistor will be referred to as first and second electrodes.

The gate signal of the transistor used as the switching elements swings between the gate on voltage and the gate off voltage. The gate-on voltage is set to a voltage higher than the threshold voltage of the transistor, and the gate-off voltage is set to a voltage lower than the threshold voltage of the transistor. The transistor is turned on in response to the gate-on voltage, while it is turned off in response to the gate-off voltage. In the case of an n-type transistor (NMOS), the gate-on voltage may be a gate high voltage (VGH) and the gate-off voltage may be a gate low voltage (VGL). In the case of a p-type transistor (PMOS), the gate-on voltage may be the gate-low voltage (VGL) and the gate-off voltage may be the gate high voltage (VGH).

Various embodiments of the present invention will now be described in detail with reference to the accompanying drawings. In the following embodiments, an electroluminescent display device will be described mainly with respect to an organic light emitting display device including an organic light emitting material. The technical idea of the present invention is not limited to the organic light emitting display, but can be applied to an inorganic light emitting display including an inorganic light emitting material.

1 is a block diagram showing an electroluminescent display device according to an embodiment of the present invention. 2 is a circuit diagram showing a sensing path connected to a pixel circuit;

1 and 2, an electroluminescent display device according to an embodiment of the present invention includes a display panel 100 and a display panel driving circuit.

The screen of the display panel 100 includes an active area AA for displaying an input image. A pixel array is arranged in the active area AA. The pixel array includes a plurality of data lines 102, a plurality of gate lines 104 intersecting the data lines 102, and pixels arranged in a matrix.

Each of the pixels may be divided into a red subpixel, a green subpixel, and a blue subpixel for color implementation. Each of the pixels may further include a white subpixel. Each of the subpixels 101 includes a pixel circuit as shown in Figs. The present invention applies a gate signal to a first gate line connected to a subpixel and at the same time applies a reverse phase signal to a gate signal to a second gate line connected to a subpixel simultaneously with a gate signal to generate a kickback voltage . This will be described in detail with reference to FIGS. 3 to 7. FIG.

Touch sensors may be disposed on the display panel 100. The touch input may be sensed using separate touch sensors or may be sensed through pixels. The touch sensors may be implemented as in-cell type touch sensors disposed on the screen of a display panel or embedded in a pixel array as an on-cell type or an add-on type .

The display panel drive circuits 110, 112, and 120 include a data driver 110 and a gate driver 120. A demultiplexer 112 disposed between the data driver 110 and the data lines 102 may be disposed.

The display panel driving circuits 110, 112 and 120 write data of the input image to the pixels of the display panel 100 under the control of a timing controller (TCON) 130 during a display driving period, Display the image. The display panel driving circuit may further include a touch sensor driving unit for driving the touch sensors. The touch sensor driving unit is omitted in Fig. In a mobile device or a wearable device, the display panel driving circuit, the timing controller 130, and the power supply circuit can be integrated into one integrated circuit.

2, the data driver 110 converts digital data of an input image received from the timing controller 130 every frame period using a digital-to-analog converter (DAC) And outputs the data voltage. The data voltage is applied to the pixels through the demultiplexer 112 and the data line 102. The demultiplexer 112 is disposed between the data driver 110 and the data lines 102 using a plurality of switch elements and distributes the data voltages output from the data driver 110 to the data lines 102. The number of data lines 102 can be reduced because one channel of the data driver 110 is time-division-connected to the plurality of data lines by the demultiplexer 112.

The gate driver 120 may be implemented as a gate in panel (GIP) circuit formed directly on the bezel region on the display panel 100 together with the transistor array of the active region. The gate driver 120 outputs a gate signal to the gate lines 104 under the control of the timing controller 130. The gate driver 120 may sequentially shift the gate signals to the gate lines 104 by shifting the gate signals using a shift register. The gate signal includes the scan signal SCAN and the sense signal SENSE. The scan signal SCAN selects pixels to which the data voltage is applied in synchronization with the data voltage. The sensing signal SENSE is synchronized with the scan signal SCAN. The sensing signal SECSE selects pixels whose electrical characteristics of the driving elements DT formed on the pixels in the external compensation method are sensed. The electrical characteristics of the driving device include the mobility () and the threshold voltage (Vth).

The scan signal SCAN and the sense signal SENSE may be generated as in the example of FIG. 5, but are not limited thereto. In the example of FIG. 5, the sensing signal SENSE is generated at the gate-on voltage VGH before the scan signal SCAN and is inverted to the gate-off voltage VGL at the same time as the scan signal SCAN.

The external compensation method can sense the threshold voltage (Vth) or the mobility (μ) of the driving element by connecting the pixel circuit to the sensing line (103) using the sensing signal (SENSE). Sensing methods are divided between before shipment and after shipment. After the threshold voltage of the driving element DT is sensed in each of the subpixels through the sensing path connected to the pixels before shipment of the product, the threshold voltage deviation is compensated in all the subpixels based on the sensing result. Then, the mobility of the driving device DT is sensed in each of the subpixels to compensate for the mobility deviation.

The post-shipment sensing method is executed in a power ON sequence, a vertical blank (VB), and a power off sequence (Power OFF sequence). In the power-off sequence, the display panel driving circuit and sensing path are further driven for a predetermined delay time after receiving the power-off signal to sense the threshold voltage (Vth) of the driving element in each of the subpixels.

The timing controller 130 receives digital video data (DATA) of an input video from a host system (not shown) and a timing signal synchronized with the digital video data (DATA). The timing signal includes a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a clock signal DCLK, and a data enable signal DE. The host system can be any one of a TV (Television) system, a set-top box, a navigation system, a personal computer (PC), a home theater system, a mobile device, and a wearable device.

The timing controller 130 can adjust the frame rate to be higher than the input frame frequency in the normal driving mode. For example, the timing controller 130 multiplies the input frame frequency by i times and outputs the operation timing of the display panel driving units 110, 112, and 120 to the frame frequency x i (i is a positive integer larger than 0) Can be controlled. The frame frequency is 60 Hz in the National Television Standards Committee (NTSC) system and 50 Hz in the PAL (Phase-Alternating Line) system. The timing controller 130 can lower the frame frequency to a frequency between 1 Hz and 30 Hz in a low power consumption driving mode.

The timing controller 130 controls the operation timing of the demultiplexer 112 and the data timing control signal for controlling the operation timing of the data driver 110 based on the timing signals Vsync, Hsync and DE received from the host system A switching element control signal for the sensing path, and a gate timing control signal for controlling the operation timing of the gate driving unit 120 to control the operation timings of the display panel driving circuits 110, 112 and 120. The voltage level of the gate timing control signal output from the timing controller 130 may be converted into a gate-on voltage and a gate-off voltage through a level shifter (not shown) and supplied to the gate driver 120. The level shifter converts the low level voltage of the gate timing control signal to the gate low voltage VGL and converts the high level voltage of the gate timing control signal to the gate high voltage VGH .

The sensing path includes a sensing line 103, an analog to digital converter (ADC), and first and second switch elements M1 and M2 as shown in FIG. 2 can do. The sensing path can sense the source voltage of the driving device DT and sense the electrical characteristics of the driving device. The first switch element M1 supplies a predetermined reference voltage Vref to the sensing line 103 to initialize the source voltage of the driving element DT to the reference voltage Vref. The second switch element M2 is turned on after the first switch element M1 is turned off and supplies the source voltage of the drive element DT to the ADC. The ADC converts the analog sensing voltage into digital sensing data and transmits it to the compensation unit 131. The source voltage of the driving device DT may indicate the threshold voltage or mobility of the driving device DT according to the sensing method. A well-known sensing method can be used for sensing the threshold voltage of the driving element DT through the sensing path or sensing the mobility of the driving element DT through the sensing path. The ADC may be integrated with an integrated circuit (IC) of the data driver 110 together with the DAC.

The compensation unit 131 stores compensation values for compensating the threshold voltage Vth and the mobility μ of the driving device in each of the sub-pixels. The compensation unit 131 selects a preset compensation value according to the digital sensing data received through the ADC and compensates the pixel data by adding or multiplying the compensation value to or from the pixel data (digital data) of the input image. The compensated pixel data is transferred to the data driver 110, converted into a data voltage Vdata by the DAC of the data driver 110, and supplied to the data line 102. The driving element DT of the pixel circuit is driven by the data voltage Vdata supplied through the data line 102 to generate a current. The current flowing through the driving element DT to the OLED which is the light emitting element is determined according to the gate-source voltage Vgs of the driving element DT. The compensation unit 131 may be implemented as an operation circuit in the timing controller 130.

3 is a circuit diagram showing a pixel circuit according to the first embodiment of the present invention. 4 is a detailed view showing the planar structure of the pixel circuit shown in FIG. In FIG. 4, "R", "W", "B" and "G" are the colors of the subpixels 101. And D1 to D4 are data voltages applied to the data lines 102. [

3 and 4, the pixel circuit includes an OLED, a driving element DT connected to the OLED, a plurality of switching elements S1 and S2, and a plurality of capacitors Cst and CB1. The driving element DT and the switching elements S1 and S2 are illustrated as an n-type transistor in FIG. 3, but are not limited thereto.

The OLED includes an organic compound layer formed between the anode and the cathode. The organic compound layer may include, but not limited to, a hole injection layer (HIL), a hole transport layer (HTL), a light emitting layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). The anode of the OLED is connected to the driving element DT through the second node n2 and the cathode of the OLED is connected to the VSS electrode to which the low potential power supply voltage VSS is applied.

The driving device DT drives the OLED by adjusting the current of the OLED according to the gate-source voltage Vgs. The driving element DT has a gate connected to the first node n1, a first electrode (or drain) connected to the VDD line 105 to which the pixel driving voltage VDD is supplied, and a second electrode connected to the OLED (Or source) connected to the anode of the second transistor. The first capacitor Cst is connected between the gate and the source of the driving element DT through the first and second nodes n1 and n2.

The first switch element S1 is turned on according to the scan signal SCAN to supply the data voltage Vdata to the gate of the driving element DT connected to the first node n1. The first switch element S1 includes a gate connected to the first gate line 1041 to which the scan signal SCAN is applied, a first electrode connected to the data line 102, and a second electrode connected to the first node n1. .

The second switch element S2 is turned on according to the sensing signal SENSE to supply the reference voltage Vref to the second node n2. The voltage difference between the reference voltage Vref and the low-potential power supply voltage VSS is lower than the threshold voltage of the OLED. Therefore, when the reference voltage Vref is applied to the anode of the OLED, the OLED does not emit light because no current flows through the OLED. The second switch element S2 includes a gate connected to the second gate line 1042 to which the sensing signal SENSE is applied, a first electrode connected to the sensing line 103 to which the reference voltage Vref is applied, and a second electrode connected to the second electrode n2.

The second capacitor CB1 is formed between the third gate line 1043 to which the anti-phase signal SCANB is applied and the first node n1 connected to the gate of the driving device DT. The gate of the driving element DT is coupled with the third gate line 1043 through the second capacitor CB1 to which the anti-phase signal SCANB is applied. Therefore, the second capacitor CB1 applies a reverse phase signal SCANB generated in the opposite phase of the scan signal SCAN to the gate of the driving device DT, thereby generating a kickback signal, which is generated when the voltage of the scan signal SCAN changes. thereby suppressing kick back. The capacitance of the second capacitor CB1 can be adjusted by the wiring width of the third gate line 1043. As shown in FIG. 4, the capacitance of the second capacitor CB1 can be appropriately increased by widening the wiring width of the third gate line 1043 to which the anti-phase signal SCANB is applied.

In the case of a pixel circuit to which the external compensation method is not applied, the sensing signal SENSE and the second switching device S2 can be removed from the pixel circuit.

The gate voltage Vg of the driving element DT coupled to the gate-source parasitic capacitance of the first switch element S1 is higher than the gate voltage VGH of the scan signal SCAN from the gate- VGL) due to a kick back generated when the voltage is changed to VGL (see FIG. 5).

The gate driver 120 supplies the third gate line 1043 with the inverted phase signal SCANB inverted to the opposite phase of the scan signal SCAN together with the scan signal SCAN under the control of the timing controller 130. [ The inverse phase signal SCANB is sequentially supplied to the third gate lines 1043 of the display panel 100 in synchronization with the scan signal SCAN. The kickback voltage generated at the polling edge of the scan signal SCAN lowers the gate voltage of the driving device DT while the reverse phase signal SCANB simultaneously increases the gate voltage of the driving device DT, Lt; / RTI > Accordingly, the second capacitor CB1 to which the anti-phase signal SCANB is applied suppresses the kickback that occurs when the voltage of the scan signal SCAN changes at the gate voltage of the driving device DT. In FIG. 5, Vg1 is the gate voltage of the driving device DT whose voltage drops at the falling edge of the scan signal SCAN due to the kickback effect when there is no reverse phase signal SCANB. Vg1 'is the gate voltage of the driving device DT in which the voltage does not drop at the falling edge of the scan signal SCAN by suppressing the kickback using the reverse phase signal SCANB.

The third gate line 1043 is separated from the driving element DT and the switch elements S1 and S2. The voltage of the third gate line 1043 is inverted to the gate-off voltage VGL only for a time shorter than one horizontal period in which the pulse of the scan signal SCAN is generated in one frame period, and the gate- ≪ / RTI > Since the second capacitor CB1 maintains the DC voltage except for a short time during which the scan signal SCAN is generated, the second capacitor CB1 does not affect the gate-source voltage Vgs of the driving device during the emission period of the subpixels 101 Do not.

In the example of FIG. 5, the driving method of the sub-pixel 101 includes the initializing period Tini, the data writing period Twr, and the light emitting period Tem.

During the initialization period Tini, the sensing signal SENSE is generated at the gate-on voltage VGH and the scan signal SCAN is maintained at the gate-off voltage VGL. The second switch element S2 is turned on according to the sensing signal SENSE during the initialization period Tini to initialize the voltages of the first and second nodes n1 and n2 with the reference voltage Vref.

The data writing period Twr writes the pixel data of the image in the pixel circuit initialized in the initialization period Tini to the subpixel 101. During the data writing period Twr, the scan signal SCAN and the sensing signal SENSE are generated at the gate-on voltage VGH. The first switch element S1 is turned on according to the scan signal SCAN synchronized with the data voltage Vdata during the data write period Twr to connect the data line 102 to the first node n1. At this time, the gate-source voltage Vgs of the driving element DT is set in accordance with the data voltage Vgs, and this voltage is charged in the first capacitor Cst.

The light emitting element of the sub pixel 101 in which the pixel data is written in the data writing period Twr during the light emission period Tem is emitted with the luminance corresponding to the gray level of the data. During the light emission period Tem, the scan signal SCAN and the sense signal SENSE are inverted to the gate-off voltage VGL so that the switch elements S1 and S2 are turned off. The first switch element S1 is turned on according to the scan signal SCAN synchronized with the data voltage Vdata during the data write period Twr to connect the data line 102 to the first node n1. At this time, the gate-source voltage Vgs of the driving element DT is set in accordance with the data voltage Vgs, and this voltage is charged in the first capacitor Cst.

6 is a circuit diagram showing a pixel circuit according to a second embodiment of the present invention. 7 is a detailed view showing a planar structure of the pixel circuit shown in FIG. In the embodiment shown in Figs. 6 and 7, the same reference numerals are given to the same components substantially as those of the first embodiment, and a detailed description thereof will be omitted.

6 and 7, the pixel circuit includes an OLED, a driving element DT connected to the OLED, a plurality of switching elements S1 and S2, and a plurality of capacitors Cst, CB1 and CB2. The driving element DT and the switching elements S1, S2, and S3 are illustrated as n-type transistors in FIG. 3, but are not limited thereto.

The third capacitor CB2 is formed between the third gate line 1043 to which the anti-phase signal SCANB is applied and the first node n1 connected to the source of the driving device DT. The source of the driving element DT is coupled to the third gate line 1043 through the third capacitor CB2 to which the anti-phase signal SCANB is applied. Therefore, the third capacitor CB2 applies a reverse phase signal SCANB to the source of the driving device DT to suppress a kick back that occurs when the voltage of the scan signal SCAN changes. The capacitance of the third capacitor CB2 can be adjusted by the wiring width of the third gate line 1043. [ As shown in FIG. 7, the capacitance of the third capacitor CB2 can be appropriately increased by widening the wiring width of the third gate line 1043 to which the reverse phase signal SCANB is applied.

The source voltage Vs of the driving element DT coupled to the gate-to-source parasitic capacitance of the second switching element S2 changes from the gate-on voltage VGH to the gate-off voltage VGL 5 due to the kickback that occurs when it changes.

The kickback voltage generated at the polling edge of the sensing signal SENSE lowers the source voltage Vs of the driving element DT while the opposite phase signal SCANB simultaneously lowers the source voltage Vs of the driving element DT So that the kickback of the source voltage Vs is canceled. Therefore, the third capacitor CB2 to which the anti-phase signal SCANB is applied suppresses the kickback that occurs when the voltage of the scan signal SCAN changes at the source voltage of the driving device DT. In Fig. 5, Vs1 is the source voltage of the driving element DT whose voltage drops at the falling edge of the sensing signal SENSE due to the kickback effect when there is no reverse phase signal SCANB. Vs1 'is the source voltage of the driving element DT in which the voltage does not drop at the falling edge of the sensing signal SCAN by suppressing the kickback using the anti-phase signal SCANB.

The luminance difference of the pixels may be displayed on the screen due to the kickback voltage. For example, since the amount of delay of the gate signal differs depending on the position between the gate driver 120 and the pixels, B) and the peripheral portion (A). In FIG. 8A, a solid line is a gate signal applied to a sub-pixel close to the gate driver 120, and a dotted line indicates a gate signal having a large delay amount far from the gate driver 120. The amount of delay of the gate signal increases with the RC delay value due to the resistance R and the parasitic capacitance C of the gate line. In the case of the gate signal of the rectangular wave form as shown in FIG. 8A, since the data voltage charge amount deviation between the subpixels is caused by the hatched portion in the falling edge of the gate signal, A difference in luminance occurs between them.

In order to reduce the luminance difference, as shown in FIG. 8B, when the gate-on voltage VGH is modulated to the intermediate voltage Vm at the rising edge and the falling edge of the gate signal to reduce the voltage difference of the gate signal, It is possible to improve the luminance difference according to the position of the screen by reducing the difference.

The present invention minimizes the kickback voltage which adversely affects the driving device DT by adding a capacitor to the subpixels and applying an anti-phase signal through the capacitor as described above. As a result, according to the present invention, the gate signal is not modulated as shown in FIG. 8B but the luminance of pixels in the entire screen can be made uniform even though the gate signal as shown in FIG. 8A is applied. The voltage of the gate signal shown in Fig. 8 continuously changes between the gate-on voltage VGH and the gate-off voltage VGL on the rising edge and the polling edge without the gate-on voltage (VGH) modulation.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

100: display panel 110: data driver
120: Gate driver 130: Timing controller
131: compensating part DT: driving element of the pixel circuit
S1, S2: Switch element of the pixel circuit SCAN, SENSE: Gate signal
SCANB: Inverse phase signal Cst, CB1, CB2: Capacitor

Claims (8)

A display panel in which data lines and gate lines are crossed and a plurality of sub-pixels are arranged;
A data driver for supplying a data signal to the data lines; And
And a gate driver for supplying a first gate signal to the first gate line and supplying an opposite phase signal to the first gate signal to the second gate line,
Each of the sub-
A driving element for driving the light emitting element;
A first switch element that is turned on according to the first gate signal and supplies the data signal to a gate of the driving element;
A first capacitor for charging a gate-source voltage of the driving element; And
And a second capacitor connected between the second gate line and the gate of the driving device and applying the opposite phase signal to the gate of the driving device. The method according to claim 1,
And a width of the second gate line is wider than that of the second capacitor. 3. The method of claim 2,
Wherein the gate driver comprises:
Supplying a second gate signal to the third gate line,
Each of the sub-
A second switch element which is turned on according to the second gate signal and connects the driving element to the sensing line; And
And a third capacitor coupled between the second gate line and a source of the driving device to apply the anti-phase signal to a source of the driving device. The method of claim 3,
And a width of the second gate line is wider than that of the third capacitor. The method of claim 3,
The second gate signal
On voltage is generated before the first gate signal and is inverted to a gate-off voltage simultaneously with the first gate signal. A display panel in which data lines and gate lines are crossed and a plurality of sub-pixels are arranged;
A data driver for supplying a data signal to the data lines; And
And a gate driver for supplying a first gate signal to the first gate line, supplying a second gate signal to the second gate line, and supplying a reverse phase signal to the third gate line,
Each of the sub-
A driving element for driving the light emitting element;
A first switch element that is turned on according to the first gate signal and supplies the data signal to a gate of the driving element;
A second switch element which is turned on according to the second gate signal and connects the driving element to the sensing line;
A first capacitor for charging a gate-source voltage of the driving element;
A second capacitor connected between the third gate line and the gate of the driving device to apply the opposite phase signal to the gate of the driving device; And
And a third capacitor connected between the second gate line and the source of the driving device to apply the anti-phase signal to the source of the driving device. The method according to claim 6,
Wherein a width of the second gate line is larger than that of the second and third capacitors. A method of driving an electroluminescent display device having a display panel in which data lines and gate lines are crossed and a plurality of sub-pixels are arranged,
Applying a gate signal to a first gate line coupled to the subpixel; And
And applying a reverse phase signal to the gate signal to a second gate line connected to the subpixel simultaneously with the gate signal to suppress a kickback voltage of the subpixel.

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