KR20080070221A - Liquid crystal display and method for driving the same - Google Patents

Abstract

An LCD device and a driving method thereof are provided to reduce flicker and image sticking by compensating for gamma voltages based on kickback voltages. An LCD(Liquid Crystal Display) device includes an LCD panel(110), a gamma voltage generator(245), a data driver(210), and a gamma voltage compensator(250). The LCD panel includes liquid crystal cells in matrix at areas where plural data and gate lines cross each other. The gamma voltage generator generates plural gamma voltages having different voltage levels according to digital pixel data inputted to the LCD panel. The data driver supplies plural gamma voltages from the gamma voltage generator to data lines of the LCD panel. The gamma voltage compensator measures kickback voltages on the liquid crystal cells of the LCD panel for every block and compensates for the gamma voltages based on the kickback voltages.

Description

Liquid crystal display and its driving method {LIQUID CRYSTAL DISPLAY AND METHOD FOR DRIVING THE SAME}

1 is an equivalent circuit diagram of a unit pixel of a general liquid crystal display.

2 is a waveform diagram showing a kickback voltage.

3 is a diagram illustrating a kickback voltage differently displayed at each position of a general liquid crystal display.

4 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

5 is a diagram illustrating in detail a signal connection between a data driver and a gamma voltage compensator in a liquid crystal display according to an exemplary embodiment of the present invention.

6 is a circuit diagram illustrating in detail a gamma voltage generator of a liquid crystal display according to an exemplary embodiment of the present invention.

7 is a circuit diagram illustrating in detail a gamma voltage compensator of a liquid crystal display according to an exemplary embodiment of the present invention.

8 illustrates an example of a screen classifying a liquid crystal display according to an exemplary embodiment of the present invention in block units.

9 is a graph illustrating a result of measuring a kickback voltage and a gamma voltage applied to the A block of FIG. 8.

FIG. 10 is a graph illustrating a result of measuring a compensation gamma voltage applied to block A of FIG. 8 after compensation.

11 is a flowchart illustrating a driving method of a liquid crystal display according to an exemplary embodiment of the present invention.

(Explanation of symbols for the main parts of the drawing)

110, 810: liquid crystal panel 210, 820: data driver

SIC_1 to SIC_8: data driver chips

820a through 820f: data driver chips

220: gate driver 230: timing controller

240: driving voltage generator 241: gate voltage generator

243: common voltage generator 245: gamma voltage generator

245a: positive gamma part 245b: negative gamma part

245c: buffer unit 250: gamma voltage compensation unit

252: kickback voltage measuring instrument for each block 254_1 to 254_k: compensator

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a driving method thereof capable of improving image quality.

In general, a liquid crystal display (LCD) displays an image by adjusting the light transmittance of the liquid crystal using an electric field.

The liquid crystal display device for this purpose is composed of a liquid crystal panel in which liquid crystal cells are arranged in a matrix, and a driving circuit for driving the liquid crystal panel. In the liquid crystal panel, an upper substrate and a lower substrate on which the field generating electrodes are formed are disposed to face each other, and a liquid crystal layer for controlling light transmittance is formed between the two substrates.

1 is an equivalent circuit diagram of a unit pixel of a general liquid crystal display.

In a typical liquid crystal display device, as shown in FIG. 1, the gate line GL and the data line DL intersect each other, and the liquid crystal cell Clc is driven at an intersection of the gate line GL and the data line DL. A thin film transistor (TFT) is formed. In addition, the storage capacitor Cst is formed in the liquid crystal display to maintain the voltage of the liquid crystal cell Clc.

In the liquid crystal cell Clc, when a data voltage is applied to the pixel electrode 11 and a common voltage Vcom is applied to the common electrode 12 formed on the upper organic substrate, an array of liquid crystal molecules is applied by an electric field applied to the liquid crystal layer. This changes the amount of light transmitted or blocks the light.

The data voltage is supplied at a gamma voltage that is preset according to the driving voltage characteristics of the liquid crystal cell Clc.

FIG. 2 is a waveform diagram illustrating a kickback voltage and illustrates a scan pulse SCP supplied to a gate line GL and a voltage Vlc charged to a liquid crystal cell.

Referring to FIG. 2, the scan pulse SCP may include a gate high voltage VGH set to a voltage for turning on the thin film transistor TFT, and a turn off of the thin film transistor TFT. Swing between the gate low voltage (VGL) is set to a voltage for (off). During the scanning period in which the scan pulse SCP maintains the gate high voltage VGH, the liquid crystal cell Vlc charges the data voltage Vdata supplied to the gamma voltage and charges the charged voltage to the storage capacitor Cst. It is maintained at the set voltage for a certain time.

As described above, in the method of driving the liquid crystal display device, since the liquid crystal and the display image deteriorate when the voltage of the same polarity is continuously applied to the liquid crystal cell, the liquid crystal display device has an alternating data voltage type Vdata whose polarity is periodically reversed. Drive the liquid crystal cell.

The polarity of the data voltage Vdata is reversed every frame around the common voltage Vcom applied to the common electrode 12.

In this case, since the common voltage Vcom becomes the center potential of the pixel when driving in the pixel unit, the common voltage of the same level should be applied to all the pixels regardless of the position of the liquid crystal panel 10 of FIG. .

However, when the common voltage Vcom is input to only one side of the liquid crystal panel 10 as shown in FIG. 3, the parasitic capacitance existing between the electrode terminal and the liquid crystal cell electrode of each thin film transistor TFT Due to Cgd, a kickback voltage ΔVp is generated in which the data voltage Vdata applied to the pixel electrode is distorted.

The kickback voltage ΔVp acts as a major factor that hinders the image quality of the liquid crystal display. The back-back voltage ΔVp is defined by Equation 1 below.

As shown in FIG. 1, Cgd is formed between the gate terminal of the thin film transistor TFT connected to the gate line GL and the drain terminal of the thin film transistor TFT connected to the pixel electrode 11 of the liquid crystal cell. Parasitic capacitance (Von-Voff) is the difference voltage between the gate high voltage (Vgh) and the gate low voltage (Vgl) of the scan pulse (SCP), Von corresponds to the gate high voltage (Vgh), Voff is the gate low Corresponds to the voltage Vgl.

Referring to FIG. 3, since the liquid crystal cells are connected in parallel between the data line and the common electrode, the capacitance values of the liquid crystal cells far from the data driving circuit 20 are smaller than those of the liquid crystal cells close to the data driving circuit 20. Therefore, the kickback voltage Vk increases as it goes down. In addition, since the Von applied to the thin film transistor far from the gate driving circuit 30 is delayed due to the RC delay, the capacitance value of the liquid crystal cells far from the gate driving circuit 30 is delayed. This is relatively small. Accordingly, the kickback voltage Vk increases toward the left side of the liquid crystal panel 10.

Therefore, the kickback voltages Vk all appear differently according to the positions of the liquid crystal panel 10.

Due to the kickback voltage Vk, the image quality of the liquid crystal panel 10 is not uniform as a whole, and the data voltage Vdata applied to the pixel electrode of the liquid crystal cell is substantially changed, thereby causing flicker and image sticking in the display image. There is a problem that appears.

Accordingly, an aspect of the present invention is to provide a liquid crystal display device and a method of driving the same, which improve image quality by compensating data voltages according to different kickback voltages according to positions of liquid crystal panels.

Other technical problems to be achieved by the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned above are clearly understood by those skilled in the art from the following description. Could be.

According to an aspect of the present invention, there is provided a liquid crystal display device including: a liquid crystal panel in which liquid crystal cells are arranged in a matrix at a portion where a plurality of data lines and gate lines cross each other, and digital pixel data input to the liquid crystal panel. A gamma voltage generator for generating a plurality of gamma voltages having different voltage levels, a data driver for supplying a plurality of gamma voltages output from the gamma voltage generator to data lines of the liquid crystal panel, and the liquid crystal And a gamma voltage compensator for measuring kickback voltages of the liquid crystal cells of the panel for each block and compensating the gamma voltage supplied for each block based on the kickback voltage.

Here, the data driver is characterized by consisting of a plurality of data driver chips.

The block may be classified such that one data driver chip is included in one block based on an area in which the plurality of data driver chips are located.

The gamma voltage compensator includes a kickback voltage meter for each block measuring the kickback voltage for each block of the liquid crystal panel, and a compensator for compensating and outputting the gamma voltage supplied for each block by the kickback voltage corresponding to each block. .

The compensator is characterized in that using an adder.

The gamma voltage compensator may further include a comparator for comparing whether the kickback voltage is out of a set allowable range.

The gamma voltage generator includes a divided resistor connected in series between a power supply voltage and a ground voltage to generate a plurality of gamma voltages, and a buffer for outputting a plurality of gamma voltages generated through the divided resistors in a predetermined order. Include.

It may further include a control signal generator for generating a control signal indicating the size of the block.

The control signal includes a block horizontal control signal indicating a horizontal length of the block and a block vertical control signal indicating a vertical length of the block.

The gamma voltage compensator is disposed between the gamma voltage generator and the plurality of data drivers.

According to an exemplary embodiment of the present invention, a method of driving a liquid crystal display includes setting blocks based on an area in which a plurality of data driver chips are positioned in a liquid crystal panel, measuring kickback voltages of liquid crystal cells included in the blocks, and Compensating the gamma voltage supplied for each block through a plurality of data driver chips based on the kickback voltage, and supplying the compensated gamma voltage to the plurality of data driver chips.

Specific details of other embodiments are included in the detailed description and the drawings. Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. Like reference numerals refer to like elements throughout.

Hereinafter, a liquid crystal display and a driving method thereof according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

4 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

In the liquid crystal display according to the exemplary embodiment of the present invention, the liquid crystal panel 110, the data driver 210, the gator driver 220, the timing controller 230, the driving voltage generator 240, and the gamma voltage compensator 250 are provided. It includes.

In the liquid crystal panel 110, the gate lines GL1 to GLn in the horizontal direction and the data lines DL1 to DLm in the vertical direction are arranged in a matrix, and the gate lines GL1 to GLn and the data lines intersected with each other. It consists of a plurality of pixels separated by (DL1 to DLm). A thin film transistor TFT having a gate electrode, an active layer, a source electrode, and a drain electrode is disposed at the intersection of the gate lines GL1 to GLn and the data lines DL1 to DLm.

Each pixel is filled with a liquid crystal material equivalent to the liquid crystal cell Clc, and a storage capacitor Cst is formed to maintain a constant voltage charged in the liquid crystal cell Clc.

The liquid crystal panel 110 displays an image in each pixel according to a scan signal supplied through the gate lines GL1 through GLn and a data voltage supplied through the data lines DL1 through DLm. The scan signal is a pulse signal in which the gate high voltage VGH supplied only for one horizontal time and the gate low voltage VGL supplied for the remaining time are alternated.

The thin film transistor TFT is turned on when the gate high voltage VGH is supplied from the gate lines GL1 to GLn, so that the data voltage applied from the data lines DL1 to DLm is applied to the liquid crystal cell Clc. Supply.

The liquid crystal cell Clc is formed between the pixel electrode to which the data voltage is supplied from the data lines DL1 to DLm and the common electrode to which the common voltage is applied.

Accordingly, when the thin film transistor TFT of each pixel is turned on and a data voltage is applied to the pixel electrode, the liquid crystal display device displays an image while charging the difference voltage between the data voltage and the common voltage in the liquid crystal cell Clc. Will be.

On the contrary, when the gate low voltage VGL is supplied from the gate lines GL1 to GLn, the thin film transistor TFT is turned off while the data voltage charged in the liquid crystal cell Clc is applied to the storage capacitor Cst. By doing so, it is maintained for one frame period.

As described above, the liquid crystal panel 110 repeats the above operation according to the scan signal supplied through the gate lines GL1 to GLn.

The timing controller 230 rearranges the digital pixel data R, G, and B data of red (R), green (G), and blue (B) input from the outside to supply the data driver 210 to the data driver 210. The gate control signal GCS and the data driver 230 are driven to control the driving timing of the gate driver 220 using the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the clock CLK, and the like. A data control signal DCS for controlling timing is generated.

The gate control signal GCS includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable (GOE) signal, and the like. The data control signal DCS includes a source start pulse (SSP), a source shift clock (SSC), a source output enable (SOE), and a polarity signal (POL). ), And the like.

In addition, the timing controller 230 generates control signals (BHCS and BVCS of FIG. 7) for controlling the gamma voltage compensator 250.

The gate driver 220 supplies a scan signal sequentially shifted to the gate lines GL1 to GLn according to the gate control signal GCS supplied from the timing controller 230.

The data driver 210 stores red, green, and blue digital pixel data R, G, and B data input from the timing controller 230 in response to the data control signal DCS supplied from the timing controller 230. The voltage is converted into voltage and supplied to the data lines DL1 to DLm.

In this case, the digital pixel data R, G, and B DATA are digital signals representing gradations, and are generally set to have a value between 0 and 255.

The data voltage is a gamma voltage selected from the gamma voltages Vgma generated by the gamma voltage generator 245 to be described below corresponding to the digital pixel data R, G, and B DATA input from the outside.

The gate driver 220 and the data driver 210 are typically formed of a plurality of driver chips and mounted on a tape carrier package (TCP) or a chip-on film (COF). It is provided in the form.

In particular, as illustrated in FIG. 5, the data driver 210 may include a plurality of data driver chips SIC_1 to SIC_8, and the plurality of data driver chips SIC_1 to SIC_k may be mounted on the TCP 212. .

In addition, the plurality of data driver chips SIC_1 to SIC_8 may be mounted on a COF (not shown).

Referring again to FIG. 4, the driving voltage generator 240 includes a gate voltage generator 241, a common voltage generator 243, and a gamma voltage generator 245 required for driving the liquid crystal panel 110. .

The driving voltage generator 240 may include gate voltages VGH and VGL, a common voltage Vcom to be provided to the common electrode for driving the pixel of the liquid crystal panel 110, and digital pixel data R, G and B DATA. ) Produces gamma voltages Vgma having different voltage levels, respectively.

In detail by component, the gate voltage generator 241 generates a gate high voltage VGH and a gate low voltage VGL for turning on and off the thin film transistor TFT of the liquid crystal panel 110. Supply to the driving unit 220.

The common voltage generator 243 generates and outputs a common voltage Vcom serving as the center potential of the pixel driving. The common voltage Vcom is applied at the same level to all pixels regardless of the position of the liquid crystal panel 110.

For example, the common voltage Vcom may be applied at one upper side or both upper sides of the liquid crystal panel 110 near the data driver 210, and vice versa at the lower one side or at both lower sides thereof, and simultaneously at both the upper and lower sides. May be authorized.

The gamma voltage generator 245 is configured to provide a gamma voltage Vgma necessary for converting the digital pixel data R, G, and B data to be provided from the data driver 210 to the liquid crystal panel 110 into an analog signal. In this case, a gamma voltage Vgma necessary for digital / analog conversion of the data driver 210 is generated for each gray level within the gray scale range and output. The output gamma voltage Vgma is supplied through the data driver chips of the data driver 210 (SIC_1 to SIC_8 of FIG. 5).

6 is a circuit diagram illustrating in detail a gamma voltage generator of a liquid crystal display according to an exemplary embodiment of the present invention.

The gamma voltage generator 245 includes a positive gamma part 245a, a negative gamma part 245b, and a buffer part 245c connected in parallel between the power supply voltage terminal VDD and the base voltage terminal VSS. do.

The positive gamma part 245a and the negative gamma part 245b include a plurality of positive resistance groups RP1 to RPk or a plurality of negative polarities connected in series between the power supply voltage terminal VDD and the base voltage terminal VSS. Resistance groups RN1 to RNk.

In this configuration, in the positive gamma part 245a and the negative gamma part 245b, the power supply voltage VDD is divided by the resistances of the positive resistance groups RP1 to RPk or the negative resistance groups RN1 to RNk. k positive gamma voltages VP1 to VPk or k negative gamma voltages VN1 to VNk, respectively.

Accordingly, gamma voltages having a low potential difference based on the common voltage Vcom correspond to gray (gradation) close to white, and gamma voltages having a high potential based on the common voltage Vcom correspond to black. It is close to gray (gradation).

The buffer unit 52c outputs the positive gamma voltages VP1 to VPk and the negative gamma voltages VN1 to VNk generated in the positive gamma part 245a and the negative gamma part 245b in a predetermined order. do. The buffer unit 245c serves to suppress output variations of the output gamma voltages Vgma_1 to Vgma_k.

Referring back to FIG. 4, the gamma voltage compensator 250 measures kickback voltages of the liquid crystal cells Clc of the liquid crystal panel 110 for each block, and compensates the gamma voltages supplied for each block, thereby providing a common voltage. As a reference, the difference voltage between the gamma voltage and the common voltage is kept constant.

The gamma voltage compensator 250 may include a measuring device for measuring the kickback voltage and a compensator for compensating the gamma voltage. In addition, a comparator may be configured to compare and determine whether the kickback voltage is outside of a predetermined tolerance range.

If a comparator is additionally configured, compensation can be made only if the kickback voltage measured per block is outside the acceptable range.

It demonstrates in detail below.

7 is a circuit diagram illustrating in detail a gamma voltage compensator of a liquid crystal display according to an exemplary embodiment of the present invention.

As shown, the gamma voltage compensator 250 includes a kickback voltage measurer 252 for each block, compensators 254_1 to 254_k, and resistors R1, R2, and R3.

The kickback voltage measuring unit 252 for each block receives the control signals BHCS and BVCS indicating the size of each block of the liquid crystal panel from the outside, and measures the kickback voltage ΔVp for the liquid crystal cells included in each block. do.

Here, the block is classified such that only one data driver chip is included in one block based on the region where the data driver chips (SIC_1 to SIC_8 of FIG. 5) of the data driver 210 (FIG. 5) are located.

In more detail, a group of data lines connected to one data driver chip is classified to be included in one block.

In addition, one block may include a data line connected through another data driver chip. In this case, information such as which data driver chip is connected to each data line must be stored in advance.

As described above, the reason for classifying blocks in units of data driver chips is that gamma voltages supplied to the data drivers are applied in units of data driver chips as shown in FIG. 5, and thus gamma compensated based on kickback voltages for each block for control convenience. This is to control voltage by data driver chip.

The control signals BHCS and BVCS indicating the size of each block include the block horizontal control signal BHCS indicating the horizontal length of the block and the block vertical control signal BVCS indicating the vertical length of the block.

The control signals BHCS and BVCS may be applied from the timing controller 230 as described above, or may include a control signal generator (not shown) for generating the control signals BHCS and BVCS. .

A plurality of compensators 254_1 to 254_k are provided for each block, and each compensator 254_1 to 254_k includes kickback voltages V1 to Vk and gamma voltages output from the kickback voltage measuring units 252 for each block at two input terminals. The gamma voltages Vgma_1 to Vgma_k outputted from the unit are continuously received.

A third resistor R3 is connected to ground at an input terminal receiving the gamma voltages Vgma_1 to Vgma_k, and a first resistor R1 connected to an output terminal at an input terminal receiving the kickback voltages V1 to Vk. ) Is connected, and the second resistor R2 is connected in series to the output terminal.

Accordingly, the compensators 254_1 to 254_k add the kickback voltages V1 to Vk received from the kickback voltage measuring unit 252 for each block and the gamma voltages Vgma_1 to Vgma_k received from the gamma voltage generator, and thus the kickback voltages V1 to Vgma_k. Compensated gamma voltages Vgma'_1 to Vgma'_k respectively compensated for Vk) are output.

In this case, the gamma voltage compensator 250 may further include a comparator (not shown) for comparing whether the kickback voltages V1 to Vk are outside a preset allowable range.

In this case, the gamma voltage compensator 250 applies the gamma voltages Vgma_1 to Vgma_k applied for each block when the kickback voltages V1 to Vk measured from the block-by-block kickback voltage measuring unit 252 fall within a preset allowable range. The controller may be supplied to the data driver without compensation and may be driven to supply the compensated gamma voltages Vgma'_1 to Vgma'_k that are compensated through the compensators 254_1 to 254_k when the deviation is within the preset allowable range.

FIG. 8 is a diagram illustrating a screen classifying a liquid crystal display according to an exemplary embodiment of the present invention in block units. FIG. 9 is a graph illustrating a result of measuring a kickback voltage and a gamma voltage applied to block A of FIG. 8. 10 is a result of measuring the compensation gamma voltage applied to the A block of FIG. 8 after compensation.

Referring to FIGS. 8 to 10, the liquid crystal panel 810 is classified into A blocks to F blocks as shown in FIG. 8.

The A blocks to F blocks are classified based on the area where the data driver chips 820a to 820f of the data driver 820 are located, so that only one data driver chip is included in one block, and one data driver chip is included. And a plurality of liquid crystal cells formed between the data lines connected to each other and the pixel electrode and the common electrode formed from the data lines.

Although the A blocks to F blocks are illustrated as six for convenience of description, the number of blocks is provided differently according to the data driver chips 820a to 820f provided in the data driver 820.

The kickback voltages of the liquid crystal cells included in the blocks A and F are measured, respectively, and the gamma voltage is compensated for the kickback voltage of each block.

As an example in FIG. 8, only the A block will be described.

FIG. 9 is a graph measuring a gamma voltage applied to an A block. The common voltage Vcom applied to an A block is different from a reference common voltage (reference Vcom) applied to another block by a kickback voltage ΔVp. You can see that it is a level.

That is, the optimum common voltage applied to the A block is as low as the kickback voltage Δ Vp compared to the other blocks.

Therefore, the potential differences Q1 and Q2 between each positive gamma voltage and each negative Vgma do not remain constant around the common voltage Vcom applied to the A block. The potential difference Q2 with the negative gamma voltage (negative Vgma) is greater than the potential difference (Q1) with the positive gamma voltage (positive Vgma).

Accordingly, when the gamma voltages (positive Vgma and negative Vgma) supplied through the data driver chip 820a of the A block are added and compensated by the kickback voltage ΔVp, the negative gamma voltage centering on the common voltage Vcom ( The potential difference (Q1, Q2) between the negative Vgma and the positive gamma voltage (positive Vgma) can be kept constant, so that the flicker level can be equally matched to the entire surface of the liquid crystal panel.

The compensated gamma voltages (positive Vgma ', negative Vgma') are shown in detail in the graph of FIG.

11 is a flowchart illustrating a driving method of a liquid crystal display according to an exemplary embodiment of the present invention.

In the driving method of the liquid crystal display according to the exemplary embodiment of the present invention, first, blocks are set based on an area in which a plurality of data driver chips are located in the liquid crystal panel (S10).

As described above, one data driver chip (D-IC) is included in one block, so that a plurality of data lines connected to one data driver chip and a plurality of liquid crystal cells connected to the data lines are included. To be included.

Thereafter, kickback voltages of the liquid crystal cells included in the blocks are respectively measured (S20).

Thereafter, the gamma voltage supplied for each block through the plurality of data driver chips is compensated based on the kickback voltage (S30).

The compensation step adds the gamma voltage by the kickback voltage so that the difference voltage between the common voltage and the gamma voltage applied to the liquid crystal panel is kept constant.

This compensation step may be performed all over the block, or may be performed depending on whether the kickback voltage measured for each block is out of the allowable range by setting an allowable range of the kickback voltage.

If the compensation step is performed based on the preset allowable range, if the kickback voltage for each block falls within the preset allowable range, the gamma voltage supplied to the corresponding block is output without compensation.

On the contrary, if the kickback voltage for each block is out of a predetermined allowable range, the gamma voltage supplied to the block is compensated for by the kickback voltage and output.

Thereafter, the output compensation gamma voltage is supplied to the data driver chips and applied to the plurality of data lines (S40).

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that.

Therefore, since the embodiments described above are provided to completely inform the scope of the invention to those skilled in the art, it should be understood that they are exemplary in all respects and not limited. The invention is only defined by the scope of the claims.

In the liquid crystal display and the driving method thereof according to the present invention, the liquid crystal cells of the liquid crystal panel are partitioned into blocks having a predetermined size according to data driver chips, thereby compensating gamma voltage according to kickback voltages of the respective blocks. Irrespective of the position of the display panel, there is an effect that the level of flicker is equally matched to the front surface of the liquid crystal panel.

That is, the flicker and the afterimage may be reduced on the front surface of the liquid crystal panel.

Claims (16)

A liquid crystal panel in which liquid crystal cells are arranged in a matrix at a portion where a plurality of data lines and gate lines cross each other; A gamma voltage generator configured to generate a plurality of gamma voltages having different voltage levels according to the digital pixel data input to the liquid crystal panel; A data driver which supplies a plurality of gamma voltages output from the gamma voltage generator to data lines of the liquid crystal panel; And A gamma voltage compensator for measuring kickback voltages of the liquid crystal cells of the liquid crystal panel for each block and compensating the gamma voltage supplied for each block based on the kickback voltage. Liquid crystal display comprising a. The method of claim 1, And the data driver comprises a plurality of data driver chips. The method of claim 2, And the block is classified such that one data driver chip is included in one block based on an area in which the plurality of data driver chips are located. The method of claim 3, The gamma voltage compensator, A kickback voltage measurer for each block measuring the kickback voltage for each block of the liquid crystal panel; Compensator for compensating and outputting the gamma voltage supplied for each block by the kickback voltage corresponding to each block. Liquid crystal display comprising a. The method of claim 4, wherein And the compensator uses an adder. The method according to claim 1 or 4, And the gamma voltage compensator further comprises a comparator for comparing whether the kickback voltage is outside a set allowable range. The method of claim 1, The gamma voltage generator, Voltage divider resistors connected in series between the power supply voltage and the ground voltage to generate a plurality of gamma voltages, and A buffer for outputting a plurality of gamma voltages generated through the voltage divider resistors in a predetermined order. Liquid crystal display comprising a. The method of claim 1, And a control signal generator for generating a control signal indicating the size of the block. The method of claim 8, The control signal is, A block horizontal control signal indicating a horizontal length of the block; And a block vertical control signal indicating a vertical length of the block. The method of claim 1, And the gamma voltage compensator is disposed between the gamma voltage generator and the plurality of data drivers. Setting blocks based on an area in which a plurality of data driver chips are positioned in the liquid crystal panel; Measuring kickback voltages of liquid crystal cells included in the blocks; Compensating for the gamma voltage supplied for each block through the plurality of data driver chips based on the kickback voltage; And Supplying the compensated gamma voltage to the plurality of data driver chips Method of driving a liquid crystal display comprising a. The method of claim 11, The setting of the blocks may include classifying one block to include the one data driver chip. The method of claim 11, Compensating the gamma voltage based on the kickback voltage may include adding the gamma voltage by the kickback voltage to maintain a constant voltage between the common voltage applied to the liquid crystal panel and the gamma voltage. Driving method of liquid crystal display device. The method of claim 11, The compensating of the gamma voltage based on the kickback voltage may be performed on a block-by-block basis. The method of claim 11, Compensating the gamma voltage based on the kickback voltage may be performed according to whether the kickback voltage for each block is out of the set allowable range by setting an allowable range of the kickback voltage. Method of driving. The method of claim 15, When the kickback voltage for each block is out of the set allowable range, the gamma voltage is compensated for by the kickback voltage and output. And outputting the gamma voltage as it is if the kickback voltage for each block is within a set allowable range.

Images