KR102709760B1 - Display device - Google Patents

Abstract

A display device includes a display panel and an input detection unit disposed on the display panel. The input detection unit includes a noise shielding electrode, a first electrode, and a second electrode. The noise shielding electrode is directly disposed on a base surface of the display panel and includes a transparent conductive oxide. The first electrode has a mesh shape. On the base surface, the first electrode and the second electrode overlap the noise shielding electrode.

Description

DISPLAY DEVICE

The present invention relates to a display device, and more specifically, to a display device in which at least a part of an input detection unit is directly disposed on a display panel.

Various display devices are being developed for use in multimedia devices such as televisions, mobile phones, tablet computers, navigation systems, and game consoles. The input devices of the display devices include keyboards and mice. In addition, display devices have recently been equipped with touch panels as input devices.

An object of the present invention is to provide a display device integrated with an input detection unit having improved sensitivity.

A display device according to one embodiment of the present invention includes a display panel and an input detection unit disposed on the display panel. The input detection unit includes a noise shielding electrode, a first electrode, and a second electrode. The noise shielding electrode is directly disposed on a base surface of the display panel and includes a transparent conductive oxide. The first electrode has a mesh shape. On the base surface, the first electrode and the second electrode overlap the noise shielding electrode.

The second electrodes may be provided in plurality. Each of the plurality of second electrodes may be arranged on the inner side of the noise shielding electrode.

The above display panel may include a plurality of light-emitting regions spaced apart from each other on the base surface and a non-light-emitting region arranged between the plurality of light-emitting regions.

The above noise shielding electrode overlaps the plurality of light-emitting regions and the non-light-emitting region, the first electrode overlaps the non-light-emitting region, and may have a plurality of mesh holes corresponding to the plurality of light-emitting regions.

The second electrode overlaps the plurality of light-emitting regions and the non-light-emitting region and may include a transparent conductive oxide.

The above input detection unit may further include a first insulating layer disposed between the noise shielding electrode and the first electrode on a cross-sectional surface, and a second insulating layer disposed between the first electrode and the second electrode and covering the first electrode. The first insulating layer may include an inorganic material, and the second insulating layer may include an organic material.

It may further include an optically transparent adhesive member disposed between the second insulating layer and the second electrode.

The noise shielding electrode may further include a first insulating layer disposed directly on the first electrode. The first electrode may be disposed directly on the first insulating layer.

It may further include an optically transparent adhesive member disposed between the first insulating layer and the second electrode.

In the cross-section, the first electrode can be placed between the noise shielding electrode and the second electrode.

It may further include an anti-reflection unit disposed between the first electrode and the second electrode.

The above anti-reflection unit may include a polarizing film and further include an optically transparent adhesive member disposed between the polarizing film and the first electrode.

The second electrode may be directly disposed on the anti-reflection unit. The device may further include a window unit disposed on the second electrode.

It may further include an optically transparent adhesive material disposed between the second electrode and the window unit.

The above window unit may include a base film and a shade pattern directly disposed on a lower surface of the base film. The second electrode may be directly disposed on a lower surface of the base film.

A display device according to one embodiment of the present invention includes a display panel including a base surface and an input detection unit disposed on the display panel. The input detection unit includes a plurality of first electrodes having a mesh shape directly disposed on the base surface, a dummy electrode directly disposed on the base surface and between the plurality of first electrodes, a plurality of second electrodes disposed with an insulating layer interposed between the plurality of first electrodes and the dummy electrodes in a cross-section and intersecting the first electrodes on the base surface, and an input detection circuit electrically connected to the plurality of first electrodes, the dummy electrodes, and the plurality of second input electrodes, and detecting noise and an external input generated in the dummy electrodes by the display panel.

The display panel may include a plurality of light-emitting regions spaced apart from each other on the base surface and a non-light-emitting region arranged between the plurality of light-emitting regions, and the plurality of first electrodes may overlap the non-light-emitting regions and have a plurality of mesh holes corresponding to the plurality of light-emitting regions.

The plurality of second electrodes overlap the plurality of light-emitting regions and the non-light-emitting region and may include a transparent conductive oxide.

The dummy electrode may overlap the non-luminous region and may have a plurality of dummy mesh holes corresponding to the plurality of luminous regions. The dummy electrode may include the same material as the plurality of first electrodes.

The above input detection circuit may include a signal providing circuit that provides detecting signals to the plurality of first electrodes, a noise detection circuit that detects noise from the dummy electrode, and a coordinate information calculating circuit that calculates coordinate information of the external input based on a noise signal received from the noise detection circuit and sensing signals received from the plurality of second electrodes.

As described above, a noise shielding electrode including a transparent conductive oxide can shield noise between the display panel and the touch electrodes. Accordingly, the touch sensitivity is improved.

The touch sensitivity is improved by arranging the second touch electrode, which provides a detection signal to the touch detection circuit, further from the display panel than the first touch electrode, which receives a detection signal from the touch detection circuit. This is because the second touch electrode is relatively less susceptible to noise interference from the display panel than the first touch electrode.

The intensity of noise affecting the second touch electrode is calculated to compensate for the detection signal, thereby improving touch sensitivity.

FIG. 1a is a perspective view of a display device according to one embodiment of the present invention.
FIG. 1b is a cross-sectional view of a display device according to one embodiment of the present invention.
Figure 2 is a cross-sectional view of a display module according to one embodiment of the present invention.
Figure 3 is a plan view of a display panel according to one embodiment of the present invention.
Figure 4 is an equivalent circuit diagram of a pixel according to one embodiment of the present invention.
FIG. 5 is an enlarged cross-sectional view of a display panel according to one embodiment of the present invention.
FIG. 6a is a cross-sectional view of an input detection unit according to one embodiment of the present invention.
FIG. 6b is a plan view of an input detection unit according to one embodiment of the present invention.
FIG. 7a is a plan view of a first conductive layer of an input detection unit according to one embodiment of the present invention.
FIG. 7b is a plan view of a second conductive layer of an input sensing unit according to one embodiment of the present invention.
FIG. 7c is a plan view of a third conductive layer of an input detection unit according to one embodiment of the present invention.
FIG. 8a is a plan view of a second conductive layer of an input sensing unit according to one embodiment of the present invention.
Figure 8b is an enlarged view of area AA of Figure 8a.
FIG. 8c is a plan view of a third conductive layer of an input sensing unit according to one embodiment of the present invention.
FIGS. 9A to 9C are cross-sectional views of a display device according to one embodiment of the present invention.
FIG. 10A is a cross-sectional view of an input detection unit according to one embodiment of the present invention.
FIG. 10b is a plan view of an input detection unit according to one embodiment of the present invention.
Figure 10c is a cross-sectional view taken along line I-I' of Figure 10a.
FIG. 11a is a cross-sectional view of an input detection unit according to one embodiment of the present invention.
FIG. 11b is a plan view of a first conductive layer of an input sensing unit according to one embodiment of the present invention.
FIG. 11c is a plan view of a second conductive layer of an input detection unit according to one embodiment of the present invention.
Figure 12 is a block diagram of an input detection circuit according to one embodiment of the present invention.
FIGS. 13A to 13C are perspective views of a display device according to one embodiment of the present invention.
FIGS. 14A and 14B are perspective views of a display device according to one embodiment of the present invention.
Figure 15 is a perspective view of a display module according to one embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In this specification, when a component (or region, layer, portion, etc.) is said to be "on", "connected", or "coupled" to another component, it means that it can be directly connected/coupled to the other component, or a third component may be arranged between them.

Identical drawing reference numerals refer to identical components. Also, in the drawings, the thicknesses, proportions, and dimensions of the components are exaggerated for the purpose of effectively explaining the technical contents. "And/or" includes all combinations of one or more that the associated configurations can define.

The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are only used to distinguish one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component. The singular expression includes the plural expression unless the context clearly indicates otherwise.

Additionally, terms such as "below," "lower," "above," and "upper," are used to describe the relationships between components depicted in the drawings. These terms are relative concepts and are described based on the directions indicated in the drawings.

It should be understood that the terms "include" or "have" are intended to specify the presence of a feature, number, step, operation, component, part, or combination thereof described in the specification, but do not exclude in advance the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

Fig. 1a is a perspective view of a display device (DD) according to an embodiment of the present invention. Fig. 1b is a cross-sectional view of a display device (DD) according to an embodiment of the present invention. Fig. 2 is a cross-sectional view of a display module (DM) according to an embodiment of the present invention. Figs. 1b and 2 illustrate cross-sections defined by a second direction axis (DR2) and a third direction axis (DR3).

As illustrated in FIG. 1a, a display surface (IS) on which an image (IM) is displayed is parallel to a plane defined by a first direction axis (DR1) and a second direction axis (DR2). A normal direction of the display surface (IS), i.e., a thickness direction of the display device (DD), is indicated by a third direction axis (DR3). The front (or upper surface) and the back (or lower surface) of each member are distinguished by the third direction axis (DR3). However, the directions indicated by the first to third direction axes (DR1, DR2, DR3) are relative concepts and can be converted into other directions. Hereinafter, the first to third directions refer to the same drawing symbols as the directions indicated by the first to third direction axes (DR1, DR2, DR3), respectively. In one embodiment of the present invention, a display device (DD) having a flat display surface is illustrated, but is not limited thereto. The display device (DD) may include a curved display surface or a three-dimensional display surface (polygonal columnar display surface) including a plurality of display areas pointing in different directions.

The display device (DD) according to the present embodiment may be a flat rigid display device. However, it is not limited thereto, and the display device (DD) according to the present invention may also be a flexible display device (DD). The display device (DD) according to the present embodiment may be applied to large electronic devices such as televisions and monitors, as well as small and medium-sized electronic devices such as mobile phones, tablets, car navigation systems, game consoles, and smart watches.

As illustrated in FIG. 1a, the display surface (IS) includes a display area (DD-DA) where an image (IM) is displayed and a non-display area (DD-NDA) adjacent to the display area (DD-DA). The non-display area (DD-NDA) is an area where an image is not displayed. FIG. 1a illustrates icon images as an example of the image (IM). As an example, the display area (DD-DA) may be rectangular. The non-display area (DD-NDA) may surround the display area (DD-DA). However, the present invention is not limited thereto, and the shape of the display area (DD-DA) and the shape of the non-display area (DD-NDA) may be designed relatively.

As illustrated in FIG. 1b, the display device (DD) includes a window unit (WM) and a display module (DM). The display module (DM) and the window unit (WM) can be joined via an optically transparent adhesive member (OCA). In one embodiment of the present invention, the optically transparent adhesive member (OCA) is omitted and the window unit (WM) can be directly disposed on the display module (DM).

The window unit (WM) includes a base film (WM-BS) and a shading pattern (WM-BZ). The base film (WM-BS) may include a thin film glass substrate and/or a plastic film. The shading pattern (WM-BZ) partially overlaps the base film (WM-BS). The shading pattern (WM-BZ) may be arranged on a back surface of the base film (WM-BS) to define a bezel area of the display device (DD), i.e., a non-display area (DD-NDA, see FIG. 1a).

The shading pattern (WM-BZ) may be formed as a colored organic layer, for example, by a coating method. Although not shown separately, the window unit (WM) may further include a functional coating layer arranged on the front surface of the base film (WM-BS). The functional coating layer may include an anti-fingerprint layer, an anti-reflection layer, and a hard coating layer.

The display module (DM) includes a display panel (DP) and an input detection unit (TS, or input detection layer). The display panel (DP) generates an image, and the input detection unit (TS) obtains coordinate information of an external input (e.g., a touch event). Although not shown separately, the display module (DM) according to one embodiment of the present invention may further include a protective member disposed on a lower surface of the display panel (DP) and an anti-reflection unit disposed on an upper surface of the input detection unit (TS).

The display panel (DP) may be a luminescent display panel, and is not particularly limited thereto. For example, the display panel (DP) may be an organic luminescent display panel or a quantum dot luminescent display panel. An organic luminescent display panel has a luminescent layer including an organic luminescent material. A quantum dot luminescent display panel has a luminescent layer including quantum dots and quantum rods. Hereinafter, the display panel (DP) is described as an organic luminescent display panel.

As illustrated in FIG. 2, the display panel (DP) includes a base layer (SUB), a circuit element layer (DP-CL) disposed on the base layer (SUB), a display element layer (DP-OLED), and a thin film encapsulation layer (TFE). Although not illustrated separately, the display panel (DP) may further include functional layers such as an antireflection layer, a refractive index control layer, etc.

The base layer (SUB) may include a flexible film. The base layer (SUB) may include a plastic substrate, a glass substrate, a metal substrate, or an organic/inorganic composite material substrate. The display area (DM-DA) and the non-display area (DM-NDA) of the base layer (SUB) may be defined to correspond to the display area (DD-DA) and the non-display area (DD-NDA) of the display device (DD) described with reference to FIGS. 1A and 1B.

The circuit element layer (DP-CL) includes at least one intermediate insulating layer and a circuit element. The intermediate insulating layer includes at least one intermediate inorganic film and at least one intermediate organic film. The circuit element includes signal lines, a driving circuit of a pixel, etc. The circuit element layer (DP-CL) can be formed through an insulating layer forming process by coating, deposition, etc., and a patterning process of a conductor layer and/or a semiconductor layer by a photolithography process.

The display element layer (DP-OLED) includes at least organic light-emitting diodes. The display element layer (DP-OLED) may further include an organic film, such as a pixel defining film.

A thin film encapsulation layer (TFE) encapsulates a display element layer (DP-OLED). The thin film encapsulation layer (TFE) includes at least one insulating layer. The thin film encapsulation layer (TFE) may include at least one inorganic film (hereinafter, “encapsulation inorganic film”). The thin film encapsulation layer (TFE) may include at least one organic film (hereinafter, and at least one encapsulation inorganic film).

The encapsulating inorganic film protects the display element layer (DP-OLED) from moisture/oxygen, and the encapsulating organic film protects the display element layer (DP-OLED) from foreign substances such as dust particles. The encapsulating inorganic film may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The encapsulating organic film may include, but is not limited to, an acrylic-based organic layer.

In one embodiment of the present invention, the thin film encapsulation layer (TFE) may be replaced with an encapsulation substrate, etc. The encapsulation substrate seals the display element layer (DP-OLED) by a sealant.

A part of the configuration of the input sensing unit (TS) may be directly placed on the base surface provided by the display panel (DP). In this specification, the term "directly placed" means formed by a continuous process, excluding attachment using a separate adhesive layer/adhesive member.

In other words, "the A configuration of the input sensing unit (TS) is directly arranged on the base surface" means "no adhesive layer/adhesive member is arranged between the base surface and the A configuration on the cross-section of the display device." Here, the base surface may be the upper surface of the thin film encapsulation layer (TFE) or the upper surface of the encapsulation substrate. The base surface is not particularly limited, and the uppermost surface of the display panel (DP) formed by a continuous process is sufficient. Since the input sensing unit (TS) is directly arranged on the base surface provided by the display panel (DP), unlike the panel-type input sensing unit, the base substrate is omitted, thereby reducing the thickness of the display module (DM).

The input sensing unit (TS) may have a multilayer structure. The input sensing unit (TS) may include a single layer or multiple layers of conductive layers. The input sensing unit (TS) may include at least one insulating layer.

The input detection unit (TS) can detect external input, for example, in a capacitive manner. In the present invention, the operation method of the input detection unit (TS) is not particularly limited, and in one embodiment of the present invention, the input detection unit (TS) can detect external input in an electromagnetic induction manner or a pressure detection manner.

Fig. 3 is a plan view of a display panel (DP) according to one embodiment of the present invention. Fig. 4 is an equivalent circuit diagram of a pixel (PX) according to one embodiment of the present invention. Fig. 5 is an enlarged cross-sectional view of a display panel (DP) according to one embodiment of the present invention.

FIG. 3 additionally illustrates a circuit board (PCB) electrically connected to a display panel (DP). The circuit board (PCB) may be a rigid circuit board or a flexible circuit board. The circuit board (PCB) may be directly connected to the display panel (DP) or may be connected to the display panel (DP) via another circuit board.

A timing control circuit (TC) that controls the operation of a display panel (DP) may be arranged on a circuit board (PCB). In addition, an input detection circuit (TS-C) that controls an input detection unit (TS) may be arranged on the circuit board (PCB). Each of the timing control circuit (TC) and the input detection circuit (TS-C) may be mounted on the circuit board (PCB) in the form of an integrated chip.

A circuit board (PCB) includes first circuit board pads (PCB-P1) electrically connected to a display panel (DP) and second circuit board pads (PCB-P2) electrically connected to an input detection unit (TS). Although not shown, the circuit board (PCB) further includes first signal lines connecting the first circuit board pads (PCB-P1) and a timing control circuit and/or an input detection circuit (TS-C), and second signal lines connecting the second circuit board pads (PCB-P2) and the input detection circuit (TS-C).

As illustrated in FIG. 3, the display panel (DP) includes a display area (DM-DA) and a non-display area (DM-NDA) on a plane. In the present embodiment, the non-display area (DM-NDA) may be defined along the border of the display area (DM-DA). The display area (DM-DA) and the non-display area (DM-NDA) of the display panel (DP) correspond to the display area (DM-DA) and the non-display area (DM-NDA) of the display module (DM) illustrated in FIG. 2, respectively. The display area (DM-DA) and the non-display area (DM-NDA) of the display panel (DP) are not necessarily identical to the display area (DM-DA) and the non-display area (DM-NDA) of the display module (DM) and may be changed depending on the structure/design of the display panel (DP).

A display panel (DP) may include a driving circuit (GDC), a plurality of signal lines (SGL), and a plurality of pixels (PX). The plurality of pixels (PX) are arranged in a display area (DA). Each of the pixels (PX) includes an organic light-emitting diode and a pixel driving circuit connected thereto. The driving circuit (GDC), the plurality of signal lines (SGL), and the pixel driving circuit may be included in a circuit element layer (DP-CL) illustrated in FIG. 2.

The driver circuit (GDC) may include a scan driver circuit. The scan driver circuit generates a plurality of scan signals and sequentially outputs the plurality of scan signals to a plurality of scan lines (GL) described below. The scan driver circuit may further output another control signal to the driver circuit of the pixels (PX).

The injection driver circuit may include a plurality of thin film transistors formed through the same process as the driver circuit of the pixels (PX), such as a low temperature polycrystaline silicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process.

The plurality of signal lines (SGL) include scan lines (GL), data lines (DL), a power line (PL), and a control signal line (CSL). The scan lines (GL) are respectively connected to corresponding pixels (PX) among the plurality of pixels (PX), and the data lines (DL) are respectively connected to corresponding pixels (PX) among the plurality of pixels (PX). The power line (PL) is connected to the plurality of pixels (PX). The control signal line (CSL) can provide control signals to a scan driving circuit.

The display panel (DP) includes signal pads (DP-PD) connected to the ends of signal lines (SGL). An area in a non-display area (NDA) where the signal pads (DP-PD) are arranged is defined as a pad area (NDA-PD). Dummy pads (TS-DPD) connected to signal lines (SL1-1 to SL1-5 and SL2-1 to SL2-4) of an input detection unit (TS) described later may be further arranged in the pad area (NDA-PD). The signal pads (DP-PD) and the dummy pads (TS-DPD) may be arranged on the same layer through the same process as the scan line (GL, see FIG. 5) or the data line (DL, see FIG. 5) described later. The signal pads (DP-PD) and the dummy pads (TS-DPD) may be electrically connected to first circuit board pads (PCB-P1).

Fig. 4 illustrates an example of a pixel (PX) connected to one scanning line (GL), one data line (DL), and one power line (PL). The configuration of the pixel (PX) is not limited thereto and may be modified and implemented.

An organic light-emitting diode (OLED) may be a top-emitting diode or a bottom-emitting diode. A pixel (PX) includes a pixel driving circuit for driving the organic light-emitting diode (OLED), and includes a first transistor (T1, or switching transistor), a second transistor (T2, or driving transistor), and a capacitor (Cst). A first power supply voltage (ELVDD) is provided to the second transistor (T2), and a second power supply voltage (ELVSS) is provided to the organic light-emitting diode (OLED). The second power supply voltage (ELVSS) may be a lower voltage than the first power supply voltage (ELVDD).

The first transistor (T1) outputs a data signal applied to the data line (DL) in response to a scan signal applied to the scan line (GL). The capacitor (Cst) charges a voltage corresponding to the data signal received from the first transistor (T1).

The second transistor (T2) is connected to an organic light-emitting diode (OLED). The second transistor (T2) controls the driving current flowing to the organic light-emitting diode (OLED) in response to the amount of charge stored in the capacitor (Cst).

Fig. 5 illustrates a partial cross-section of a display panel (DP) corresponding to the equivalent circuit illustrated in Fig. 4. A circuit element layer (DP-CL), a display element layer (DP-OLED), and a thin film encapsulation layer (TFE) are sequentially arranged on a base layer (SUB).

The circuit element layer (DP-CL) includes at least one inorganic film, at least one organic film, and a circuit element. For example, the circuit element layer (DP-CL) may include a buffer film (BFL) as an inorganic film, a first intermediate inorganic film (10), and a second intermediate inorganic film (20), and may include an intermediate organic film (30) as an organic film. The materials of the inorganic film and the organic film are not particularly limited, and in one embodiment of the present invention, the buffer film (BFL) may be selectively arranged/omitted.

A semiconductor pattern (OSP1: hereinafter referred to as a first semiconductor pattern) of a first transistor (T1) and a semiconductor pattern (OSP2: hereinafter referred to as a second semiconductor pattern) of a second transistor (T2) are arranged on a buffer film (BFL). The first semiconductor pattern (OSP1) and the second semiconductor pattern (OSP2) can be selected from amorphous silicon, polysilicon, and metal oxide semiconductor.

A first intermediate inorganic film (10) is disposed on a first semiconductor pattern (OSP1) and a second semiconductor pattern (OSP2). A control electrode (GE1: hereinafter, referred to as the first control electrode) of a first transistor (T1) and a control electrode (GE2: hereinafter, referred to as the second control electrode) of a second transistor (T2) are disposed on the first intermediate inorganic film (10). The first control electrode (GE1) and the second control electrode (GE2) can be manufactured according to the same photolithography process as the scan lines (GL, see FIG. 5a).

A second intermediate inorganic film (20) covering a first control electrode (GE1) and a second control electrode (GE2) is disposed on a first intermediate inorganic film (10). An input electrode (DE1: hereinafter, a first input electrode) and an output electrode (SE1: a first output electrode) of a first transistor (T1), an input electrode (DE2: hereinafter, a second input electrode) and an output electrode (SE2: a second output electrode) of a second transistor (T2) are disposed on the second intermediate inorganic film (20).

The first input electrode (DE1) and the first output electrode (SE1) are respectively connected to the first semiconductor pattern (OSP1) through the first through hole (CH1) and the second through hole (CH2) penetrating the first intermediate inorganic film (10) and the second intermediate inorganic film (20). The second input electrode (DE2) and the second output electrode (SE2) are respectively connected to the second semiconductor pattern (OSP2) through the third through hole (CH3) and the fourth through hole (CH4) penetrating the first intermediate inorganic film (10) and the second intermediate inorganic film (20). Meanwhile, in another embodiment of the present invention, some of the first transistor (T1) and the second transistor (T2) may be modified and implemented with a bottom gate structure.

An intermediate organic film (30) covering the first input electrode (DE1), the second input electrode (DE2), the first output electrode (SE1), and the second output electrode (SE2) is arranged on the second intermediate inorganic film (20). The intermediate organic film can provide a flat surface.

A display element layer (DP-OLED) is arranged on the intermediate organic film (30). The display element layer (DP-OLED) may include a pixel definition film (PDL) and an organic light-emitting diode (OLED). The pixel definition film (PDL) may include an organic material. A first electrode (AE) is arranged on the intermediate organic film (30). The first electrode (AE) is connected to the second output electrode (SE2) through a fifth through hole (CH5) penetrating the intermediate organic film (30). An opening (OP) is defined in the pixel definition film (PDL). The opening (OP) of the pixel definition film (PDL) exposes at least a portion of the first electrode (AE).

The pixel (PX) can be arranged in a pixel area on a plane. The pixel area can include an emission area (PXA) and a non-emission area (NPXA) adjacent to the emission area (PXA). The non-emission area (NPXA) can surround the emission area (PXA). In the present embodiment, the emission area (PXA) is defined to correspond to a portion of the first electrode (AE) exposed by the opening (OP).

The hole control layer (HCL) can be commonly arranged in the light-emitting area (PXA) and the non-light-emitting area (NPXA). Although not shown separately, a common layer such as the hole control layer (HCL) can be commonly formed in a plurality of pixels (PX, see FIG. 3).

An emission layer (EML) is disposed on a hole control layer (HCL). The emission layer (EML) can be disposed in an area corresponding to an opening (OP). That is, the emission layer (EML) can be formed separately for each of a plurality of pixels (PX). The emission layer (EML) can include an organic material and/or an inorganic material. In this embodiment, a patterned emission layer (EML) is illustrated as an example, but the emission layer (EML) can be commonly disposed for a plurality of pixels (PX). In this case, the emission layer (EML) can generate white light. In addition, the emission layer (EML) can have a multilayer structure.

An electronic control layer (ECL) is disposed on the light emitting layer (EML). Although not shown separately, the electronic control layer (ECL) may be formed commonly for a plurality of pixels (PX, see FIG. 3). A second electrode (CE) is disposed on the electronic control layer (ECL). The second electrode (CE) is disposed commonly for a plurality of pixels (PX).

A thin film encapsulation layer (TFE) is disposed on the second electrode (CE). The thin film encapsulation layer (TFE) is commonly disposed on a plurality of pixels (PX). In the present embodiment, the thin film encapsulation layer (TFE) directly covers the second electrode (CE). In one embodiment of the present invention, a capping layer that covers the second electrode (CE) may be further disposed between the thin film encapsulation layer (TFE) and the second electrode (CE). At this time, the thin film encapsulation layer (TFE) may directly cover the capping layer.

FIG. 6a is a cross-sectional view of an input sensing unit (TS) according to an embodiment of the present invention. FIG. 6b is a plan view of an input sensing unit (TS) according to an embodiment of the present invention. FIG. 7a is a plan view of a first conductive layer (TS-CL1) of an input sensing unit (TS) according to an embodiment of the present invention. FIG. 7b is a plan view of a second conductive layer (TS-CL2) of an input sensing unit (TS) according to an embodiment of the present invention. FIG. 7c is a plan view of a third conductive layer (TS-CL3) of an input sensing unit (TS) according to an embodiment of the present invention. FIG. 6a illustrates a second electrode (CE) and a thin film encapsulation layer (TFE) as components of a display panel (DP, see FIG. 5).

As illustrated in FIG. 6a, the input sensing unit (TS) includes a first conductive layer (TS-CL1), a first insulating layer (TS-IL1), a second conductive layer (TS-CL2), a second insulating layer (TS-IL2), a third conductive layer (TS-CL3), and a third insulating layer (TS-IL3). In the present embodiment, the first conductive layer (TS-CL1) is directly disposed on the thin film encapsulation layer (TFE). The present invention is not limited thereto, and another inorganic layer or organic layer of the display panel (DP) may be further disposed between the first conductive layer (TS-CL1) and the thin film encapsulation layer (TFE). In the present embodiment, the third insulating layer (TS-IL3) is omitted, and an optical member or an adhesive member, or the like, may replace the protective function of the third insulating layer (TS-IL3).

Each of the first conductive layer (TS-CL1) to the third conductive layer (TS-CL3) may have a single-layer structure or a multi-layer structure laminated along the third direction axis (DR3). The single-layer conductive layer may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, and alloys thereof. The transparent conductive layer may include a transparent conductive oxide such as ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide), or ITZO (indium tin zinc oxide). In addition, the transparent conductive layer may include PEDOT, metal nanowires, or graphene.

The multilayer conductive layer may include multilayer metal layers. The multilayer metal layers may have a three-layer structure of, for example, titanium/aluminum/titanium. The multilayer conductive layer may include at least one metal layer and at least one transparent conductive layer.

Each of the second conductive layer (TS-CL2) and the third conductive layer (TS-CL3) includes a plurality of patterns. Hereinafter, the second conductive layer (TS-CL2) is described as including first conductive patterns, and the third conductive layer (TS-CL3) is described as including second conductive patterns. Each of the first conductive patterns and the second conductive patterns may include electrodes and signal lines. The first conductive layer (TS-CL1) includes an electrode having a relatively larger area than the first conductive patterns and the second conductive patterns. Detailed descriptions of the first to third conductive layers (TS-CL1) to (TS-CL3) will be described later.

Each of the first insulating layer (TS-IL1) to the third insulating layer (TS-IL3) may include an inorganic material or an organic material. At least one of the first insulating layer (TS-IL1) to the third insulating layer (TS-IL3) may include an inorganic film. The inorganic film may include at least one of aluminum oxide, titanium oxide, silicon oxide silicon oxynitride, zirconium oxide, and hafnium oxide.

At least one of the first insulating layer (TS-IL1) to the third insulating layer (TS-IL3) may include an organic film. The organic film may include at least one of an acrylic resin, a methacrylic resin, a polyisoprene, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin, a siloxane resin, a polyimide resin, a polyamide resin, and a perylene resin.

As illustrated in FIG. 6b, the input detection unit (TS) may include a noise shielding electrode (TS-SE), first electrodes (TE1-1 to TE1-5), first signal lines (SL1-1 to SL1-5) connected to the first electrodes (TE1-1 to TE1-5), second electrodes (TE2-1 to TE2-4), second signal lines (SL2-1 to SL2-4) connected to the second electrodes (TE2-1 to TE2-4), and detection signal pads (TS-PD) connected to the first signal lines (SL1-1 to SL1-5) and the second signal lines (SL2-1 to SL2-4).

The first electrodes (TE1-1 to TE1-5) and the second electrodes (TE2-1 to TE2-4) intersect each other. The first electrodes (TE1-1 to TE1-5) are arranged in the first direction (DR1) and each has a shape extending in the second direction (DR2). An external input can be detected in a mutual cap method or a self cap method.

Each of the first electrodes (TE1-1 to TE1-5) includes first sensor parts (SP1) and first connecting parts (CP1). Each of the second electrodes (TE2-1 to TE2-4) includes second sensor parts (SP2) and second connecting parts (CP2). The two first sensor parts arranged at opposite ends of the first sensor parts (SP1) may have a smaller size, for example, half the size, than the first sensor part arranged at the center. The two second sensor parts arranged at opposite ends of the six second sensor parts (SP2) may have a smaller size, for example, half the size, than the second sensor part arranged at the center.

FIG. 6b illustrates first electrodes (TE1-1 to TE1-5) and second electrodes (TE2-1 to TE2-4) according to one embodiment, but their shapes are not limited. In one embodiment of the present invention, the first electrodes (TE1-1 to TE1-5) and second electrodes (TE2-1 to TE2-4) may have shapes in which there is no distinction between a sensor portion and a connection portion.

The first sensor parts (SP1) are arranged along the second direction (DR2), and the second sensor parts (SP2) are arranged along the first direction (DR1). Each of the first connecting parts (CP1) connects adjacent first sensor parts (SP1), and each of the second connecting parts (CP2) connects adjacent second sensor parts (SP2).

The first signal lines (SL1-1 to SL1-5) are respectively connected to one end of the first electrodes (TE1-1 to TE1-5). The second signal lines (SL2-1 to SL2-4) are respectively connected to both ends of the second electrodes (TE2-1 to TE2-4). In one embodiment of the present invention, the first signal lines (SL1-1 to SL1-5) may also be connected to both ends of the first electrodes (TE1-1 to TE1-5). In one embodiment of the present invention, the second signal lines (SL2-1 to SL2-4) may respectively be connected to only one end of the second electrodes (TE2-1 to TE2-4).

In one embodiment of the present invention, the first signal lines (SL1-1 to SL1-5), the second signal lines (SL2-1 to SL2-4) and the detection signal pads (TS-PD) may be replaced by a circuit board or the like that is manufactured and combined separately. In one embodiment of the present invention, the detection signal pads (TS-PD) may be connected to the dummy pads (TS-DPD) illustrated in FIG. 3. In one embodiment of the present invention, the detection signal pads (TS-PD) may be omitted, and the first signal lines (SL1-1 to SL1-5) and the second signal lines (SL2-1 to SL2-4) may be directly connected to the dummy pads (TS-DPD) illustrated in FIG. 3.

FIG. 7a is a plan view of a first conductive layer (TS-CL1) of an input sensing unit (TS) according to an embodiment of the present invention. FIG. 7b is a plan view of a second conductive layer (TS-CL2) of an input sensing unit (TS) according to an embodiment of the present invention. FIG. 7c is a plan view of a third conductive layer (TS-CL3) of an input sensing unit (TS) according to an embodiment of the present invention.

As illustrated in FIG. 7a, the first conductive layer (TS-CL1) includes a noise shielding electrode (TS-SE). The noise shielding electrode (TS-SE) is directly disposed on a thin film encapsulation layer (TFE, see FIG. 6a). The noise shielding electrode (TS-SE) may have an area corresponding to the display area (DM-DA). The noise shielding electrode (TS-SE) overlaps a plurality of pixels (PX) illustrated in FIG. 3, and may overlap the light-emitting area (PXA) and the non-light-emitting area (NPXA) illustrated in FIG. 5. In one embodiment of the present invention, the noise shielding electrode (TS-SE) completely covers the display area (DM-DA), and the noise shielding electrode (TS-SE) may also overlap a part of the non-display area (DM-NDA).

In order to prevent noise generated in the display panel from interfering with the first electrodes (TE1-1 to TE1-5) and the second electrodes (TE2-1 to TE2-4), the first electrodes (TE1-1 to TE1-5) and the second electrodes (TE2-1 to TE2-4) are arranged on the inner side of the noise shielding electrode (TS-SE) on the base surface. On the base surface, the noise shielding electrode (TS-SE) can completely overlap the first electrodes (TE1-1 to TE1-5) and the second electrodes (TE2-1 to TE2-4). Considering noise shielding efficiency, it is preferable that the noise shielding electrode (TS-SE) overlaps at least 90% or more of the areas of the first electrodes (TE1-1 to TE1-5) and the second electrodes (TE2-1 to TE2-4). In one embodiment of the present invention, the noise shielding electrode (TS-SE) may include a plurality of electrodes spaced apart at intervals of several millimeters or less.

The noise shielding electrode (TS-SE) can receive a predetermined voltage. For example, the noise shielding electrode (TS-SE) can receive a ground voltage. In one embodiment, the noise shielding electrode (TS-SE) can receive the same voltage as the voltage applied to the second electrodes (TE2-1 to TE2-4). Although not shown separately, a signal line and a pad portion that provide a predetermined voltage to the noise shielding electrode (TS-SE) can be arranged in the non-display area (DM-NDA).

The noise shielding electrode (TS-SE) may include a transparent conductive oxide. The transparent conductive oxide may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), etc.

As illustrated in FIG. 7b, the second conductive layer (TS-CL2) includes first connecting portions (CP1). Although not illustrated in FIG. 7b, the first connecting portions (CP1) are disposed on the first insulating layer (TS-IL1, see FIG. 6a). The first insulating layer (TS-IL1) directly covers the noise shielding electrode (TS-SE), completely covers at least the display area (DM-DA), and may further overlap a portion of the non-display area (DM-NDA).

The first connecting portions (CP1) may include a single-layer or multi-layer metal layer and may have a mesh shape. The first connecting portions (CP1) may overlap the non-emissive region (NPXA) described with reference to FIG. 5 and may not overlap the emissive region (PXA).

As illustrated in FIG. 7c, the third conductive layer (TS-CL3) includes first sensor portions (SP1), second sensor portions (SP2), and second connection portions (CP2). In addition, the third conductive layer (TS-CL3) includes first signal lines (SL1-1 to SL1-5), second signal lines (SL2-1 to SL2-4), and detection signal pads (TS-PD). Although not illustrated in FIG. 7c, the third conductive layer (TS-CL3) is disposed on the second insulating layer (TS-IL2, see FIG. 6a). The first sensor portions (SP1) are connected to the first connection portions (CP1) through contact holes penetrating the second insulating layer (TS-IL2).

The first sensor portions (SP1), the second sensor portions (SP2), and the second connection portions (CP2) may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO). The first signal lines (SL1-1 to SL1-5), the second signal lines (SL2-1 to SL2-4), and the detection signal pads (TS-PD) may include the transparent conductive oxide or include a single-layer or multi-layer metal layer. In one embodiment of the present invention, the first sensor portions (SP1), the second sensor portions (SP2), and the second connection portions (CP2) may also include a single-layer or multi-layer metal layer.

FIG. 8A is a plan view of a second conductive layer (TS-CL2) of an input sensing unit (TS) according to one embodiment of the present invention. FIG. 8B is an enlarged view of area AA of FIG. 8A. FIG. 8C is a plan view of a third conductive layer (TS-CL3) of an input sensing unit (TS) according to one embodiment of the present invention.

Hereinafter, the differences from the input detection unit (TS) described with reference to FIGS. 7a and 7b will be mainly described. Although not separately illustrated, the input detection unit (TS) according to the present embodiment includes a noise shielding electrode (TS-SE) corresponding to FIG. 7a.

As illustrated in FIG. 8A, the second conductive layer (TS-CL2) includes first electrodes (TE1-1 to TE1-5), first signal lines (SL1-1 to SL1-5), and detection signal pads (TS-PD). The first electrodes (TE1-1 to TE1-5) may have a mesh shape. The first sensor parts (SP1) and the first connecting parts (CP1) include metal and may be formed through the same process. Since the first electrodes (TE1-1 to TE1-5) have a mesh shape, parasitic capacitance with electrodes of the first conductive layer (TS-CL1, see FIGS. 6A and 7A) or the display panel (DP, see FIG. 6A) may be reduced.

As illustrated in FIG. 8b, the first sensor unit (SP1) does not overlap the light-emitting areas (PXA-R, PXA-G, PXA-B) and overlaps the non-light-emitting area (NPXA). The light-emitting areas (PXA-R, PXA-G, PXA-B) can be defined like the light-emitting area (PXA) of FIG. 5. The mesh lines of the first sensor unit (SP1) define a plurality of mesh holes (TS-OPR, TS-OPG, TS-OPB). In other words, a plurality of mesh holes (TS-OPR, TS-OPG, TS-OPB) are defined in the first sensor unit (SP1). The line width of the mesh lines can be several micrometers to several nanometers. Multiple mesh holes (TS-OPR, TS-OPG, TS-OPB) can correspond one-to-one to light-emitting areas (PXA-R, PXA-G, PXA-B).

The light-emitting areas (PXA-R, PXA-G, PXA-B) are arranged spaced apart from each other, and a non-light-emitting area (NPXA) is arranged between the light-emitting areas (PXA-R, PXA-G, PXA-B). Organic light-emitting diodes (OLEDs) are arranged in each of the light-emitting areas (PXA-R, PXA-G, PXA-B). The light-emitting areas (PXA-R, PXA-G, PXA-B) can be divided into several groups according to the color of light generated from the organic light-emitting diodes (OLEDs). Fig. 8b illustrates the light-emitting areas (PXA-R, PXA-G, PXA-B) divided into three groups according to the light-emitting color.

The light-emitting regions (PXA-R, PXA-G, PXA-B) can have different areas depending on the color emitted from the light-emitting layer (EML) of the organic light-emitting diode (OLED, see FIG. 5). The area of the light-emitting regions (PXA-R, PXA-G, PXA-B) can be determined depending on the type of the organic light-emitting diode.

The plurality of mesh holes (TS-OPR, TS-OPG, TS-OPB) can be divided into several groups having different areas. The plurality of mesh holes (TS-OPR, TS-OPG, TS-OPB) can be divided into three groups according to the corresponding light-emitting regions (PXA-R, PXA-G, PXA-B).

In the above, the mesh holes (TS-OPR, TS-OPG, TS-OPB) are illustrated as corresponding one-to-one to the light-emitting areas (PXA-R, PXA-G, PXA-B), but this is not limited. Each of the mesh holes (TS-OPR, TS-OPG, TS-OPB) can correspond to two or more light-emitting areas (PXA-R, PXA-G, PXA-B).

The areas of the light-emitting regions (PXA-R, PXA-G, PXA-B) are exemplarily shown to be various, but are not limited thereto. The sizes of the light-emitting regions (PXA-R, PXA-G, PXA-B) may be the same, and the sizes of the mesh holes (TS-OPR, TS-OPG, TS-OPB) may also be the same. The planar shapes of the mesh holes (TS-OPR, TS-OPG, TS-OPB) are not limited, and may have a polygonal shape other than a rhombus.

Although not illustrated separately, the second conductive patterns of the third conductive layer (TS-CL3) described with reference to FIG. 7c and the second conductive patterns of the third conductive layer (TS-CL3) of FIG. 8c described below may overlap the light-emitting regions (PXA-R, PXA-G, PXA-B) and non-light-emitting regions (NPXA) respectively arranged on the lower side.

As illustrated in FIG. 8c, the third conductive layer (TS-CL3) includes second electrodes (TE2-1 to TE2-4), second signal lines (SL2-1 to SL2-4), and detection signal pads (TS-PD). Unlike the input detection unit (TS) illustrated in FIGS. 7a to 7c, contact holes may not be defined in the second insulating layer (TS-IL2). This is because the first electrodes (TE1-1 to TE1-5) and the second electrodes (TE2-1 to TE2-4) are arranged with the second insulating layer (TS-IL2) therebetween.

The second electrodes (TE2-1 to TE2-4) overlap the light-emitting regions (PXA-R, PXA-G, PXA-B) and the non-light-emitting region (NPXA) illustrated in FIG. 8B. At least, the second electrodes (TE2-1 to TE2-4) may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO). To a user who looks at the display surface (IS, see FIG. 1) obliquely, the mesh-shaped second electrodes (TE2-1 to TE2-4) may overlap with the mesh-shaped first electrodes (TE1-1 to TE1-5), thereby providing a moire phenomenon. In contrast, the mesh-shaped second electrodes (TE2-1 to TE2-4) including transparent conductive oxides do not cause a moire phenomenon even if they overlap the mesh-shaped first electrodes (TE1-1 to TE1-5).

Any one of the second signal lines (SL2-1 to SL2-4) and the detection signal pads (TS-PD) may be formed through the same process as the second electrodes (TE2-1 to TE2-4) or may be formed through another process. Any one of the second signal lines (SL2-1 to SL2-4) and the detection signal pads (TS-PD) may include a transparent conductive oxide or may include a metal.

In one embodiment of the present invention, one of the second signal lines (SL2-1 to SL2-4) and the signal pads (TS-PD) of the input detection unit (TS) may be formed on the first insulating layer (TS-IL1) through the same process as the first signal lines (SL1-1 to SL1-5) illustrated in FIG. 8A. At this time, the second electrodes (TE2-1 to TE2-4) and the second signal lines (SL2-1 to SL2-4) may be connected through a contact hole penetrating the second insulating layer (TS-IL2).

FIGS. 9A to 9C are cross-sectional views of a display device (DD) according to one embodiment of the present invention. Hereinafter, a detailed description of a configuration overlapping with the input detection unit (TS) described with reference to FIGS. 1 to 8C is omitted.

As illustrated in Fig. 9a, the display device (DD) includes a window unit (WM), an anti-reflection unit (ARM), an input detection unit (TS), and a display panel (DP). Some of the above components may be formed through a continuous process, and some may be bonded through an optically transparent adhesive (OCA).

The input sensing unit (TS) includes a first sub-unit (TS1) and a second sub-unit (TS2). The first sub-unit (TS1) may include a first conductive layer (TS-CL1), a first insulating layer (TS-IL1), a second conductive layer (TS-CL2), and a second insulating layer (TS-IL2) described with reference to FIGS. 6A to 8C. The first conductive layer (TS-CL1) may be directly disposed on the display panel (DP). The first insulating layer (TS-IL1), the second conductive layer (TS-CL2), and the second insulating layer (TS-IL2) may also be directly disposed on the display panel (DP) through a continuous process. The display panel (DP) and the first sub-unit (TS1) combined in this embodiment may be defined as a display module (DM).

The first insulating layer (TS-IL1) may include an inorganic material, and the second insulating layer (TS-IL2) may include an organic material. The insulating layer of the inorganic material may improve the bonding strength between the first insulating layer (TS-IL1) and the first conductive layer (TS-CL1) and may have a uniform thickness. The adhesive layer of the organic material may improve the bonding strength between the second insulating layer (TS-IL2) and the first optically transparent adhesive member (OCA1) and improve the flexibility of the first partial unit (TS1).

The display module (DM) and the anti-reflection unit (ARM) can be combined through a first optically transparent adhesive member (OCA1). The anti-reflection unit (ARM) is a member that reduces the reflectivity of external light and can include a phase retardation member and a polarizing member. The phase retardation member can include a λ/2 phase retardation member and/or a λ/4 phase retardation member. The phase retardation member and the polarizing member can include a stretchable plastic film or liquid crystals arranged in a predetermined array. The phase retardation member and the polarizing member can further include a protective film.

The anti-reflection unit (ARM) may include color filters having the same color as light generated from an organic light-emitting diode arranged in the light-emitting area (PXA). In addition, the anti-reflection unit (ARM) may include a destructive interference structure that destructively interferes with first reflected light and second reflected light reflected from different layers. The color filters and the destructive interference structure may be formed on a base film.

The anti-reflection unit (ARM) and the second sub-unit (TS2) can be combined via a second optically transparent adhesive member (OCA2). The second sub-unit (TS2) and the window unit (WM) can be combined via a third optically transparent adhesive member (OCA3). The second sub-unit (TS2) can include a base film (BL) and a third conductive layer (TS-CL3) described with reference to FIGS. 6A to 8C, and a third insulating layer (TS-IL3).

In the present embodiment, the anti-reflection unit (ARM) and the first and second optically transparent adhesive members (OCA1, OCA2) have an insulating layer function that insulates the second conductive layer (TS-CL2) and the third conductive layer (TS-CL3). In the input sensing unit (TS) illustrated in FIGS. 9a to 9c, since it is difficult to form a contact hole penetrating the anti-reflection unit (ARM) and the optically transparent adhesive members (OCA1, OCA2, OCA3), it is preferable that the second conductive layer (TS-CL2) includes the first conductive patterns illustrated in FIG. 8a, and the third conductive layer (TS-CL3) includes the second conductive patterns illustrated in FIG. 8c. The third challenge layer (TS-CL3) may include sensing signal pads (TS-PD) as illustrated in FIG. 8c, and the sensing signal pads (TS-PD) may be connected to the second circuit board pads (PCB-P2) as illustrated in FIG. 3 via the flexible circuit board.

As illustrated in FIG. 9b, the base film (BL) of the second partial unit (TS2) of FIG. 9a may be omitted. The third conductive layer (TS-CL3) of the second partial unit (TS2) may be formed directly on the anti-reflection unit (ARM). The third input insulating layer (TS-IL3) may be formed directly on the anti-reflection unit (ARM) to cover the second conductive patterns of the third conductive layer (TS-CL3). Accordingly, unlike the input sensing unit (TS) of FIG. 9a, the second optically transparent adhesive member (OCA2) may be omitted.

As illustrated in FIG. 9c, the base film (BL) of the second partial unit (TS2) of FIG. 9a may be omitted. The third conductive layer (TS-CL3) of the second partial unit (TS2) may be directly disposed on the lower surface of the base film (WM-BS) of the window unit (WM). The third insulating layer (TS-IL3) may be directly disposed on the lower surface of the base film (WM-BS) to directly cover the second conductive patterns of the third conductive layer (TS-CL3) and the light-shielding pattern (WM-BZ).

The second optical transparent adhesive member (OCA2) can combine the third insulating layer (TS-IL3) and the anti-reflection unit (ARM). Accordingly, unlike the input detection unit (TS) of Fig. 9a, the third optical transparent adhesive member (OCA3) can be omitted.

Fig. 10a is a cross-sectional view of an input sensing unit (TS) according to an embodiment of the present invention. Fig. 10b is a plan view of an input sensing unit (TS) according to an embodiment of the present invention. Fig. 10c is a cross-sectional view taken along line I-I' of Fig. 10a. Hereinafter, a detailed description of the same configuration as that described with reference to Figs. 1 to 9c will be omitted.

According to the present embodiment, the third conductive layer (TS-CL3) and the third insulating layer (TS-IL3) illustrated in FIGS. 6a to 9c are omitted, and the input sensing unit (TS) includes a first conductive layer (TS-CL1), a first insulating layer (TS-IL1), a second conductive layer (TS-CL2), and a second insulating layer (TS-IL2).

The first conductive layer (TS-CL1) may include a noise shielding electrode (TS-SE). The second conductive layer (TS-CL2) may include a plurality of sensing electrodes (TE), a plurality of sensing signal lines (SL), and sensing signal pads (TS-PD). In Fig. 10b, the first insulating layer (TS-IL1) covering the noise shielding electrode (TS-SE) is not shown.

A plurality of sensing electrodes (TE) have unique coordinate information. For example, the sensing electrodes (TE) can be arranged in a matrix form and are respectively connected to the sensing signal lines (SL). The shape and arrangement of the sensing electrodes (TE) are not particularly limited. Some of the sensing signal lines (SL) can be arranged in the display area (DA) and some can be arranged in the non-display area (NDA). The input sensing unit (TS) according to the present embodiment can obtain coordinate information in a self-cap method.

As illustrated in FIGS. 10b and 10c, the sensing electrodes (TE) may have a mesh shape. As illustrated in FIG. 8b, the sensing electrodes (TE) overlap the non-luminous region (NPXA). The noise shielding electrode (TS-SE) can block noise induced from the electrodes of the display panel (DP) to the sensing electrodes (TE).

Although not illustrated separately, unlike that illustrated in FIG. 10a, the second conductive layer (TS-CL2) may not be formed continuously from the first insulating layer (TS-IL1). An anti-reflection unit (ARM) and an optically transparent adhesive (OCA) may be further disposed between the second conductive layer (TS-CL2) and the first insulating layer (TS-IL1). Similar to the third conductive layer (TS-CL3) illustrated in FIG. 9b, the second conductive layer (TS-CL2) may be formed directly on the anti-reflection unit (ARM). Similar to the third conductive layer (TS-CL3) illustrated in FIG. 9c, the second conductive layer (TS-CL2) may be formed directly on the window unit (WM).

Fig. 11a is a cross-sectional view of an input sensing unit (TS) according to an embodiment of the present invention. Fig. 11b is a plan view of a first conductive layer of an input sensing unit (TS) according to an embodiment of the present invention. Fig. 11c is a plan view of a second conductive layer of an input sensing unit (TS) according to an embodiment of the present invention. Hereinafter, a detailed description of the same configuration as that described with reference to Figs. 1 to 10c is omitted.

The input sensing unit (TS) according to the present embodiment does not include the first conductive layer (TS-CL1) and the first input insulating layer (TS-IL1) illustrated in FIGS. 6A to 9C. As illustrated in FIG. 11A, the input sensing unit (TS) according to the present embodiment may include the first conductive layer (TS-CL10) and the second conductive layer (TS-CL20). The first conductive layer (TS-CL10) and the second conductive layer (TS-CL20) may correspond to the second conductive layer (TS-CL2) and the third conductive layer (TS-CL3) illustrated in FIGS. 6A to 9C, respectively.

As illustrated in FIG. 11b, the first conductive layer (TS-CL10) may include first electrodes (TE1-1 to TE1-5), first signal lines (SL1-1 to SL1-5), dummy electrodes (DE-1 to DE-4), dummy signal lines (SL3-1 to SL3-4), and sensing signal pads (TS-PD). The first electrodes (TE1-1 to TE1-5) and the dummy electrodes (DE-1 to DE-4) may be formed by the same process and thus may have the same material and the same layer structure.

The dummy electrodes (DE-1 to DE-4) may have a mesh shape like the first electrodes (TE1-1 to TE1-5). The first electrodes (TE1-1 to TE1-5) may include a mesh hole (TS-OP), and the dummy electrodes (DE-1 to DE-4) may include a dummy mesh hole (DE-OP). The dummy electrodes (DE-1 to DE-4) formed by a different process from the first electrodes (TE1-1 to TE1-5) may not have a mesh structure, and the dummy electrodes (DE-1 to DE-4) may include a transparent conductive oxide at this time.

The dummy electrodes (DE-1 to DE-4) may extend in the second direction (DR2) and be arranged in the first direction (DR1). The dummy electrodes (DE-1 to DE-4) may be respectively arranged between the first electrodes (TE1-1 to TE1-5).

In this embodiment, dummy electrodes (DE-1 to DE-4) having a constant width in the first direction (DR1) are exemplarily illustrated, but are not limited thereto and may be modified into the shape of the first electrodes (TE1-1 to TE1-5) illustrated in Fig. 6b. The number of dummy electrodes (DE-1 to DE-4) is not limited, and it is sufficient for the input detection unit (TS) to include one dummy electrode overlapping one of the second electrodes (TE2-1 to TE2-4) on a plane.

As illustrated in FIG. 11c, the second conductive layer (TS-CL20) includes second electrodes (TE2-1 to TE2-4), second signal lines (SL2-1 to SL2-4), and detection signal pads (TS-PD). In order to prevent moire phenomenon, at least the second electrodes (TE2-1 to TE2-4) may include a transparent conductive oxide. The second electrodes (TE2-1 to TE2-4) having a bar shape with a constant width in the second direction (DR2) are illustrated as an example, but are not limited thereto.

As illustrated in FIG. 12, the display device (DD, see FIG. 1b) includes an input detection circuit (TS-C) electrically connected to first electrodes (TE1-1 to TE1-5), dummy electrodes (DE-1 to DE-4), and second electrodes (TE2-1 to TE2-4). The input detection circuit (TS-C) detects noise generated in the dummy electrodes (DE-1 to DE-4) by the display panel (DP, see FIG. 1b) and detects an external input (e.g., a user's touch) generated outside a window unit (WM, see FIG. 1b). The input detection circuit (TS-C) may be mounted on a circuit board (PCB) in the form of an integrated chip, as illustrated in FIG. 3.

The input detection circuit (TS-C) includes a signal providing circuit (C-10), a noise detection circuit (C-20), and a coordinate information generating circuit (C-30). The signal providing circuit (C-10) provides detecting signals to the first electrodes (TE1-1 to TE1-5). The detecting signals may be AC signals having different information. Here, "the detecting signals have different information" means that the detecting signals have different time information, frequency information, and code information. The detecting signals modulated in a time division multiple access (time division multiple access) manner can be activated in different sections. The detecting signals modulated in a frequency division multiple access (frequency division multiple access) manner can have different frequencies. The detecting signals modulated in a code division multiple access (code division multiple access) manner can have different code information.

The noise detection circuit (C-20) detects noise from the dummy electrodes (DE-1 to DE-4). Noise that interferes with the dummy electrodes (DE-1 to DE-4) in the display panel (DP) is treated as noise that interferes with the second electrodes (TE2-1 to TE2-4) in the display panel (DP) or as noise corresponding thereto. The noise detection circuit (C-20) may include a low-pass filter that removes low-frequency components of the detected noise signal.

The coordinate information generating circuit (C-30) receives a noise signal from the noise detection circuit (C-20). The coordinate information generating circuit (C-30) receives sensing signals from the second electrodes (TE2-1 to TE2-4). The coordinate information generating circuit (C-30) compensates for the sensing signals based on the noise signal.

For example, compensation signals can be generated by subtracting noise signals from sensing signals, and coordinate information of an input point can be derived based on the compensation signals.

Although not illustrated separately, unlike that illustrated in FIG. 11a, the second conductive layer (TS-CL2) of the input sensing unit (TS) according to one embodiment of the present invention may not be formed continuously from the first insulating layer (TS-IL1). An anti-reflection unit (ARM) and an optically transparent adhesive member (OCA) may be further disposed between the second conductive layer (TS-CL2) and the first insulating layer (TS-IL1). Similar to the third conductive layer (TS-CL3) illustrated in FIG. 9b, the second conductive layer (TS-CL2) may be formed directly on the anti-reflection unit (ARM). Similar to the third conductive layer (TS-CL3) illustrated in FIG. 9c, the second conductive layer (TS-CL2) may be formed directly on the window unit (WM).

Although not illustrated separately, the input sensing circuit (TS-C) of the input sensing unit (TS) described with reference to FIGS. 6A to 9C may not include a noise detection circuit (C-20) compared to the input sensing circuit (TS-C) illustrated in FIG. 12. The input sensing circuit (TS-C) of the input sensing unit (TS) described with reference to FIGS. 6A to 9C includes a signal providing circuit (C-10) connected to one of the first electrodes (TE1-1 to TE1-5) and the second electrodes (TE2-1 to TE2-4) and a coordinate information calculating circuit (C-30) connected to the other one. In particular, connecting the coordinate information calculating circuit (C-30) to the second electrodes (TE2-1 to TE2-4) that are spaced far from the display panel (DP) can reduce noise interfering with sensing signals.

The input detection circuit (TS-C) of the input detection unit (TS) described with reference to FIGS. 10a to 10c includes a signal providing circuit (C-10) and a coordinate information generating circuit (C-30). The signal providing circuit (C-10) and the coordinate information generating circuit (C-30) are connected to a plurality of detection electrodes (TE) in different sections. The input detection circuit (TS-C) of the input detection unit (TS) described with reference to FIGS. 10a to 10c may further include a switching circuit that selectively connects the plurality of detection electrodes (TE) and the signal providing circuit (C-10) and the coordinate information generating circuit (C-30).

FIGS. 13A and 13B are perspective views of a display device (DD) according to an embodiment of the present invention. FIG. 14 is a perspective view of a display device (DD) according to an embodiment of the present invention. FIGS. 15A to 15C are perspective views of a display device (DD) according to an embodiment of the present invention. Hereinafter, a detailed description of the same configuration as that described with reference to FIGS. 1 to 12 will be omitted.

Any one of the input detection units (TS) described with reference to FIGS. 6a to 12 can be applied to the flexible display device (DD) described below.

As illustrated in FIGS. 13a to 13c, the display device (DD) may include a plurality of regions defined according to the operation form. The display device (DD) may include a bending region (BA) that is bent on the basis of a bending axis (BX), a first non-bending region (NBA1) that is not bent, and a second non-bending region (NBA2). As illustrated in FIG. 13b, the display device (DD) may be inner-bended so that the display surface (IS) of the first non-bending region (NBA1) and the display surface (IS) of the second non-bending region (NBA2) face each other. As illustrated in FIG. 13c, the display module (DM) may also be outer-bended so that the display surface (IS) is exposed to the outside.

In one embodiment of the present invention, the display device (DD) may include a plurality of bending areas (BA). In addition, the bending areas (BA) may be defined to correspond to the manner in which the user operates the display device (DD). For example, unlike FIGS. 13b and 13c, the bending areas (BA) may be defined parallel to the first direction axis (DR1), or may be defined in a diagonal direction. The area of the bending areas (BA) is not fixed, but may be determined according to the radius of curvature. In one embodiment of the present invention, the display device (DD) may be configured to repeat only the operation modes illustrated in FIGS. 13a and 13b.

As illustrated in FIGS. 14a and 14b, the display device (DD) includes a first non-bending area (NBA1), a second non-bending area (NBA2) spaced apart from the first non-bending area (NBA1) in a first direction (DR1), and a bending area (BA) defined between the first non-bending area (NBA1) and the second non-bending area (NBA2). The display area (DD-DA) may be included in the first non-bending area (NBA1). Parts of the non-display area (DD-NDA) correspond to the second non-bending area (NBA2) and the bending area (BA), respectively, and a part of the non-display area (DD-NDA) adjacent to the display area (DD-DA) is included in the first non-bending area (NBA1).

The bending area (BA) can be bent so that a bending axis (BX) is defined along a second direction (DR2) orthogonal to the first direction (DR1). The second non-bending area (NBA2) faces the first non-bending area (NBA1). The bending area (BA) and the second non-bending area (NBA2) can have a width in the second direction (DR2) that is smaller than that of the first non-bending area (NBA1). Although not illustrated separately, the display device (DD) illustrated in FIG. 1 may also include a bending area corresponding to the bending area (BA).

As illustrated in Fig. 15, the display device (DD) may include three bending regions. Compared to the display device illustrated in Fig. 14b, two edge regions facing each other in the second direction (DR2) of the first non-bending region (NBA1) are bent from the center region.

Although the present invention has been described above with reference to preferred embodiments thereof, it will be understood by those skilled in the art or having ordinary knowledge in the art that various modifications and changes may be made to the present invention without departing from the spirit and technical scope of the present invention as set forth in the claims below.

Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the scope of the patent claims.

T1: First thin film transistor T2: Second thin film transistor
OLED: Organic Light Emitting Diode 10: Intermediate Organic Film
20, 30: Intermediate inorganic film TFE: Thin film encapsulation layer
TE: Sense electrode SL: Signal line
SP: Sensor part CP: Connection part

Claims (20)

A display panel including a base surface, a plurality of light-emitting regions spaced apart from each other on the base surface, and a non-light-emitting region arranged between the plurality of light-emitting regions; and
Including an input detection unit arranged on the above display panel,
The above input detection unit,
A noise shielding electrode directly disposed on the base surface and comprising a transparent conductive oxide;
A first electrode having a mesh shape arranged on the noise shielding electrode, overlapping the non-luminous region, and having a plurality of mesh holes corresponding to the plurality of luminous regions; and
A second electrode is disposed on the above noise shielding electrode and intersects the first electrode,
On the above base surface, the first electrode and the second electrode overlap the noise shielding electrode,
A display device in which the second electrode overlaps the plurality of light-emitting regions and the non-light-emitting region and includes a transparent conductive oxide. In the first paragraph,
The second electrode is provided in multiple numbers,
A display device wherein each of the plurality of second electrodes is arranged on the inner side of the noise shielding electrode. In the first paragraph,
A display device in which the above noise shielding electrode overlaps the plurality of light-emitting areas and the non-light-emitting area. delete In the third paragraph,
The above input detection unit further includes a first insulating layer disposed between the noise shielding electrode and the first electrode on a cross-sectional surface, and a second insulating layer disposed between the first electrode and the second electrode and covering the first electrode.
A display device wherein the first insulating layer includes an inorganic material and the second insulating layer includes an organic material. In clause 5,
A display device further comprising an optically transparent adhesive member disposed between the second insulating layer and the second electrode. In the first paragraph,
Further comprising a first insulating layer directly disposed on the above noise shielding electrode,
A display device in which the first electrode is directly disposed on the first insulating layer. In Article 7,
A display device further comprising an optically transparent adhesive member disposed between the first insulating layer and the second electrode. In the first paragraph,
A display device in which the first electrode is positioned between the noise shielding electrode and the second electrode in a cross-section. In Article 9,
A display device further comprising an anti-reflection unit disposed between the first electrode and the second electrode. In Article 10,
A display device wherein the anti-reflection unit includes a polarizing film and further includes an optically transparent adhesive member disposed between the polarizing film and the first electrode. In Article 10,
The above second electrode is a display device directly disposed on the anti-reflection unit. In Article 9,
A display device further comprising a window unit disposed on the second electrode. In Article 13,
A display device further comprising an optically transparent adhesive member disposed between the second electrode and the window unit. In Article 13,
The above window unit includes a base film and a shading pattern directly disposed on the lower surface of the base film,
A display device in which the second electrode is directly placed on the lower surface of the base film. delete delete delete delete delete

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