KR100453971B1 - Integral capacity-voltage converter - Google Patents

Abstract

Provided is an integrated capacitance-to-voltage converter that solves the nonlinearity of capacitive pressure sensors.

An integrated capacitance-to-voltage converter is composed of a switch capacitor integrator and a differential amplifier, and converts the capacity of a pressure sensor inversely proportional to the applied pressure into a voltage that varies linearly, corresponding to 90% of the initial electrode spacing. It has very low nonlinearity of less than 0.01% / FS for the displacement, and is insensitive to offset and parasitic capacitance, and has offset correction and gain adjustment functions, which are essential functions of signal processing.

Description

Integral capacity-voltage converter

The present invention relates to an integrated capacitance-to-voltage converter for converting the capacitance of a capacitor of a pressure sensor into a voltage. Particularly, a linear voltage is obtained in which the capacitance varies nonlinearly according to the pressure applied from a fully differential capacitive pressure sensor. The present invention relates to an integrated capacitance-to-voltage converter for converting a circuit into a circuit.

Pressure sensors are used in a wide variety of industries, including automotive, medical, industrial, environmental, aerospace and military. These applications demand pressure sensors with high precision, mass production, and low cost.

The rapid development of micromachining technology and semiconductor integration technology has made it possible to develop a semiconductor pressure sensor suitable for the above requirements.

Since the semiconductor pressure sensor outputs a very weak signal, it requires a high performance low noise circuit. The signal processing circuit outputting the final pressure detection signal of the pressure sensor performs functions such as offset compensation, gain adjustment, temperature compensation, and nonlinear correction, and the signal processing circuit greatly influences the performance of the pressure sensor.

Therefore, much research has been focused on the performance improvement of integrated signal processing circuits with the development of semiconductor pressure sensors.

Semiconductor pressure sensors include piezoresistive pressure sensors and capacitive pressure sensors.

The piezoresistive pressure sensor has excellent linearity, but requires a precise temperature compensation circuit and an excessive correction process due to the low sensitivity and the TCR (Temperature Coefficient of Resistance) characteristic of the high piezoresistive coefficient of 2000 ppm / ° C or higher.

In addition, the capacitive pressure sensor has a low temperature coefficient of 100 ppm / ° C. or less, and has a high sensitivity characteristic and low power consumption of about 10 to 20 times compared to the piezoresistive pressure sensor. Most pressure sensors have a capacitive type.

However, the capacitive pressure sensor has a relatively large offset and parasitic capacitance due to packaging and wiring, and has a nonlinear characteristic in which capacity change is inversely proportional to pressure.

In order to reduce the influence of the offset and parasitic capacitance of the capacitive pressure sensor, a pressure sensor and a signal processing circuit having a differential mode structure have been proposed. The pressure sensor having the structure of the differential mode canceled the influence of parasitic capacitance and increased linearity. However, since the linear range of capacity change due to pressure is still limited, nonlinear correction is necessary when the displacement due to pressure is large.

Recently, it is easy to apply a mixed CMOS circuit to the signal processing of the pressure sensor, so the look-up table method, the nonlinear encoding method, and the nonlinear approximation of each section, which are nonlinear correction methods using digital circuits and memories, are used. A nonlinear fitting method has been proposed.

The above methods can cope with all nonlinearities caused by various causes including ambient temperature, mechanical properties of pressure sensor and amplifier, etc. However, in order to increase the resolution of pressure detection, a large amount of memory and a complex signal processing circuit are required. I have a problem that I need.

Accordingly, an object of the present invention is to provide an integrated capacitance-to-voltage converter that converts a nonlinear capacitance change of a pressure sensor into a linear detection voltage without using a separate memory.

Another object of the present invention is to provide an integrated capacitance-to-voltage converter that can easily adjust offset and gain, and can minimize the loss of linearity due to the offset.

It is still another object of the present invention to provide an integrated capacitance-to-voltage converter capable of widening a dynamic range capable of detecting pressure and improving sensitivity.

In general, the main factor of the nonlinearity of the capacitive pressure sensor is that the capacitance of the capacitive pressure sensor is inversely proportional to the pressure, and the output of the pressure sensor signal processing circuit is proportional to the change in capacity. It is preferable that the output voltage of the signal processing circuit for processing is proportional to the displacement according to the pressure of the pressure sensor.

Therefore, the integrated capacitance-to-voltage converter of the present invention uses the capacitor of the pressure sensor as the feedback capacitor of the integrator so that the output voltage is linearly proportional to the pressure change of the pressure sensor. An integrator that integrates an input voltage while feeding back an output signal through a first capacitor and a second capacitor of a differential capacitance type pressure sensor, and two integrals that integrate the input voltage while the integrator feeds back through a first capacitor and a second capacitor. And a differential amplifier for differentially amplifying the voltage.

The integrator includes an operational amplifier for comparatively amplifying an input voltage and a feedback voltage, a fully differential capacitive pressure sensor whose capacitances of the first capacitor and the second capacitor vary according to the applied pressure, and are operated alternately with each other. A first feedback switching unit and a second feedback switching unit for causing an output voltage of the amplifier to be fed back through the first capacitor and the second capacitor, and a voltage fed back through the first capacitor and the second capacitor to the operational amplifier. Characterized in that the charging unit for supplying a feedback voltage.

The first feedback switching unit may be in a conductive state according to a first clock signal, and may be in a conductive state according to a second clock signal and a first switching element which causes the output signal of the operational amplifier to be fed back through the first capacitor. And a second switching element for discharging the power charged in the first capacitor, wherein the second feedback switching unit is brought into a conductive state according to the inverted first clock signal, and the output signal of the operational amplifier passes through the second capacitor. And a third switching element for feeding back and a fourth switching element for discharging the power charged in the second capacitor while being in a conductive state according to the second clock signal. The charging unit includes: the first feedback switching unit; A third charging the power fed back through the second feedback switching unit to supply the feedback power to the operational amplifier; The capacitor and the power supplied to the third capacitor while being in a conductive state according to the third clock signal are charged to the third capacitor, and the charged power is supplied to the third capacitor as feedback power. And a sixth switching element for discharging the power charged in the third capacitor while being in a conductive state according to the second clock signal.

The seventh switching element being in a conductive state according to a fourth switching signal, the integrator using a first capacitor and a second capacitor as feedback capacitors, respectively, and a seventh switching element for sampling an integrated output signal; A fourth capacitor which charges the signal sampled by the switching element and detects the difference value, an operational amplifier which compares and amplifies the charging voltage of the fourth capacitor and a preset reference voltage, and feeds back the output signal of the operational amplifier. And a correction voltage input unit configured to input a correction voltage for correcting the offset in the differential mode to the operational amplifier, wherein the correction voltage input unit is brought into a conductive state by the inverted first clock signal. In a conductive state according to the ninth switching element for supplying a correction voltage and the first clock signal, And a tenth switching element for supplying the charging voltage of the fourth capacitor and the correction voltage passing through the ninth switching element to the operational amplifier.

1A and 1B are schematic diagrams showing the configuration of a fully differential capacitive pressure sensor;

2 is an equivalent circuit diagram of a fully differential capacitive pressure sensor;

Figure 3 is a graph showing the capacity change with respect to the displacement of the diaphragm of the pressure sensor,

4 is a view for explaining the operation principle of the integrator capacitive-voltage converter of the present invention,

5 is a view showing the configuration of an integrated capacitance-to-voltage converter of the present invention,

6 is a waveform diagram of clock signals of FIG. 5;

7 is a view showing the configuration of another embodiment of the differential amplifier with the offset compensation and gain control function in the integrated capacitance-to-voltage converter of the present invention,

FIG. 8 is a graph showing a result of a piecespice simulation of an integrated capacitance-to-voltage converter of the present invention.

9 is a graph showing the output characteristics of the integrated capacitance-to-voltage converter and the proportional capacitance-to-voltage converter of the present invention according to the displacement of the pressure sensor;

10 is a graph showing an error due to in-phase parasitic capacitance,

11 is a graph showing an error due to differential mode parasitic capacitance,

12 is a graph showing the change of the maximum output voltage and nonlinearity characteristics by the influence of the common-mode offset capacitance,

FIG. 13 is a graph illustrating changes in offset voltage and nonlinearity characteristics due to the differential mode offset capacitance;

14 is a graph showing the influence of the parallel offset capacitance generated in the first capacitor, the offset voltage compensation and the gain adjustment thereto.

FIG. 15 is a graph illustrating the effects of parallel offset capacitance generated on the second capacitor, offset voltage compensation, and gain adjustment thereto.

* Description of the symbols for the main parts of the drawings *

300: integrator 310, 410: operational amplifier

320: first feedback switching unit 330: second feedback switching unit

340: charging unit 400: differential amplifier

C _{1 to} C ₅ : First to fifth capacitors CK ₁ to CK ₄ , / CK ₁ : Clock signal

M _{1 to} M ₁₀ : first to tenth switching elements V _G : input voltage

V _OR : reference voltage V _OC : correction voltage

Hereinafter, an integrated capacitance-to-voltage converter of the present invention will be described in detail with reference to the accompanying drawings.

Figure 1a is a schematic view showing a fully differential capacitive pressure sensor. As shown therein, the fully differential capacitive pressure sensor 150 is provided with a diaphragm 110 in the middle of the silicon substrate 100, and a center-boss 111 at the bottom of the diaphragm 110. Is provided. In addition, electrodes 120 and 130 and 140 are provided on the upper surface of the silicon substrate 100 and the diaphragm 110 so that the electrodes 120 and 140 face each other on the upper portion of the diaphragm 110. ₁ ) is formed, and a second capacitor C ₂ on which the electrodes 130 and 140 face each other is formed on the silicon substrate 100.

2 is an equivalent circuit diagram of the fully differential capacitive pressure sensor. As shown therein, the first capacitor C ₁ and the second capacitor C ₂ are provided in series between the electrodes 120, 140, 140, 130, and the electrodes 120, 140, 140 and the electrodes 120, 130, 140. Between the grounds, parasitic capacitors Cp ₁ , Cp ₂ and Cp ₃ , which are parasitic components of the fully differential capacitive pressure sensor 150, are generated.

When a predetermined pressure P is applied to the fully differential capacitive pressure sensor 150 having such a structure as shown in FIG. 1B, the diaphragm 110 is displaced and moves upward according to the pressure P. . At this time, since the central boss 111 is provided on the bottom of the diaphragm 110 and is reinforced, the left and right sides 113 and 115 of the thin diaphragm 110 do not have a displacement in the middle portion of the diaphragm 110. ) Causes displacement according to the applied pressure P. Therefore, the diaphragm 110 continues to move upward while keeping the horizontal state, whereby the electrodes 120 and 140 of the first capacitor C ₁ continue to be horizontal, and also the electrode of the second capacitor C ₂ . 140 and 130 also remain horizontal.

When the diaphragm 110 moves upward, the gap between the electrodes 120 and 140 ( )silver Decrease by The capacitance of the first capacitor C ₁ increases, and at the same time, the gap between the electrodes 140 and 130 ) Is the same distance as the first capacitor (C ₁ ) Increase by ), The capacity of the second capacitor C ₂ is reduced.

Since the displacement amount of the diaphragm 110 is proportional to the applied pressure P, the output of the signal processing circuit of the pressure sensor 150 is the displacement amount of the diaphragm 110. It is necessary to be proportional to.

Displacement of the diaphragm 110 Since is a function of pressure and temperature can be expressed by the following equation (1).

Where k is a proportionality constant, P is pressure, T is temperature, and f (T) is a function of temperature T.

In general, since the capacitance of the capacitor is inversely proportional to the distance between the two electrodes facing each other, the capacitance change of the first capacitor C ₁ and the second capacitor C ₂ according to the displacement of the diaphragm 110 of the pressure sensor 150 is shown in FIG. As shown in Fig. 3, a significant difference occurs.

Therefore, in order to secure the linearity of the pressure sensor 150, the displacement proportional capacitance-voltage converter restricts the amount of displacement of the diaphragm 110 to be very small.

Capacity difference between the first capacitor C ₁ and the second capacitor C ₂ May be calculated as in Equation 2 to Equation 4 below.

From here Is the dielectric constant, and A is the electrode in the case of manufacturing the pressure sensor 150 with an opposing area between the electrodes 120, 140, 130, 140 forming the first capacitor C ₁ and the second capacitor C ₂ . The opposite areas between (120, 140) (130, 140) are manufactured to be the same.

In order to secure the nonlinearity of 1% or less, if the displacement of the diaphragm 110 is limited to 10% or less of the maximum allowable displacement as shown in Equation 5 below, the capacitor C ₁ (C ₂ ) of the pressure sensor 150 The capacity change of can be approximated as Equation 6.

Here, the maximum allowable displacement amount is the distance d ₀ between the initial electrodes 120, 140, 130, 140, which are structural limits.

Therefore, the capacity proportional capacitance-to-voltage converter has a disadvantage in that the range of pressure that can be detected is reduced by limiting the displacement width of the diaphragm 110 of the pressure sensor 150, thereby degrading resolution and sensitivity.

However, when the capacitor of the pressure sensor 150 is used as the feedback capacitor of the integrator, the output voltage of the integrator is inversely proportional to the capacity of the first capacitor C ₁ and the second capacitor C ₂ of the pressure sensor 150. Therefore, an integrated capacitance-to-voltage converter in which the output voltage is proportional to the distance between the two electrodes 120 and 140 and 130 and 140 can be configured.

4 is a view for explaining the operation principle of the integrator capacitive-voltage converter of the present invention showing the configuration of an integrative capacitive-voltage converter composed of two integrators and a differential amplifier. As shown therein, the first integrator 200 integrates a predetermined input voltage using the first capacitor C ₁ of the pressure sensor 150 as a feedback capacitor, and the second capacitor of the pressure sensor 150. The second integrator 210 which integrates a predetermined input voltage using C ₂ ) as a feedback capacitor, and the output voltages of the first integrator 200 and the second integrator 210. ) ( ) Is configured as a differential amplifier 220 for differentially amplifying.

In the integrated capacitance-to-voltage converter having such a configuration, the output voltage V _S1 of the first integrator 200 using the first capacitor C ₁ of the pressure sensor 150 as a feedback capacitor is represented by the following equation. Equation 7

here Is a constant current supplied to the first capacitor C ₁ , Is the integral time, Is the offset voltage.

When the integration of Equation 7 is performed, Equation 8 is obtained.

Where the constant k is to be.

Similarly, when the applied current and the integration time are the same for the second capacitor C ₂ , the output voltage of the second integrator 210 ) Is shown in Equation 9 below.

Therefore, the output voltage of the differential amplifier Is the same as Equation 10.

As shown in Equation 10, the integrated capacitance-to-voltage converter cancels the offset voltage and the output voltage is displaced by the pressure applied to the pressure sensor 150. It can be seen that it is proportional to.

As such, since the integrated capacitance-to-voltage converter can completely secure the linearity of the capacitive pressure sensor 150, the theoretically detectable pressure range is possible up to the maximum allowable displacement of the diaphragm 110.

Unlike the conventional capacitive pressure sensor, the fully differential capacitive pressure sensor 150 of FIG. 1A has a first electrode and a second capacitor C ₁ (C ₂ ) sharing one electrode 140. And since the second capacitor (C ₁ ) (C ₂ ) is not electrically separated completely, as shown in FIG. 4, the first integrator 200 and the second integrator 210 may not be separated.

Therefore, one integrator should alternately use the first and second capacitors C ₁ and C ₂ as feedback capacitors, and the differential amplifier 220 also has two integrators that the one integrator alternately outputs. It must be configured to differentially amplify the signal.

5 is a diagram showing the configuration of an integrated capacitance-to-voltage converter of the present invention. Here, reference numeral 300 denotes an integrator that integrates the input voltage V _G of a predetermined level while alternately using the first capacitor C ₁ and the second capacitor C ₂ of the pressure sensor 150 as feedback capacitors. Reference numeral 400 denotes differential amplification of two integrated signals obtained by integrating the input voltage V _G while the integrator 300 alternately uses the first capacitor C ₁ and the second capacitor C ₂ as feedback capacitors. Is a differential amplifier.

The integrator 300 includes an operational amplifier 310 for generating an integrated signal of an input voltage V _G , a first clock signal CK ₁ , an inverted first clock signal / CK ₁ , and a second clock signal. A _{first of} feeding back the output signal of the operational amplifier 310 through the first capacitor C ₁ and the second capacitor C ₂ of the pressure sensor 150 while operating alternately with each other according to CK ₂ ; According to the feedback switching unit 320 and the second feedback switching unit 330 and the third clock signal CK ₃ which phase-delayed the second clock signal CK ₂ and the second clock signal CK ₂ . The charging unit 340 is provided with a feedback input to the operational amplifier 310 while charging the signal fed back through the first feedback switching unit 320 and the second feedback switching unit 330.

The first feedback switching unit 320 is a first switching device that is brought into a conductive state by the inverted first clock signal / CK ₁ between the output terminal of the operational amplifier 300 and the inverting input terminal (−). (M ₁ ) and the first capacitor (C ₁ ) are connected in series, and the second switching element (M ₂ ), which is in a conductive state by the second clock signal (CK ₂ ), is connected to the first capacitor (C ₁ ). Are connected in parallel.

The second feedback switching unit 330 is a third switching element (M) which is brought into a conductive state by the first clock signal CK ₁ between the output terminal of the operational amplifier 300 and the inverting input terminal (−). ₃ ) and the second capacitor C ₂ are connected in series, and the fourth switching element M ₄ , which is in a conductive state by the second clock signal CK ₂ , is connected in parallel to the second capacitor C ₂ . Connected.

The charging unit 340 of the operational amplifier 300 is connected to the third capacitor C ₃ , which is a ground capacitor, through a fifth switching element M ₅ in which the third clock signal CK ₃ is in a conductive state. The sixth switching element M ₆ , which is connected to the inverting input terminal (−) and brought into a conductive state by the second clock signal CK ₂ , is connected in parallel to the third capacitor C ₃ .

The differential amplifier 400 sequentially passes through the seventh switching element M ₇ and the fourth capacitor C ₄ , where the output terminal of the integrator 300 is in a conductive state according to the fourth clock signal CK ₄ . It is connected to the inverting input terminal (−) of the operational amplifier 410, and the reference voltage (+) to the non-inverting input terminal (+) of the operational amplifier 410. Between a) comprising: a first clock signal (CK _1), an eighth switching device (M ₈₎ is in a conductive state by the fifth capacitor (-) output terminal and the inverting input terminal (of the applied operational amplifier (410) C ₅ ) are connected in parallel.

For example, the switching elements M _{1 to} M ₈ use NMOS field effect transistors, and the second clock signal CK ₂ and the third clock signal CK _{3 are} shown in FIG. 6. A two phase non-overlapping clock signal with each other has a frequency twice that of the first clock signal CK ₁ .

In the integrated capacitance-to-voltage converter of the present invention configured as described above, as shown in FIG. 6, the first clock signal CK ₁ becomes low in potential at time t ₁ , and the inverted first clock signal / CK ₁ is inverted. When is the high potential, the first switching device (M ₁ ) is in a conductive state, the first feedback switching unit 320 is operated, the third switching device (M ₃ ) is cut off to the second feedback switching unit 330 ) Will not work.

In this state, since the second clock signal CK ₂ becomes high potential at time t ₁ , and the third clock signal CK ₃ is low potential, the fifth switching element M ₅ of the charging unit 340 is blocked. State, and the sixth switching element M ₆ is in a conductive state.

Then, the power charged in the first capacitor C ₁ is discharged through the second switching element M ₂ , and the power charged in the third capacitor C ₃ is also the sixth switching element M _6. Are all discharged.

Therefore, since the operational amplifier 310 has no power applied to its inverting input terminal (−), the output voltage V _S of the operational amplifier 310 has the same level as the input voltage V _G.

In this state, when the second clock signal CK ₂ becomes low potential and the third clock signal CK ₃ becomes high potential at time t ₂ , the second clock signal CK ₂ becomes low by the second clock signal CK ₂ of low potential. The second switching element M ₂ and the sixth switching element M ₆ are cut off, and the fifth switching element M ₅ is brought into a conductive state by the high potential third clock signal CK ₃ . Then, the output voltage (V _S) of the operational amplifier (310) sequentially to the first switching element (M _1), a first capacitor (C _1), the fifth switching element (M ₅₎ and a third capacitor (C ₃₎ Since the first capacitor C ₁ and the third capacitor C ₃ are charged to the ground and the charging power of the third capacitor C ₃ is applied to the inverting input terminal (−) of the operational amplifier 310. The operational amplifier 310 may include a charging power source and an input voltage of the third capacitor C ₃ . ) And outputs an integrated voltage V _S of a predetermined level proportional to the capacity of the first capacitor C ₁ of the pressure sensor 150.

When the first and second clock signals CK ₁ and CK ₂ become high potential at time t ₃ and the inverting first clock signal / CK ₁ becomes low potential, the first feedback switching is reversed. The unit 320 does not operate, and the second feedback switching unit 330 operates so that the second clock signal CK ₂ becomes low potential at a time t ₄ , and the third clock signal CK ₃ is high. As it goes up, the operational amplifier 310 outputs a predetermined integrated voltage V _S which is proportional to the capacity of the second capacitor C ₂ of the pressure sensor 150.

Here, the voltage outputted by the integrator 300 using the first capacitor C ₁ as a feedback capacitor is referred to as V _S1 , and the voltage outputted using the second capacitor C ₂ as the feedback capacitor is represented as V _S2. In this case, the output voltage V _S1 of the integrator 300 is expressed by Equation 11 below.

Here, the integration time (T) is sufficient, so that the input voltage ( ₃ ) to the third capacitor (C ₃ ) If the voltage equal to the level of Average value of Average ( ) Is the same as Equation 12.

Substituting Equation 12 into Equation 11, the output voltage V _S1 of the integrator 300 is expressed by Equation 13 below.

Likewise, when the second capacitor C ₂ is used as a feedback capacitor, the output voltage V _S2 of the integrator 300 is expressed by Equation 14 below.

The integrator of the present invention is strong in the offset influence because the first capacitor (C ₁ ) and the second capacitor (C ₂ ) of the pressure sensor 150 share the bias circuit and the operational amplifier 310, and the CMOS switch capacitor circuit Because of the application, temperature and noise are strong.

The output voltages V _S1 and V _S2 of the integrator 300 are input to the differential amplifier 400, and the differential amplifier 400 has an interval d between the electrodes at the output voltages V _S1 and V _S2 of the integrator 300. ₀ and input voltage (V _G ) must be canceled mutually.

In the differential amplifier 400, the seventh switching element M ₇ samples the output voltages V _S1 and V _S2 of the integrator 300 and charges the fourth capacitor C ₄ , and at the time of sampling. Since the output voltages V _S1 and V _S2 of the integrator 300 are to be stabilized, the fourth clock signal CK ₄ for switching the seventh switching element M ₇ is the third clock signal as shown in FIG. 6. A clock signal having a narrower high potential period than the three clock signals CK ₃ is used.

First, when the first clock signal CK ₁ has a high potential, the eighth switching element M ₈ is brought into a conductive state so that the power charged in the fifth capacitor C ₅ is applied to the eighth switching element M ₈ . When all discharged through the fourth clock signal CK ₄ has a high potential, the output voltage V _S2 of the integrator 300 is sampled through the seventh switching element M ₇ and applied to the capacitor C ₄ . Is charged.

In this state, when the first clock signal CK ₁ becomes low potential, the eighth switching device M ₈ is turned off to activate the capacitor C ₅ , and the fourth clock signal CK ₄ becomes high potential. In this case, the output voltage V _S1 of the integrator 300 is applied to the capacitor C ₄ through the seventh switching element M ₇ .

Therefore, the charge corresponding to the difference between the output voltage V _S2 and the output voltage V _S1 of the integrator 300 is charged in the capacitor C ₅ so that the differential amplifier 400 performs the differential amplification operation.

This can be summarized as follows.

Here, Q ₁ is the charge amount of the fourth capacitor C ₄ with respect to the output voltage V _S1 of the integrator 300.

Here, Q ₂ is the charge amount of the fourth capacitor C ₄ with respect to the output voltage V _S2 of the integrator 300.

Summarizing Equation 17, the output voltage V _D of the differential amplifier 400 is equal to Equation 18 and is proportional to the displacement of the pressure sensor 150.

Here, when the differential amplifier 400 uses the operational amplifier 410 using a single power supply, the output voltage V _S2 of the integrator 300 should always be greater than the output voltage V _S1 , and also greater than 0 V. Voltage V _OR is required.

In general, the pressure sensor 150 is offset due to manufacturing process error, packaging, and peripheral parasitic components, and the sensitivity is greatly changed, so it is necessary to add a correction function.

7 is a view showing another embodiment of a differential amplifier with a correction function according to the present invention. As shown in the drawing, another embodiment of the present invention conducts the inverted first clock signal / CK ₁ between the fourth capacitor C ₄ and the inverting input terminal (−) of the operational amplifier 410. A ninth switching element M ₉ to be in a state is provided, and at a connection point of the ninth switching element M ₉ and the fourth capacitor C ₄ , a correction voltage is generated in accordance with the first clock signal CK ₁ . And a tenth switching device M ₁₀ for supplying V _OC ).

Here, the level of the correction voltage (V _OC ) is set so that the initial output voltage (V _D0 ) of the differential amplifier 400 is 0V, as shown in equations (19) to (21).

When the difference occurs in the initial output voltage (V _S10 ) (V _S20 ) of the integrator 300 by the offset between the first capacitor (C ₁ ) and the second capacitor (C ₂ ) as shown in Equation 21 This can be corrected by adjusting the correction voltage V _OC based on the voltage V _OR .

Among the causes of the offset, the error due to the initial distance d ₀ of the electrodes 120, 130, and 140 of the pressure sensor 150 is easily corrected by the correction voltage V _OC because it is a linear component as shown in Equation 18. do.

However, the offset due to parasitic capacitance connected in parallel to the first capacitor C ₁ and the second capacitor C ₂ of the pressure sensor 150 causes variation in the offset voltage, gain sensitivity, and linearity. Performance evaluation of the type capacitance-to-voltage converter is necessary.

In order to measure the performance of the integrated capacitance-to-voltage converter of the present invention, a simulation was carried out with a piecespice using 0.6 μm CMOS process parameters.

The op amp uses a simple two-stage CMOS op amp with a DC gain of 70 margin, a phase margin of 88 °, and a slew rate of 3V / ㎲. Since the response speed of the pressure sensor 150 is several hundred Hz or less, the first clock signal CK ₁ uses a pulse signal having a duty ratio of 50% and a frequency of 50 Hz, and the second to fourth clock signals. (CK _{2 to} CK ₄ ) used a non-overlapping clock signal of 100 Hz. The input voltage (V _G ) and reference voltage (V _OR ) were fixed at 0.5V and simulations were performed at room temperature.

(1) Output characteristics and linearity according to displacement

FIG. 8 is a simulation result showing an operating waveform during 60 ms. FIG. 8A shows a first clock signal CK ₁ and an inverted first clock signal / CK ₁ which are simply inverted clock signals, and FIG. 8B shows a second waveform. The clock signal CK ₂ and the third clock signal CK ₃ are two phase non-overlapping clocks. The fourth clock signal CK ₄ may be a clock signal included in a high potential pulse of the second clock signal CK ₂ . In FIG. 9C, the odd-numbered pulse is the output signal V _S2 of the integrator 300 and the even-numbered pulse is the output signal V _S1 of the integrator 300. When the first clock signal CK ₁ is low potential and the fourth clock signal CK ₄ is high potential, the output signal V _D of the differential amplifier 400 is output in the form of a pulse signal. By sampling this and passing the low pass smoothing circuit (not shown), the output signal of the continuous pressure sensor 150 can be obtained.

9 is a capacitance 4 의 of the first capacitor C ₁ and the second capacitor C ₂ of the pressure sensor 150, the interval d ₀ between the electrodes 120, 130, 140 is 1 μm, Is 0 to 0.9 μm (0 to 90%), the input voltage (V _G ) is 0.5V, and the reference voltage (V _OR ) is 0.5V. This is a simulation result of the voltage converter.

The integrated capacitance-to-voltage converter of the present invention linearly generates a voltage of 0.5V to 4.5V according to a displacement of 0 to 0.9 mu m and exhibits a nonlinear characteristic of 0.01% or less. For the maximum displacement of 0.9 mu m, the first capacitor C ₁ becomes larger than 40 mW and the second capacitor C ₂ becomes smaller than 2.5 mW.

As such, since the capacity of the pressure sensor 150 is very wide and asymmetrical, the capacity proportional capacitance-to-voltage converter has a very large error when the displacement becomes more than 10% of d ₀ . On the other hand, the integrated capacitance-to-voltage converter has been found to have a very good linearity even with a large variable capacitance pressure sensor.

(2) Evaluation of the effects of parasitic components

As shown in FIG. 2, the characteristic change of the integrated capacitance-voltage converter generated by the parasitic capacitors Cp ₁ , Cp ₂ and Cp ₃ , which are parasitic components provided between the pressure sensor 150 and the ground, is evaluated. It was. By dividing the parasitic capacitance into common mode and differential mode, the capacitances of the first capacitor C ₁ and the second capacitor C ₂ were changed up to four times based on the initial capacitance C ₀ , and the displacement due to pressure was the maximum allowable displacement. 50% and 20% of the cases were simulated for each. In the differential mode, the parasitic capacitor (Cp ₂ ) was fixed at 10㎊ and the parasitic capacitor (Cp ₁ ) (Cp ₃ ) was changed in the opposite direction to ± 20㎊, respectively.

As shown in the simulation results of FIGS. 10 and 11, the error voltage of the in-phase mode was 20 kΩ at maximum, and the error voltage of the differential mode was ± 10 kΩ or less.

From these results, it can be seen that the integrated capacitance-to-voltage converter has a strong characteristic against parasitic components connected to ground.

(3) Evaluation of influence of offset capacity

The parallel offset is divided into common mode and differential mode in order to examine the characteristic change caused by the parasitic capacitor (Cp ₁ , Cp ₂ , Cp ₃ ) connected in parallel with the pressure sensor 150 and the offset capacitance caused by the manufacturing process error. Was applied and simulated. The range of offset was up to 4 ms with C ₀ and the displacement was up to 90%.

Simulation results are shown in FIG. 12 in the in-phase mode and in FIG. 13 in the differential mode.

The common-mode offset showed a gain reduction that reduces the output voltage, and increased the offset voltage in the differential mode. Offset and gain can be adjusted with the correction circuit of FIG. However, the biggest problem with in-phase and differential mode offsets is increasing nonlinearity.

In particular, in frostbite mode, nonlinearity was over 2% at 4pF offset such as C ₀ . This occurs because the offset capacitance connected in parallel to the sensor does not cancel each other in the integrated capacitance-to-voltage converter of the present invention, unlike the capacitance-proportional capacitance-to-voltage converter. This is necessary.

(4) Offset Compensation and Gain Adjustment

In the case of the in-phase mode offset, the offset voltage does not occur and only the gain is reduced. Thus, correction can be performed by adjusting the input voltage V _G as shown in Equation 18.

In the case of the differential mode offset, since the offset voltage changes, it is necessary to adjust the correction voltage V _OC as shown in FIGS. 7 and 21. In order to evaluate whether the integrated capacitance-to-voltage converter is capable of offset compensation and gain adjustment, the compensation was performed by applying a differential mode offset capacitance of 1 차동 to the first capacitor C ₁ and the second capacitor C ₂ , respectively.

As shown in FIG. 14, when an offset is applied to the first capacitor C ₁ , an offset voltage of 0.5V and 1V are output. As a result of adjusting the correction voltage V _OC to 0.6V according to Equation 21, the offset voltage was lowered to 0.5V. Accordingly, the maximum voltage Vmax was lowered together to adjust the gain by adjusting the input voltage (V _G ) to 0.55V.

FIG. 15 shows a correction result when an offset occurs in the second capacitor C _{2. The} correction voltage V _OC is adjusted to 0.39V and the input voltage V _G is 0.63V.

On the other hand, while the present invention has been shown and described with respect to specific preferred embodiments, various modifications and changes of the present invention without departing from the spirit or field of the invention provided by the claims below It can be easily understood by those skilled in the art. For example, as described above by applying the integrated capacitance-to-voltage converter of the present invention to the pressure sensor 150 as an example, the present invention is not limited thereto and is applied to various capacitive sensors including an acceleration sensor and a displacement sensor. This is possible.

As described above, the integrated capacitance-to-voltage converter of the present invention obtained a very excellent nonlinearity of 0.01% / FS or less for a large displacement of 0 to 90% of the initial electrode interval in a simulation conducted extensively. In addition, it has been confirmed that the parasitic component has a very strong characteristic and that offset correction and gain adjustment are possible.

In addition, unlike the capacity proportional type voltage-to-voltage converter, the integrated capacity-voltage converter of the present invention does not need to limit the displacement of the pressure sensor because the output signal is proportional to the displacement of the pressure sensor. It has high linearity and resolution, and it is advantageous in miniaturization because it can be realized in a smaller area to achieve the same capacity.

Claims (8)

An operational amplifier for comparing and amplifying the input voltage and the feedback voltage; A fully differential capacitive pressure sensor having a first capacitor and a second capacitor having one terminal connected to each other and having a variable capacitance according to an applied pressure; A first feedback switching unit and a second feedback switching unit for sequentially feeding back the output voltages of the operational amplifiers through the first capacitor and the second capacitor; A charging unit supplying a feedback voltage to the operational amplifier while charging a voltage fed back through the first capacitor and the second capacitor; And An integrated capacitance-to-voltage converter, comprising: a differential amplifier for differentially amplifying the output voltage of the operational amplifier sequentially fed back through the first capacitor and the second capacitor to integrate two integrated voltages. delete The method of claim 1, wherein the first feedback switching unit; A first switching element which is brought into a conductive state according to a first clock signal and causes an output signal of the operational amplifier to be fed back through the first capacitor; And And a second switching element discharging the power charged in the first capacitor while being brought into a conductive state according to a second clock signal. The method of claim 1, wherein the second feedback switching unit; A third switching element which is brought into a conductive state according to the inverted first clock signal and causes an output signal of the operational amplifier to be fed back through the second capacitor; And And a fourth switching element discharging the power charged in the second capacitor while being in a conductive state according to the second clock signal. According to claim 1, The charging unit; A third capacitor charging power supplied through the first feedback switching unit and the second feedback switching unit to supply the feedback power to the operational amplifier; A power supply which is in a conductive state according to a third clock signal and charges the power fed back through the first feedback switching unit and the second feedback switching unit to a third capacitor and causes the charged power to be supplied to the third capacitor as feedback power; 5 switching elements; And And a sixth switching element discharging the power charged in the third capacitor while being in a conductive state according to the second clock signal. The apparatus of claim 1, wherein the differential amplifier comprises: a; A seventh switching element in conductive state according to a fourth switching signal, wherein the integrator samples the integrated output signal using the first capacitor and the second capacitor as feedback capacitors, respectively; A fourth capacitor which charges the signal sampled by the seventh switching element and detects the difference value; An operational amplifier for comparing and amplifying the charging voltage of the fourth capacitor and a preset reference voltage; And And a fifth capacitor for feeding back the output signal of the operational amplifier. The method of claim 6, And a correction voltage input unit for inputting a correction voltage for correcting the offset in the differential mode to the operational amplifier. 8. The apparatus of claim 7, wherein the correction voltage input unit; A ninth switching element which is brought into a conductive state by the inverted first clock signal and supplies a correction voltage; And And a tenth switching device which is in a conductive state according to the first clock signal and supplies the operational voltage with the charging voltage of the fourth capacitor C ₄ and the correction voltage passing through the ninth switching device to the operational amplifier. Integral capacitance-voltage inverter.