KR100449242B1 - - Google Patents
Info
- Publication number
- KR100449242B1 KR100449242B1 KR10-2003-7009660A KR20037009660A KR100449242B1 KR 100449242 B1 KR100449242 B1 KR 100449242B1 KR 20037009660 A KR20037009660 A KR 20037009660A KR 100449242 B1 KR100449242 B1 KR 100449242B1
- Authority
- KR
- South Korea
- Prior art keywords
- instruction
- execution
- instructions
- register file
- functional units
- Prior art date
Links
- 239000000872 buffer Substances 0.000 abstract 5
- 230000003139 buffering effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3818—Decoding for concurrent execution
- G06F9/3822—Parallel decoding, e.g. parallel decode units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30054—Unconditional branch instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30061—Multi-way branch instructions, e.g. CASE
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30112—Register structure comprising data of variable length
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30116—Shadow registers, e.g. coupled registers, not forming part of the register space
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30134—Register stacks; shift registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
- G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
- G06F9/327—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for interrupts
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
- G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/3834—Maintaining memory consistency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
- G06F9/384—Register renaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3856—Reordering of instructions, e.g. using queues or age tags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3858—Result writeback, i.e. updating the architectural state or memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
- G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
- G06F9/3865—Recovery, e.g. branch miss-prediction, exception handling using deferred exception handling, e.g. exception flags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
- Microcomputers (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US72700691A | 1991-07-08 | 1991-07-08 | |
PCT/JP1992/000868 WO1993001545A1 (en) | 1991-07-08 | 1992-07-07 | High-performance risc microprocessor architecture |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20040004508A KR20040004508A (ko) | 2004-01-13 |
KR100449242B1 true KR100449242B1 (ko) | 2004-09-20 |
Family
ID=24920949
Family Applications (42)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020087028736A KR20080109099A (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008100A KR100875262B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020037001231A KR100559465B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008095A KR100764894B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1019930700687A KR100294475B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능알아이에스씨마이크로프로세서구조 |
KR1020037001233A KR100559475B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008098A KR100886000B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020037001232A KR100559468B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020067001063A KR100764898B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008101A KR100875266B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008096A KR100875252B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020067001062A KR100633578B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008097A KR100875257B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020037001229A KR100559455B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020067001061A KR100633574B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008104A KR100764895B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020037001234A KR100559482B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020037001230A KR100559463B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008099A KR100875259B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020007014869A KR100325177B1 (ko) | 1991-07-08 | 2000-12-27 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020007014868A KR100325176B1 (ko) | 1991-07-08 | 2000-12-27 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020007014867A KR100325175B1 (ko) | 1991-07-08 | 2000-12-27 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR10-2001-7015019A KR100403166B1 (ko) | 1991-07-08 | 2001-11-23 | |
KR10-2001-7015021A KR100403164B1 (ko) | 1991-07-08 | 2001-11-23 | |
KR10-2001-7015020A KR100403167B1 (ko) | 1991-07-08 | 2001-11-23 | |
KR10-2003-7001228A KR100393495B1 (ko) | 1991-07-08 | 2003-01-27 | |
KR10-2003-7001236A KR100393496B1 (ko) | 1991-07-08 | 2003-01-27 | |
KR10-2003-7001227A KR100393494B1 (ko) | 1991-07-08 | 2003-01-27 | |
KR10-2003-7001237A KR100393497B1 (ko) | 1991-07-08 | 2003-01-27 | |
KR10-2003-7009659A KR100449244B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009656A KR100449238B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009653A KR100469964B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009658A KR100403165B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009660A KR100449242B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009657A KR100449236B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009650A KR100469971B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009651A KR100469954B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009655A KR100469968B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009652A KR100469952B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009654A KR100469959B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7012158A KR100464272B1 (ko) | 1991-07-08 | 2003-09-18 | |
KR10-2003-7012159A KR20040000411A (ko) | 1991-07-08 | 2003-09-18 |
Family Applications Before (33)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020087028736A KR20080109099A (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008100A KR100875262B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020037001231A KR100559465B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008095A KR100764894B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1019930700687A KR100294475B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능알아이에스씨마이크로프로세서구조 |
KR1020037001233A KR100559475B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008098A KR100886000B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020037001232A KR100559468B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020067001063A KR100764898B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008101A KR100875266B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008096A KR100875252B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020067001062A KR100633578B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008097A KR100875257B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020037001229A KR100559455B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020067001061A KR100633574B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008104A KR100764895B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020037001234A KR100559482B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020037001230A KR100559463B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020077008099A KR100875259B1 (ko) | 1991-07-08 | 1992-07-07 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020007014869A KR100325177B1 (ko) | 1991-07-08 | 2000-12-27 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020007014868A KR100325176B1 (ko) | 1991-07-08 | 2000-12-27 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR1020007014867A KR100325175B1 (ko) | 1991-07-08 | 2000-12-27 | 고성능 알아이에스씨 마이크로프로세서 구조 |
KR10-2001-7015019A KR100403166B1 (ko) | 1991-07-08 | 2001-11-23 | |
KR10-2001-7015021A KR100403164B1 (ko) | 1991-07-08 | 2001-11-23 | |
KR10-2001-7015020A KR100403167B1 (ko) | 1991-07-08 | 2001-11-23 | |
KR10-2003-7001228A KR100393495B1 (ko) | 1991-07-08 | 2003-01-27 | |
KR10-2003-7001236A KR100393496B1 (ko) | 1991-07-08 | 2003-01-27 | |
KR10-2003-7001227A KR100393494B1 (ko) | 1991-07-08 | 2003-01-27 | |
KR10-2003-7001237A KR100393497B1 (ko) | 1991-07-08 | 2003-01-27 | |
KR10-2003-7009659A KR100449244B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009656A KR100449238B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009653A KR100469964B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009658A KR100403165B1 (ko) | 1991-07-08 | 2003-07-21 |
Family Applications After (8)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-2003-7009657A KR100449236B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009650A KR100469971B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009651A KR100469954B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009655A KR100469968B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009652A KR100469952B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7009654A KR100469959B1 (ko) | 1991-07-08 | 2003-07-21 | |
KR10-2003-7012158A KR100464272B1 (ko) | 1991-07-08 | 2003-09-18 | |
KR10-2003-7012159A KR20040000411A (ko) | 1991-07-08 | 2003-09-18 |
Country Status (8)
Country | Link |
---|---|
US (19) | US5539911A (ko) |
EP (3) | EP0547241B1 (ko) |
JP (23) | JP3441070B2 (ko) |
KR (42) | KR20080109099A (ko) |
AT (3) | ATE450826T1 (ko) |
DE (4) | DE69232113T2 (ko) |
HK (2) | HK1014782A1 (ko) |
WO (1) | WO1993001545A1 (ko) |
Families Citing this family (233)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5781753A (en) | 1989-02-24 | 1998-07-14 | Advanced Micro Devices, Inc. | Semi-autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for speculative and out-of-order execution of complex instructions |
US5768575A (en) * | 1989-02-24 | 1998-06-16 | Advanced Micro Devices, Inc. | Semi-Autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for sepculative and out-of-order execution of complex instructions |
US5226126A (en) * | 1989-02-24 | 1993-07-06 | Nexgen Microsystems | Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags |
JPH04367936A (ja) * | 1991-06-17 | 1992-12-21 | Mitsubishi Electric Corp | スーパースカラープロセッサ |
US5493687A (en) | 1991-07-08 | 1996-02-20 | Seiko Epson Corporation | RISC microprocessor architecture implementing multiple typed register sets |
US5539911A (en) * | 1991-07-08 | 1996-07-23 | Seiko Epson Corporation | High-performance, superscalar-based computer system with out-of-order instruction execution |
US5961629A (en) * | 1991-07-08 | 1999-10-05 | Seiko Epson Corporation | High performance, superscalar-based computer system with out-of-order instruction execution |
DE69233493T2 (de) | 1991-07-08 | 2005-07-28 | Seiko Epson Corp. | RISC-Prozessor mit erweiterbarer Architektur |
JP3730252B2 (ja) | 1992-03-31 | 2005-12-21 | トランスメタ コーポレイション | レジスタ名称変更方法及び名称変更システム |
US5371684A (en) * | 1992-03-31 | 1994-12-06 | Seiko Epson Corporation | Semiconductor floor plan for a register renaming circuit |
US5438668A (en) | 1992-03-31 | 1995-08-01 | Seiko Epson Corporation | System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer |
EP0638183B1 (en) * | 1992-05-01 | 1997-03-05 | Seiko Epson Corporation | A system and method for retiring instructions in a superscalar microprocessor |
EP0809252B1 (en) * | 1992-09-18 | 2003-11-26 | Hitachi, Ltd. | Data processing system with synchronous dynamic memory in integrated circuit technology |
US6735685B1 (en) * | 1992-09-29 | 2004-05-11 | Seiko Epson Corporation | System and method for handling load and/or store operations in a superscalar microprocessor |
EP0663083B1 (en) | 1992-09-29 | 2000-12-20 | Seiko Epson Corporation | System and method for handling load and/or store operations in a superscalar microprocessor |
WO1994016384A1 (en) | 1992-12-31 | 1994-07-21 | Seiko Epson Corporation | System and method for register renaming |
US5628021A (en) | 1992-12-31 | 1997-05-06 | Seiko Epson Corporation | System and method for assigning tags to control instruction processing in a superscalar processor |
JP2596712B2 (ja) * | 1993-07-01 | 1997-04-02 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 近接した分岐命令を含む命令の実行を管理するシステム及び方法 |
JP2801135B2 (ja) * | 1993-11-26 | 1998-09-21 | 富士通株式会社 | パイプラインプロセッサの命令読み出し方法及び命令読み出し装置 |
US5956753A (en) * | 1993-12-30 | 1999-09-21 | Intel Corporation | Method and apparatus for handling speculative memory access operations |
US6393550B1 (en) * | 1993-12-30 | 2002-05-21 | Intel Corporation | Method and apparatus for pipeline streamlining where resources are immediate or certainly retired |
US5724536A (en) * | 1994-01-04 | 1998-03-03 | Intel Corporation | Method and apparatus for blocking execution of and storing load operations during their execution |
US5546597A (en) * | 1994-02-28 | 1996-08-13 | Intel Corporation | Ready selection of data dependent instructions using multi-cycle cams in a processor performing out-of-order instruction execution |
US5564056A (en) * | 1994-03-01 | 1996-10-08 | Intel Corporation | Method and apparatus for zero extension and bit shifting to preserve register parameters in a microprocessor utilizing register renaming |
JP3212213B2 (ja) * | 1994-03-16 | 2001-09-25 | 株式会社日立製作所 | データ処理装置 |
US5878244A (en) * | 1995-01-25 | 1999-03-02 | Advanced Micro Devices, Inc. | Reorder buffer configured to allocate storage capable of storing results corresponding to a maximum number of concurrently receivable instructions regardless of a number of instructions received |
US6237082B1 (en) | 1995-01-25 | 2001-05-22 | Advanced Micro Devices, Inc. | Reorder buffer configured to allocate storage for instruction results corresponding to predefined maximum number of concurrently receivable instructions independent of a number of instructions received |
US5901302A (en) * | 1995-01-25 | 1999-05-04 | Advanced Micro Devices, Inc. | Superscalar microprocessor having symmetrical, fixed issue positions each configured to execute a particular subset of instructions |
US5903741A (en) * | 1995-01-25 | 1999-05-11 | Advanced Micro Devices, Inc. | Method of allocating a fixed reorder buffer storage line for execution results regardless of a number of concurrently dispatched instructions |
US5778434A (en) | 1995-06-07 | 1998-07-07 | Seiko Epson Corporation | System and method for processing multiple requests and out of order returns |
US5710902A (en) * | 1995-09-06 | 1998-01-20 | Intel Corporation | Instruction dependency chain indentifier |
US5694565A (en) * | 1995-09-11 | 1997-12-02 | International Business Machines Corporation | Method and device for early deallocation of resources during load/store multiple operations to allow simultaneous dispatch/execution of subsequent instructions |
US5897665A (en) * | 1995-12-15 | 1999-04-27 | Intel Corporation | Register addressing for register-register architectures used for microprocessors and microcontrollers |
US5930490A (en) * | 1996-01-02 | 1999-07-27 | Advanced Micro Devices, Inc. | Microprocessor configured to switch instruction sets upon detection of a plurality of consecutive instructions |
US5860000A (en) * | 1996-01-31 | 1999-01-12 | Hitachi Micro Systems, Inc. | Floating point unit pipeline synchronized with processor pipeline |
US5715425A (en) * | 1996-02-22 | 1998-02-03 | Sun Microsystems, Inc. | Apparatus and method for prefetching data into an external cache |
US5652774A (en) * | 1996-07-08 | 1997-07-29 | International Business Machines Corporation | Method and apparatus for decreasing the cycle times of a data processing system |
US5872951A (en) * | 1996-07-26 | 1999-02-16 | Advanced Micro Design, Inc. | Reorder buffer having a future file for storing speculative instruction execution results |
US5915110A (en) * | 1996-07-26 | 1999-06-22 | Advanced Micro Devices, Inc. | Branch misprediction recovery in a reorder buffer having a future file |
US5946468A (en) * | 1996-07-26 | 1999-08-31 | Advanced Micro Devices, Inc. | Reorder buffer having an improved future file for storing speculative instruction execution results |
US5983342A (en) * | 1996-09-12 | 1999-11-09 | Advanced Micro Devices, Inc. | Superscalar microprocessor employing a future file for storing results into multiportion registers |
US5774694A (en) * | 1996-09-25 | 1998-06-30 | Intel Corporation | Method and apparatus for emulating status flag |
US5815688A (en) * | 1996-10-09 | 1998-09-29 | Hewlett-Packard Company | Verification of accesses in a functional model of a speculative out-of-order computer system |
US5838941A (en) * | 1996-12-30 | 1998-11-17 | Intel Corporation | Out-of-order superscalar microprocessor with a renaming device that maps instructions from memory to registers |
US6195746B1 (en) | 1997-01-31 | 2001-02-27 | International Business Machines Corporation | Dynamically typed register architecture |
US5864701A (en) * | 1997-02-14 | 1999-01-26 | Integrated Device Technology, Inc. | Apparatus and method for managing interrupt delay associated with mask flag transition |
US5974538A (en) * | 1997-02-21 | 1999-10-26 | Wilmot, Ii; Richard Byron | Method and apparatus for annotating operands in a computer system with source instruction identifiers |
US5944810A (en) * | 1997-06-27 | 1999-08-31 | Sun Microsystems, Inc. | Superscalar processor for retiring multiple instructions in working register file by changing the status bits associated with each execution result to identify valid data |
US6035388A (en) | 1997-06-27 | 2000-03-07 | Sandcraft, Inc. | Method and apparatus for dual issue of program instructions to symmetric multifunctional execution units |
US6263416B1 (en) * | 1997-06-27 | 2001-07-17 | Sun Microsystems, Inc. | Method for reducing number of register file ports in a wide instruction issue processor |
US6128728A (en) * | 1997-08-01 | 2000-10-03 | Micron Technology, Inc. | Virtual shadow registers and virtual register windows |
US5966142A (en) * | 1997-09-19 | 1999-10-12 | Cirrus Logic, Inc. | Optimized FIFO memory |
US6249857B1 (en) * | 1997-10-20 | 2001-06-19 | Motorola, Inc. | Apparatus using a multiple instruction register logarithm based processor |
US6112293A (en) * | 1997-11-17 | 2000-08-29 | Advanced Micro Devices, Inc. | Processor configured to generate lookahead results from operand collapse unit and for inhibiting receipt/execution of the first instruction based on the lookahead result |
US6493790B1 (en) * | 1998-01-30 | 2002-12-10 | Sun Microsystems, Inc. | Translation-lookaside buffer with current tracking reference circuit |
US6345355B1 (en) | 1998-05-29 | 2002-02-05 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and apparatus for distributing commands to a plurality of circuit blocks |
US6317820B1 (en) | 1998-06-05 | 2001-11-13 | Texas Instruments Incorporated | Dual-mode VLIW architecture providing a software-controlled varying mix of instruction-level and task-level parallelism |
US6266761B1 (en) * | 1998-06-12 | 2001-07-24 | International Business Machines Corporation | Method and system in an information processing system for efficient maintenance of copies of values stored within registers |
WO2000011547A1 (en) * | 1998-08-21 | 2000-03-02 | California Institute Of Technology | Processing element with special application for branch functions |
US6308262B1 (en) * | 1998-09-30 | 2001-10-23 | Intel Corporation | System and method for efficient processing of instructions using control unit to select operations |
US6163155A (en) * | 1999-01-28 | 2000-12-19 | Dresser Industries, Inc. | Electromagnetic wave resistivity tool having a tilted antenna for determining the horizontal and vertical resistivities and relative dip angle in anisotropic earth formations |
US6882642B1 (en) * | 1999-10-14 | 2005-04-19 | Nokia, Inc. | Method and apparatus for input rate regulation associated with a packet processing pipeline |
US6470427B1 (en) | 1999-11-09 | 2002-10-22 | International Business Machines Corporation | Programmable agent and method for managing prefetch queues |
EP1109096A3 (en) * | 1999-12-17 | 2004-02-11 | Fujitsu Limited | Processor and method of controlling the same |
US6609193B1 (en) | 1999-12-30 | 2003-08-19 | Intel Corporation | Method and apparatus for multi-thread pipelined instruction decoder |
US6467027B1 (en) * | 1999-12-30 | 2002-10-15 | Intel Corporation | Method and system for an INUSE field resource management scheme |
US6601162B1 (en) * | 2000-01-19 | 2003-07-29 | Kabushiki Kaisha Toshiba | Processor which executes pipeline processing having a plurality of stages and which has an operand bypass predicting function |
US7149883B1 (en) * | 2000-03-30 | 2006-12-12 | Intel Corporation | Method and apparatus selectively to advance a write pointer for a queue based on the indicated validity or invalidity of an instruction stored within the queue |
US6446181B1 (en) * | 2000-03-31 | 2002-09-03 | Intel Corporation | System having a configurable cache/SRAM memory |
US6606684B1 (en) | 2000-03-31 | 2003-08-12 | Intel Corporation | Multi-tiered memory bank having different data buffer sizes with a programmable bank select |
US6785802B1 (en) | 2000-06-01 | 2004-08-31 | Stmicroelectronics, Inc. | Method and apparatus for priority tracking in an out-of-order instruction shelf of a high performance superscalar microprocessor |
US7080183B1 (en) * | 2000-08-16 | 2006-07-18 | Koninklijke Philips Electronics N.V. | Reprogrammable apparatus supporting the processing of a digital signal stream and method |
SE0003398D0 (sv) * | 2000-09-22 | 2000-09-22 | Ericsson Telefon Ab L M | Optimization of a pipelined processor system |
US6754808B1 (en) * | 2000-09-29 | 2004-06-22 | Intel Corporation | Valid bit generation and tracking in a pipelined processor |
US7149878B1 (en) * | 2000-10-30 | 2006-12-12 | Mips Technologies, Inc. | Changing instruction set architecture mode by comparison of current instruction execution address with boundary address register values |
US7079133B2 (en) * | 2000-11-16 | 2006-07-18 | S3 Graphics Co., Ltd. | Superscalar 3D graphics engine |
US7162718B1 (en) * | 2000-12-12 | 2007-01-09 | International Business Machines Corporation | Language extension for light weight threading in a JVM |
US7069422B2 (en) * | 2000-12-22 | 2006-06-27 | Modelski Richard P | Load-shift carry instruction |
US7007156B2 (en) * | 2000-12-28 | 2006-02-28 | Intel Corporation | Multiple coprocessor architecture to process a plurality of subtasks in parallel |
US6643755B2 (en) * | 2001-02-20 | 2003-11-04 | Koninklijke Philips Electronics N.V. | Cyclically sequential memory prefetch |
US6493814B2 (en) | 2001-03-08 | 2002-12-10 | International Business Machines Corporation | Reducing resource collisions associated with memory units in a multi-level hierarchy memory system |
US7711926B2 (en) * | 2001-04-18 | 2010-05-04 | Mips Technologies, Inc. | Mapping system and method for instruction set processing |
US6826681B2 (en) * | 2001-06-18 | 2004-11-30 | Mips Technologies, Inc. | Instruction specified register value saving in allocated caller stack or not yet allocated callee stack |
US7107439B2 (en) * | 2001-08-10 | 2006-09-12 | Mips Technologies, Inc. | System and method of controlling software decompression through exceptions |
US7191430B2 (en) * | 2001-09-24 | 2007-03-13 | Hewlett-Packard Development Company, L.P. | Providing instruction execution hints to a processor using break instructions |
JP2003140886A (ja) * | 2001-10-31 | 2003-05-16 | Seiko Epson Corp | インストラクションセット及びコンパイラ |
JP4272371B2 (ja) * | 2001-11-05 | 2009-06-03 | パナソニック株式会社 | デバッグ支援装置、コンパイラ装置、デバッグ支援プログラム、コンパイラプログラム、及びコンピュータ読取可能な記録媒体。 |
US7376811B2 (en) * | 2001-11-06 | 2008-05-20 | Netxen, Inc. | Method and apparatus for performing computations and operations on data using data steering |
JP3878508B2 (ja) * | 2001-11-08 | 2007-02-07 | 松下電器産業株式会社 | 回路群制御システム |
US6895460B2 (en) * | 2002-07-19 | 2005-05-17 | Hewlett-Packard Development Company, L.P. | Synchronization of asynchronous emulated interrupts |
US7120068B2 (en) * | 2002-07-29 | 2006-10-10 | Micron Technology, Inc. | Column/row redundancy architecture using latches programmed from a look up table |
US7493478B2 (en) * | 2002-12-05 | 2009-02-17 | International Business Machines Corporation | Enhanced processor virtualization mechanism via saving and restoring soft processor/system states |
US7502910B2 (en) * | 2003-01-28 | 2009-03-10 | Sun Microsystems, Inc. | Sideband scout thread processor for reducing latency associated with a main processor |
US20040148489A1 (en) * | 2003-01-28 | 2004-07-29 | Sun Microsystems, Inc. | Sideband VLIW processor |
US20040199749A1 (en) * | 2003-04-03 | 2004-10-07 | Robert Golla | Method and apparatus to limit register file read ports in an out-of-order, multi-stranded processor |
US7873110B2 (en) * | 2003-06-17 | 2011-01-18 | Broadcom Corporation | MPEG smart video transport processor with different transport packet handling |
US7428631B2 (en) * | 2003-07-31 | 2008-09-23 | Intel Corporation | Apparatus and method using different size rename registers for partial-bit and bulk-bit writes |
US7552426B2 (en) * | 2003-10-14 | 2009-06-23 | Microsoft Corporation | Systems and methods for using synthetic instructions in a virtual machine |
US7310722B2 (en) * | 2003-12-18 | 2007-12-18 | Nvidia Corporation | Across-thread out of order instruction dispatch in a multithreaded graphics processor |
US20050138297A1 (en) * | 2003-12-23 | 2005-06-23 | Intel Corporation | Register file cache |
US7171545B2 (en) * | 2003-12-30 | 2007-01-30 | Intel Corporation | Predictive filtering of register cache entry |
US7484045B2 (en) | 2004-03-30 | 2009-01-27 | Intel Corporation | Store performance in strongly-ordered microprocessor architecture |
US7437536B2 (en) * | 2004-05-03 | 2008-10-14 | Sony Computer Entertainment Inc. | Systems and methods for task migration |
US7724263B2 (en) * | 2004-05-14 | 2010-05-25 | Nvidia Corporation | System and method for a universal data write unit in a 3-D graphics pipeline including generic cache memories |
US7868902B1 (en) * | 2004-05-14 | 2011-01-11 | Nvidia Corporation | System and method for pixel data row forwarding in a 3-D graphics pipeline |
US20050289323A1 (en) * | 2004-05-19 | 2005-12-29 | Kar-Lik Wong | Barrel shifter for a microprocessor |
US8225034B1 (en) * | 2004-06-30 | 2012-07-17 | Oracle America, Inc. | Hybrid instruction buffer |
US7200693B2 (en) * | 2004-08-27 | 2007-04-03 | Micron Technology, Inc. | Memory system and method having unidirectional data buses |
US20080162877A1 (en) * | 2005-02-24 | 2008-07-03 | Erik Richter Altman | Non-Homogeneous Multi-Processor System With Shared Memory |
JP2007041837A (ja) * | 2005-08-03 | 2007-02-15 | Nec Electronics Corp | 命令プリフェッチ装置及び命令プリフェッチ方法 |
JP4841861B2 (ja) * | 2005-05-06 | 2011-12-21 | ルネサスエレクトロニクス株式会社 | 演算処理装置及びデータ転送処理の実行方法 |
US20070028027A1 (en) * | 2005-07-26 | 2007-02-01 | Micron Technology, Inc. | Memory device and method having separate write data and read data buses |
US7877584B2 (en) * | 2005-08-29 | 2011-01-25 | The Invention Science Fund I, Llc | Predictive processor resource management |
US20070050605A1 (en) * | 2005-08-29 | 2007-03-01 | Bran Ferren | Freeze-dried ghost pages |
US8255745B2 (en) * | 2005-08-29 | 2012-08-28 | The Invention Science Fund I, Llc | Hardware-error tolerant computing |
US7493516B2 (en) | 2005-08-29 | 2009-02-17 | Searete Llc | Hardware-error tolerant computing |
US7774558B2 (en) * | 2005-08-29 | 2010-08-10 | The Invention Science Fund I, Inc | Multiprocessor resource optimization |
US8516300B2 (en) * | 2005-08-29 | 2013-08-20 | The Invention Science Fund I, Llc | Multi-votage synchronous systems |
US7739524B2 (en) * | 2005-08-29 | 2010-06-15 | The Invention Science Fund I, Inc | Power consumption management |
US8209524B2 (en) * | 2005-08-29 | 2012-06-26 | The Invention Science Fund I, Llc | Cross-architecture optimization |
US8214191B2 (en) * | 2005-08-29 | 2012-07-03 | The Invention Science Fund I, Llc | Cross-architecture execution optimization |
US8423824B2 (en) | 2005-08-29 | 2013-04-16 | The Invention Science Fund I, Llc | Power sparing synchronous apparatus |
US7725693B2 (en) | 2005-08-29 | 2010-05-25 | Searete, Llc | Execution optimization using a processor resource management policy saved in an association with an instruction group |
US7653834B2 (en) | 2005-08-29 | 2010-01-26 | Searete, Llc | Power sparing synchronous apparatus |
US7647487B2 (en) | 2005-08-29 | 2010-01-12 | Searete, Llc | Instruction-associated processor resource optimization |
US8181004B2 (en) * | 2005-08-29 | 2012-05-15 | The Invention Science Fund I, Llc | Selecting a resource management policy for a resource available to a processor |
US7627739B2 (en) * | 2005-08-29 | 2009-12-01 | Searete, Llc | Optimization of a hardware resource shared by a multiprocessor |
US7779213B2 (en) * | 2005-08-29 | 2010-08-17 | The Invention Science Fund I, Inc | Optimization of instruction group execution through hardware resource management policies |
US20070050608A1 (en) | 2005-08-29 | 2007-03-01 | Searete Llc, A Limited Liability Corporatin Of The State Of Delaware | Hardware-generated and historically-based execution optimization |
US8981996B2 (en) * | 2005-09-27 | 2015-03-17 | Qualcomm Incorporated | Position location using transmitters with timing offset and phase adjustment |
US7747088B2 (en) | 2005-09-28 | 2010-06-29 | Arc International (Uk) Limited | System and methods for performing deblocking in microprocessor-based video codec applications |
WO2007069000A1 (en) | 2005-12-16 | 2007-06-21 | Freescale Semiconductor, Inc. | Device and method for processing instructions |
US8266413B2 (en) * | 2006-03-14 | 2012-09-11 | The Board Of Trustees Of The University Of Illinois | Processor architecture for multipass processing of instructions downstream of a stalled instruction |
EP2011018B1 (en) | 2006-04-12 | 2016-07-13 | Soft Machines, Inc. | Apparatus and method for processing an instruction matrix specifying parallel and dependent operations |
US7685467B2 (en) * | 2006-04-27 | 2010-03-23 | Texas Instruments Incorporated | Data system simulated event and matrix debug of pipelined processor |
US7647486B2 (en) | 2006-05-02 | 2010-01-12 | Atmel Corporation | Method and system having instructions with different execution times in different modes, including a selected execution time different from default execution times in a first mode and a random execution time in a second mode |
US20080077777A1 (en) * | 2006-09-25 | 2008-03-27 | Arm Limited | Register renaming for instructions having unresolved condition codes |
CN101627365B (zh) | 2006-11-14 | 2017-03-29 | 索夫特机械公司 | 多线程架构 |
US7664932B2 (en) | 2007-04-13 | 2010-02-16 | Microsoft Corporation | Scalable and configurable execution pipeline of handlers having policy information for selectively acting on payload |
US8082540B2 (en) * | 2007-04-19 | 2011-12-20 | International Business Machines Corporation | Method for visually indicating preceding and succeeding source code lines that are executed in a graphical debugging environment |
JP2008305185A (ja) * | 2007-06-07 | 2008-12-18 | Nec Electronics Corp | プロセッサ装置及び複合条件処理方法 |
JP4896837B2 (ja) * | 2007-08-20 | 2012-03-14 | 株式会社東芝 | 携帯可能電子装置および携帯可能電子装置の制御方法 |
US7823117B1 (en) * | 2007-12-21 | 2010-10-26 | Xilinx, Inc. | Separating a high-level programming language program into hardware and software components |
US8176406B2 (en) * | 2008-03-19 | 2012-05-08 | International Business Machines Corporation | Hard error detection |
US20090249035A1 (en) * | 2008-03-28 | 2009-10-01 | International Business Machines Corporation | Multi-cycle register file bypass |
US20090289943A1 (en) * | 2008-05-22 | 2009-11-26 | Howard Teece | Anti-aliasing system and method |
KR101012121B1 (ko) * | 2008-06-05 | 2011-02-07 | 경상북도 (관련부서:경상북도축산기술연구소장) | 송아지 사육 케이지 |
KR100892857B1 (ko) * | 2008-07-30 | 2009-04-15 | 주식회사 유비콘테크놀로지 | 시스템온칩의 내부 메모리 장치 및 그 운영방법 |
GB2463278B (en) * | 2008-09-05 | 2012-05-16 | Advanced Risc Mach Ltd | Scheduling control within a data processing system |
US8312442B2 (en) * | 2008-12-10 | 2012-11-13 | Oracle America, Inc. | Method and system for interprocedural prefetching |
US9690625B2 (en) * | 2009-06-16 | 2017-06-27 | Oracle America, Inc. | System and method for out-of-order resource allocation and deallocation in a threaded machine |
KR101032771B1 (ko) * | 2009-05-29 | 2011-05-06 | 광운대학교 산학협력단 | 구성형 프로세서에서 risc 명령어와 확장 명령어를 병렬 처리하기 위한 방법 및 그에 따른 구성형 프로세서 |
KR200448337Y1 (ko) * | 2009-12-31 | 2010-04-05 | 임준기 | 통풍기능을 구비한 농산물 받침대 |
CN102193775B (zh) * | 2010-04-27 | 2015-07-29 | 威盛电子股份有限公司 | 微处理器融合搬运/算术逻辑运算/条件跳跃指令 |
EP2616928B1 (en) | 2010-09-17 | 2016-11-02 | Soft Machines, Inc. | Single cycle multi-branch prediction including shadow cache for early far branch prediction |
WO2012051281A2 (en) | 2010-10-12 | 2012-04-19 | Soft Machines, Inc. | An instruction sequence buffer to store branches having reliably predictable instruction sequences |
WO2012051262A2 (en) * | 2010-10-12 | 2012-04-19 | Soft Machines, Inc. | An instruction sequence buffer to enhance branch prediction efficiency |
US9710270B2 (en) * | 2010-12-20 | 2017-07-18 | International Business Machines Corporation | Exception control method, system, and program |
WO2012135050A2 (en) | 2011-03-25 | 2012-10-04 | Soft Machines, Inc. | Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines |
EP2689330B1 (en) | 2011-03-25 | 2022-12-21 | Intel Corporation | Register file segments for supporting code block execution by using virtual cores instantiated by partitionable engines |
TWI533129B (zh) | 2011-03-25 | 2016-05-11 | 軟體機器公司 | 使用可分割引擎實體化的虛擬核心執行指令序列程式碼區塊 |
CN102789377B (zh) | 2011-05-18 | 2015-09-30 | 国际商业机器公司 | 处理指令分组信息的方法和装置 |
EP2710480B1 (en) | 2011-05-20 | 2018-06-20 | Intel Corporation | An interconnect structure to support the execution of instruction sequences by a plurality of engines |
TWI666551B (zh) | 2011-05-20 | 2019-07-21 | 美商英特爾股份有限公司 | 以複數個引擎作資源與互連結構的分散式分配以支援指令序列的執行 |
US8683261B2 (en) | 2011-07-20 | 2014-03-25 | International Business Machines Corporation | Out of order millicode control operation |
US8756591B2 (en) | 2011-10-03 | 2014-06-17 | International Business Machines Corporation | Generating compiled code that indicates register liveness |
US10078515B2 (en) | 2011-10-03 | 2018-09-18 | International Business Machines Corporation | Tracking operand liveness information in a computer system and performing function based on the liveness information |
US9690583B2 (en) | 2011-10-03 | 2017-06-27 | International Business Machines Corporation | Exploiting an architected list-use operand indication in a computer system operand resource pool |
US9354874B2 (en) | 2011-10-03 | 2016-05-31 | International Business Machines Corporation | Scalable decode-time instruction sequence optimization of dependent instructions |
US9329869B2 (en) | 2011-10-03 | 2016-05-03 | International Business Machines Corporation | Prefix computer instruction for compatibily extending instruction functionality |
US9697002B2 (en) | 2011-10-03 | 2017-07-04 | International Business Machines Corporation | Computer instructions for activating and deactivating operands |
US8615745B2 (en) | 2011-10-03 | 2013-12-24 | International Business Machines Corporation | Compiling code for an enhanced application binary interface (ABI) with decode time instruction optimization |
US8612959B2 (en) | 2011-10-03 | 2013-12-17 | International Business Machines Corporation | Linking code for an enhanced application binary interface (ABI) with decode time instruction optimization |
US9286072B2 (en) | 2011-10-03 | 2016-03-15 | International Business Machines Corporation | Using register last use infomation to perform decode-time computer instruction optimization |
US20150039859A1 (en) | 2011-11-22 | 2015-02-05 | Soft Machines, Inc. | Microprocessor accelerated code optimizer |
KR101703401B1 (ko) | 2011-11-22 | 2017-02-06 | 소프트 머신즈, 인크. | 다중 엔진 마이크로프로세서용 가속 코드 최적화기 |
KR101912427B1 (ko) | 2011-12-12 | 2018-10-29 | 삼성전자주식회사 | 재구성가능 프로세서 및 재구성가능 프로세서의 미니 코어 |
CN104126169B (zh) * | 2011-12-22 | 2018-11-09 | 英特尔公司 | 用于在两个向量寄存器的相应打包数据元素之间执行绝对差计算的系统、装置和方法 |
WO2013095666A1 (en) * | 2011-12-23 | 2013-06-27 | Intel Corporation | Systems, apparatuses, and methods for performing vector packed unary decoding using masks |
US8930674B2 (en) | 2012-03-07 | 2015-01-06 | Soft Machines, Inc. | Systems and methods for accessing a unified translation lookaside buffer |
US9152566B2 (en) * | 2012-06-15 | 2015-10-06 | International Business Machines Corporation | Prefetch address translation using prefetch buffer based on availability of address translation logic |
US10255944B2 (en) * | 2012-06-27 | 2019-04-09 | Marvell World Trade Ltd. | Systems and methods for reading and decoding encoded data from a storage device |
US9916253B2 (en) | 2012-07-30 | 2018-03-13 | Intel Corporation | Method and apparatus for supporting a plurality of load accesses of a cache in a single cycle to maintain throughput |
US9710399B2 (en) | 2012-07-30 | 2017-07-18 | Intel Corporation | Systems and methods for flushing a cache with modified data |
US9229873B2 (en) | 2012-07-30 | 2016-01-05 | Soft Machines, Inc. | Systems and methods for supporting a plurality of load and store accesses of a cache |
US9740612B2 (en) | 2012-07-30 | 2017-08-22 | Intel Corporation | Systems and methods for maintaining the coherency of a store coalescing cache and a load cache |
US9678882B2 (en) | 2012-10-11 | 2017-06-13 | Intel Corporation | Systems and methods for non-blocking implementation of cache flush instructions |
US10299934B2 (en) * | 2012-12-11 | 2019-05-28 | Globus Medical, Inc | Expandable vertebral implant |
US20140281413A1 (en) * | 2013-03-14 | 2014-09-18 | Mips Technologies, Inc. | Superforwarding Processor |
US10140138B2 (en) | 2013-03-15 | 2018-11-27 | Intel Corporation | Methods, systems and apparatus for supporting wide and efficient front-end operation with guest-architecture emulation |
WO2014150806A1 (en) | 2013-03-15 | 2014-09-25 | Soft Machines, Inc. | A method for populating register view data structure by using register template snapshots |
US9904625B2 (en) | 2013-03-15 | 2018-02-27 | Intel Corporation | Methods, systems and apparatus for predicting the way of a set associative cache |
US9886279B2 (en) | 2013-03-15 | 2018-02-06 | Intel Corporation | Method for populating and instruction view data structure by using register template snapshots |
US9891924B2 (en) | 2013-03-15 | 2018-02-13 | Intel Corporation | Method for implementing a reduced size register view data structure in a microprocessor |
WO2014150971A1 (en) | 2013-03-15 | 2014-09-25 | Soft Machines, Inc. | A method for dependency broadcasting through a block organized source view data structure |
US9436476B2 (en) | 2013-03-15 | 2016-09-06 | Soft Machines Inc. | Method and apparatus for sorting elements in hardware structures |
WO2014150991A1 (en) | 2013-03-15 | 2014-09-25 | Soft Machines, Inc. | A method for implementing a reduced size register view data structure in a microprocessor |
US10275255B2 (en) | 2013-03-15 | 2019-04-30 | Intel Corporation | Method for dependency broadcasting through a source organized source view data structure |
US9569216B2 (en) | 2013-03-15 | 2017-02-14 | Soft Machines, Inc. | Method for populating a source view data structure by using register template snapshots |
US9811342B2 (en) | 2013-03-15 | 2017-11-07 | Intel Corporation | Method for performing dual dispatch of blocks and half blocks |
US20140281116A1 (en) | 2013-03-15 | 2014-09-18 | Soft Machines, Inc. | Method and Apparatus to Speed up the Load Access and Data Return Speed Path Using Early Lower Address Bits |
US9627038B2 (en) | 2013-03-15 | 2017-04-18 | Intel Corporation | Multiport memory cell having improved density area |
CN105210040B (zh) | 2013-03-15 | 2019-04-02 | 英特尔公司 | 用于执行分组成块的多线程指令的方法 |
KR102083390B1 (ko) | 2013-03-15 | 2020-03-02 | 인텔 코포레이션 | 네이티브 분산된 플래그 아키텍처를 이용하여 게스트 중앙 플래그 아키텍처를 에뮬레이션하는 방법 |
US9582322B2 (en) | 2013-03-15 | 2017-02-28 | Soft Machines Inc. | Method and apparatus to avoid deadlock during instruction scheduling using dynamic port remapping |
GB2523823B (en) * | 2014-03-07 | 2021-06-16 | Advanced Risc Mach Ltd | Data processing apparatus and method for processing vector operands |
US9841974B2 (en) * | 2014-04-25 | 2017-12-12 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Renaming with generation numbers |
JP2017516228A (ja) | 2014-05-12 | 2017-06-15 | インテル・コーポレーション | 自己書き換えコードのハードウェアサポートを提供する方法及び装置 |
CN104156196B (zh) * | 2014-06-12 | 2017-10-27 | 龚伟峰 | 重命名预处理方法 |
US9678758B2 (en) | 2014-09-26 | 2017-06-13 | Qualcomm Incorporated | Coprocessor for out-of-order loads |
US9483409B2 (en) | 2015-02-05 | 2016-11-01 | International Business Machines Corporation | Store forwarding cache |
US10620952B2 (en) | 2015-06-24 | 2020-04-14 | International Business Machines Corporation | Conversion of boolean conditions |
US10705841B2 (en) | 2015-06-24 | 2020-07-07 | International Business Machines Corporation | Instruction to perform a logical operation on conditions and to quantize the Boolean result of that operation |
US10698688B2 (en) | 2015-06-24 | 2020-06-30 | International Business Machines Corporation | Efficient quantization of compare results |
US9794660B2 (en) | 2015-09-25 | 2017-10-17 | Intel Corporation | Integrated sound bar hinge assembly for mobile electronic device |
US10445091B1 (en) * | 2016-03-30 | 2019-10-15 | Apple Inc. | Ordering instructions in a processing core instruction buffer |
US11106467B2 (en) | 2016-04-28 | 2021-08-31 | Microsoft Technology Licensing, Llc | Incremental scheduler for out-of-order block ISA processors |
US10496409B2 (en) | 2016-11-22 | 2019-12-03 | The Arizona Board Of Regents | Method and system for managing control of instruction and process execution in a programmable computing system |
US10162680B2 (en) * | 2016-12-13 | 2018-12-25 | GM Global Technology Operations LLC | Control of data exchange between a primary core and a secondary core using a freeze process flag and a data frozen flag in real-time |
US10983799B1 (en) | 2017-12-19 | 2021-04-20 | Apple Inc. | Selection of instructions to issue in a processor |
US11422821B1 (en) | 2018-09-04 | 2022-08-23 | Apple Inc. | Age tracking for independent pipelines |
CN109614145B (zh) * | 2018-10-18 | 2021-03-09 | 中国科学院计算技术研究所 | 一种处理器核心结构及数据访存方法 |
US11269650B2 (en) * | 2018-12-29 | 2022-03-08 | Texas Instruments Incorporated | Pipeline protection for CPUs with save and restore of intermediate results |
CN111488176B (zh) * | 2019-01-25 | 2023-04-18 | 阿里巴巴集团控股有限公司 | 一种指令调度方法、装置、设备及存储介质 |
US11176055B1 (en) | 2019-08-06 | 2021-11-16 | Marvell Asia Pte, Ltd. | Managing potential faults for speculative page table access |
US11573802B2 (en) * | 2019-10-23 | 2023-02-07 | Texas Instruments Incorporated | User mode event handling |
US11579884B2 (en) * | 2020-06-26 | 2023-02-14 | Advanced Micro Devices, Inc. | Instruction address translation and caching for primary and alternate branch prediction paths |
US11656876B2 (en) | 2020-10-29 | 2023-05-23 | Cadence Design Systems, Inc. | Removal of dependent instructions from an execution pipeline |
US11243778B1 (en) * | 2020-12-31 | 2022-02-08 | Microsoft Technology Licensing, Llc | Instruction dispatch for superscalar processors |
US11886883B2 (en) | 2021-08-26 | 2024-01-30 | International Business Machines Corporation | Dependency skipping in a load-compare-jump sequence of instructions by incorporating compare functionality into the jump instruction and auto-finishing the compare instruction |
WO2023150114A1 (en) * | 2022-02-01 | 2023-08-10 | Apple Inc. | Conditional instructions prediction |
US12067399B2 (en) | 2022-02-01 | 2024-08-20 | Apple Inc. | Conditional instructions prediction |
US11809874B2 (en) | 2022-02-01 | 2023-11-07 | Apple Inc. | Conditional instructions distribution and execution on pipelines having different latencies for mispredictions |
Family Cites Families (279)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3346851A (en) * | 1964-07-08 | 1967-10-10 | Control Data Corp | Simultaneous multiprocessing computer system |
US3718912A (en) * | 1970-12-22 | 1973-02-27 | Ibm | Instruction execution unit |
US3789365A (en) * | 1971-06-03 | 1974-01-29 | Bunker Ramo | Processor interrupt system |
US3771138A (en) * | 1971-08-31 | 1973-11-06 | Ibm | Apparatus and method for serializing instructions from two independent instruction streams |
US3913074A (en) | 1973-12-18 | 1975-10-14 | Honeywell Inf Systems | Search processing apparatus |
JPS5110746A (ko) | 1974-07-17 | 1976-01-28 | Hitachi Ltd | |
US4041461A (en) * | 1975-07-25 | 1977-08-09 | International Business Machines Corporation | Signal analyzer system |
US4034349A (en) * | 1976-01-29 | 1977-07-05 | Sperry Rand Corporation | Apparatus for processing interrupts in microprocessing systems |
US4128880A (en) | 1976-06-30 | 1978-12-05 | Cray Research, Inc. | Computer vector register processing |
US4212076A (en) | 1976-09-24 | 1980-07-08 | Giddings & Lewis, Inc. | Digital computer structure providing arithmetic and boolean logic operations, the latter controlling the former |
US4101086A (en) | 1977-07-20 | 1978-07-18 | Eastman Kodak Company | Yarn tie-up and transfer tail method, and yarn package tube and apparatus for the method |
US4237532A (en) * | 1977-09-02 | 1980-12-02 | Sperry Corporation | Table driven decision and control logic for digital computers |
US4210960A (en) * | 1977-09-02 | 1980-07-01 | Sperry Corporation | Digital computer with overlapped operation utilizing conditional control to minimize time losses |
US4199811A (en) * | 1977-09-02 | 1980-04-22 | Sperry Corporation | Microprogrammable computer utilizing concurrently operating processors |
US4296465A (en) * | 1977-11-03 | 1981-10-20 | Honeywell Information Systems Inc. | Data mover |
AU529675B2 (en) * | 1977-12-07 | 1983-06-16 | Honeywell Information Systems Incorp. | Cache memory unit |
US4315314A (en) * | 1977-12-30 | 1982-02-09 | Rca Corporation | Priority vectored interrupt having means to supply branch address directly |
US4200927A (en) * | 1978-01-03 | 1980-04-29 | International Business Machines Corporation | Multi-instruction stream branch processing mechanism |
US4228495A (en) * | 1978-12-19 | 1980-10-14 | Allen-Bradley Company | Multiprocessor numerical control system |
US4315308A (en) | 1978-12-21 | 1982-02-09 | Intel Corporation | Interface between a microprocessor chip and peripheral subsystems |
US4296470A (en) * | 1979-06-21 | 1981-10-20 | International Business Machines Corp. | Link register storage and restore system for use in an instruction pre-fetch micro-processor interrupt system |
JPS5616248A (en) * | 1979-07-17 | 1981-02-17 | Matsushita Electric Ind Co Ltd | Processing system for interruption |
US4336024A (en) * | 1980-02-22 | 1982-06-22 | Airwick Industries, Inc. | Process for cleaning clothes at home |
JPS6028015B2 (ja) * | 1980-08-28 | 1985-07-02 | 日本電気株式会社 | 情報処理装置 |
US4434461A (en) * | 1980-09-15 | 1984-02-28 | Motorola, Inc. | Microprocessor with duplicate registers for processing interrupts |
JPS5757345A (en) * | 1980-09-24 | 1982-04-06 | Toshiba Corp | Data controller |
JPS57150040A (en) | 1981-03-11 | 1982-09-16 | Mitsubishi Electric Corp | Pipeline computer |
JPS57155666A (en) * | 1981-03-20 | 1982-09-25 | Fujitsu Ltd | Instruction controlling system of vector processor |
US4574349A (en) | 1981-03-30 | 1986-03-04 | International Business Machines Corp. | Apparatus for addressing a larger number of instruction addressable central processor registers than can be identified by a program instruction |
US4814979A (en) | 1981-04-01 | 1989-03-21 | Teradata Corporation | Network to transmit prioritized subtask pockets to dedicated processors |
JPS57204125A (en) | 1981-06-10 | 1982-12-14 | Hitachi Ltd | Electron-ray drawing device |
US4482950A (en) | 1981-09-24 | 1984-11-13 | Dshkhunian Valery | Single-chip microcomputer |
US4498134A (en) | 1982-01-26 | 1985-02-05 | Hughes Aircraft Company | Segregator functional plane for use in a modular array processor |
JPS58151655A (ja) * | 1982-03-03 | 1983-09-08 | Fujitsu Ltd | 情報処理装置 |
US4434641A (en) * | 1982-03-11 | 1984-03-06 | Ball Corporation | Buckle resistance for metal container closures |
US4484272A (en) * | 1982-07-14 | 1984-11-20 | Burroughs Corporation | Digital computer for executing multiple instruction sets in a simultaneous-interleaved fashion |
JPS5932045A (ja) * | 1982-08-16 | 1984-02-21 | Hitachi Ltd | 情報処理装置 |
US4500963A (en) | 1982-11-29 | 1985-02-19 | The United States Of America As Represented By The Secretary Of The Army | Automatic layout program for hybrid microcircuits (HYPAR) |
US4597054A (en) | 1982-12-02 | 1986-06-24 | Ncr Corporation | Arbiter circuit and method |
US4594655A (en) * | 1983-03-14 | 1986-06-10 | International Business Machines Corporation | (k)-Instructions-at-a-time pipelined processor for parallel execution of inherently sequential instructions |
US4800486A (en) * | 1983-09-29 | 1989-01-24 | Tandem Computers Incorporated | Multiple data patch CPU architecture |
US4807115A (en) * | 1983-10-07 | 1989-02-21 | Cornell Research Foundation, Inc. | Instruction issuing mechanism for processors with multiple functional units |
GB8329509D0 (en) * | 1983-11-04 | 1983-12-07 | Inmos Ltd | Computer |
JPS60120439A (ja) * | 1983-12-05 | 1985-06-27 | Nec Corp | 演算処理装置 |
JPS60168238A (ja) * | 1984-02-10 | 1985-08-31 | Hitachi Ltd | パイプラインデータ処理装置 |
US4561051A (en) | 1984-02-10 | 1985-12-24 | Prime Computer, Inc. | Memory access method and apparatus in multiple processor systems |
AU553416B2 (en) * | 1984-02-24 | 1986-07-17 | Fujitsu Limited | Pipeline processing |
JPS60225943A (ja) * | 1984-04-25 | 1985-11-11 | Hitachi Ltd | 例外割込み処理方式 |
US4648045A (en) | 1984-05-23 | 1987-03-03 | The Board Of Trustees Of The Leland Standford Jr. University | High speed memory and processor system for raster display |
JPS6140650A (ja) | 1984-08-02 | 1986-02-26 | Nec Corp | マイクロコンピユ−タ |
US4766564A (en) * | 1984-08-13 | 1988-08-23 | International Business Machines Corporation | Dual putaway/bypass busses for multiple arithmetic units |
US4677545A (en) | 1984-10-12 | 1987-06-30 | American Telephone And Telegraph Company | Microprocessor having macro-rom and main program queues |
US4991081A (en) | 1984-10-31 | 1991-02-05 | Texas Instruments Incorporated | Cache memory addressable by both physical and virtual addresses |
US4775927A (en) * | 1984-10-31 | 1988-10-04 | International Business Machines Corporation | Processor including fetch operation for branch instruction with control tag |
DE3587591T2 (de) * | 1984-11-21 | 1994-04-28 | Harris Corp | Mikroprozessor für Forth-ähnliche Sprache. |
JPS61133439A (ja) | 1984-12-04 | 1986-06-20 | Nec Corp | 命令先取り制御方式 |
JPH0652784B2 (ja) | 1984-12-07 | 1994-07-06 | 富士通株式会社 | ゲートアレイ集積回路装置及びその製造方法 |
US4829467A (en) | 1984-12-21 | 1989-05-09 | Canon Kabushiki Kaisha | Memory controller including a priority order determination circuit |
NL193475C (nl) * | 1984-12-27 | 1999-11-02 | Sony Corp | Microprocessorinrichting. |
US5255384A (en) | 1985-02-22 | 1993-10-19 | Intergraph Corporation | Memory address translation system having modifiable and non-modifiable translation mechanisms |
US4714994A (en) * | 1985-04-30 | 1987-12-22 | International Business Machines Corp. | Instruction prefetch buffer control |
JPH0762823B2 (ja) * | 1985-05-22 | 1995-07-05 | 株式会社日立製作所 | デ−タ処理装置 |
CA1254661A (en) * | 1985-06-28 | 1989-05-23 | Allen J. Baum | Method and means for instruction combination for code compression |
US4613941A (en) | 1985-07-02 | 1986-09-23 | The United States Of America As Represented By The Secretary Of The Army | Routing method in computer aided customization of a two level automated universal array |
US4945479A (en) | 1985-07-31 | 1990-07-31 | Unisys Corporation | Tightly coupled scientific processing system |
US4734852A (en) * | 1985-08-30 | 1988-03-29 | Advanced Micro Devices, Inc. | Mechanism for performing data references to storage in parallel with instruction execution on a reduced instruction-set processor |
US4777588A (en) | 1985-08-30 | 1988-10-11 | Advanced Micro Devices, Inc. | General-purpose register file optimized for intraprocedural register allocation, procedure calls, and multitasking performance |
US4719569A (en) | 1985-10-11 | 1988-01-12 | Sun Microsystems, Inc. | Arbitrator for allocating access to data processing resources |
US4722049A (en) * | 1985-10-11 | 1988-01-26 | Unisys Corporation | Apparatus for out-of-order program execution |
JPH0622035B2 (ja) * | 1985-11-13 | 1994-03-23 | 株式会社日立製作所 | ベクトル処理装置 |
JPS62152043A (ja) * | 1985-12-26 | 1987-07-07 | Nec Corp | 命令コ−ドアクセス制御方式 |
EP0239081B1 (en) * | 1986-03-26 | 1995-09-06 | Hitachi, Ltd. | Pipelined data processor capable of decoding and executing plural instructions in parallel |
IL81762A0 (en) * | 1986-04-11 | 1987-10-20 | Symbolics Inc | Instruction prefetch unit |
JP2545789B2 (ja) | 1986-04-14 | 1996-10-23 | 株式会社日立製作所 | 情報処理装置 |
US4809169A (en) * | 1986-04-23 | 1989-02-28 | Advanced Micro Devices, Inc. | Parallel, multiple coprocessor computer architecture having plural execution modes |
US4903196A (en) * | 1986-05-02 | 1990-02-20 | International Business Machines Corporation | Method and apparatus for guaranteeing the logical integrity of data in the general purpose registers of a complex multi-execution unit uniprocessor |
US4811208A (en) | 1986-05-16 | 1989-03-07 | Intel Corporation | Stack frame cache on a microprocessor chip |
US5051940A (en) * | 1990-04-04 | 1991-09-24 | International Business Machines Corporation | Data dependency collapsing hardware apparatus |
JP2684362B2 (ja) | 1986-06-18 | 1997-12-03 | 株式会社日立製作所 | 可変長データの記憶方式 |
US4814978A (en) | 1986-07-15 | 1989-03-21 | Dataflow Computer Corporation | Dataflow processing element, multiprocessor, and processes |
JPS6324428A (ja) * | 1986-07-17 | 1988-02-01 | Mitsubishi Electric Corp | キヤツシユメモリ |
US4942323A (en) * | 1986-07-28 | 1990-07-17 | Decesare Dominic | Two pole electric motor with stator winding encircling the rotor |
US4766566A (en) * | 1986-08-18 | 1988-08-23 | International Business Machines Corp. | Performance enhancement scheme for a RISC type VLSI processor using dual execution units for parallel instruction processing |
JPS6393041A (ja) * | 1986-10-07 | 1988-04-23 | Mitsubishi Electric Corp | 計算機 |
JPH0793358B2 (ja) | 1986-11-10 | 1995-10-09 | 日本電気株式会社 | ブロック配置処理方式 |
US4841453A (en) | 1986-11-10 | 1989-06-20 | Ibm Corporation | Multidirectional scan and print capability |
JPS63131230A (ja) * | 1986-11-21 | 1988-06-03 | Hitachi Ltd | 情報処理装置 |
JPH0810430B2 (ja) | 1986-11-28 | 1996-01-31 | 株式会社日立製作所 | 情報処理装置 |
US5283903A (en) | 1986-12-25 | 1994-02-01 | Nec Corporation | Priority selector |
US5226170A (en) * | 1987-02-24 | 1993-07-06 | Digital Equipment Corporation | Interface between processor and special instruction processor in digital data processing system |
US5179689A (en) | 1987-03-13 | 1993-01-12 | Texas Instruments Incorporated | Dataprocessing device with instruction cache |
US4833599A (en) * | 1987-04-20 | 1989-05-23 | Multiflow Computer, Inc. | Hierarchical priority branch handling for parallel execution in a parallel processor |
US4858116A (en) | 1987-05-01 | 1989-08-15 | Digital Equipment Corporation | Method and apparatus for managing multiple lock indicators in a multiprocessor computer system |
JP2510591B2 (ja) * | 1987-06-12 | 1996-06-26 | 株式会社日立製作所 | 命令処理装置 |
JPH07113903B2 (ja) | 1987-06-26 | 1995-12-06 | 株式会社日立製作所 | キャッシュ記憶制御方式 |
US4992938A (en) * | 1987-07-01 | 1991-02-12 | International Business Machines Corporation | Instruction control mechanism for a computing system with register renaming, map table and queues indicating available registers |
US5134561A (en) | 1987-07-20 | 1992-07-28 | International Business Machines Corporation | Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries |
US4901233A (en) | 1987-07-20 | 1990-02-13 | International Business Machines Corporation | Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries |
JP2624484B2 (ja) | 1987-07-31 | 1997-06-25 | 三井東圧化学株式会社 | 中国語の入力処理方法 |
US5150309A (en) | 1987-08-04 | 1992-09-22 | Texas Instruments Incorporated | Comprehensive logic circuit layout system |
US4980817A (en) | 1987-08-31 | 1990-12-25 | Digital Equipment | Vector register system for executing plural read/write commands concurrently and independently routing data to plural read/write ports |
US4991078A (en) * | 1987-09-29 | 1991-02-05 | Digital Equipment Corporation | Apparatus and method for a pipelined central processing unit in a data processing system |
EP0312764A3 (en) | 1987-10-19 | 1991-04-10 | International Business Machines Corporation | A data processor having multiple execution units for processing plural classes of instructions in parallel |
US5089951A (en) | 1987-11-05 | 1992-02-18 | Kabushiki Kaisha Toshiba | Microcomputer incorporating memory |
US5197136A (en) * | 1987-11-12 | 1993-03-23 | Matsushita Electric Industrial Co., Ltd. | Processing system for branch instruction |
US4823201A (en) | 1987-11-16 | 1989-04-18 | Technology, Inc. 64 | Processor for expanding a compressed video signal |
US5185878A (en) | 1988-01-20 | 1993-02-09 | Advanced Micro Device, Inc. | Programmable cache memory as well as system incorporating same and method of operating programmable cache memory |
US4926323A (en) * | 1988-03-03 | 1990-05-15 | Advanced Micro Devices, Inc. | Streamlined instruction processor |
JPH0769821B2 (ja) * | 1988-03-04 | 1995-07-31 | 日本電気株式会社 | 情報処理装置におけるバイパスライン制御方式 |
JPH01228865A (ja) | 1988-03-09 | 1989-09-12 | Minolta Camera Co Ltd | プリンタ制御装置 |
US5187796A (en) * | 1988-03-29 | 1993-02-16 | Computer Motion, Inc. | Three-dimensional vector co-processor having I, J, and K register files and I, J, and K execution units |
US5155817A (en) | 1988-04-01 | 1992-10-13 | Kabushiki Kaisha Toshiba | Microprocessor |
US5301278A (en) | 1988-04-29 | 1994-04-05 | International Business Machines Corporation | Flexible dynamic memory controller |
US5003462A (en) * | 1988-05-31 | 1991-03-26 | International Business Machines Corporation | Apparatus and method for implementing precise interrupts on a pipelined processor with multiple functional units with separate address translation interrupt means |
US4897810A (en) * | 1988-06-13 | 1990-01-30 | Advanced Micro Devices, Inc. | Asynchronous interrupt status bit circuit |
US5261057A (en) | 1988-06-30 | 1993-11-09 | Wang Laboratories, Inc. | I/O bus to system interface |
US5097409A (en) | 1988-06-30 | 1992-03-17 | Wang Laboratories, Inc. | Multi-processor system with cache memories |
JP2761506B2 (ja) | 1988-07-08 | 1998-06-04 | 株式会社日立製作所 | 主記憶制御装置 |
JPH0222736A (ja) | 1988-07-12 | 1990-01-25 | Nec Corp | 中央処理装置 |
US5032985A (en) | 1988-07-21 | 1991-07-16 | International Business Machines Corporation | Multiprocessor system with memory fetch buffer invoked during cross-interrogation |
US5148536A (en) | 1988-07-25 | 1992-09-15 | Digital Equipment Corporation | Pipeline having an integral cache which processes cache misses and loads data in parallel |
JPH0673105B2 (ja) * | 1988-08-11 | 1994-09-14 | 株式会社東芝 | 命令パイプライン方式のマイクロプロセッサ |
US5291615A (en) | 1988-08-11 | 1994-03-01 | Kabushiki Kaisha Toshiba | Instruction pipeline microprocessor |
US4974155A (en) * | 1988-08-15 | 1990-11-27 | Evans & Sutherland Computer Corp. | Variable delay branch system |
US5101341A (en) * | 1988-08-25 | 1992-03-31 | Edgcore Technology, Inc. | Pipelined system for reducing instruction access time by accumulating predecoded instruction bits a FIFO |
US5167035A (en) * | 1988-09-08 | 1992-11-24 | Digital Equipment Corporation | Transferring messages between nodes in a network |
JPH0287229A (ja) | 1988-09-24 | 1990-03-28 | Nec Corp | 実行命令の先取り制御方式 |
US4879787A (en) | 1988-10-03 | 1989-11-14 | Walls Thomas J | Shoe lace knot securing device |
EP0365188B1 (en) | 1988-10-18 | 1996-09-18 | Hewlett-Packard Company | Central processor condition code method and apparatus |
JP2672599B2 (ja) * | 1988-10-18 | 1997-11-05 | ヤマハ 株式会社 | コンピュータシステム |
JPH0769824B2 (ja) | 1988-11-11 | 1995-07-31 | 株式会社日立製作所 | 複数命令同時処理方式 |
JP2810068B2 (ja) | 1988-11-11 | 1998-10-15 | 株式会社日立製作所 | プロセッサシステム、コンピュータシステム及び命令処理方法 |
US5058451A (en) * | 1988-11-11 | 1991-10-22 | Kabushiki Kaisha Kobe Seiko Sho | Control lever apparatus and actuator operation apparatus |
KR920006613B1 (ko) * | 1988-12-01 | 1992-08-10 | 재단법인한국전자통신연구소 | 파이프라인으로 동작하는 프로세서의 명령어 페취 유니트 |
GB8828817D0 (en) * | 1988-12-09 | 1989-01-18 | Int Computers Ltd | Data processing apparatus |
IL92605A0 (en) * | 1988-12-19 | 1990-08-31 | Bull Hn Information Syst | Production line method and apparatus for high performance instruction execution |
JPH0769811B2 (ja) * | 1988-12-21 | 1995-07-31 | 松下電器産業株式会社 | データ処理装置 |
US5148533A (en) | 1989-01-05 | 1992-09-15 | Bull Hn Information Systems Inc. | Apparatus and method for data group coherency in a tightly coupled data processing system with plural execution and data cache units |
US5125092A (en) | 1989-01-09 | 1992-06-23 | International Business Machines Corporation | Method and apparatus for providing multiple condition code fields to to allow pipelined instructions contention free access to separate condition codes |
JP2736092B2 (ja) | 1989-01-10 | 1998-04-02 | 株式会社東芝 | バッファ装置 |
US5127091A (en) * | 1989-01-13 | 1992-06-30 | International Business Machines Corporation | System for reducing delay in instruction execution by executing branch instructions in separate processor while dispatching subsequent instructions to primary processor |
US5075840A (en) * | 1989-01-13 | 1991-12-24 | International Business Machines Corporation | Tightly coupled multiprocessor instruction synchronization |
US5142634A (en) * | 1989-02-03 | 1992-08-25 | Digital Equipment Corporation | Branch prediction |
US5167026A (en) | 1989-02-03 | 1992-11-24 | Digital Equipment Corporation | Simultaneously or sequentially decoding multiple specifiers of a variable length pipeline instruction based on detection of modified value of specifier registers |
US5125083A (en) | 1989-02-03 | 1992-06-23 | Digital Equipment Corporation | Method and apparatus for resolving a variable number of potential memory access conflicts in a pipelined computer system |
US5142633A (en) * | 1989-02-03 | 1992-08-25 | Digital Equipment Corporation | Preprocessing implied specifiers in a pipelined processor |
US5109495A (en) | 1989-02-03 | 1992-04-28 | Digital Equipment Corp. | Method and apparatus using a source operand list and a source operand pointer queue between the execution unit and the instruction decoding and operand processing units of a pipelined data processor |
US5222223A (en) | 1989-02-03 | 1993-06-22 | Digital Equipment Corporation | Method and apparatus for ordering and queueing multiple memory requests |
US5067069A (en) * | 1989-02-03 | 1991-11-19 | Digital Equipment Corporation | Control of multiple functional units with parallel operation in a microcoded execution unit |
US4985825A (en) * | 1989-02-03 | 1991-01-15 | Digital Equipment Corporation | System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer |
US5133074A (en) | 1989-02-08 | 1992-07-21 | Acer Incorporated | Deadlock resolution with cache snooping |
US5293500A (en) | 1989-02-10 | 1994-03-08 | Mitsubishi Denki K.K. | Parallel processing method and apparatus |
US5226166A (en) | 1989-02-10 | 1993-07-06 | Mitsubishi Denki K.K. | Parallel operation processor with second command unit |
JPH0630063B2 (ja) * | 1989-02-17 | 1994-04-20 | 株式会社東芝 | マイクロプロセッサ |
US5226126A (en) * | 1989-02-24 | 1993-07-06 | Nexgen Microsystems | Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags |
US5768575A (en) * | 1989-02-24 | 1998-06-16 | Advanced Micro Devices, Inc. | Semi-Autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for sepculative and out-of-order execution of complex instructions |
US5239633A (en) * | 1989-03-24 | 1993-08-24 | Mitsubishi Denki Kabushiki Kaisha | Data processor executing memory indirect addressing and register indirect addressing |
JPH02278337A (ja) | 1989-04-19 | 1990-11-14 | Nec Corp | 命令キュー装置 |
US5119485A (en) | 1989-05-15 | 1992-06-02 | Motorola, Inc. | Method for data bus snooping in a data processing system by selective concurrent read and invalidate cache operation |
US5155809A (en) | 1989-05-17 | 1992-10-13 | International Business Machines Corp. | Uncoupling a central processing unit from its associated hardware for interaction with data handling apparatus alien to the operating system controlling said unit and hardware |
CN1040803C (zh) * | 1989-05-17 | 1998-11-18 | 国际商业机器公司 | 在数据处理系统提供附加系统特性的方法和装置 |
US5072364A (en) | 1989-05-24 | 1991-12-10 | Tandem Computers Incorporated | Method and apparatus for recovering from an incorrect branch prediction in a processor that executes a family of instructions in parallel |
CA2016068C (en) | 1989-05-24 | 2000-04-04 | Robert W. Horst | Multiple instruction issue computer architecture |
US5129067A (en) | 1989-06-06 | 1992-07-07 | Advanced Micro Devices, Inc. | Multiple instruction decoder for minimizing register port requirements |
US5136697A (en) | 1989-06-06 | 1992-08-04 | Advanced Micro Devices, Inc. | System for reducing delay for execution subsequent to correctly predicted branch instruction using fetch information stored with each block of instructions in cache |
JPH0314025A (ja) * | 1989-06-13 | 1991-01-22 | Nec Corp | 命令実行制御方式 |
JP2550213B2 (ja) | 1989-07-07 | 1996-11-06 | 株式会社日立製作所 | 並列処理装置および並列処理方法 |
JP2505887B2 (ja) * | 1989-07-14 | 1996-06-12 | 富士通株式会社 | 命令処理システム |
EP0471888B1 (en) * | 1989-08-28 | 1999-01-13 | Nec Corporation | Microprocessor for enhancing initiation of instruction execution after the execution of conditional branch instruction |
US5317734A (en) * | 1989-08-29 | 1994-05-31 | North American Philips Corporation | Method of synchronizing parallel processors employing channels and compiling method minimizing cross-processor data dependencies |
JPH07120284B2 (ja) * | 1989-09-04 | 1995-12-20 | 三菱電機株式会社 | データ処理装置 |
US5303382A (en) | 1989-09-21 | 1994-04-12 | Digital Equipment Corporation | Arbiter with programmable dynamic request prioritization |
DE69031257T2 (de) * | 1989-09-21 | 1998-02-12 | Texas Instruments Inc | Integrierte Schaltung mit einem eingebetteten digitalen Signalprozessor |
JPH03137729A (ja) | 1989-10-23 | 1991-06-12 | Hokuriku Nippon Denki Software Kk | 先行制御方式 |
JP2835103B2 (ja) * | 1989-11-01 | 1998-12-14 | 富士通株式会社 | 命令指定方法及び命令実行方式 |
JPH03147134A (ja) | 1989-11-02 | 1991-06-24 | Oki Electric Ind Co Ltd | 命令シーケンス制御装置 |
US5179530A (en) | 1989-11-03 | 1993-01-12 | Zoran Corporation | Architecture for integrated concurrent vector signal processor |
US5226125A (en) | 1989-11-17 | 1993-07-06 | Keith Balmer | Switch matrix having integrated crosspoint logic and method of operation |
DE68928980T2 (de) | 1989-11-17 | 1999-08-19 | Texas Instruments Inc. | Multiprozessor mit Koordinatenschalter zwischen Prozessoren und Speichern |
US5487156A (en) * | 1989-12-15 | 1996-01-23 | Popescu; Valeri | Processor architecture having independently fetching issuing and updating operations of instructions which are sequentially assigned and stored in order fetched |
JPH03186928A (ja) * | 1989-12-16 | 1991-08-14 | Mitsubishi Electric Corp | データ処理装置 |
US5179673A (en) | 1989-12-18 | 1993-01-12 | Digital Equipment Corporation | Subroutine return prediction mechanism using ring buffer and comparing predicated address with actual address to validate or flush the pipeline |
US5197130A (en) | 1989-12-29 | 1993-03-23 | Supercomputer Systems Limited Partnership | Cluster architecture for a highly parallel scalar/vector multiprocessor system |
JPH061463B2 (ja) | 1990-01-16 | 1994-01-05 | インターナショナル・ビジネス・マシーンズ・コーポレーション | マルチプロセッサ・システムおよびそのプライベート・キャッシュ制御方法 |
US5251306A (en) | 1990-01-16 | 1993-10-05 | Advanced Micro Devices, Inc. | Apparatus for controlling execution of a program in a computing device |
US5222240A (en) | 1990-02-14 | 1993-06-22 | Intel Corporation | Method and apparatus for delaying writing back the results of instructions to a processor |
US5241636A (en) | 1990-02-14 | 1993-08-31 | Intel Corporation | Method for parallel instruction execution in a computer |
US5230068A (en) * | 1990-02-26 | 1993-07-20 | Nexgen Microsystems | Cache memory system for dynamically altering single cache memory line as either branch target entry or pre-fetch instruction queue based upon instruction sequence |
US5185872A (en) | 1990-02-28 | 1993-02-09 | Intel Corporation | System for executing different cycle instructions by selectively bypassing scoreboard register and canceling the execution of conditionally issued instruction if needed resources are busy |
US5120083A (en) | 1990-03-19 | 1992-06-09 | Henkels & Mccoy, Inc. | Expansion joint for conduit for cables |
JP2818249B2 (ja) | 1990-03-30 | 1998-10-30 | 株式会社東芝 | 電子計算機 |
DE69132675T2 (de) * | 1990-04-06 | 2002-06-13 | Nec Corp., Tokio/Tokyo | Parallelfliessband-Befehlsverarbeitungssystem für sehr lange Befehlswörter |
IT1247640B (it) | 1990-04-26 | 1994-12-28 | St Microelectronics Srl | Operazioni booleane tra due qualsiasi bit di due qualsiasi registri |
US5201056A (en) | 1990-05-02 | 1993-04-06 | Motorola, Inc. | RISC microprocessor architecture with multi-bit tag extended instructions for selectively attaching tag from either instruction or input data to arithmetic operation output |
US5214763A (en) | 1990-05-10 | 1993-05-25 | International Business Machines Corporation | Digital computer system capable of processing two or more instructions in parallel and having a coche and instruction compounding mechanism |
EP0457403B1 (en) * | 1990-05-18 | 1998-01-21 | Koninklijke Philips Electronics N.V. | Multilevel instruction cache and method for using said cache |
US5249286A (en) | 1990-05-29 | 1993-09-28 | National Semiconductor Corporation | Selectively locking memory locations within a microprocessor's on-chip cache |
CA2038264C (en) * | 1990-06-26 | 1995-06-27 | Richard James Eickemeyer | In-memory preprocessor for a scalable compound instruction set machine processor |
DE69127936T2 (de) * | 1990-06-29 | 1998-05-07 | Digital Equipment Corp | Busprotokoll für Prozessor mit write-back cache |
US5197132A (en) | 1990-06-29 | 1993-03-23 | Digital Equipment Corporation | Register mapping system having a log containing sequential listing of registers that were changed in preceding cycles for precise post-branch recovery |
CA2045773A1 (en) | 1990-06-29 | 1991-12-30 | Compaq Computer Corporation | Byte-compare operation for high-performance processor |
US5155843A (en) * | 1990-06-29 | 1992-10-13 | Digital Equipment Corporation | Error transition mode for multi-processor system |
EP0463965B1 (en) * | 1990-06-29 | 1998-09-09 | Digital Equipment Corporation | Branch prediction unit for high-performance processor |
JPH0475139A (ja) * | 1990-07-18 | 1992-03-10 | Toshiba Corp | ループ並列化装置 |
JPH0814492B2 (ja) * | 1990-09-21 | 1996-02-14 | 日本航空電子工業株式会社 | 光ファイバジャイロ |
EP0479390B1 (en) * | 1990-10-05 | 1999-01-07 | Koninklijke Philips Electronics N.V. | Processing device including a memory circuit and a group of functional units |
US5301340A (en) * | 1990-10-31 | 1994-04-05 | International Business Machines Corporation | IC chips including ALUs and identical register files whereby a number of ALUs directly and concurrently write results to every register file per cycle |
US5222244A (en) | 1990-12-20 | 1993-06-22 | Intel Corporation | Method of modifying a microinstruction with operands specified by an instruction held in an alias register |
USH1291H (en) | 1990-12-20 | 1994-02-01 | Hinton Glenn J | Microprocessor in which multiple instructions are executed in one clock cycle by providing separate machine bus access to a register file for different types of instructions |
US5303362A (en) | 1991-03-20 | 1994-04-12 | Digital Equipment Corporation | Coupled memory multiprocessor computer system including cache coherency management protocols |
US5261071A (en) | 1991-03-21 | 1993-11-09 | Control Data System, Inc. | Dual pipe cache memory with out-of-order issue capability |
US5287467A (en) * | 1991-04-18 | 1994-02-15 | International Business Machines Corporation | Pipeline for removing and concurrently executing two or more branch instructions in synchronization with other instructions executing in the execution unit |
US5488729A (en) | 1991-05-15 | 1996-01-30 | Ross Technology, Inc. | Central processing unit architecture with symmetric instruction scheduling to achieve multiple instruction launch and execution |
US5355457A (en) | 1991-05-21 | 1994-10-11 | Motorola, Inc. | Data processor for performing simultaneous instruction retirement and backtracking |
US5630157A (en) | 1991-06-13 | 1997-05-13 | International Business Machines Corporation | Computer organization for multiple and out-of-order execution of condition code testing and setting instructions |
US5278963A (en) | 1991-06-21 | 1994-01-11 | International Business Machines Corporation | Pretranslation of virtual addresses prior to page crossing |
US5826055A (en) | 1991-07-08 | 1998-10-20 | Seiko Epson Corporation | System and method for retiring instructions in a superscalar microprocessor |
US5961629A (en) * | 1991-07-08 | 1999-10-05 | Seiko Epson Corporation | High performance, superscalar-based computer system with out-of-order instruction execution |
DE69233493T2 (de) | 1991-07-08 | 2005-07-28 | Seiko Epson Corp. | RISC-Prozessor mit erweiterbarer Architektur |
WO1993001565A1 (en) | 1991-07-08 | 1993-01-21 | Seiko Epson Corporation | Single chip page printer controller |
US5440752A (en) | 1991-07-08 | 1995-08-08 | Seiko Epson Corporation | Microprocessor architecture with a switch network for data transfer between cache, memory port, and IOU |
KR100294276B1 (ko) | 1991-07-08 | 2001-09-17 | 야스카와 히데아키 | 고속트랩및예외상태를구현한알아이에스씨마이크로프로세서구조 |
US5539911A (en) * | 1991-07-08 | 1996-07-23 | Seiko Epson Corporation | High-performance, superscalar-based computer system with out-of-order instruction execution |
US5493687A (en) | 1991-07-08 | 1996-02-20 | Seiko Epson Corporation | RISC microprocessor architecture implementing multiple typed register sets |
US5345569A (en) * | 1991-09-20 | 1994-09-06 | Advanced Micro Devices, Inc. | Apparatus and method for resolving dependencies among a plurality of instructions within a storage device |
GB2260628A (en) | 1991-10-11 | 1993-04-21 | Intel Corp | Line buffer for cache memory |
JPH0820949B2 (ja) | 1991-11-26 | 1996-03-04 | 松下電器産業株式会社 | 情報処理装置 |
US5285527A (en) | 1991-12-11 | 1994-02-08 | Northern Telecom Limited | Predictive historical cache memory |
US5617554A (en) | 1992-02-10 | 1997-04-01 | Intel Corporation | Physical address size selection and page size selection in an address translator |
US5398330A (en) | 1992-03-05 | 1995-03-14 | Seiko Epson Corporation | Register file backup queue |
WO1993019424A1 (en) | 1992-03-18 | 1993-09-30 | Seiko Epson Corporation | System and method for supporting a multiple width memory subsystem |
US5371684A (en) | 1992-03-31 | 1994-12-06 | Seiko Epson Corporation | Semiconductor floor plan for a register renaming circuit |
JP3730252B2 (ja) | 1992-03-31 | 2005-12-21 | トランスメタ コーポレイション | レジスタ名称変更方法及び名称変更システム |
JP3137729B2 (ja) | 1992-04-09 | 2001-02-26 | 本田技研工業株式会社 | ガバリ部品の製造方法 |
EP0638183B1 (en) | 1992-05-01 | 1997-03-05 | Seiko Epson Corporation | A system and method for retiring instructions in a superscalar microprocessor |
US5442756A (en) | 1992-07-31 | 1995-08-15 | Intel Corporation | Branch prediction and resolution apparatus for a superscalar computer processor |
US5619668A (en) | 1992-08-10 | 1997-04-08 | Intel Corporation | Apparatus for register bypassing in a microprocessor |
US6735685B1 (en) | 1992-09-29 | 2004-05-11 | Seiko Epson Corporation | System and method for handling load and/or store operations in a superscalar microprocessor |
US5524225A (en) | 1992-12-18 | 1996-06-04 | Advanced Micro Devices Inc. | Cache system and method for providing software controlled writeback |
WO1994016384A1 (en) | 1992-12-31 | 1994-07-21 | Seiko Epson Corporation | System and method for register renaming |
US5604912A (en) | 1992-12-31 | 1997-02-18 | Seiko Epson Corporation | System and method for assigning tags to instructions to control instruction execution |
US5628021A (en) | 1992-12-31 | 1997-05-06 | Seiko Epson Corporation | System and method for assigning tags to control instruction processing in a superscalar processor |
US5627984A (en) | 1993-03-31 | 1997-05-06 | Intel Corporation | Apparatus and method for entry allocation for a buffer resource utilizing an internal two cycle pipeline |
US5577217A (en) | 1993-05-14 | 1996-11-19 | Intel Corporation | Method and apparatus for a branch target buffer with shared branch pattern tables for associated branch predictions |
JPH09500989A (ja) | 1993-05-14 | 1997-01-28 | インテル・コーポレーション | 分岐ターゲット・バッファにおける推論履歴 |
JPH0728695A (ja) | 1993-07-08 | 1995-01-31 | Nec Corp | メモリコントローラ |
US5613132A (en) | 1993-09-30 | 1997-03-18 | Intel Corporation | Integer and floating point register alias table within processor device |
US5446912A (en) * | 1993-09-30 | 1995-08-29 | Intel Corporation | Partial width stalls within register alias table |
US5630149A (en) | 1993-10-18 | 1997-05-13 | Cyrix Corporation | Pipelined processor with register renaming hardware to accommodate multiple size registers |
DE69429061T2 (de) | 1993-10-29 | 2002-07-18 | Advanced Micro Devices, Inc. | Superskalarmikroprozessoren |
US5689672A (en) | 1993-10-29 | 1997-11-18 | Advanced Micro Devices, Inc. | Pre-decoded instruction cache and method therefor particularly suitable for variable byte-length instructions |
JP3218524B2 (ja) | 1993-12-22 | 2001-10-15 | 村田機械株式会社 | ワークホルダーのはみ出し検出装置 |
US5574935A (en) | 1993-12-29 | 1996-11-12 | Intel Corporation | Superscalar processor with a multi-port reorder buffer |
US5630075A (en) | 1993-12-30 | 1997-05-13 | Intel Corporation | Write combining buffer for sequentially addressed partial line operations originating from a single instruction |
US5619664A (en) | 1994-01-04 | 1997-04-08 | Intel Corporation | Processor with architecture for improved pipelining of arithmetic instructions by forwarding redundant intermediate data forms |
US5627985A (en) | 1994-01-04 | 1997-05-06 | Intel Corporation | Speculative and committed resource files in an out-of-order processor |
US5604877A (en) | 1994-01-04 | 1997-02-18 | Intel Corporation | Method and apparatus for resolving return from subroutine instructions in a computer processor |
US5452426A (en) | 1994-01-04 | 1995-09-19 | Intel Corporation | Coordinating speculative and committed state register source data and immediate source data in a processor |
US5577200A (en) | 1994-02-28 | 1996-11-19 | Intel Corporation | Method and apparatus for loading and storing misaligned data on an out-of-order execution computer system |
US5630083A (en) | 1994-03-01 | 1997-05-13 | Intel Corporation | Decoder for decoding multiple instructions in parallel |
US5608885A (en) | 1994-03-01 | 1997-03-04 | Intel Corporation | Method for handling instructions from a branch prior to instruction decoding in a computer which executes variable-length instructions |
US5625788A (en) | 1994-03-01 | 1997-04-29 | Intel Corporation | Microprocessor with novel instruction for signaling event occurrence and for providing event handling information in response thereto |
US5586278A (en) | 1994-03-01 | 1996-12-17 | Intel Corporation | Method and apparatus for state recovery following branch misprediction in an out-of-order microprocessor |
US5564056A (en) | 1994-03-01 | 1996-10-08 | Intel Corporation | Method and apparatus for zero extension and bit shifting to preserve register parameters in a microprocessor utilizing register renaming |
US5623628A (en) | 1994-03-02 | 1997-04-22 | Intel Corporation | Computer system and method for maintaining memory consistency in a pipelined, non-blocking caching bus request queue |
US5394351A (en) | 1994-03-11 | 1995-02-28 | Nexgen, Inc. | Optimized binary adder and comparator having an implicit constant for an input |
US5574927A (en) * | 1994-03-25 | 1996-11-12 | International Meta Systems, Inc. | RISC architecture computer configured for emulation of the instruction set of a target computer |
US5490280A (en) | 1994-03-31 | 1996-02-06 | Intel Corporation | Apparatus and method for entry allocation for a resource buffer |
US5615126A (en) | 1994-08-24 | 1997-03-25 | Lsi Logic Corporation | High-speed internal interconnection technique for integrated circuits that reduces the number of signal lines through multiplexing |
KR100329338B1 (ko) | 1994-12-02 | 2002-07-18 | 피터 엔. 데트킨 | 복합피연산자의팩연산을수행하는마이크로프로세서 |
US5819101A (en) | 1994-12-02 | 1998-10-06 | Intel Corporation | Method for packing a plurality of packed data elements in response to a pack instruction |
US5666494A (en) | 1995-03-31 | 1997-09-09 | Samsung Electronics Co., Ltd. | Queue management mechanism which allows entries to be processed in any order |
US6385634B1 (en) | 1995-08-31 | 2002-05-07 | Intel Corporation | Method for performing multiply-add operations on packed data |
US5745375A (en) | 1995-09-29 | 1998-04-28 | Intel Corporation | Apparatus and method for controlling power usage |
US5778210A (en) * | 1996-01-11 | 1998-07-07 | Intel Corporation | Method and apparatus for recovering the state of a speculatively scheduled operation in a processor which cannot be executed at the speculated time |
US5832205A (en) * | 1996-08-20 | 1998-11-03 | Transmeta Corporation | Memory controller for a microprocessor for detecting a failure of speculation on the physical nature of a component being addressed |
US5961129A (en) * | 1997-02-07 | 1999-10-05 | Post; Peter G. | Quick-Release interlocking frame assembly for interchangeably mounting operative sports devices to a boot sole |
US6418529B1 (en) | 1998-03-31 | 2002-07-09 | Intel Corporation | Apparatus and method for performing intra-add operation |
JP3147134U (ja) | 2008-09-17 | 2008-12-18 | 洋 吉迫 | プランター |
-
1992
- 1992-01-08 US US07/817,810 patent/US5539911A/en not_active Expired - Lifetime
- 1992-07-07 KR KR1020087028736A patent/KR20080109099A/ko not_active Application Discontinuation
- 1992-07-07 KR KR1020077008100A patent/KR100875262B1/ko not_active IP Right Cessation
- 1992-07-07 KR KR1020037001231A patent/KR100559465B1/ko not_active IP Right Cessation
- 1992-07-07 WO PCT/JP1992/000868 patent/WO1993001545A1/en active Application Filing
- 1992-07-07 KR KR1020077008095A patent/KR100764894B1/ko not_active IP Right Cessation
- 1992-07-07 JP JP50215093A patent/JP3441070B2/ja not_active Expired - Lifetime
- 1992-07-07 AT AT03024585T patent/ATE450826T1/de not_active IP Right Cessation
- 1992-07-07 KR KR1019930700687A patent/KR100294475B1/ko not_active IP Right Cessation
- 1992-07-07 EP EP92914387A patent/EP0547241B1/en not_active Expired - Lifetime
- 1992-07-07 KR KR1020037001233A patent/KR100559475B1/ko not_active IP Right Cessation
- 1992-07-07 DE DE69232113T patent/DE69232113T2/de not_active Expired - Lifetime
- 1992-07-07 AT AT00109747T patent/ATE260485T1/de not_active IP Right Cessation
- 1992-07-07 KR KR1020077008098A patent/KR100886000B1/ko not_active IP Right Cessation
- 1992-07-07 KR KR1020037001232A patent/KR100559468B1/ko not_active IP Right Cessation
- 1992-07-07 KR KR1020067001063A patent/KR100764898B1/ko not_active IP Right Cessation
- 1992-07-07 EP EP03024585A patent/EP1385085B1/en not_active Expired - Lifetime
- 1992-07-07 KR KR1020077008101A patent/KR100875266B1/ko not_active IP Right Cessation
- 1992-07-07 EP EP00109747A patent/EP1024426B1/en not_active Expired - Lifetime
- 1992-07-07 KR KR1020077008096A patent/KR100875252B1/ko not_active IP Right Cessation
- 1992-07-07 KR KR1020067001062A patent/KR100633578B1/ko not_active IP Right Cessation
- 1992-07-07 KR KR1020077008097A patent/KR100875257B1/ko not_active IP Right Cessation
- 1992-07-07 AT AT92914387T patent/ATE206829T1/de not_active IP Right Cessation
- 1992-07-07 DE DE69233313T patent/DE69233313T2/de not_active Expired - Lifetime
- 1992-07-07 DE DE0001385085T patent/DE03024585T1/de active Pending
- 1992-07-07 DE DE69233777T patent/DE69233777D1/de not_active Expired - Lifetime
- 1992-07-07 KR KR1020037001229A patent/KR100559455B1/ko not_active IP Right Cessation
- 1992-07-07 KR KR1020067001061A patent/KR100633574B1/ko not_active IP Right Cessation
- 1992-07-07 KR KR1020077008104A patent/KR100764895B1/ko not_active IP Right Cessation
- 1992-07-07 KR KR1020037001234A patent/KR100559482B1/ko not_active IP Right Cessation
- 1992-07-07 KR KR1020037001230A patent/KR100559463B1/ko not_active IP Right Cessation
- 1992-07-07 KR KR1020077008099A patent/KR100875259B1/ko not_active IP Right Cessation
-
1996
- 1996-02-15 US US08/602,021 patent/US5689720A/en not_active Expired - Lifetime
-
1997
- 1997-10-07 US US08/946,078 patent/US6092181A/en not_active Expired - Fee Related
-
1998
- 1998-12-28 HK HK98116065A patent/HK1014782A1/xx not_active IP Right Cessation
-
1999
- 1999-05-11 US US09/309,601 patent/US6101594A/en not_active Expired - Fee Related
- 1999-05-11 US US09/309,603 patent/US6128723A/en not_active Expired - Fee Related
- 1999-06-23 US US09/338,563 patent/US6038654A/en not_active Expired - Fee Related
- 1999-11-09 US US09/436,986 patent/US6256720B1/en not_active Expired - Fee Related
- 1999-11-10 US US09/437,601 patent/US6272619B1/en not_active Expired - Fee Related
-
2000
- 2000-05-17 JP JP2000145125A patent/JP3654138B2/ja not_active Expired - Lifetime
- 2000-05-17 JP JP2000145126A patent/JP2000357091A/ja not_active Withdrawn
- 2000-05-17 JP JP2000145124A patent/JP2000339159A/ja not_active Withdrawn
- 2000-05-17 JP JP2000145123A patent/JP3654137B2/ja not_active Expired - Lifetime
- 2000-05-18 JP JP2000146442A patent/JP2000339162A/ja not_active Withdrawn
- 2000-05-18 JP JP2000146441A patent/JP3654139B2/ja not_active Expired - Lifetime
- 2000-05-18 JP JP2000146443A patent/JP2000339163A/ja not_active Withdrawn
- 2000-12-27 KR KR1020007014869A patent/KR100325177B1/ko not_active IP Right Cessation
- 2000-12-27 KR KR1020007014868A patent/KR100325176B1/ko not_active IP Right Cessation
- 2000-12-27 KR KR1020007014867A patent/KR100325175B1/ko not_active IP Right Cessation
-
2001
- 2001-05-10 US US09/852,293 patent/US6647485B2/en not_active Expired - Fee Related
- 2001-11-23 KR KR10-2001-7015019A patent/KR100403166B1/ko not_active IP Right Cessation
- 2001-11-23 KR KR10-2001-7015021A patent/KR100403164B1/ko not_active IP Right Cessation
- 2001-11-23 KR KR10-2001-7015020A patent/KR100403167B1/ko not_active IP Right Cessation
-
2002
- 2002-09-13 JP JP2002267998A patent/JP3702873B2/ja not_active Expired - Lifetime
- 2002-10-29 US US10/282,207 patent/US6948052B2/en not_active Expired - Fee Related
- 2002-10-29 US US10/282,045 patent/US6959375B2/en not_active Expired - Fee Related
- 2002-10-30 US US10/283,106 patent/US6915412B2/en not_active Expired - Fee Related
- 2002-10-30 US US10/283,177 patent/US6986024B2/en not_active Expired - Fee Related
-
2003
- 2003-01-27 KR KR10-2003-7001228A patent/KR100393495B1/ko not_active IP Right Cessation
- 2003-01-27 KR KR10-2003-7001236A patent/KR100393496B1/ko not_active IP Right Cessation
- 2003-01-27 KR KR10-2003-7001227A patent/KR100393494B1/ko not_active IP Right Cessation
- 2003-01-27 KR KR10-2003-7001237A patent/KR100393497B1/ko not_active IP Right Cessation
- 2003-07-21 KR KR10-2003-7009659A patent/KR100449244B1/ko not_active IP Right Cessation
- 2003-07-21 KR KR10-2003-7009656A patent/KR100449238B1/ko not_active IP Right Cessation
- 2003-07-21 KR KR10-2003-7009653A patent/KR100469964B1/ko not_active IP Right Cessation
- 2003-07-21 KR KR10-2003-7009658A patent/KR100403165B1/ko not_active IP Right Cessation
- 2003-07-21 KR KR10-2003-7009660A patent/KR100449242B1/ko not_active IP Right Cessation
- 2003-07-21 KR KR10-2003-7009657A patent/KR100449236B1/ko not_active IP Right Cessation
- 2003-07-21 KR KR10-2003-7009650A patent/KR100469971B1/ko not_active IP Right Cessation
- 2003-07-21 KR KR10-2003-7009651A patent/KR100469954B1/ko not_active IP Right Cessation
- 2003-07-21 KR KR10-2003-7009655A patent/KR100469968B1/ko not_active IP Right Cessation
- 2003-07-21 KR KR10-2003-7009652A patent/KR100469952B1/ko not_active IP Right Cessation
- 2003-07-21 KR KR10-2003-7009654A patent/KR100469959B1/ko not_active IP Right Cessation
- 2003-09-12 US US10/660,671 patent/US7162610B2/en not_active Expired - Fee Related
- 2003-09-18 KR KR10-2003-7012158A patent/KR100464272B1/ko not_active IP Right Cessation
- 2003-09-18 KR KR10-2003-7012159A patent/KR20040000411A/ko not_active Application Discontinuation
- 2003-10-31 US US10/697,257 patent/US6934829B2/en not_active Expired - Fee Related
- 2003-11-05 US US10/700,485 patent/US7487333B2/en not_active Expired - Fee Related
- 2003-11-05 US US10/700,520 patent/US6941447B2/en not_active Expired - Fee Related
-
2004
- 2004-05-11 HK HK04103298.9A patent/HK1060417A1/xx not_active IP Right Cessation
- 2004-09-14 JP JP2004266867A patent/JP3729202B2/ja not_active Expired - Lifetime
- 2004-10-14 JP JP2004299657A patent/JP3838252B2/ja not_active Expired - Lifetime
- 2004-11-15 JP JP2004329902A patent/JP3760947B2/ja not_active Expired - Lifetime
- 2004-12-20 JP JP2004367718A patent/JP3760948B2/ja not_active Expired - Lifetime
-
2005
- 2005-01-19 JP JP2005011006A patent/JP3731604B2/ja not_active Expired - Lifetime
- 2005-02-18 JP JP2005041740A patent/JP3731605B2/ja not_active Expired - Lifetime
- 2005-04-18 JP JP2005119940A patent/JP3791542B2/ja not_active Expired - Lifetime
- 2005-05-18 JP JP2005145542A patent/JP3791544B2/ja not_active Expired - Lifetime
- 2005-06-17 JP JP2005178170A patent/JP3791545B2/ja not_active Expired - Lifetime
- 2005-07-19 JP JP2005208079A patent/JP3791547B2/ja not_active Expired - Lifetime
- 2005-08-18 JP JP2005237341A patent/JP3791548B2/ja not_active Expired - Lifetime
- 2005-09-20 JP JP2005271886A patent/JP3791550B2/ja not_active Expired - Lifetime
-
2006
- 2006-06-12 JP JP2006162315A patent/JP3915842B2/ja not_active Expired - Lifetime
- 2006-07-12 JP JP2006191594A patent/JP2006313564A/ja not_active Withdrawn
- 2006-12-21 US US11/642,599 patent/US7739482B2/en not_active Expired - Fee Related
-
2008
- 2008-09-22 US US12/235,215 patent/US7721070B2/en not_active Expired - Fee Related
Also Published As
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100403165B1 (ko) |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A107 | Divisional application of patent | ||
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
A107 | Divisional application of patent | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20110811 Year of fee payment: 8 |
|
EXPY | Expiration of term |