KR100237757B1 - Method of forming a device isolation film of semiconductor device - Google Patents

Abstract

1. TECHNICAL FIELD OF THE INVENTION

Method of forming a semiconductor device.

2. Technical problem to be solved by the invention

It is possible to prevent the diffusion of the channel stop region formed in the lower portion of the local oxide film in the lateral direction, and to prevent a change in the concentration of the diffusion layers of the source and the drain to prevent the threshold voltage which is a device characteristic parameter from rising.

3. Summary of the Solution of the Invention

It is intended to increase the growth rate of the local oxide film by adding the reaction catalyst material when forming the local oxide film.

4. Important uses of the invention

Used in semiconductor device manufacturing process.

Description

Method of forming device isolation film in semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a manufacturing process of a semiconductor device, and more particularly, to a method of forming a device isolation film of a semiconductor device which prevents diffusion of impurities (channel stop impurities) injected into a substrate under a device isolation film into an active region.

In general, device isolation technology provides the electrical and structural separation of the individual devices that make up an integrated device so that the device can perform its given functions without being affected by adjacent devices. Technology. In order to increase the density of devices in terms of high density or high integration, it is necessary to reduce the area of each device, and at the same time, it is necessary to reduce the width and area of the device isolation region existing between the device and the device. Device isolation techniques are one of the factors that determine memory cell size, in that the degree of shrinkage determines the cell size. Since different types of integrated circuits require somewhat different device isolation conditions, various device isolation techniques have been developed. That is, the characteristics of each element isolation technology are different, and element isolation characteristics have been selected and used according to the use of each element. Early device isolation techniques were PN junction isolation methods used in bipolar integrated circuits, and today, the LOCOS (LOCal Oxidation of Isolation) announced by Philips around 1970 is being used in MOS transistors.

In general description, but further added, semiconductors are divided into intrinsic semiconductors and exogenous semiconductors, and intrinsic semiconductors are pure crystals containing no impurities, and exogenous semiconductors are semiconductors intentionally added with impurities to accomplish various additional purposes. Exogenous semiconductors are classified into N-type and P-type according to the added impurities. N-type semiconductors have a pentavalent element in the periodic table of elements, for example, phosphorus ((P), in order to have more electrons than holes (HOLE) in the current carrier. P), arsenic (As), and the like are added, whereas P-type semiconductors have trivalent elements in the periodic table of elements, for example, boron (B), gallium (In), etc. in order to have more holes than electrons in current carriers. Is added.

1A to 1D are cross-sectional views showing a conventional formation of a localized oxide film.

First, as shown in FIG. 1A, the pad oxide film 12 and the nitride film 13 are sequentially stacked on the silicon substrate 11, for example, on a P-type well silicon substrate to prevent stress due to the nitride film.

Next, as shown in FIG. 1B, the P-type silicon substrate 11 of the portion where the local oxide film is to be formed is exposed by etching the nitride film 13 and the oxide film 12 by an etching process using the device isolation mask 14. To be.

Next, as shown in Fig. 1C, channel stop ion implantation is performed on the exposed P-type silicon substrate (! 1) to ensure insulation between the elements. For example, in order to form the N-channel channel stop ion implantation region 16 formed on the P-type silicon substrate 11, a P ⁺ region is formed on the P-type silicon substrate before the local oxide film is formed. BF ₂ is used as a source to form the channel stop ion implantation region 16.

Finally, as shown in FIG. 1D, the device isolation mask pattern 14 is removed, and oxygen and hydrogen ion gas are reacted and thermally processed at a temperature of 950 ° C. to form a local oxide film on the channel stop ion implantation region 16. 15).

However, the BF ₂ impurities in the channel stop ion implantation region 16 are laterally diffused during the thermal process, thereby affecting the carrier concentration of the device formation region. This entails the problem of raising the threshold voltage, which is one of the device characteristics. That is, there is a problem in that the channel stop impurities are diffused into the active region instead of the device isolation region to increase the threshold voltage of the transistor formed on the active region.

The present invention, which is devised to solve the above problems, prevents the diffusion of the channel stop impurities formed in the lower portion of the local oxide film in the lateral direction when forming the device isolation layer of the semiconductor device, thereby preventing the concentration change of the source and drain diffusion layers. It is an object of the present invention to provide a device isolation film forming method of a semiconductor device which can prevent the threshold voltage which is a device characteristic parameter from rising.

1A to 1D are cross-sectional views showing a conventional local oxide film formation;

2A to 2D are cross-sectional views illustrating a method of manufacturing an insulating film in a device region of a semiconductor device according to an embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

21 silicon substrate 22 pad oxide film

23 nitride film 24 device isolation mask pattern

25 local oxide layer 26 channel stop region

In order to achieve the above object, the semiconductor device manufacturing method of the present invention, in the semiconductor device manufacturing method for preventing side diffusion of channel stop impurities, forming a nitride film on a semiconductor substrate, using a device isolation mask Forming a nitride film pattern on which the semiconductor substrate is exposed; Implanting impurities for forming a channel stop region and impurities for oxidizing the semiconductor substrate into the exposed semiconductor substrate; And forming a device isolation film by a thermal oxidation process.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

2A through 2D are cross-sectional views illustrating a process of forming a local oxide film of a semiconductor device according to an embodiment of the present invention.

First, as shown in FIG. 2A, a pad oxide film 22 and a nitride film 23 for preventing stress are sequentially stacked on a silicon substrate, for example, on a P-type well 21 silicon substrate.

Next, as shown in FIG. 2B, the P-type silicon substrate 21 is exposed by etching the nitride film 23 and the oxide film 22 by an etching process using the device isolation mask 24 to form a local oxide film. To be.

Next, as shown in FIG. 2C, channel stop ion implantation is performed. In the present invention, impurities simultaneously activating local oxide film formation are implanted simultaneously with channel stop ion implantation. For example, to form an N-channel channel stop ion implantation region 26 formed on the P-type silicon substrate 21, a P ⁺ region is formed on the P-type silicon substrate of the device isolation region, where the channel stop ion implantation region is formed. (26) BF ₂ is injected for formation and an ion implantation process is performed with chlorine (Cl), for example, as a substance for activating oxide film formation. The addition of chlorine in the formation of the channel stop ion implantation region 26 reduces the formation time of the local oxide film even under the same process conditions, thereby reducing the area of the channel stop ion implantation region growing laterally during the thermal process. That is, the channel stop impurities are prevented from diffusing into the active region during the thermal process for forming the local oxide layer.

In the channel stop ion implantation step, the dose amount is 1.0E13 to 1.0E14, and is performed at an energy of 60 to 80 KeV.

Finally, as shown in FIG. 2D, the device isolation mask pattern 24 is removed and reacted in an atmosphere containing oxygen, hydrogen, and chlorine, and thermally processed at a temperature of 800 ° C to 1000 ° C. A local oxide film 25 is formed on 26.

The present invention described above is not limited to the above-described embodiment and the accompanying drawings, and various substitutions, modifications, and changes are possible within the scope of the present invention without departing from the technical idea. It will be evident to those who have knowledge of.

According to the present invention, the channel stop region is formed during the device isolation film formation process of the semiconductor device and the local oxide film is formed. In the ion implantation process for forming the channel stop region, chlorine, which is a catalyst for the formation of the oxide film, is added to the ion. By performing the implantation process, it is possible to prevent the diffusion in the channel stop region in the lateral direction, and also to prevent the change in the concentration of the diffusion layers of the source and the drain to prevent the threshold voltage which is an element characteristic parameter from rising.

Claims (6)

A semiconductor device manufacturing method for preventing side diffusion of channel stop impurities, Forming a nitride film on the semiconductor substrate and forming a nitride film pattern on which the semiconductor substrate is exposed using an isolation mask; Implanting impurities for forming a channel stop region and impurities for oxidizing the semiconductor substrate into the exposed semiconductor substrate; And Forming an isolation layer by a thermal oxidation process Method for manufacturing a semiconductor device comprising a. The method of claim 1, The impurities for forming the channel stop region are A manufacturing method of a semiconductor device formed of an impurity of the same conductivity type as that of the semiconductor substrate. The method of claim 1, The semiconductor substrate is a silicon substrate, and the oxide film formation catalyst material comprises chlorine. The method of claim 1, The thermal oxidation step is a method for manufacturing a semiconductor device, which is performed under a gas atmosphere containing oxygen, hydrogen, and chlorine and a temperature of 800 to 1000 ° C. The method of claim 2, The impurity for forming the channel stop region comprises BF ₂ . The method of claim 4, wherein The impurity for forming the channel stop region is an electric field of 60 KeV to 80 KeV, the impurity amount of 1.0E13 to 1.0E14.

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