JPS6424446A - Printed board and manufacture thereof - Google Patents

Printed board and manufacture thereof

Info

Publication number
JPS6424446A
JPS6424446A JP62181926A JP18192687A JPS6424446A JP S6424446 A JPS6424446 A JP S6424446A JP 62181926 A JP62181926 A JP 62181926A JP 18192687 A JP18192687 A JP 18192687A JP S6424446 A JPS6424446 A JP S6424446A
Authority
JP
Japan
Prior art keywords
copper sheet
recession
power supply
patterns
gnd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62181926A
Other languages
English (en)
Other versions
JPH0787223B2 (ja
Inventor
Nobuhiro Higuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62181926A priority Critical patent/JPH0787223B2/ja
Publication of JPS6424446A publication Critical patent/JPS6424446A/ja
Publication of JPH0787223B2 publication Critical patent/JPH0787223B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP62181926A 1987-07-20 1987-07-20 プリント基板及びその製造方法 Expired - Lifetime JPH0787223B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62181926A JPH0787223B2 (ja) 1987-07-20 1987-07-20 プリント基板及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62181926A JPH0787223B2 (ja) 1987-07-20 1987-07-20 プリント基板及びその製造方法

Publications (2)

Publication Number Publication Date
JPS6424446A true JPS6424446A (en) 1989-01-26
JPH0787223B2 JPH0787223B2 (ja) 1995-09-20

Family

ID=16109316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62181926A Expired - Lifetime JPH0787223B2 (ja) 1987-07-20 1987-07-20 プリント基板及びその製造方法

Country Status (1)

Country Link
JP (1) JPH0787223B2 (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0277142A (ja) * 1988-09-13 1990-03-16 Nec Corp パッケージ構造
EP0407905A2 (de) * 1989-07-08 1991-01-16 DODUCO GMBH + Co Dr. Eugen DÀ¼rrwächter Flacher Körper, insbesondere zur Verwendung als Wärmesenke für elektronische Leistungsbauelemente
JPH08130272A (ja) * 1994-10-31 1996-05-21 Nec Corp 半導体集積回路装置
WO1996042134A1 (fr) * 1995-06-09 1996-12-27 Matsushita Electric Industrial Co., Ltd. Amplificateur
JP2018207118A (ja) * 2018-08-10 2018-12-27 太陽誘電株式会社 回路モジュール
CN113271719A (zh) * 2021-06-23 2021-08-17 昆山丘钛生物识别科技有限公司 柔性电路板处理方法、装置及设备

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2763513B1 (en) * 2011-09-30 2016-09-14 Kyocera Corporation Wiring substrate, component embedded substrate, and package structure
JP5897956B2 (ja) * 2012-03-29 2016-04-06 京セラ株式会社 部品内蔵基板および実装構造体
JP5623364B2 (ja) * 2011-09-30 2014-11-12 京セラ株式会社 配線基板、実装構造体および電子装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59198790A (ja) * 1983-04-26 1984-11-10 イビデン株式会社 プリント配線基板
JPS62263685A (ja) * 1986-05-12 1987-11-16 沖電気工業株式会社 プリント配線基板

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59198790A (ja) * 1983-04-26 1984-11-10 イビデン株式会社 プリント配線基板
JPS62263685A (ja) * 1986-05-12 1987-11-16 沖電気工業株式会社 プリント配線基板

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0277142A (ja) * 1988-09-13 1990-03-16 Nec Corp パッケージ構造
EP0407905A2 (de) * 1989-07-08 1991-01-16 DODUCO GMBH + Co Dr. Eugen DÀ¼rrwächter Flacher Körper, insbesondere zur Verwendung als Wärmesenke für elektronische Leistungsbauelemente
JPH08130272A (ja) * 1994-10-31 1996-05-21 Nec Corp 半導体集積回路装置
WO1996042134A1 (fr) * 1995-06-09 1996-12-27 Matsushita Electric Industrial Co., Ltd. Amplificateur
JP2018207118A (ja) * 2018-08-10 2018-12-27 太陽誘電株式会社 回路モジュール
CN113271719A (zh) * 2021-06-23 2021-08-17 昆山丘钛生物识别科技有限公司 柔性电路板处理方法、装置及设备
CN113271719B (zh) * 2021-06-23 2022-07-08 昆山丘钛生物识别科技有限公司 柔性电路板处理方法、装置及设备

Also Published As

Publication number Publication date
JPH0787223B2 (ja) 1995-09-20

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