JPS63271922A - Heat treatment device - Google Patents
Heat treatment deviceInfo
- Publication number
- JPS63271922A JPS63271922A JP10511287A JP10511287A JPS63271922A JP S63271922 A JPS63271922 A JP S63271922A JP 10511287 A JP10511287 A JP 10511287A JP 10511287 A JP10511287 A JP 10511287A JP S63271922 A JPS63271922 A JP S63271922A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- heat treatment
- temperature
- sample stand
- chamber
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010438 heat treatment Methods 0.000 title claims abstract description 33
- 235000012431 wafers Nutrition 0.000 abstract description 23
- 239000010453 quartz Substances 0.000 abstract description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 13
- 230000007547 defect Effects 0.000 abstract description 4
- 229910052736 halogen Inorganic materials 0.000 abstract description 4
- 150000002367 halogens Chemical class 0.000 abstract description 4
- 238000000034 method Methods 0.000 abstract description 2
- 230000000717 retained effect Effects 0.000 abstract 1
- 239000001301 oxygen Substances 0.000 description 4
- 229910052760 oxygen Inorganic materials 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- -1 oxygen ions Chemical class 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 238000010583 slow cooling Methods 0.000 description 2
- 241000257465 Echinoidea Species 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000005086 pumping Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は高温で温度の均一性が良く、しかも被処理物へ
の熱衝撃の少ない熱処理装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a heat treatment apparatus that has good temperature uniformity at high temperatures and less thermal shock to the object to be treated.
従来の技術
半導体工業においては、従来、互英管を用いた横長の電
気炉で熱処理するのが一般的であった。Conventional Technology In the semiconductor industry, heat treatment has traditionally been carried out in a horizontally elongated electric furnace using a reciprocal tube.
しかしながら、不純物拡散層を浅く形成する等の目的で
短時間でかつ900℃から1060℃前後の熱処理を行
う必要性があり、ハロゲンランプ等を用いたランプアニ
ール装置の検討が行なわれている。However, for purposes such as forming a shallow impurity diffusion layer, there is a need to perform heat treatment at a temperature of about 900° C. to 1060° C. in a short time, and lamp annealing equipment using a halogen lamp or the like is being considered.
半導体集積回路プロセスの特殊な用途では1150℃か
ら1300℃という従来に比べてはるかに高温の熱処理
を必要とする場合がある。この場合には従来の電気炉で
はヒータの寿命や石英管の変形、強度劣化等の問題があ
り、また電力消費の面からも実用的ではない。このため
、1100℃を超える高温熱処理にはランプアニール装
置が一般に用いられてきた。Special applications in semiconductor integrated circuit processes may require heat treatment at a temperature of 1150° C. to 1300° C., which is much higher than conventional heat treatment. In this case, conventional electric furnaces have problems such as the lifespan of the heater, deformation of the quartz tube, and deterioration in strength, and are also impractical in terms of power consumption. For this reason, lamp annealing equipment has generally been used for high temperature heat treatment exceeding 1100°C.
第3図は従来のランプアニール装置を示したものである
。石英チャンバ1中に設置された支持台2上にSl
ウェハ3を載置し、ハロゲンランプ4からの光により加
熱する。チャンバ1内は通常N2やムr等の不活性ガス
で充たされる。FIG. 3 shows a conventional lamp annealing device. Sl is placed on a support stand 2 installed in a quartz chamber 1.
A wafer 3 is placed and heated with light from a halogen lamp 4. The inside of the chamber 1 is normally filled with an inert gas such as N2 or hydrogen.
発明が解決しようとする問題点
しかしながら上記の様な構造では、1000℃以上で数
分間の熱処理を行なうとSi ウェハ3の周辺部に目
視で確認できるスリップラインを生じ、最悪の場合には
ウェハ3が歪に耐え切れず割れてしまうという問題があ
った。また、Si クエハ3面内の温度分布が不均一
なため、半導体装置として完成した場合にウニ・・の中
心部付近しか良品が得られないという問題があった。Problems to be Solved by the Invention However, in the structure described above, if heat treatment is performed at 1000°C or higher for several minutes, a slip line that can be visually confirmed at the periphery of the Si wafer 3 will be generated, and in the worst case, the wafer 3 will be damaged. There was a problem that it could not withstand the strain and would break. Furthermore, since the temperature distribution within the three surfaces of the Si wafer is non-uniform, there is a problem in that when a semiconductor device is completed, a good product can only be obtained near the center of the wafer.
この原因としては
(1) Si ウェノ・が短時間の間に100o℃
以上の昇温、降温にさらされること(急熱急冷)。The reasons for this are: (1) Si weto heats up to 100oC in a short period of time.
Exposure to temperature rises or falls above (rapid heating and cooling).
(2) Si ウェノ・が直接ランプにより昇温さ
れるため、ウェノ・と支持台の接触の良好な部分とそう
でない部分での温度差が大きくなり、これによりウェハ
に歪を生じスリップラインや割れを生じること。(2) Since the temperature of the Si wafer is directly raised by the lamp, the temperature difference between the areas where the wafer and the support are in good contact and the areas where it is not becomes large, which causes distortion in the wafer and causes slip lines and cracks. to occur.
の2点が強く作用しているものと考えられる。It is thought that these two points have a strong effect.
本発明では、かかる点に鑑み、1100℃以上の高温熱
処理に於てもウエノ・上の温度の均一性が良好で、スリ
ップラインや割れ等の欠陥発生の少ない処理装置を提供
することを目的とするものである。In view of this, the present invention aims to provide a processing device that has good temperature uniformity on the wafer even during high-temperature heat treatment of 1,100°C or higher, and has fewer defects such as slip lines and cracks. It is something to do.
問題点を解決するための手段
本発明は試料台と、この試料台を囲むように配された筒
形状の加熱機構と、その試料台に垂直方向上に設置され
たランプ加熱機構とを備えた熱処理装置とすることによ
り、先の問題点の解決を図るものである。Means for Solving the Problems The present invention includes a sample stand, a cylindrical heating mechanism arranged to surround the sample stand, and a lamp heating mechanism installed vertically above the sample stand. By using a heat treatment apparatus, the above problem is solved.
作用
本発明では試料台を囲む筒形状加熱機構によってあらか
じめウェノ・をたとえば900℃前後に昇温し、しかる
のちランプ加熱機構によってたとえば1100℃から1
000℃まで昇温するという手順で熱処理を行うため、
均一な温度分布を常に得ることができるとともに除熱徐
冷を従来の電気炉と同様に行なうことができるため、従
来の装置での様なウェハへの欠陥発生をなくすことがで
きる。またチャンバ内を減圧することにより、対流を減
少し温度分布の不均一性をさらに小さくしている。In the present invention, the temperature of the wetted material is raised in advance to around 900°C using a cylindrical heating mechanism surrounding the sample stage, and then the temperature is increased from 1100°C to 1°C using a lamp heating mechanism.
Because heat treatment is performed by raising the temperature to 000℃,
Since a uniform temperature distribution can always be obtained and heat removal and slow cooling can be performed in the same manner as in conventional electric furnaces, it is possible to eliminate defects on wafers that occur in conventional equipment. Furthermore, by reducing the pressure inside the chamber, convection is reduced and non-uniformity in temperature distribution is further reduced.
実施例
以下に本発明の一実施例について図面とともに説明する
。第1図は本発明の第1の実施例における高温熱処理装
置の断面斜視図である。円筒形状の石英チャンバ1a内
に石英またはSiC製の試料台2によってSi ウェ
ノ・3を保持する構造となっている。ノ・コゲ/ランプ
4から出た可視光及び赤外光は石英窓6を通してSl
ウエノ・3に照射され、Si に吸収され熱に変わる
。Sl ウエノ・3は試料台2の垂直上方に設けたノ
・ロゲンランプ4から熱せられるとともに、円筒状にチ
ャンバ11Lを取り囲むヒータ6により熱せられる。冷
却器7の内面は反射鏡となっており熱線を反射してSi
ウニ・・3の温度上昇に役立つとともに、熱の外部
への漏れを防止している。チャンバ1aにはガス導入口
8から、N2.ムrの不活性ガスや必要に応じてN2等
の還元性ガスが導入される。またチャンバ1&内は排気
口9の排気速度を制御することにより、圧力制御されて
おり、通常は対流による温度の不均一を防止するため1
から数1 Q ’rorrに保たれる。この装置を酸素
イオン注入して埋込み酸化膜を形成する際の熱処理に適
用した。酸素イオン注入はエネルギー200 KeVで
1.6から2.5 X 1018dose/i 、基板
温度約600℃で行った。この試料を本装置に入れ、第
1ステツプは10 Torr N2中にて1250℃で
60分、第2ステツプはArベースのs % N2
ガス中にて同じ(1250℃で60分熱処理したのち、
N2 ガス中で降温した。EXAMPLE An example of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional perspective view of a high-temperature heat treatment apparatus in a first embodiment of the present invention. The structure is such that a Si Weno 3 is held in a cylindrical quartz chamber 1a by a sample stage 2 made of quartz or SiC. Visible light and infrared light emitted from the lamp 4 pass through the quartz window 6 to the Sl
It is irradiated onto Ueno-3, absorbed by Si, and converted into heat. The Sl Ueno 3 is heated by a nitrogen lamp 4 provided vertically above the sample stage 2, and also by a heater 6 surrounding the chamber 11L in a cylindrical shape. The inner surface of the cooler 7 is a reflective mirror that reflects heat rays and
It helps raise the temperature of the sea urchin 3 and prevents heat from leaking to the outside. The chamber 1a is supplied with N2. A large amount of inert gas and a reducing gas such as N2 are introduced as necessary. In addition, the pressure inside the chamber 1& is controlled by controlling the exhaust speed of the exhaust port 9. Normally, the pressure inside the chamber 1& is controlled by controlling the exhaust speed of the exhaust port 9.
The number 1 is kept from Q'rorr. This device was applied to heat treatment when forming a buried oxide film by implanting oxygen ions. Oxygen ion implantation was performed at an energy of 200 KeV, 1.6 to 2.5 x 1018 doses/i, and a substrate temperature of about 600°C. The sample was placed in the apparatus, the first step was at 1250°C for 60 minutes in 10 Torr N2, and the second step was at 1250°C in 10 Torr N2, and the second step was at 1250°C in 10 Torr N2.
Same in gas (after heat treatment at 1250℃ for 60 minutes,
The temperature was lowered in N2 gas.
スタンバイ温度は900℃とし、昇温、降温は約り0℃
/分 の除熱、徐冷とした。従来装置で見られたウエノ
・周辺のスリップラインは見られず、また、表面Si層
中の転位密度も従来の約1o ltr&から1桁から2
桁の減少が見られた。The standby temperature is 900℃, and the temperature rise and fall is approximately 0℃.
Heat removal and slow cooling were performed for 1/min. There are no slip lines in the Ueno/periphery that were observed in conventional equipment, and the dislocation density in the surface Si layer has increased from about 1 to 2 digits, compared to the conventional approximately 1 O ltr&.
An order of magnitude decrease was observed.
第2図は本発明の第2の実施例における高温熱処理装置
の断面斜視図である。筒形状の石英チャンバ1b内の石
英試料台2によってウェハ3が保持される。ウェハ3は
その垂直方向に設置されたハロゲンランプ4から照射さ
れた石英窓5を通ってくる熱線により加熱される。さら
に、ウェハ3は石英窓6部分を除いてチャンバ1bの周
囲からヒータ6により熱せられる。チャンバ内は排気速
度制御により圧力制御され、ウェハ内温度分布の均一性
を高めている。この配置は試料台2を石英チャンバ1b
上に置くことができるだめ、挿入機構を簡単にできる。FIG. 2 is a cross-sectional perspective view of a high-temperature heat treatment apparatus in a second embodiment of the present invention. A wafer 3 is held by a quartz sample stage 2 in a cylindrical quartz chamber 1b. The wafer 3 is heated by heat rays emitted from a halogen lamp 4 installed vertically and passing through a quartz window 5. Further, the wafer 3 is heated by the heater 6 from around the chamber 1b except for the quartz window 6 portion. The pressure inside the chamber is controlled by pumping speed control to improve the uniformity of temperature distribution within the wafer. This arrangement places the sample stage 2 in the quartz chamber 1b.
It can be placed on top, making the insertion mechanism easy.
この装置を用いて酸素イオン注入した試料を1260℃
にて熱処理した結果、スリップラインは認められなかっ
た。Using this device, a sample into which oxygen ions were implanted was heated to 1260°C.
As a result of heat treatment, no slip lines were observed.
発明の効果
本発明の加熱装置を用いることにより、1100℃から
1300℃程度の高温においても均一性良くしかも除熱
徐冷によりウェノ・の熱処理ができる本装置を酸素イオ
ン注入したSiの熱処理に用いれば、ウェハ周辺にスリ
ップラインのない、転位密度の低い埋込み酸化膜を有す
るSOI構造を形成できる。なお、本発明の装置は特に
1000℃以上での温度均一性を考慮したものであるが
、それ以下の温度で用いても本発明装置の良好な特性が
得られることは言うまでもない。Effects of the Invention By using the heating device of the present invention, it is possible to perform heat treatment of wafers with good uniformity even at high temperatures of about 1100°C to 1300°C and by gradual cooling with heat removal.This device can be used for heat treatment of Si into which oxygen ions are implanted. For example, it is possible to form an SOI structure without slip lines around the wafer and having a buried oxide film with low dislocation density. Although the apparatus of the present invention is designed with particular consideration given to temperature uniformity at temperatures of 1000° C. or higher, it goes without saying that good characteristics of the apparatus of the present invention can be obtained even when used at temperatures lower than 1000°C.
第1図は本発明による熱処理装置の第1の実施例を示す
断面斜視図、第2図は本発明による熱処理装置の第2の
実施例を示す断面斜視図、第3図は従来の高温熱処理装
置の断面図である。
1!L、1b・・・・・・石英チャンバ、2・・・・・
・試料台、3・・・・・・Siウェハ、4・・・・・・
ハロケンランプ、6・・・・・・石英窓、6・・・・・
・ヒータ、9・・・・・・排気口。FIG. 1 is a cross-sectional perspective view showing a first embodiment of a heat treatment apparatus according to the present invention, FIG. 2 is a cross-sectional perspective view showing a second embodiment of a heat treatment apparatus according to the present invention, and FIG. 3 is a conventional high-temperature heat treatment. FIG. 2 is a cross-sectional view of the device. 1! L, 1b...Quartz chamber, 2...
・Sample stage, 3...Si wafer, 4...
Halloken lamp, 6...Quartz window, 6...
・Heater, 9...Exhaust port.
Claims (1)
加熱機構と、前記試料台の垂直方向上に設置されたラン
プ加熱機構とを備えてなる熱処理装置。A heat treatment apparatus comprising a sample stage, a cylindrical heating mechanism arranged to surround the sample stage, and a lamp heating mechanism installed vertically above the sample stage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10511287A JPS63271922A (en) | 1987-04-28 | 1987-04-28 | Heat treatment device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10511287A JPS63271922A (en) | 1987-04-28 | 1987-04-28 | Heat treatment device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63271922A true JPS63271922A (en) | 1988-11-09 |
Family
ID=14398755
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10511287A Pending JPS63271922A (en) | 1987-04-28 | 1987-04-28 | Heat treatment device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63271922A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02249227A (en) * | 1989-03-22 | 1990-10-05 | Nec Corp | Short time heat treating method |
JPH02249228A (en) * | 1989-03-22 | 1990-10-05 | Nec Corp | Short time heat treating method |
JPH03116828A (en) * | 1989-09-29 | 1991-05-17 | Hitachi Ltd | Heat treatment device for semiconductor wafer |
WO2002047137A1 (en) * | 2000-12-08 | 2002-06-13 | Sony Corporation | Semiconductor thin film forming method, production methods for semiconductor device and electrooptical device, devices used for these methods, and semiconductor device and electrooptical device |
JP2009272633A (en) * | 2008-05-09 | 2009-11-19 | Siltronic Ag | Method for producing epitaxially coated semiconductor wafer |
-
1987
- 1987-04-28 JP JP10511287A patent/JPS63271922A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02249227A (en) * | 1989-03-22 | 1990-10-05 | Nec Corp | Short time heat treating method |
JPH02249228A (en) * | 1989-03-22 | 1990-10-05 | Nec Corp | Short time heat treating method |
JPH03116828A (en) * | 1989-09-29 | 1991-05-17 | Hitachi Ltd | Heat treatment device for semiconductor wafer |
WO2002047137A1 (en) * | 2000-12-08 | 2002-06-13 | Sony Corporation | Semiconductor thin film forming method, production methods for semiconductor device and electrooptical device, devices used for these methods, and semiconductor device and electrooptical device |
US7183229B2 (en) | 2000-12-08 | 2007-02-27 | Sony Corporation | Semiconductor thin film forming method, production methods for semiconductor device and electrooptical device, devices used for these methods, and semiconductor device and electrooptical device |
JP2009272633A (en) * | 2008-05-09 | 2009-11-19 | Siltronic Ag | Method for producing epitaxially coated semiconductor wafer |
US9240316B2 (en) | 2008-05-09 | 2016-01-19 | Siltronic Ag | Method for producing an epitaxially coated semiconductor wafer |
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