JPS63246831A - Silicon crystal substrate - Google Patents

Silicon crystal substrate

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Publication number
JPS63246831A
JPS63246831A JP8165287A JP8165287A JPS63246831A JP S63246831 A JPS63246831 A JP S63246831A JP 8165287 A JP8165287 A JP 8165287A JP 8165287 A JP8165287 A JP 8165287A JP S63246831 A JPS63246831 A JP S63246831A
Authority
JP
Japan
Prior art keywords
substrate
defect
oxygen
density
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8165287A
Other languages
Japanese (ja)
Other versions
JP2631977B2 (en
Inventor
Masafumi Shinpo
新保 雅文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP62081652A priority Critical patent/JP2631977B2/en
Publication of JPS63246831A publication Critical patent/JPS63246831A/en
Application granted granted Critical
Publication of JP2631977B2 publication Critical patent/JP2631977B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To form a silicon substrate, which is hardly affected by oxygen in the substrate, carbon density and the like, by implanting at least one kind of ion, which is selected from among the oxygen and the carbon, at high energy into the inside of the substrate from the main surface of the silicon single crystal substrate at first, and using the first ion implanted layer as a nucleus for defect gettering. CONSTITUTION:Oxygen ions are implanted into the main surface of an Si substrate 1 at high energy at 500 keV or more. A first implanted layer 2, which has a density peak Np at a depth Dp of several mum, is formed. At least the peak density Np is selected higher than the density Nso of the oxygen, which is included in the substrate 1 in the conventional method. Then, a defect forming nucleus such as a lamination defect is yielded in the first implanted layer 2 in a heat treatment step. Defects around the nucleus are absorbed. A non-defect layer 3 is formed on the surface side of the substrate 1. Since the defect absorbing layer can be formed at an accurate position positively, the reproducibility of the manufacturing yield of the semiconductor devices can be improved.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は半導体装@製造用のシリコン結晶基板に間する
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to silicon crystal substrates for manufacturing semiconductor devices.

[発明の概要] 高エネルギイオン注入機で酸素イオンを数μIの深さで
注入したシリコン基板を提供するもので、この注入層は
半導体装置製造プロセスで欠陥吸収層として役立つ。
[Summary of the Invention] A silicon substrate is provided in which oxygen ions are implanted to a depth of several μI using a high-energy ion implanter, and the implanted layer serves as a defect absorbing layer in a semiconductor device manufacturing process.

[従来の技術] 半導味装置の高性能1ヒおよび高製造歩留り化に伴い、
シリコン基板の高品質化が望まれている。
[Prior art] With the advancement of high performance and high manufacturing yield of semiconductor taste devices,
Higher quality silicon substrates are desired.

そのため複雑な熱処理工程で欠陥を結晶内部に発生・吸
収させ、表面近傍は欠陥を少なくする真性ゲッタリング
等が行われている。しかし、この現象は基板中の酸素や
炭素密度等に敏感に依存するため再現性に問題があり、
また基板受は入れ検査に注意を要した。
For this reason, intrinsic gettering, etc., is performed to generate and absorb defects inside the crystal through a complicated heat treatment process, and to reduce the number of defects near the surface. However, this phenomenon has problems with reproducibility because it depends on the oxygen and carbon density in the substrate.
Also, the board holder required careful inspection when inserted.

[発明が解決しようとする問題点コ 本発明は上記の問題点に鑑みてなされ、基板中の酸素や
炭素密度等に左右されにくいシリコン基板を提供するも
のである。
[Problems to be Solved by the Invention] The present invention has been made in view of the above-mentioned problems, and provides a silicon substrate that is less affected by oxygen, carbon density, etc. in the substrate.

[問題点を解決するための手段] 本発明によるシリコン基板は高エネルギイオン注入機で
酸素もしくはrfc素の少なくとも1つのイオンが数μ
mの;楽ざて;主人されたものである。
[Means for Solving the Problems] A silicon substrate according to the present invention is manufactured by implanting at least one ion of oxygen or an RFC element in a few microns using a high-energy ion implanter.
m's music; it is something that is controlled by the master.

[作用] 通常シリコン基板には酸素が5〜loxloI7cm−
3゜炭素が1015cm−3オーダー含まれても(る。
[Function] Normally, silicon substrates contain oxygen at 5~loxloI7cm-
Even if 3° carbon is included on the order of 1015 cm-3.

例えば酸素を上記密度以上のピーク密度でイオン注入す
れば、この注入層が製造プロセスの熱処理工程で欠陥吸
収層の役割をなす。いわゆるデヌーデッド・ゾーンの厚
みをほぼ任意に注入エネルギて制御できろ。
For example, if oxygen ions are implanted at a peak density higher than the above density, this implanted layer will serve as a defect absorbing layer in the heat treatment step of the manufacturing process. The thickness of the so-called denuded zone can be controlled almost arbitrarily by controlling the implantation energy.

[実施例] 以下に図面を用いて本発明を詳述する。[Example] The present invention will be explained in detail below using the drawings.

(1)実施例1(第1図及至第3図) 第1図には本発明のシリコン基板lの模式的断面を示す
。第3図に密度分布を示すように51基板lの主表面に
酸素イオンを500key以上で高エネルギイオン注入
して数μmの深さOpに密度ビークNρをもつ第1注入
層2を形成したものである。少なくともピーク密度Np
は従来基板lに含まれて□いた酸素密度Nsoより高く
選ばれる。例えばIMeV、 IxlO14cm−2注
入しNp+:g 5xlO”cm−3を深さDp−1,
5μmに形成する。
(1) Example 1 (FIGS. 1 to 3) FIG. 1 shows a schematic cross section of a silicon substrate 1 of the present invention. As shown in the density distribution in Fig. 3, oxygen ions are implanted into the main surface of a 51 substrate l with high energy using 500 keys or more to form a first implanted layer 2 having a density peak Nρ at a depth Op of several μm. It is. at least peak density Np
is selected to be higher than the oxygen density Nso contained in the conventional substrate l. For example, IMeV, IxlO 14cm-2 is implanted and Np+:g 5xlO"cm-3 is implanted to a depth Dp-1,
Formed to 5 μm.

第2図は製造プロセスの熱処理工程で第1注入層2に積
層欠陥等の欠陥形成核が発生し周囲の欠陥を吸収し基4
Fitの表面(至)に無欠陥層3が形成された模式図で
ある。欠陥形成核の発生位置は注入エネルギて制御され
る。酸素の例を述べたが炭素もしくは酸素十炭素ても同
様である。
Figure 2 shows that defect formation nuclei such as stacking faults are generated in the first injection layer 2 during the heat treatment step of the manufacturing process, absorb surrounding defects, and form a base 4.
It is a schematic diagram in which a defect-free layer 3 is formed on the surface (toward) of Fit. The location of defect forming nuclei is controlled by the implantation energy. Although the example of oxygen has been described, the same applies to carbon or oxygen and ten carbons.

(2)実施例2(第4図) 第4図には酸素の第1イオン注入とともに51の第2イ
オン注入を第1注入層より浅く行った密度分布を示した
。Slの第2注入によって空孔や格子間原子が多く発生
するため第1注入層がより確実に欠陥核となる。さらに
第1注入層より浅い結晶層は再結晶化過程を経るため結
晶性はより良好となる。
(2) Example 2 (FIG. 4) FIG. 4 shows the density distribution in which the first ion implantation of oxygen and the second ion implantation of 51 were performed shallower than the first implantation layer. Since many vacancies and interstitial atoms are generated by the second implantation of Sl, the first implantation layer more reliably becomes a defect nucleus. Furthermore, since the crystal layer shallower than the first injection layer undergoes a recrystallization process, its crystallinity becomes better.

[発明の効果] 以上述べたように本発明によれば、欠陥吸収層を確実に
正確な位置に形成できるので半導体装置の製造歩留の再
現性を向上できる。以上の例では基板全面にイオン注入
を行うことを述べたが、必要に応じては選択的にも可能
である。
[Effects of the Invention] As described above, according to the present invention, the defect absorption layer can be reliably formed at an accurate position, so that the reproducibility of the manufacturing yield of semiconductor devices can be improved. In the above example, it has been described that ion implantation is performed over the entire surface of the substrate, but it is also possible to perform ion implantation selectively if necessary.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による51基板の断面図、第2図は本発
明のSi基板を熱処理した後の断面図、第3図は第1図
の酸素密度分布図、第4図は本発明の他の実施例を示す
酸素およびSl密度分布図である。 1−−−5i基板 2−m−第1イオン注入Pi3−−
−無欠陥層
Fig. 1 is a cross-sectional view of the 51 substrate according to the present invention, Fig. 2 is a cross-sectional view of the Si substrate of the present invention after heat treatment, Fig. 3 is an oxygen density distribution diagram of Fig. 1, and Fig. 4 is a cross-sectional view of the Si substrate of the present invention after heat treatment. FIG. 7 is an oxygen and Sl density distribution diagram showing another example. 1----5i substrate 2-m-first ion implantation Pi3--
−Defect-free layer

Claims (2)

【特許請求の範囲】[Claims] (1)500keV以上の高エネルギで酸素と炭素とか
ら選ばれた少なくとも1種のイオンをシリコン単結晶基
板の主表面から該基板内部に第1イオン注入し、前記第
1イオン注入層を欠陥ゲッタリングの核とすることを特
徴とするシリコン結晶基板。
(1) At least one type of ion selected from oxygen and carbon is first ion-implanted from the main surface of a silicon single crystal substrate into the substrate at a high energy of 500 keV or more, and the first ion-implanted layer is used as a defect getter. A silicon crystal substrate characterized by being the nucleus of a ring.
(2)前記第1イオン注入層より浅い深さにシリコンを
第2イオン注入することを特徴とする特許請求の範囲第
1項記載のシリコン結晶基板。
(2) The silicon crystal substrate according to claim 1, wherein the second ion implantation of silicon is performed at a depth shallower than the first ion implantation layer.
JP62081652A 1987-04-02 1987-04-02 Method for manufacturing silicon crystal substrate Expired - Lifetime JP2631977B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62081652A JP2631977B2 (en) 1987-04-02 1987-04-02 Method for manufacturing silicon crystal substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62081652A JP2631977B2 (en) 1987-04-02 1987-04-02 Method for manufacturing silicon crystal substrate

Publications (2)

Publication Number Publication Date
JPS63246831A true JPS63246831A (en) 1988-10-13
JP2631977B2 JP2631977B2 (en) 1997-07-16

Family

ID=13752261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62081652A Expired - Lifetime JP2631977B2 (en) 1987-04-02 1987-04-02 Method for manufacturing silicon crystal substrate

Country Status (1)

Country Link
JP (1) JP2631977B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5327007A (en) * 1991-11-18 1994-07-05 Mitsubishi Denki Kabushiki Kaisha Semiconductor substrate having a gettering layer
JP2007149799A (en) * 2005-11-25 2007-06-14 Shin Etsu Handotai Co Ltd Annealed wafer and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5618430A (en) * 1979-07-25 1981-02-21 Fujitsu Ltd Manufacture of semiconductor element
JPS5735329A (en) * 1980-08-11 1982-02-25 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS59188925A (en) * 1983-04-12 1984-10-26 Toshiba Corp Manufacture of semiconductor device
JPS6151930A (en) * 1984-08-22 1986-03-14 Nec Corp Manufacture of semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5618430A (en) * 1979-07-25 1981-02-21 Fujitsu Ltd Manufacture of semiconductor element
JPS5735329A (en) * 1980-08-11 1982-02-25 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS59188925A (en) * 1983-04-12 1984-10-26 Toshiba Corp Manufacture of semiconductor device
JPS6151930A (en) * 1984-08-22 1986-03-14 Nec Corp Manufacture of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5327007A (en) * 1991-11-18 1994-07-05 Mitsubishi Denki Kabushiki Kaisha Semiconductor substrate having a gettering layer
US5539245A (en) * 1991-11-18 1996-07-23 Mitsubishi Materials Silicon Corporation Semiconductor substrate having a gettering layer
JP2007149799A (en) * 2005-11-25 2007-06-14 Shin Etsu Handotai Co Ltd Annealed wafer and manufacturing method thereof

Also Published As

Publication number Publication date
JP2631977B2 (en) 1997-07-16

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