JPS63232363A - Substrate bias generator circuit - Google Patents

Abstract

PURPOSE:To reduce power consumption at the time of interrupting a memory and to supply a large charge pump current at the time of operating it by providing a second charge pump circuit driven each time an address input signal to an MOS memory is varied. CONSTITUTION:In a substrate bias generator circuit for supplying a voltage to an MOS memory which needs a substrate bias, a first charge pump 11 is driven by the output of a self-excited oscillator 10, and a variation in an address input signal to be input to the memory is further detected by a buffer 13 to drive a second charge pump 14 by the output of the buffer 12 at each time. Thus, a current consumption can be reduced at the time of interrupting the memory, and a large charge pump current can be supplied at the time of operating the memory.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a substrate bias generation circuit, and particularly to a substrate bias generation circuit that supplies a voltage to a MOS memory that requires the substrate bias.

[Conventional technology]

Conventionally, there was a device of this type as shown in Figure 40.
In the figure, l is a capacitor, and the output of the self-help oscillator 10 is connected to one electrode of the capacitor. 2 is the output terminal of the substrate bias generation circuit, 3 is an N-channel MO3Tr,
Its drain end and gate end are connected to the output end 2, and its source end is connected to the other electrode (node) 4 of the capacitor 1. 5 is N channel MOS
T r has its drain end and gate end connected to the electrode 4, and its source end is grounded.

Further, as an example of the self-help oscillator 10, a ring oscillator having an odd number of inverters connected in series as shown in FIG. 5 is used.

Next, the operation of the substrate bias generation circuit will be described with reference to FIG. 4 and FIG. 6 showing potential changes at each node of the circuit of FIG. 4. Now, the self-excited oscillator 10 changes from OV to Vcc (
Suppose that it is oscillating with the amplitude of the power supply voltage). At this time, the potential of node 4 also changes due to capacitive coupling of capacitor 1.

In this case, if the potential of node 4 attempts to exceed the threshold voltage (V■) of transistor 5, then transistor 5
becomes conductive, and the "H" level of node 4 is clamped to Vll (v). And node 4 is from this voltage to -VC
C (v) changes in the negative direction, the lowest potential of node 4 becomes VtM - VCC (V). Therefore, output terminal 2 of the substrate bias generation circuit is connected to transistor 3 from node 4.
The threshold voltage V? The voltage increases by N, and finally becomes 2 VtM-Vcc (V).On the other hand, when the output terminal 2 of the substrate bias generation circuit is set to O■, the charge pump current l flowing through the transistor 3 becomes 1- f-C・V ... (1) Formula % Formula % Here, f is the oscillation frequency of the self-excited oscillator, and C is the capacitor 1
The capacitance is the output amplitude of the self-excited oscillator. Therefore, if you want to increase the charge pump current i, either increase the oscillation frequency f of the self-excited oscillator, or increase the output amplitude V.
It can be seen that the capacitance C of the capacitor should be increased.

However, with these methods, it is necessary to increase the switching speed of each inverter stage of the self-excited oscillator shown in Figure 5, and to increase the ability to drive a capacitor load. The power consumed must be increased.

[The famous problem that the invention attempts to solve]

On the other hand, as the miniaturization of MOS transistors has progressed in recent years, the substrate current generated due to the injection of holes into the substrate generated in the high electric field and region near the drain of MOS transistors has increased, and this has increased the substrate bias voltage. The decline has become a major problem. However, since the conventional body bias generation circuit is configured as described above, in order to increase the charge pump current, it is necessary to increase the power consumed by the self-exciting oscillator. There is a limit to this method because it is necessary to reduce power consumption as much as possible.

This invention was made in order to eliminate the drawbacks of the above-mentioned devices, and it is possible to reduce current consumption when the memory is not operating, and to obtain a large charge pump current when the memory is operating. The purpose is to provide circuits.

[Means for solving problems]

The substrate bias generation circuit according to the present invention includes a buffer circuit that detects a change in an address input signal applied to a MOS memory and generates a one-shot pulse, and a charge pump circuit that is driven by the buffer and supplies a charge pump current. It has been established.

[Effect]

In this invention, since a buffer circuit that generates a one-shot pulse every time a change in the address signal input to the MOS memory is detected and a charge pump circuit driven by the output of the buffer circuit are provided, when the memory is not in operation, The power consumption of the device can be reduced, and a large charge pump current can be supplied during operation.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a substrate bias generation circuit according to an embodiment of the present invention. In the figure, the same reference numerals as in FIG. 12 is M
This is an address change detection circuit that detects an address change in one of the address inputs input to the OS memory, and the number of address change detection circuits 12 is equal to the number of address signals input to the MOS memory. There is. 13 is a buffer circuit that performs "NOR processing" of the address change detection circuit 12 for each address signal; 14 is a second charge pump circuit driven by the buffer circuit 13;
5 is an output terminal of the substrate bias generation circuit.

Further, FIG. 2 shows a logic diagram showing an example of an address change detection circuit. Further, a timing chart of each node A-H of the circuit of FIG. 2 is shown in FIG.

Next, the operation will be explained. From FIG. 3, the output I of this logic circuit is at the "L" level when the address signal A does not change, and when the address signal A changes from "L" to "H", it is output by the first delay circuit 21. “H” only at a fixed time
When the address signal changes from “H” to “L”, it remains “H” for a time determined by the second delay circuit 22.
It can be seen that the signal becomes Therefore, the output of the address change detection circuit 12, which has the same number of address input signals as the number of address input signals, is "NO".
The output of the buffer circuit 13 that performs the "R" operation becomes "H" level when there is no address change, and at least one address input signal changes from "L" to "H" or "H".
When the signal changes from "L" to "L", a signal that remains "L" for a certain period of time is output. Therefore, the second charge pump circuit 14 driven by the buffer circuit 13 operates every time the address changes and supplies current i1 in addition to the current 11 supplied by the first charge pump circuit 11 by the self-excited oscillator. Become.

As described above, according to this embodiment, in addition to driving the first charge pump circuit 11 by the output of the self-help oscillator 10, the buffer circuit 13 detects changes in the address input signal input to the MOS memory, and detects each change. The 8771 circuit 1
Since the second charge pump circuit 14 is driven by the output of the second charge pump circuit 14, the current consumption when the memory is not operating can be reduced, and a large charge pump current can be supplied when the memory is operating.

〔Effect of the invention〕

As described above, according to the substrate bias generation circuit according to the present invention, the first charge pump circuit is driven by the output of the self-excited oscillator, and is driven every time the address input signal to the MOS memory changes. Since the second charge pump circuit is provided, it is possible to provide a MOS memory device that can reduce power consumption when the memory is not in operation and can supply a large charge pump current when the memory is in operation.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a substrate bias generation circuit according to an embodiment of the present invention, and FIG. 2 is a diagram illustrating an example of a logic circuit for detecting a change in an address input signal according to an embodiment of the present invention.
FIG. 3 is a timing chart showing changes over time in internal nodes of the address input signal change detection circuit, FIG. 4 is an example of a conventional substrate bias generation circuit, and FIG. 5 is an example of a self-excited oscillator. The circuit diagram and FIG. 6 are waveform diagrams for explaining the operating principle of the charge pump circuit. 1... Capacitor, 3.5... N-channel MOS transistor, 13... Buffer circuit, 12.14...
・First. Second charge pump circuit.

Claims (1)

[Claims] (1) A substrate bias generation circuit built in a semiconductor memory device includes a first charge pump circuit driven by a self-excited oscillator and consisting of a capacitor and a rectifier circuit, and a plurality of charge pump circuits that are input to the semiconductor memory device. The present invention is characterized by comprising a buffer that detects a change in at least one of the address signals and generates a one-shot pulse, and a second charge pump circuit that is driven by the buffer and that includes a capacitor and a rectifier circuit. substrate bias generation circuit.