JPS60173796A - Superconduction storage circuit - Google Patents

Abstract

PURPOSE:To select superconduction storage circuits at intersections of a matrix to store information and read stored information with respect to superconduction storage circuits where information of binary expression ''1'' and ''0'' can be stored in superconduction loops including superconduction Josephson switches and inductors and can be read out. CONSTITUTION:A resistance RB is connected in parallel with a superconduction Josephson switch S1, and a superconduction Josephson switch S2 of a superconduction Josephson gate G1 is connected in parallel to the superconduction Josephson switch S1 through only a resistance R1. If a current IY is supplied to a current line H1 in the second direction opposite to the first direction and a current IX is supplied to a current line H2 when information ''1'' is stored in a superconduction loop U, the superconduction Josephson switch S2 is switched from the zero voltage state to a voltage presence state because currents IY and IX are flowed to the superconduction Josephson switch S2 of the superconduction Josephson gate G1 and a control line respectively.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to information that takes "1" and "0" in binary representation.
The present invention relates to a superconducting memory circuit capable of storing and reading data in a superconducting loop including a superconducting Josephson switch and an inductor.

BACKGROUND OF THE INVENTION As such a superconducting memory circuit, a circuit having the configuration described below with reference to FIG. 1 has heretofore been proposed.

In other words, it consists of one Josephson junction or multiple Josephson junctions connected in series (in the figure, one
The superconducting loop U includes a superconducting Jollefson switch s1 (consisting of two Josephson junctions) and an inductor L, and the superconducting loop U includes a superconducting Josephson switch S1 and an inductor L. connection point at one end, superconducting Jollefson switch s1 and inductor L
It is inserted into the current path HO at the position of No. 1 (I!l OMt connection point).

In addition, a resistor R1 is inserted in the current path 1''1.
and a superconducting Josephson switch S2 connected in parallel with the superconducting Josephson switch S1 through R2, and a control line C for the superconducting Josephson switch S2 inserted in the current path H2. It has a conductive Jollefson gate G1.

Further, a superconducting Josephson switch S3 is inserted in the current path H3, and a superconducting Josephson switch S3 is inserted in the above-mentioned TS superconducting loop U, connected in series with the inductor L. A superconducting Josephson gate G2 having a control line c1 for the superconducting Josephson switch S3 and a control line C2 for the superconducting Josephson switch S3 inserted in the current path []4.

The above is the configuration of a conventionally proposed superconducting memory circuit.

According to the superconducting memory circuit having such a configuration, information that takes "1" and "0" on a binary display by performing the following operations is stored in the superconducting loop U, and is also read out. You can do it.

That is, since the superconducting Josephson switch S1 and the superconducting Josephson switch $2 of the superconducting Josephson gate G1 are in the zero voltage state, and the current IB is supplied to the current path HO, the superconducting From a state in which most of the current IB flows as an offset current in the conductive Jollefson switch S1, a current IY is supplied to the current path 1-11 in the first direction (from top to bottom in the figure), and Current path]] If the current [X (Jξ supply 4) is applied to 2, the currents IY and IX are
Since the current flows through the superconducting Josephson switch S2 of No. 1 and the control line C, the superconducting Josephson switch S2 changes from the zero voltage state to the voltage state.

Therefore, most of the current IY that has so far flowed through the superconducting Josephson switch S2 is supplied to the superconducting loop U as the current IXY via the resistors R1 and R2, and most of the current IXY is superconducting. In the superconducting Josephson switch S1 of the loop U, the above-mentioned A current flows in the same first direction as the current IB, superimposed on most of the current IB of the current IB. Therefore, in the superconducting Josephine switch s1 of the superconducting loop U, the sum of most of the current IB and most of the current IXY (for simplicity, this is called (I
B+IXY) and overlapping) flow.

In this way, the value of the current (IB+IXY) flowing through the superconducting Josephson switch s1 of the superconducting loop U becomes Ic=! , +(1+Φo/2πLIJ)...
. . . When the critical current value IC of the superconducting loop U expressed by (1) is exceeded, the superconducting Josephson switch S1 changes from the zero voltage state to the voltage applied state.

J′3, In equation (1), IJ is the maximum Josephson current value of the superconducting Josephson switch S1, L is the inductance of the superconducting loop U, and Φ0 is the magnetic flux quantum J0. The current (IB+IXY) that was flowing in the first direction in the son switch S1 flows into the inductor L, and along with this, the superconducting Josephson switch $1 returns from the right voltage state to the zero voltage state. , Therefore, in the superconducting loop U, the current (IB+IXY)
is generated as a circulating current.

In this way, after a circulating current is generated in the superconducting loop U, even if the supply of the current IY in the first direction flowing through the current path H1 is cut off, the superconducting Josephson switch S1 is Most of the current IB flows in the first direction, and the current (IB+IXY
) is flowing in the second direction opposite to the first direction, so that the current IXY approximately flows through the superconducting Josephson switch S1 in the first direction (from bottom to top in the figure). Only a current having a value equal to or greater than the maximum Josephson current value IJ of the superconducting Josephson switch S1 (this will be referred to as IXY for simplicity) flows. Therefore, the superconducting Josephson switch S1 remains in a zero voltage state, so that a circulating current is stored in the superconducting loop U.

As mentioned above, according to the configuration of the conventional superconducting memory circuit shown in FIG. 1, the above-described circulating current is stored in the superconducting loop U.
1" is memorized, the current path T10
Supply current 1[3 as an offset current to
By supplying current IY in the first direction to current path 1-11 and supplying current ■× to current path 1-12, information "1" can be stored in superconducting loop U. , and also transfers the memory state to the current path 110
As long as the supply of the current IB as an electric current is not cut off, it can be stored.

In addition, the superconducting Josephson switch S2 of the superconducting Josephson gate G1 is in a zero voltage state, and the i flow path 1 is in a zero voltage state.
-10 is supplied with the current IB as an offlet current, and the superconducting loop U receives the information "1" as described above.
From the state in which is stored, current IY is supplied to current path 1''1 in a second direction opposite to the first direction (from bottom to top in the figure), and current path 12 is If current IX is supplied to , currents IY and I Converts from zero voltage state to voltage applied state.

Therefore, most of the current IY that has been flowing through the superconducting Josephson switch S2 is supplied to the superconducting loop U via the resistors R1 and R2, and a portion of the current flowing to the inductor L side becomes the circulating current. Current as (lB+IXY)
It flows in the opposite direction (counterclockwise) to the direction of (clockwise). Therefore, almost no current flows through the superconducting Josephson switch $1 of the superconducting loop U, and the circulating current in the superconducting loop U thus far disappears.

In this way, after the circulating current disappears in the superconducting loop U, the supply of the second direction current IY to the current path H1 is cut off, and an offset current is applied to the current path 1-10. Even if the current IB is supplied and thereby the current rB is supplied to the superconducting Jollefson switch S1 of the superconducting loop U, the superconducting Jollefson switch S1 is
There is no transition from a zero-voltage state to a voltage-applied state, so that a state in which no circulating current flows through the superconducting loop U is maintained.

''According to the configuration of the conventional superconducting memory circuit shown in FIG. When rOJ is stored, it means that the current IB is supplied to the current path I'O, and the information '1' is stored in the superconducting loop U. A current IY is applied in the second direction to the current path H1 from the state where
By supplying the current IX to the current path H2, the information fOJ can be stored in the superconducting loop U, and the state of the storage can be preserved.

Furthermore, information rl is added to the superconducting loop U as described above.
From the state where J is stored, a current I is applied to the current path 1-13.
Y' in the first direction (from top to bottom in the figure)
is supplied to make the current IY' flow in the first direction through the superconducting Josephson switch S3 of the superconducting Josephson gate G2, and the current [X' is supplied to the current path ]-14 in the first direction.
A current IX' is supplied to the control line C2 of the C1 superconducting Josephson gate G2 in the direction of (from left to right in the figure)
flows in the first direction, a circulating current flows in the superconducting loop U1, and the circulating current flows in the control 21I line C1 of the superconducting Josephson gate G2 in the first direction (from right to left in the figure). Since the current flows in the opposite direction), the superconducting Josephson switch S of the superconducting Josephson gate G2
3 changes from the @voltage state to the voltage state.

Therefore, the current IY' does not flow through the current path H3.

Therefore, when we interpret the fact that the current IY' has stopped flowing in the current path H3 as meaning that the information "1" stored in the superconducting loop U has been read out, the current path 1-13 and H
By supplying currents IY' and X' to 4 in the first direction, the information "1" stored in the superconducting loop (J) can be read out.

In addition, the information rOJ is added to the superconducting loop U as described above.
From the state where is stored, a current IY' is applied to the current path H3.
As described above, by supplying the superconducting Joseph Song in the first direction (downward from the soil in the figure)
A current IY' is applied to the superconducting Josephson switch S3 of G2.
is caused to flow in the first direction, and a current IX is caused to flow in the current path H4.
' from left to right in the first orientation diagram) to the control line C2 of the superconducting Josephson gate G2,
If the current IX' flows in the first direction, the superconducting loop U1
Since no circulating current is flowing through the superconducting Josephson switch S3 of the superconducting Josephson gate G2, the superconducting Josephson switch S3 does not switch from the zero voltage state to the voltage applied state. For this reason, the current path H
Current IY' does not flow through 3.

Therefore, the information rOJ stored in the superconducting loop U indicates that the current IY' does not stop flowing in the current path H3.
is read out, current paths H3 and 1
By supplying currents TY' and IX' to -14 in the first direction, the information "O" stored in the superconducting loop U can be read out.

As mentioned above, according to the conventional superconducting memory circuit shown in FIG.
” information can be stored and read out.

However, in the case of the conventional superconducting memory circuit shown in FIG. Even if a selected superconducting memory circuit is selected and information is stored in the selected superconducting memory circuit as described above, the selected superconducting memory circuit does not transmit information UlJ to the superconducting loop U on the current path HO. When viewed from the stored superconducting memory circuit, if the side is opposite to the side where the current IB is supplied to the current path 1-10, the superconductivity of the superconducting loop U of the selected superconducting memory circuit josephson switch s1
In addition, since the current IB that is being supplied to the current path HO is not supplied, information cannot be stored in the selected superconducting memory circuit.

Therefore, in the case of conventional superconducting memory circuits not shown in FIG. However, it has been difficult to construct a superconducting memory device that can read this information.

Well, in the case of the conventional superconducting memory circuit shown in FIG. 1, the information "1" and "O" stored in the superconducting loop U are
Since it corresponds to the presence or absence of a circulating current in the superconducting loop, the degree of discrimination between information "1" and rOJ is low when reading information stored in the superconducting loop U, and therefore the operating margin is low. According to the disclosure of the present invention, the present invention proposes a novel superconducting memory circuit that overcomes the above-mentioned drawbacks.

According to the superconducting memory circuit according to the first invention of the present application, as in the case of the conventional superconducting memory circuit described above in FIG.
It has a superconducting loop composed of a superconducting Jollefson switch (this is called the first superconducting Josephson switch "tJ") and an inductor, and a current path (this is called the first superconducting Josephson switch). A superconducting Josephson switch (this is called a second superconducting Josephson switch) is connected in parallel with the first superconducting Josephson switch through a resistor. ) and a control line for the second superconducting Josephson switch inserted in the current path (referred to as the second current path) (this is called the first superconducting Josephson gate). The structure has a conductive Jollefson gate.

However, in the case of the superconducting memory circuit according to the first aspect of the present invention, the superconducting loop has a current path between the connection point at one end of the first superconducting Josephson switch and the inductor and the connection point at the other end. However, a shunt resistor connected in parallel with the first superconducting Josephson switch and a third current inserted at ′δ are omitted. a first control line for a superconducting Josephson switch and a third superconducting Josephson switch interposed in the superconducting loop connected in series with its inductor; and a fourth current path interposed therein. The second superconducting Jollefson switch
and a second superconducting Josephson gate having a control line for the second superconducting Josephson switch interposed in the fourth current path. .

Therefore, according to the superconducting memory circuit according to the first publication 111J of the present application, a plurality of the superconducting memory circuits are arranged in a matrix, a superconducting memory circuit on the intersection of the matrix is selected, and information is stored in it. , it is possible to easily construct a superconducting memory device that can read this information.

Furthermore, in the superconducting memory circuit according to the first invention of the present application, the information "1" and "0" stored in the superconducting loop correspond to the direction of the circulating current of the superconducting loop.
J3 when reading information stored in superconducting loop U
The degree of discrimination of information rlJ and l''OJ can be made higher than in the case of the conventional superconducting memory circuit shown in FIG. 1, and therefore the operating margin can be made sufficiently high.

Further, according to the superconducting memory circuit according to the second invention of the present application, as in the case of the superconducting memory circuit according to the first invention of the present application described above in FIG. A second superconducting loop including a switch and an inductor is inserted into the first current path and connected in parallel with the first superconducting Jimisefson switch through a resistor. a superconducting Josephson switch and a control line for the second superconducting Josephson switch interposed in the second current path 'y31.
The structure has a superconducting Josephson gate.
Ru.

Furthermore, in the case of the superconducting memory circuit according to the second invention of the present application, as in the case of the superconducting memory circuit according to the invention of No. 1 of the present application, the superconducting memory circuit is connected in parallel with the first superconducting Josephson switch. It has a structure having a bypass resistance.

However, in the case of the superconducting memory circuit according to the second invention of the present application, the third superconducting Jollefson switch inserted in the third current path and the superconducting loop are connected in series with the inductor. a first control line for a third superconducting Josephson switch interposed therein;
and a second control line connected to a third superconducting Josephson switch inserted in the current path of the control line, and a second superconducting Josephson gate connected to the third superconducting Josephson switch.

Therefore, in the superconducting memory circuit according to the second invention of the present application, a plurality of the superconducting memory circuits according to the first invention of the present application are arranged in a 71-trix shape, and the intersection points of the matrix are It is C
It is possible to easily construct a superconducting memory device with a large capacity.

Also, in the superconducting memory circuit according to the second invention of the present application, the information "1" and "
Since "0" corresponds to the direction of the circulating current of the superconducting loop, the discrimination degree of "1" of the information and rOJ when reading the information stored in the superconducting loop U is expressed in the first part of the present invention.
As in the case of the superconducting memory circuit according to the second invention, the operating margin can be made sufficiently high.

Embodiment of the first invention of the present application First, an embodiment of the superconducting memory circuit according to the first invention of the present application will be described with reference to FIG.

In FIG. 2, parts corresponding to those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

The superconducting memory circuit according to the first invention of the present application shown in FIG. 2 is different from the conventional superconducting memory circuit shown in FIG.
1 and the connection point of one end of the inductor L, and the connection point of the other end, the structure inserted in the current path HO is omitted,
However, it has a resistor RB connected in parallel with the superconducting Josephson switch S1, and also has a superconducting Josephson switch S2 of the superconducting Josephson switch S1.
The structure is similar to that of the conventional superconducting memory circuit shown in FIG. 1, except that the superconducting Josephson switch s1 is connected in parallel with the superconducting Josephson switch s1 only through the resistor R1.

The above is the configuration of the embodiment of the superconducting memory circuit according to the first invention of the present application.

According to the superconducting memory circuit according to the first invention of the present application having such a configuration, the following operation is performed to store information indicating "1" and rOJ in the binary display in the superconducting loop U. , and can also be read and passed.

That is, from a state in which the superconducting Josephson switch S1 and the superconducting Josephson switch S2 of the superconducting Josephson gate G1 are in a zero voltage state, the current IY is applied to the current path 1 in the first direction (in the figure). (from top to bottom)
When the current IX is supplied to the current path 1-12, the currents IY and TX flow through the superconducting Josephson switch 82 of the superconducting Josephson gate G1 and the control line C, respectively, so that the superconducting Josephson The son switch S2 changes from a zero voltage state to a voltage state.

Therefore, most of the current rY that has been flowing through the superconducting Josephson switch S2 is supplied to the superconducting loop U as the current IXY via the resistor R1, and the current I
Most of XY (which will be referred to as IXY for simplicity) flows in the first direction (from top to bottom as J5 in the figure) to the superconducting Josephson switch S1 of the superconducting loop U.

In this way, the value of the current IXY flowing in the first direction through the superconducting Josephson switch S1 of the superconducting loop U is
The critical current value I of the superconducting loop U in equation (1), shown above in Figure 1. If the value exceeds , the superconducting Josephson switch S1 changes from the zero voltage state to the voltage state.

Therefore, the current IXY, which was currently flowing in the first direction in the e-superconducting Josephson switch S1, flows in the first direction through the inductor and bypass resistor RB, and on the other hand, Accordingly, the superconducting Josephson switch S1 returns from the right voltage state to the zero voltage state.

Therefore, if the value of the bypass resistor RB is appropriately selected in advance with respect to the inductance of the inductor L of the superconducting loop U, the current corresponding to the current when the current IXY is shunted and flows through the inductor L can be obtained. (this is referred to as IC) occurs in the superconducting loop U as a circulating current in the clockwise direction.

Also, a current (IXC-IC) that is the difference between the current IXY and the current IC flows through the superconducting Josephson switch S1, but its value must be less than or equal to the maximum Josephson of the superconducting Josephson switch S1 +ll'J I = In J:, the superconducting Josephson switch S1 does not change from the zero voltage state to the right voltage state and maintains the zero voltage state.

In this way, after a circulating current in the clockwise direction is generated in the superconducting loop U, the supply of the first direction current IY to the current path l-11 is cut off, and the superconducting Josephson Since the above-mentioned difference current (IXI-IC) L does not flow through the switch S1, the superconducting Josephson switch S1 maintains a zero voltage state, and therefore, the superconducting loop U is rotated in one direction. Current is conserved.

Above) From the beginning, according to the configuration of the superconducting memory circuit according to the invention of No. 1 of the present application shown in Fig. 2, the above-mentioned circulating current in the clockwise direction is stored in the superconducting loop U. When we interpret this to mean that information "1" is stored in the superconducting loop U, we supply current IY in the first direction to current path H1, and supply current IX to current path )-12. By doing this, information “1” is added to the superconducting loop U.
can be stored, and the state of the memory can also be saved.

In addition, since the superconducting Josephson switch $2 of the superconducting Josephson gate G1 is in the zero voltage state and the information "1" is stored in the superconducting loop U as described above, the current The current IY is applied to path 1-11 in a second direction opposite to the first direction (direction from bottom to top in the figure).
and also supply current IX to current path H2,
As the currents IY and IX flow through the superconducting Josephson switch S2 and the control line C of the superconducting Josephson gate G1, respectively, the superconducting Josephson switch S2 changes from a zero voltage state to a right voltage state.

Therefore, most of the current IY that has been flowing through the superconducting Josephson switch S2 is supplied to the superconducting loop U as the current IXY via the resistor R1, and a portion of the current IY that flows to the inductor L side circulates around the superconducting loop U. Current as current (IX
It flows in the opposite direction (counterclockwise) to the direction of Y-IC> (hour 51 direction). Therefore, the current that has been flowing through the superconducting Josephson switch S1 of the superconducting loop U becomes a sufficiently small value or almost disappears, and the current circulating clockwise in the superconducting loop U disappears. do. Moreover, if the circulating current in the clockwise direction disappears in the superconducting loop U in this way, the current IXY flows into the superconducting Josephson switch S1 of the superconducting loop U in the opposite direction to the first direction described above. Flowing in the second direction, superconducting Josephson switch S1 switches from a zero voltage state to a right voltage state.

Therefore, the current IXY that has been flowing in the second direction through the superconducting Josephson switch S1 is now transferred to the inductor L.
and the bypass resistor RB, the current flows in a second direction opposite to the first direction described above, and along with this, the superconducting Josephson switch S1 changes from the voltage state to zero voltage. return to the state.

Therefore, the above-mentioned current IC generates a circulating current in the direction of the superconducting loop U1.

Further, although the above-described differential current (IXY-IC) flows through the superconducting Josephson switch S1, the superconducting Josephson switch S1 maintains a zero voltage state for the same reason as in the above case.

In this way, after a circulating current in the counterclockwise direction is generated in the superconducting loop U, even if the supply of the second direction current IY to the current path H1 is cut off, the superconducting Jollefson switch S1 Since the above-mentioned difference current (IX"1-IC)L does not flow, the superconducting Jollefson switch S1 does not change from the zero voltage state to the voltage state, and therefore the superconducting loop U
, the circulating current in the counterclockwise direction is conserved.

From the above, it can be seen that according to the M4 configuration of the superconducting memory circuit according to the first invention of the present application shown in FIG. 2, the above-mentioned circulating current in the counterclockwise direction is not stored in the superconducting loop U. , when it is assumed that information "0" is stored in the superconducting loop U, the current path 111 changes from the state where the information "1" is stored in the superconducting loop U to the second direction. A current [Y is supplied, and a current I is supplied to the current path H2.
By supplying X, 10'' of information can be stored in the superconducting loop U, and the stored state can be avoided.

Furthermore, the information 11 is added to the superconducting loop U as described above.
” is stored, the current TY is applied to the current path) 3.
' is supplied in the first direction (from top to bottom in the figure), and the current IY' is caused to flow in the first direction through the superconducting Josephson switch S3 of the superconducting Josephson gate G2, and , a current IX' is supplied to the current path H4 in the first direction (from left to right in J3 in the figure), and a current IX' is supplied to the control line C2 of the superconducting Josephson gate G2 in the first direction. , a circulating current in the direction B1 flows in the superconducting loop U1, and the circulating current flows in the control line C1 of the superconducting Josephson gate G2 in the first direction (from right to left in the figure). Since the current flows in the opposite direction), the superconducting Josephson switch $3 of the superconducting Josephson gate G2 changes from the zero voltage state to the voltage state. Therefore, current IY' does not flow through current path H3.

Therefore, the information "1" stored in the superconducting loop U indicates that the current IY' has stopped flowing in the current path 1-13.
When the information stored in the superconducting loop U is read out, the information stored in the superconducting loop U is supplied by supplying currents IY' and IX' to the current paths H3 and 1-14, respectively, in the first direction. "1" can be read.

In addition, the information rOJ is added to the superconducting loop U as described above.
From the state in which is stored, a current IY' is supplied to the current path H3 in the first direction (from top to bottom in the figure) to the superconducting Josephson switch S3 of the superconducting Josephson gate G2. , current IY' flows in the first direction, and current IX' is supplied to the current path H4 in the first direction (from left to right in the figure) to control the superconducting Josephson gate G2. When the current TX' is passed in the first direction through the line C2, a counterclockwise circulating current flows through the superconducting loop U1, and this circulating current flows through the control line C1 of the superconducting Josephson gate G2. Since the current flows in the second direction (from left to right in the figure), the superconducting Josephson switch S3 of the superconducting Josephson gate G2 does not switch from the zero voltage state to the voltage state. Therefore, the current IY' does not flow through the current path H3.

Therefore, the r of v4 information stored in the superconducting loop U indicates that the current IY' does not stop flowing in the current path
When meaning that OJ is being read, current path T13
By supplying currents IY' and IX' to the superconducting loops U and 1 in the first direction, the information "0" stored in the superconducting loop U can be read out.

As described above, according to the superconducting memory circuit according to the first invention of the present application shown in FIG. 2, as in the case of the conventional superconducting memory circuit shown in FIG. Information that displays "1" and rOJ can be stored and read out.

However, in the case of the superconducting memory circuit according to the first invention of the present application shown in FIG. 2, a plurality of superconducting memory circuits are protected by using the current path 1-11 in common, and Even if information is stored in the selected superconducting memory circuit as described above, the plurality of superconducting memory circuits are not shown in FIG. Since the current path 110 is not provided in common as in the case of a circuit, information can be stored in the superconducting loop U of the selected superconducting memory circuit.

Therefore, in the case of the superconducting memory circuit according to the first invention of the present application shown in FIG. 2, a plurality of the superconducting memory circuits are arranged in a matrix, and the superconducting memory circuit on the intersection of the matrix is selected and information is stored in it. , and a superconducting memory device that can read this can be easily constructed.
It has the following characteristics.

Furthermore, in the case of the superconducting memory circuit according to the first invention of the present application shown in FIG.
” and “0” correspond to the direction of the circulating current of the superconducting loop U, so the degree of discrimination of the information “1” and “0” when reading the information stored in the superconducting loop U is , as shown in FIG. 1, has the feature that it can be made higher than that of the conventional superconducting memory circuit, and therefore the operating margin can be made sufficiently high.

Furthermore, according to the superconducting memory circuit according to the first invention of the present application shown in FIG. 2, compared to the conventional superconducting memory circuit shown in FIG. It also has the feature that the memory circuit can be constructed compactly and densely.

Embodiment of the 52nd invention of the present application Next, an embodiment of the superconducting memory circuit according to the 2nd invention of the present application will be described with reference to FIG.

In FIG. 3, parts corresponding to those in FIG. 2 are designated by the same reference numerals, and detailed description thereof will be omitted.

The superconducting memory circuit according to the invention of No. 2, No. 1 of the present application shown in FIG. 3 is different from the superconducting memory circuit according to the invention of No. , however, the control line C of the superconducting Joseph Song T-G2
It has the same configuration as the superconducting memory circuit according to the first invention of the present application shown in FIG. 2, except that 2 is inserted in the current path +12.

The above is the configuration of the embodiment of the superconducting memory circuit according to the second invention of the present application.

According to the superconducting memory circuit according to the second invention of the present application having such a configuration, it has the same configuration as the superconducting memory circuit according to the first invention of the present application shown in FIG. 2, except for the matters mentioned above. Although a detailed explanation will be omitted, the superconducting memory according to the first invention of the present application shown in FIG. It's the same as a circuit. Therefore, any further detailed explanation regarding the operation of storing information that takes "1" and "0" in binary representation in the superconducting loop U will be omitted.

Next, the operation of reading out the information stored in the superconducting loop U will be described as follows.

That is, from a state where information "1" is stored in the superconducting loop U, a current IY' is supplied to the current path 13 in the first direction (direction downward from a3 in the figure). Then, the current IY' is caused to flow in the first direction through the superconducting Josephson switch S3 of the superconducting Josephson gate G2, and the current IX' is caused to flow through the current path H2 from the left in the first direction. If the current IX' is supplied to the superconducting Josephson gate G2+7) in the first direction in the control line C2, the superconducting Josephson switch S1 of the superconducting Josephson gate G2+7) , the control lines C1 and C2 have the same current flow relationship as in the case of the superconducting memory circuit according to the first invention of the present application, which is not shown in FIG. Current IY' stops flowing.

Therefore, when we interpret the fact that the current IY' has stopped flowing in the current path 1]3 to mean that the information [1] stored in the superconducting loop U is being read, the current paths H3 and H2
The information "1" stored in the superconducting loop U can be read by supplying currents IY' and IX' in the first direction to the superconducting loop U.

In addition, in the superconducting loop U, information “0” is added as described above.
From the state where is stored, a current IY' is applied to the current path H3.
As described above, a current IY is supplied to the superconducting Josephson switch S3 of the superconducting Josephson gate G2 by supplying it in the first direction (downward from -C-A in the figure).
' is caused to flow in the first direction, and the current I
X' is supplied in the first direction (from left to right in the figure) to control the control lines C2
If the current IX' is caused to flow in the first direction, in this case also,
Since the same current flows through the superconducting Josephson switch S1 of the superconducting Josephson gate G2 and the control lines C1 and C2 as in the case of the superconducting memory circuit according to the first invention of the present application shown in FIG. 2, a detailed explanation will be given below. Although omitted, current path 1-1
Current IY' does not flow through 3.

Therefore, when we interpret the fact that the current IY' does not stop flowing in the current path H3 as meaning that the information rOJ stored in the superconducting loop U is being read, we assume that the current IY' does not stop flowing in the current path H3 and the current path H3.
By supplying the currents IY' and IX' to the superconducting loop U in the first direction, it is possible to avoid reading out the information rOJ stored in the superconducting loop U.

As mentioned above, in the case of the superconducting memory circuit according to the second invention of the present application shown in FIG. Information that takes "1" and "0" in binary representation can be stored in the loop U, and can also be stored without being read out.

Further, although detailed explanation is omitted, similarly to the case of the superconducting memory circuit according to the first invention of the present application shown in FIG. It is possible to easily construct a superconducting storage device that can store information in the memory and also have a port for reading this information.
It has the characteristics that the operating margin of the superconducting memory circuit can be made sufficiently high, and that the superconducting memory circuit can be constructed compactly and precisely. .

[Brief explanation of drawings]

FIG. 1 is a connection diagram showing a conventional superconducting memory circuit. FIG. 2 is a connection diagram showing an embodiment of the superconducting memory circuit according to the first invention of the present application. FIG. 3 is a connection diagram showing an embodiment of a superconducting memory circuit according to the second invention of the present application. SL, 82.83 ・・・・・・・・・・・・・・・Superconducting Josephson switch L・・・・・・・・・・・・・・・Inductor U
・・・・・・・・・・・・Old...Superconducting loop...
...... Control lines R1, R2...
・Resistance 110.1-11. G12. H3, H4...
・・・・・・・・・Current path applicant Nippon Telegraph and Telephone Public Corporation 6 ^

Claims (1)

[Claims] 1. A superconducting loop configured to include a first superconducting Josephson switch and an inductor; a second superconducting Josephson switch connected in parallel with the conducting Josephson switch; and a control line for the second superconducting Josephson switch interposed in a second current path. A superconducting memory circuit having a superconducting Josephson switch 1-, a bypass resistor connected in parallel with the first superconducting Josephson switch, and a second current path inserted in the third current path. a first control line for the third superconducting Josephson switch inserted in the superconducting loop connected in series with an inductor, and a fourth current path for the third superconducting Josephson switch; a second superconducting Josephson gate having a second control line for the second superconducting Josephson switch inserted therein. 2. A superconducting loop composed of a first superconducting Josephson switch and an inductor, which is inserted in the first current path and is parallel to the first superconducting Josephson switch through a resistor. a first superconducting Josephson switch having a second superconducting Josephson switch connected to the second superconducting Josephson switch; and a control line for the second superconducting Josephson switch interposed in a second current path. -1. In the superconducting memory circuit on the right, a bypass resistor connected in parallel with the first superconducting Josephson switch, and a third superconducting resistor inserted in the third current path a conductive Josephson switch; a first control line for the third superconducting Josephson switch interposed in the superconducting loop connected in series with an inductor; and a first control line interposed in the second current path. and a second superconducting Josephson gate having a second control line for the third superconducting Josephson switch.