JPS56120000A - Memory testing system - Google Patents

Memory testing system

Info

Publication number
JPS56120000A
JPS56120000A JP2459880A JP2459880A JPS56120000A JP S56120000 A JPS56120000 A JP S56120000A JP 2459880 A JP2459880 A JP 2459880A JP 2459880 A JP2459880 A JP 2459880A JP S56120000 A JPS56120000 A JP S56120000A
Authority
JP
Japan
Prior art keywords
readout data
data
effective
time
readout
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2459880A
Other languages
Japanese (ja)
Inventor
Takashi Ii
Tsutomu Hirasawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2459880A priority Critical patent/JPS56120000A/en
Publication of JPS56120000A publication Critical patent/JPS56120000A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • G11C29/50012Marginal testing, e.g. race, voltage or current testing of timing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To make possible testing of the effective time of memory readout data without prolonging the testing time by making decision of goodness or not based on the coincidence and noncoincidence of the plural readout data in the period when the readout data are effective. CONSTITUTION:Address data are inputted into a memory 1, and after the lapse of an access time tAA, readout data are generated and are stored in FFs 4... of every bit. These stored contents and the readout data signal in the effective period up to the lapse of an address holding time tHA are applied to corresponding exclusive- OR circuits 5..., by which the coincidence and noncoincidence of the readout data outputted successively in the readout data effective period are detected. An FF7 is set by the outputs of the circuits 5... through an OR circuit 6 when they do not coincide, whereby a defective decision signal is outputted. These FFs 4..., FF7 are strobed by the clocks CL1, CL2 which test the times tAA, tHA respectively and the readout data compare the data storage values of the leading edge of the effective timings and the data of the trailing edge and therefore, the effectiveness time of the readout data is tested as well.
JP2459880A 1980-02-28 1980-02-28 Memory testing system Pending JPS56120000A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2459880A JPS56120000A (en) 1980-02-28 1980-02-28 Memory testing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2459880A JPS56120000A (en) 1980-02-28 1980-02-28 Memory testing system

Publications (1)

Publication Number Publication Date
JPS56120000A true JPS56120000A (en) 1981-09-19

Family

ID=12142581

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2459880A Pending JPS56120000A (en) 1980-02-28 1980-02-28 Memory testing system

Country Status (1)

Country Link
JP (1) JPS56120000A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0305987A2 (en) * 1987-08-31 1989-03-08 Oki Electric Industry Company, Limited Self-correcting semiconductor memory device and microcomputer incorporating the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0305987A2 (en) * 1987-08-31 1989-03-08 Oki Electric Industry Company, Limited Self-correcting semiconductor memory device and microcomputer incorporating the same

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