JPS5487148A - Data processing system by multiplex processor - Google Patents

Data processing system by multiplex processor

Info

Publication number
JPS5487148A
JPS5487148A JP15528977A JP15528977A JPS5487148A JP S5487148 A JPS5487148 A JP S5487148A JP 15528977 A JP15528977 A JP 15528977A JP 15528977 A JP15528977 A JP 15528977A JP S5487148 A JPS5487148 A JP S5487148A
Authority
JP
Japan
Prior art keywords
processor
register
processors
bit
data processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15528977A
Other languages
Japanese (ja)
Other versions
JPS6041787B2 (en
Inventor
Norio Inoue
Kenichi Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP52155289A priority Critical patent/JPS6041787B2/en
Publication of JPS5487148A publication Critical patent/JPS5487148A/en
Publication of JPS6041787B2 publication Critical patent/JPS6041787B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE: To control arbitrary processor with flexibility, by connecting a plurality of processors to common bus and by controlling the operation of processor corresponded with the hold circuits having the same number.
CONSTITUTION: The common bus 11 is connected with a plurality of processors 2, processor exclusive memory 3 and common memory 12, and also, the processor control register (hold circuit) 13 is connected. When the output signal of the signal line 4 of the register 13 is at "1", the processor 2 inputting this is operated, and the access to the bus 11 is enabled. Eight-bit of bo to b7 among 16-bit of the write-in information to the register 13 indicate the processors 20 to 27, making the data of bit corresponding to the processor objective to the alteration in the register 13 into "1". On the other hand, the bits b8 to b15 has the content corresponding to the processors 20 to 27 to be written in the register 13, and "1" signifies the processor (operation) and "0" does the processor (stop).
COPYRIGHT: (C)1979,JPO&Japio
JP52155289A 1977-12-23 1977-12-23 Data processing device using multiple processors Expired JPS6041787B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52155289A JPS6041787B2 (en) 1977-12-23 1977-12-23 Data processing device using multiple processors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52155289A JPS6041787B2 (en) 1977-12-23 1977-12-23 Data processing device using multiple processors

Publications (2)

Publication Number Publication Date
JPS5487148A true JPS5487148A (en) 1979-07-11
JPS6041787B2 JPS6041787B2 (en) 1985-09-18

Family

ID=15602635

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52155289A Expired JPS6041787B2 (en) 1977-12-23 1977-12-23 Data processing device using multiple processors

Country Status (1)

Country Link
JP (1) JPS6041787B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS568982A (en) * 1979-07-05 1981-01-29 Tamura Electric Works Ltd Positioning system
JPS6292060A (en) * 1985-10-18 1987-04-27 Fujitsu Ltd Parallel processing system
JP2012137946A (en) * 2010-12-27 2012-07-19 Renesas Electronics Corp Semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0445017Y2 (en) * 1985-12-04 1992-10-22

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS568982A (en) * 1979-07-05 1981-01-29 Tamura Electric Works Ltd Positioning system
JPH0315397B2 (en) * 1979-07-05 1991-02-28 Tamura Electric Works Ltd
JPS6292060A (en) * 1985-10-18 1987-04-27 Fujitsu Ltd Parallel processing system
JPH0323942B2 (en) * 1985-10-18 1991-04-02 Fujitsu Ltd
JP2012137946A (en) * 2010-12-27 2012-07-19 Renesas Electronics Corp Semiconductor device

Also Published As

Publication number Publication date
JPS6041787B2 (en) 1985-09-18

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