JPS5350964A - Counter using shift register - Google Patents

Counter using shift register

Info

Publication number
JPS5350964A
JPS5350964A JP12546176A JP12546176A JPS5350964A JP S5350964 A JPS5350964 A JP S5350964A JP 12546176 A JP12546176 A JP 12546176A JP 12546176 A JP12546176 A JP 12546176A JP S5350964 A JPS5350964 A JP S5350964A
Authority
JP
Japan
Prior art keywords
shift register
counter
conduction
circuit
synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12546176A
Other languages
Japanese (ja)
Other versions
JPS617775B2 (en
Inventor
Minoru Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12546176A priority Critical patent/JPS5350964A/en
Publication of JPS5350964A publication Critical patent/JPS5350964A/en
Publication of JPS617775B2 publication Critical patent/JPS617775B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K23/00Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/40Gating or clocking signals applied to all stages, i.e. synchronous counters
    • H03K23/50Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits
    • H03K23/54Ring counters, i.e. feedback shift register counters

Landscapes

  • Shift Register Type Memory (AREA)

Abstract

PURPOSE:To obtain a high-speed counter circuit which is suited for IC formation by constituting the logical circuit to which a necessary bit output of a shift register is supplied with a serial circuit of MOS transistor which detects the conduction or non-conduction synchronizing with the clock signal.
JP12546176A 1976-10-21 1976-10-21 Counter using shift register Granted JPS5350964A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12546176A JPS5350964A (en) 1976-10-21 1976-10-21 Counter using shift register

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12546176A JPS5350964A (en) 1976-10-21 1976-10-21 Counter using shift register

Publications (2)

Publication Number Publication Date
JPS5350964A true JPS5350964A (en) 1978-05-09
JPS617775B2 JPS617775B2 (en) 1986-03-08

Family

ID=14910653

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12546176A Granted JPS5350964A (en) 1976-10-21 1976-10-21 Counter using shift register

Country Status (1)

Country Link
JP (1) JPS5350964A (en)

Also Published As

Publication number Publication date
JPS617775B2 (en) 1986-03-08

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