JPH10256202A - Polishing method, polishing device and manufacturing method for semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve polishing uniformity in the surface of a substance to be polished at the time of polish treatment which uses a CMP(chemical- mechanical polishing) polishing technology. SOLUTION: A surface to be polished of a semiconductor wafer 2 which is held by a film 8f of a wafer carrier 8 via a back pad is chemically and mechanically polished under the condition of press to a polishing pad 5 by a fluid-pressing mechanical part provided in the wafer carrier 8. During the time the polishing treatment is performed by setting a deforming condition of a bending part of the periphery of the film, as that a pressing distribution in the surface of the semiconductor wafer 2 is uniform overall.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing method, a polishing apparatus, and a technique for manufacturing a semiconductor integrated circuit device.
The present invention relates to a technique that is effective when applied to a chemical mechanical polishing (CMP) technique in a manufacturing process of a semiconductor integrated circuit device.

[0002]

2. Description of the Related Art A CMP technique used in a manufacturing process of a semiconductor integrated circuit device is a technique used when an excessive portion of a buried conductor film is selectively removed at the time of flattening an interlayer insulating film and forming a plug or the like. is there.

The flattening by CMP can realize flatness on the order of several nanometers over the entire semiconductor chip, and can be formed into a mirror-like state without any surface morphology (shape) and defects, thereby forming an excellent surface state.

A specific method of CMP is, for example, as follows. First, the back surface of a semiconductor wafer is attached to a wafer holding portion of a CMP polishing apparatus via a pad (back pad). A guide ring is provided on the outer periphery of the semiconductor wafer for the main purpose of preventing the semiconductor wafer from coming off during the polishing process.

[0005] Subsequently, after the abrasive is dropped on the polishing pad arranged opposite to the main surface of the semiconductor wafer, the semiconductor wafer is pressed against the polishing pad by moving the wafer holding portion toward the polishing pad.

Then, the semiconductor wafer and the polishing pad are moved relative to each other in the horizontal direction with respect to the main surface of the semiconductor wafer while a predetermined pressure is uniformly applied to the surface of the semiconductor wafer. Polish.

The polishing pad includes, for example, a soft polishing pad, a hard polishing pad, and a two-layer pad in which the two types of pads are bonded. Although the soft polishing pad follows the shape of the main surface of the semiconductor wafer because the polishing pad follows the shape of the main surface of the semiconductor wafer, the uniformity of the polishing amount within the main surface of the semiconductor wafer is good, but the flatness representing the degree of elimination of the level difference is not sufficient. In addition, the hard polishing pad is the opposite, the polishing pad does not follow the shape of the main surface of the semiconductor wafer, the polishing amount uniformity can not be said to be sufficient,
Good step flatness. Further, the two-layer pad has properties intermediate to both soft and hard polishing pads.

The polishing pad is damaged when polishing a semiconductor wafer or the like. In order to remove the damaged layer, a dressing process for polishing the polishing pad with diamond or the like is performed. The polishing pad is replaced when the polishing pad is worn down to a certain thickness and polishing uniformity is deteriorated.

As described above, when a hard polishing pad is used, the flattening of the steps is excellent, but the uniformity of the polishing amount is poor. This is because if the pressure applied to the semiconductor wafer is a mechanical rigid pressure, the entire surface of the semiconductor wafer is uniformly pressed.

That is, a polishing pad made of a viscoelastic body is pressed against a plate-like semiconductor wafer or the like by applying a uniform pressure to the polishing pad and the polishing pad and the semiconductor wafer are relatively moved in a direction horizontal to each other's main surfaces. However, the polishing pad is compressed by pressure, but the portion of the polishing pad that is located on the outer periphery of the semiconductor wafer and is not compressed attempts to dive into the back surface of the semiconductor wafer by relative motion, so that stress concentrates on the end face of the semiconductor wafer. Would.

For this reason, the vicinity of the end face of the semiconductor wafer is abnormally polished, and a region having a large amount of polishing occurs in a region of about 1 to 2 cm from the outer periphery of the semiconductor wafer. Further, the present inventors have found that rigid pressurization has many factors such as mechanical processing accuracy and variations in the thickness of semiconductor wafers.

Therefore, as a technique considering such a problem, according to the technique studied by the present inventors, a fluid such as air can flow between the wafer holding portion and the back pad of the CMP polishing apparatus. The space is formed by a film etc.
There is a method in which a fluid is caused to flow in the space, and the semiconductor wafer is pressurized through the above-described film by the fluid pressure at that time.

In this technique, the semiconductor wafer is pressurized by the pressure of a fluid or the like, so that there is no mechanical variation and the semiconductor wafer can be uniformly pressed.

The CMP polishing technique is described in, for example, Press Journal Co., Ltd., published on December 20, 1993, “Semiconductor World (Monthly Semiconductor World)”.
rld) January 1994 ", pp. 58-62.

[0015]

However, in the case of the CMP technique using the fluid pressurization method, stress concentration locally occurs on the outer periphery of the semiconductor wafer due to the mechanical characteristics of the film described above. The present inventor has found that there is a problem that a region having a large amount of polishing occurs.

An object of the present invention is to provide a technique capable of improving in-plane polishing uniformity of an object to be polished in a polishing process using a CMP polishing technique.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0018]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

According to the polishing method of the present invention, there is provided a fluid pressurizing mechanism provided on the polished holding portion, the polished surface of the polished object held on a low rigid thin plate of the polished object holding portion via a back pad. A polishing method for chemically and mechanically polishing the pressing object against a polishing pad by a part, wherein, during the polishing treatment, the pressure distribution in the surface of the object to be polished is uniformly uniform. The polishing process is performed by setting the deformed state of the bent portion on the outer periphery of the low rigidity thin plate.

According to the method of manufacturing a semiconductor integrated circuit device of the present invention, after forming an insulating film on a semiconductor wafer, the semiconductor wafer is held on a low rigid thin plate side of a wafer holding portion of a polishing apparatus via a back pad. A step of chemically and mechanically polishing the surface to be polished of the semiconductor wafer held by the wafer holding portion against a polishing pad by a fluid pressure mechanism provided in the wafer holding portion; A polishing process is performed by setting a deformed state of a bent portion on an outer periphery of the low-rigidity thin plate so that a pressure distribution in a plane of the semiconductor wafer is entirely uniform, and a top surface of the insulating film is flattened. And a step of performing

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings. (Note that components having the same functions in all drawings for describing the embodiments are denoted by the same reference numerals.) , And the repeated explanation is omitted).

(Embodiment 1) FIG. 1 is an explanatory view of a polishing apparatus according to an embodiment of the present invention, FIGS. 2 and 3 are enlarged explanatory views of main parts of the polishing apparatus of FIG. 1, and FIG. FIG. 5 is an explanatory view of various pressure distributions in the surface of a semiconductor wafer when a polishing process is performed by using the polishing apparatus of FIG. 1; FIGS. 5 to 7 are manufacturing processes of a semiconductor integrated circuit device using the polishing apparatus of FIG. FIG.

The polishing apparatus 1 according to the first embodiment shown in FIGS. 1 and 2 is a polishing apparatus used for polishing a main surface of, for example, a semiconductor wafer (an object to be polished) 2 by CMP (Chemical Mechanical Polishing). is there.

A platen 4 is rotatably supported in a housing 3 of the polishing apparatus 1 so as to be rotatable about a rotation shaft 4a installed perpendicularly to the main surface thereof. A polishing pad 5 is attached on the main surface of the surface plate 4. The polishing pad 5 is made of a hard material such as polyurethane.

A dresser section 6, an abrasive supply pipe 7, and a wafer carrier (a workpiece holding section, a wafer holding section) 8 are provided above the surface plate 4 in order from the left side in FIG.

The dresser 6 is a mechanism for removing a portion of the polishing pad 5 that has been consumed by the polishing process, and moves linearly in the horizontal and vertical directions with respect to the main surface of the platen 4. It is installed so as to be capable of rotating, and is installed so as to be rotatable around a central axis perpendicular to the main surface of the surface plate 4.

The polishing agent supply pipe 7 is a component for supplying the polishing agent 9 used in the polishing process onto the main surface of the polishing pad 5, and is installed substantially above the center of the platen 4.

The wafer carrier 8 is a mechanism for holding the semiconductor wafer 2 and pressing the main surface of the semiconductor wafer 2 against the polishing pad 5 using a fluid pressure during the polishing process. And is installed so as to be able to move linearly in the horizontal and vertical directions with respect to the table, and to be rotatable about a central axis perpendicular to the main surface of the surface plate 4. .

The carrier body 8a of the wafer carrier 8
Is provided with a fluid inflow chamber (fluid chamber) 8b. A fluid such as air or the like is supplied into the fluid inflow chamber 8b through a fluid supply pipe (fluid inflow portion) 8c.

The fluid inflow chamber 8b communicates with a fluid pressurizing chamber (fluid chamber) 8e via a fluid pressure equalizing plate 8d. The fluid pressure equalizing plate 8d is made of, for example, porous ceramic, and applies air supplied to the fluid inflow chamber 8b to the fluid pressurizing chamber 8e.
And a member for adjusting the pressure applied to the surface of the semiconductor wafer 2 to be uniform.

The fluid pressurizing chamber 8e is formed by a film 8f provided on the lower surface of the carrier body 8a, that is, on the surface facing the polishing pad 5.

The film 8f is made of a flexible material such as polyethylene so that it can be deformed by a fluid such as air supplied into the fluid pressurizing chamber 8e. The semiconductor wafer 2 is held with its main surface facing the polishing pad 5 side via the pad 8g. The back pad 8g is made of, for example, polyurethane or silicone rubber.

This film 8f and back pad 8g
A suction hole 8h (see FIG. 2) for allowing the semiconductor wafer 2 to be sucked to the back pad 8g when the semiconductor wafer 2 is transferred by the wafer carrier 8 is formed. The suction hole 8h is formed so as to communicate the fluid pressurizing chamber 8e with the outside world.

The outer periphery of the film 8f is in contact with the carrier body 8a.
And a guide ring 8 i provided around the lower surface of the semiconductor wafer 2 so as to surround the semiconductor wafer 2. The guide ring 8i is a member for preventing the semiconductor wafer 2 from coming off the wafer carrier 8 during the polishing process, and is made of a material harder than abrasive particles such as aluminum nitride or silicon carbide.

That is, the thickness of the guide ring 8i and the thickness from the lower surface of the film 8f to the main surface of the semiconductor wafer 2 can always be kept constant. Thereby, the main surface of the semiconductor wafer 2 can always be polished well.

Next, the wafer carrier 8 of the first embodiment
3 will be described with reference to FIG.

In the first embodiment, the deformation of the bent portion of the film 8f near the outer periphery of the semiconductor wafer 2 is adjusted so that the distribution of the pressure applied to the surface of the semiconductor wafer 2 during the polishing process becomes uniform as a whole. State is set. Accordingly, it is possible to reduce the occurrence of stress concentration on the outer periphery of the semiconductor wafer 2, so that it is possible to suppress the outer periphery of the semiconductor wafer 2 from being abnormally polished.

In the first embodiment, the boundary between the region where the film 8f contacts the back pad 8g and the region where the film 8f does not contact the back pad 8g corresponds to the boundary between the necessary region and the unnecessary region on the semiconductor wafer 2. Is set to The necessary area is an area necessary for manufacturing a product.

The reason why the peak of the above-mentioned stress concentration concentrates on the boundary between the region where the film 8f is in contact with the back pad 8g and the region where the film 8f is not in contact with the film and the vicinity thereof is found by the research of the present inventors. It is.

That is, the film 8f is
By arranging the boundary between the region in contact with g and the region not in contact with the unnecessary region on the outer periphery of the semiconductor wafer 2, the phenomenon that the outer periphery of the semiconductor wafer 2 is abnormally polished due to the peak of the stress concentration is prevented. Even if it occurs, the abnormally polished area can be generated in an area unnecessary for the manufacture of the product, so that the polishing process can be performed without lowering the reliability and yield of the product. Become.

In FIG. 3, A is the thickness of the film 8f, B is the thickness of the guide ring 8i, C is the thickness of the back pad 8g, D is the thickness of the semiconductor wafer 2, and E is the thickness of the guide ring 8i. Film 8f is back pad 8g from inner wall
, F represents the amount of bending of the film 8f, G represents the distance from the end of the semiconductor wafer 2 to the point where the film 8f contacts the back pad 8g, and θ represents the bending angle of the film 8f. .

In the first embodiment, for example, the following various conditions are set in order to make the film 8f as described above.

The film 8f is made of, for example, polyethylene, and has a Young's modulus of, for example, about 400 kg / mm ² .
The thickness A is, for example, about 0.25 mm. The gap E is, for example, 0 to 2 mm depending on the transfer accuracy of the semiconductor wafer 2.
In the first embodiment, the distance is about 1 mm.

The amount of deflection F of the film 8f is, for example, 0 to 1 mm when the semiconductor wafer 2 is transferred (during vacuum suction).
In the first embodiment, for example, 0.125
mm. In this case, the amount of deflection F of 0 mm is based on the amount of compression of the back pad 8g that holds the semiconductor wafer 2.

[0045] Incidentally, the deflection amount F of the film 8f, if there is bending stiffness, can be represented by ^{F = 0.881 3 (pl 4 /} YA) 1/2, if the bending rigidity is not, F = 12 pl ⁴ / (3
84YA ³ ). p is pressure, l is the radius of the film 8f, and Y is Young's modulus.

The distance G from the edge of the semiconductor wafer 2 to the point where the film 8f contacts the back pad 8g.
Was, for example, about 10 mm. This is because the polyurethane polishing pad 5 used in the first embodiment (Young's modulus; 1)
This is because the stress concentration on the outer periphery of the semiconductor wafer 2 at 0 kg / mm ² ) was experimentally up to about 10 mm. The deflection angle θ of the film 8f at that time is, for example, 0.
65 °.

As described above, when the gap E between the semiconductor wafer 2 and the guide ring 8i is, for example, 2 mm or less, the thickness D of the semiconductor wafer 2 and the thickness C of the back pad 8g are calculated from the thickness B of the guide ring 8i. Is, for example, 0.5 mm to 1
The pressure is adjusted to about mm.

The relationship between the Young's modulus Y of the film 8f and the thickness A of the film 8f is expressed as Y · A ^x = constant (X = 1 to
3). At this time, the deflection angle θ is set to 0 to 63 °, and tan
θ = (B−C + D) / (E + G) = constant.

The range of the bending angle was set to 0 ° as the minimum angle for applying fluid pressure to the semiconductor wafer 2. In addition, the maximum angle was set to 63 ° due to restrictions on the transfer (vacuum suction) of the semiconductor wafer 2.

FIG. 4 shows the result of the polishing process when the main surface of the semiconductor wafer 2 is polished by such a polishing apparatus 1.
4, the horizontal axis indicates the position coordinates of the semiconductor wafer 2, and the vertical axis indicates the amount of pressure.

J indicates the distribution of pressure generated by the reaction force of the polishing pad 5 when the semiconductor wafer 2 is uniformly pressurized and polished in the plane of the semiconductor wafer 2, and K indicates the film 8f using the present invention.
And L indicates the distribution of pressure applied to the semiconductor wafer 2 according to the present invention.

According to the first embodiment, the pressure applied to the semiconductor wafer 2 by the reaction force of the polishing pad 5 and the pressing force of the film 8f can be kept constant. Thereby, it is possible to uniformly polish the main surface of the semiconductor wafer 2.

The operation of the polishing apparatus 1 will be described with reference to FIGS.
This will be described below. First, after the platen 4 is rotated about the rotation shaft 4a, the abrasive supply pipe 7 is placed on the main surface of the platen 4.
Abrasive 9 is dropped through. At this time, the abrasive 9 is uniformly spread on the main surface of the platen 4 by the centrifugal force by rotating the platen 4.

Subsequently, the semiconductor wafer 2 is held by the wafer carrier 8 with its main surface facing the polishing pad 5, and then the wafer carrier 8 is lowered to the surface plate 4. At this time, the semiconductor wafer 2 is held by vacuum suction until the wafer carrier 8 descends.

The wafer carrier 8 descending on the surface plate 4 is
The same rotary motion as the surface plate 4 is performed. In addition, it is oscillating at the same time as the rotation. At this time, in the wafer carrier 8, the air supplied to the fluid inflow chamber 8b through the fluid supply pipe 8c is converted into the fluid pressurized chamber 8e through the fluid pressure equalizing plate 8d.
The semiconductor wafer 2 is pressed against the polishing pad 5 with a predetermined pressure by deforming the film 8f.
Thus, the main surface of the semiconductor wafer 2 is polished.

After the polishing process is completed, the wafer carrier 8 is raised, and the dresser unit 6 is lowered instead. Then, the polishing pad 5 is conditioned by the rotation and swinging motions of the platen 4.

Next, a method of manufacturing a semiconductor integrated circuit device using the polishing apparatus 1 of the first embodiment will be described with reference to FIGS.

FIG. 5 is a fragmentary cross-sectional view of the semiconductor wafer 2 during the manufacturing process of the semiconductor integrated circuit device according to the first embodiment. The semiconductor substrate 2s constituting the semiconductor wafer 2 includes:
For example, a field insulating film 10 made of, for example, silicon (Si) single crystal, and made of, for example, silicon dioxide (SiO ₂ ) is formed on the upper surface thereof. On the field insulating film 10, a wiring 11 made of, for example, aluminum (Al) or an Al alloy is formed.

First, as shown in FIG. 6, an interlayer insulating film 12 made of, for example, SiO ₂ is deposited on such a semiconductor substrate 2s by a CVD method or the like. At this stage, irregularities are formed on the upper surface of the interlayer insulating film 12.

Subsequently, after the semiconductor wafer 2 is held by the wafer carrier 8 of the polishing apparatus 1, the upper surface of the interlayer insulating film 12 on the main surface of the semiconductor wafer 2 is flattened by the polishing apparatus 1. Thereby, as shown in FIG. 7, the upper surface of the interlayer insulating film 12 on the semiconductor wafer 2 is flattened.

According to the first embodiment, as described above, the inside of the main surface of the semiconductor wafer 2 can be uniformly flattened.

According to the first embodiment, the following effects can be obtained.

(1) Changing the deformation state of the bent portion of the film 8f near the outer periphery of the semiconductor wafer 2 so that the distribution of the pressure applied to the surface of the semiconductor wafer 2 during the polishing process becomes uniform as a whole. As a result, the concentration of stress occurring on the outer periphery of the semiconductor wafer 2 can be reduced, so that the outer periphery of the semiconductor wafer 2 can be suppressed from being abnormally polished due to the concentration of stress. That is, it is possible to improve the uniformity of the in-plane polishing amount of the semiconductor wafer 2. Therefore, it is possible to improve the reliability and yield of the semiconductor integrated circuit device.

(2) By setting the boundary between the area where the film 8f contacts the back pad 8g and the area where the film 8f does not contact the boundary between the necessary area and the unnecessary area on the semiconductor wafer 2, Even if a phenomenon occurs in which the outer periphery of the semiconductor wafer 2 is abnormally polished due to the peak of the stress concentration, the abnormally polished region can be generated in a region unnecessary for manufacturing a product. Therefore, the polishing process can be performed without lowering the reliability and the yield of the semiconductor integrated circuit device.

(Embodiment 2) FIG. 8 is an enlarged sectional view of a main part of a polishing apparatus according to another embodiment of the present invention.

In the second embodiment, as shown in FIG. 8, the back pad 8g of the polishing apparatus 1 is made of a viscoelastic material such as silicone rubber or polyurethane.

As a result, the film 8f that is not in contact with the back pad 8g before the polishing process is bent during the polishing process and comes into contact with the back pad 8g, so that the film 8f comes into contact with the back pad 8g (the region of the distance G in FIG. 8). Even if the pressure is concentrated, the pressure can be dispersed, so that the pressure applied in the main surface of the semiconductor wafer 2 can be made uniform as a whole.

Therefore, in the second embodiment,
The same effects as in the first embodiment can be obtained.

(Embodiment 3) FIG. 9 is an enlarged sectional view of a main part of a polishing apparatus according to another embodiment of the present invention.

In the third embodiment, as shown in FIG. 9, the cross-sectional shape of the guide ring 8i of the polishing apparatus 1 is formed, for example, in an L-shape. The thickness of the lower step portion of the guide ring 8 i is equal to the thickness D of the semiconductor wafer 2.

The diameter of the back pad 8g is larger than the diameter of the semiconductor wafer 2, and the back pad 8g is formed and held so that the end of the back pad 8g covers the step of the guide ring 8i.

As a result, the load applied from the back pad 8g to the outer periphery of the semiconductor wafer 2 is reduced by the guide ring 8i.
And the load can be dispersed, so that stress concentration occurring on the outer periphery of the semiconductor wafer 2 can be reduced, and the outer periphery of the semiconductor wafer 2 can be prevented from being abnormally shaved. It is possible to do.

In the third embodiment, the boundary between the region where the film 8f contacts the back pad 8g and the region where the film 8f does not contact the back pad 8g is set so as to be located further outside the outer periphery of the semiconductor wafer 2. ing.

As a result, even if the outer periphery of the semiconductor wafer 2 is abnormally polished due to the peak of the stress concentration, the abnormally polished region is generated in a region unnecessary for manufacturing a product. It is possible to do so.

Therefore, in the third embodiment,
The same effect as in the first embodiment can be obtained.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the first to third embodiments, and the present invention is not limited thereto. It goes without saying that various changes can be made.

For example, in the above-described embodiment, the case where the CMP technique is used for flattening the interlayer insulating film has been described. However, the present invention is not limited to this, and various applications are possible. It can also be applied to the flattening treatment of the upper surface of the conductive film.

In the above description, the case where the invention made by the present inventor is mainly applied to the CMP technique used in the manufacturing process of the semiconductor integrated circuit device, which is the background of the application, has been described. However, the present invention can be applied to, for example, a CMP technique used in a manufacturing process of a liquid crystal substrate or the like. The present invention is at least applicable to those using the CMP technique.

[0079]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1) According to the polishing method of the present invention, the deformation of the bent portion on the outer periphery of the low-rigidity thin plate during the polishing process is performed so that the pressure distribution in the surface of the object to be polished becomes uniform as a whole. By setting the state and performing the polishing process, during the polishing process using the CMP polishing technique, it is possible to reduce the stress concentration generated on the outer periphery of the object to be polished. It can be improved.

(2) According to the method for manufacturing a semiconductor integrated circuit device of the present invention, the deformation of the bent portion on the outer periphery of the low-rigidity thin plate is performed so that the pressure distribution in the plane of the semiconductor wafer becomes uniform as a whole. By setting the state and performing a polishing process to flatten the upper surface of the insulating film formed on the semiconductor wafer, C
During the polishing process using the MP polishing technology, since the concentration of stress generated on the outer periphery of the semiconductor wafer can be reduced,
It becomes possible to improve the polishing uniformity of the insulating film in the plane of the semiconductor wafer. Therefore, the yield and reliability of the semiconductor integrated circuit device can be improved.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a polishing apparatus according to an embodiment of the present invention.

FIG. 2 is an enlarged explanatory view of a main part of the polishing apparatus of FIG. 1;

FIG. 3 is an enlarged explanatory view of a main part of the polishing apparatus of FIG. 1;

FIG. 4 is an explanatory diagram of various pressure distributions in a semiconductor wafer surface when a polishing process is performed using the polishing apparatus of FIG. 1;

5 is a fragmentary cross-sectional view of the semiconductor integrated circuit device in a manufacturing step using the polishing apparatus of FIG. 1;

6 is a fragmentary cross-sectional view of the semiconductor integrated circuit device in a manufacturing step following that of FIG. 5 when the polishing apparatus of FIG. 1 is used;

7 is a fragmentary cross-sectional view of the semiconductor integrated circuit device in a manufacturing step following that of FIG. 6 when the polishing apparatus of FIG. 1 is used;

FIG. 8 is a sectional view of a principal part of a polishing apparatus according to another embodiment of the present invention.

FIG. 9 is a cross-sectional view of a principal part of a polishing apparatus according to another embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Polishing apparatus 2 Semiconductor wafer (substrate to be polished) 2s Semiconductor substrate 3 Case 4 Surface plate 4a Rotating shaft 5 Polishing pad 6 Dresser part 7 Abrasive supply pipe 8 Wafer carrier (substrate to be polished, wafer holder) 8a Carrier Body 8b Fluid inflow chamber (fluid chamber) 8c Fluid supply pipe (fluid inflow section) 8d Fluid pressure equalizing plate 8e Fluid pressurization chamber (fluid chamber) 8f Film (low rigid thin plate) 8g Back pad 8h Suction hole 8i Guide ring 9 Abrasive 10 Field insulating film 11 Wiring 12 Interlayer insulating film (insulating film)

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Yuichiro Taguma 2326 Imai, Ome-shi, Tokyo Inside the Device Development Center, Hitachi, Ltd. (72) Inventor Shinichiro Mitani 2326 Imai, Ome-shi, Tokyo Device Development Center, Hitachi, Ltd. (72) Inventor Tsuyoshi Kimura 2326 Imai, Ome-shi, Tokyo Inside the Device Development Center, Hitachi, Ltd.

Claims (9)

[Claims] An object to be polished, which is held on a low rigid thin plate of the object to be polished via a back pad via a back pad, is connected to the polishing pad by a fluid pressure mechanism provided in the object to be polished. A polishing method of chemically and mechanically polishing in a pressed state, wherein an outer periphery of the low-rigidity thin plate is so formed that a pressure distribution in a surface of the object to be polished is uniform throughout the polishing process. A polishing method characterized in that a polishing process is performed by setting a deformed state of a bent portion of the substrate. 2. The polishing method according to claim 1, wherein a boundary between a region where the low-rigidity thin plate contacts a back pad and a region where the low-rigidity thin plate does not contact the back pad is disposed in an unnecessary region of the object to be polished. Polishing method. 3. The polishing method according to claim 1, wherein one of a thickness, a Young's modulus, an amount of bending, and a distance between a guide ring around the object to be polished and the object to be polished is changed. Wherein the pressure distribution of the object to be polished is changed uniformly. 4. The polishing method according to claim 1, wherein the tangent relationship between the distance between the object to be polished and a guide ring on the outer periphery thereof and the amount of deflection of the low-rigidity thin plate is constant. Polishing method. 5. A chemical and mechanical method in which a polishing surface of an object to be polished held by an object to be polished is pressed against a polishing pad by a fluid pressure mechanism provided in said object to be polished. A polishing apparatus, wherein the fluid pressurizing mechanism comprises: a fluid chamber provided in the workpiece holding part; a fluid inflow part for flowing fluid into the fluid chamber; and the workpiece holding part. And a low-rigid thin plate that is provided on the polishing pad side to form the fluid chamber, and that is deformed by the pressure of the fluid that has flowed into the fluid chamber. In the polishing process, the object to be polished is provided with a structure for pressing the polishing pad against the polishing pad by deformation of the low-rigidity thin plate caused by the pressure of the fluid flowing into the fluid chamber. A polishing apparatus, wherein a deformed state of a bent portion on an outer periphery of the low-rigidity thin plate is set so that a pressure distribution in a plane of the polished material is entirely uniform. 6. The polishing apparatus according to claim 5, wherein said back pad is made of a viscoelastic body. 7. The polishing apparatus according to claim 5, wherein a guide ring surrounding the object to be polished is provided on a surface facing the polishing pad in the object to be polished holding part, and the back is provided. A polishing apparatus, wherein an outer peripheral end of a pad is structured to hang on the guide ring. 8. After forming an insulating film on a semiconductor wafer,
A step of holding the semiconductor wafer on a low-rigidity thin plate side of a wafer holding unit in a polishing apparatus via a back pad; and a polished surface of the semiconductor wafer held by the wafer holding unit, provided in the wafer holding unit. When chemically and mechanically polishing in a state pressed against the polishing pad by the fluid pressurizing mechanism, the low-rigidity thin plate is so formed that the pressure distribution in the plane of the semiconductor wafer is entirely uniform. Setting a deformed state of a bent portion on the outer periphery and performing a polishing process to flatten an upper surface of the insulating film. 9. The polishing method according to claim 4, wherein a tangent relationship between a gap between the guide ring and the object to be polished and a deflection amount of the low-rigidity thin plate is from 0 ° to 63 ° or less. .