JPH09135155A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To optimize the arrangement of printed circuit boards with different heat generation mounted in the inside of the semiconductor device by arranging a main printed circuit board adjacent to a sub-printed circuit board. SOLUTION: In the circuit configuration consisting of two main printed circuit boards 601 with a higher average heating value and of a sub-printed circuit board 602 with a smaller average heating value, each main printed circuit board 601 is provided with a collector internal terminal 603 and an emitter internal terminal 604 and the sub-printed circuit board 602 is provided with an anode internal terminal 605 and a cathode internal terminal 606. The sub- printed circuit board 602 is a snubber circuit in a different operation from that of a switching circuit. In this case, the main printed circuit board 601 is arranged adjacent to the sub-printed circuit board 602. The arrangement is effective especially in a high power switching module handling a large current, where plural printed circuit boards with different heat generation are in existence in mixture.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a diode only,
Alternatively, the circuit board adjacent to the same plurality of sub-circuit boards in which the resistor and the diode are connected in parallel is only the same main circuit board in which the plurality of switching elements and the diode connected in antiparallel with the switching element are mounted. The present invention relates to a semiconductor device.

[0002]

2. Description of the Related Art In a power switching circuit for driving an inductive load such as an electric motor, two kinds of additional circuits for assisting a switching element are essential. One is a freewheel diode that is connected in antiparallel with the switching element and bypasses the reverse current flowing from the load. The other is a snubber circuit that is composed of a diode, a capacitor, and a resistor and that prevents the switching element from being destroyed due to the transient high power generated during switching.

Since the diode (snubber diode) used in the snubber circuit and the free wheel diode are indispensable to cooperate with the switching element, they are arranged as close to the switching element as possible so that inductive components existing between them are present. It is essential to minimize Therefore, switching elements, freewheeling diodes, and snubber diodes (in some cases,
Furthermore, a structure in which a snubber resistance) is mounted in one module is desirable.

By the way, since the current-time product of the same degree as that of the switching element is added to the free wheel diode, heat generation of the same degree as that of the switching element occurs.
On the other hand, the operation of the snubber diode is only at the moment of switching, and the current is large but the time is short, so the heat generation is smaller by about one digit than that of the switching element. Therefore, it is desirable to adopt a mounting mode in consideration of such a difference in heat generation amount.

Japanese Unexamined Patent Publication No. 59-68958 discloses a structure in which a free wheel diode is mounted on another board in a module. However, there is no disclosure about the snubber circuit. Japanese Unexamined Patent Publication (Kokai) No. 57-15453 discloses that a module is formed by mounting two identical circuit boards on which a freewheel diode, a diode and a resistor are mounted. However, there is no description of the snubber circuit or disclosure of proper arrangement of circuit boards having different heat generation amounts.

[0006]

As described above, according to the prior art, a switching element and an additional circuit for assisting the switching element, that is, a free wheel diode and a semiconductor device having at least a snubber diode of a snubber circuit are mounted. No disclosure is found regarding the optimal arrangement of the internal mounting board in consideration of the difference in the heat generation amount between the freewheel diode and the snubber diode.

When the substrates having different heat generation amounts are mixed, thermal distortion occurs and the reliability of the semiconductor device is deteriorated, which becomes a problem. Therefore, the optimization of the arrangement of the internal mounting substrates is a problem.

It is an object of the present invention to provide a semiconductor device in which circuit boards having different heat generation values mounted inside the semiconductor device are optimally arranged.

[0009]

An example of an inverter circuit for driving an AC motor is shown in FIG. FIG. 2 shows one phase of an inverter circuit that obtains a three-phase AC output from a DC input. This circuit converts a direct current supplied from the direct current power source 201 into an alternating current and guides it to an alternating current output 202. The circuit shown in FIG. 2 is a two-level inverter in which two switching elements are connected in series. This circuit can be roughly divided into two depending on its function. That is,
A switching circuit 203 and a snubber circuit 208. The switching circuit 203 includes an upper arm switching element 204 and an upper arm freewheel diode 206 connected in anti-parallel, a lower arm switching element 205 and a lower arm freewheel diode 20.
7 connected in anti-parallel are connected in series. The snubber circuit 208 includes an upper arm snubber diode 209, an upper arm snubber resistor 211, a lower arm snubber diode 210, and a lower arm snubber resistor 21.
It consists of 2 and 3 capacitors. The semiconductor device according to the present invention has a mode in which the elements other than the capacitors used in the snubber circuit among the elements forming the switching circuit and the snubber circuit are incorporated in the module. In particular, it is practical that the upper arm and the lower arm are separate modules, and these two modules are connected in series. However, the upper arm snubber resistor 211 and the lower arm snubber resistor 212 have the advantage of being integrated in a module.
09 and lower arm snubber diode 210 are less noticeable and may not be included in the module. Here, the thermal characteristics will be described. Switching circuit 20
3 is, while the switching element is conducting or blocking,
Since the current flows, the time during which the current flows is long and the total amount of heat generated is large. On the other hand, the snubber circuit 20
Reference numeral 8 denotes a circuit in which a current flows only at the moment of switching, and the amount of heat generated at the moment is comparable to that of the switching circuit, but the total amount of heat generated is smaller than that of the switching circuit 203 by about one digit. When mounting the inside of the semiconductor device on a plurality of circuit boards, it is rational to separate the switching circuit and the snubber circuit on different circuit boards in terms of circuit operation and heat generation.

A method of arranging circuit boards in the case where a circuit board having a large heat generation amount and a circuit board having a small heat generation amount coexist in one semiconductor device will be described. It is assumed that the circuit boards having a high heat generation amount and the circuit boards having a low heat generation amount have substantially the same size and heat generation amount. A case where the circuit boards are arranged in a line as shown in FIG. 3 will be described. FIG. 3 is a plan view in which three high heat generation amount circuit boards 301 and two low heat generation amount circuit boards 302 are arranged on the heat diffusion base substrate 303 forming the bottom surface of the semiconductor device. Here, the heat diffusion base substrate 303 is a relatively thick plate made of a material having a high thermal conductivity such as copper. Further, the high heat generation amount circuit board 301 and the low heat generation amount circuit board 302 are
A conductive circuit pattern is formed on an insulating substrate, and the material of the insulating substrate is preferably ceramics from the viewpoint of thermal conductivity. The conductive circuit pattern is preferably copper foil or the like adhered to the surface of ceramics. Further, FIG. 3 is a temperature graph 3 showing the temperature distribution on the center line of the heat diffusion base substrate 303 extending in the left-right direction.
04 is overlaid and displayed. The vertical direction of the temperature graph 304 indicates the surface temperature of the bottom surface (the side where the high heat generation circuit board 301 and the low heat generation circuit board 302 are not mounted) of the heat diffusion base board 303, and the left and right directions indicate the heat diffusion base board 303. Indicates the upper position.

The arrangement shown in FIG. 3A is a circuit board 3 having a high heat generation amount.
The low heat generation amount circuit board 302 is sandwiched by 01.
The high calorific value circuit board 301 has a calorific value larger by one digit than the low calorific value circuit board 302. The highest temperature is immediately below the high heat generation circuit board 301. Also, the low heat generation circuit board 3
Directly below 02, the heat generated in the low heat generation circuit board 302 reaches, so the temperature rises slightly.
It should be noted here that the bottom of the temperature rise of the high calorific value circuit board 301 reaches the lower part of the low calorific value circuit board 302. The heat is the high calorific value circuit board 30.
1 to the base substrate 303 for heat diffusion in the plate thickness direction (from the front side to the back side of the paper surface in FIG. 3), but also in the direction parallel to the plate thickness (in the vertical and horizontal directions parallel to the paper surface in FIG. 3). Flowing. This is the spread of heat. In particular, when a copper metal material having a high thermal conductivity is used as the heat diffusion base substrate 303 and the heat diffusion substrate 303 is thick, the spread of heat becomes large. Under such a condition, the heat generated in the high heat generation amount circuit board 301 causes the low heat generation amount circuit board 302 to generate heat.
Reach right under. That is, in the arrangement shown in FIG. 3A, the mounting area of the low heat generation circuit board 302 is used as an area for spreading the heat generated from the high heat generation circuit board 301. Therefore, the maximum temperature directly under the high heat generation amount circuit boards 301 is substantially equal in all of the three high heat generation amount circuit boards 301, and the maximum temperature is lower than the circuit board arrangements of FIGS. 3B and 3C. It can be suppressed. Keeping the maximum temperature low directly contributes to improving the reliability of the semiconductor device. In addition, the fact that the maximum temperature levels are substantially the same in the high heat generation circuit boards 301 means that the reliability levels of the high heat generation circuit boards 301 are the same, and the reliability of the circuit boards is balanced. , In the desired state.

FIG. 3B shows an arrangement in which the high heat generation circuit boards 301 are arranged in a concentrated manner at the center of the heat diffusion base board 303, and the low heat generation circuit boards 302 are arranged around the heat diffusion board 303. . In this arrangement, a part of the heat generated in the left or right high-heat-generation circuit board 301 spreads to the lower part of the low-heat-generation circuit board 302, but the left and right high-heat-generation circuit boards 301 are centered (in the center). The heat generated on the high heat generation amount circuit board 301 side is prevented from spreading by the high heat generation amount circuit board 301 in the center. Therefore, the temperature of the left and right high heat generation circuit boards 301 is higher than that in the arrangement of FIG. Further, in the high heat generation amount circuit board 301 in the center, the spread of heat is hindered by the left and right high heat generation amount circuit boards 301, so that the temperature rises further than the left and right high heat generation amount circuit boards 301.

FIG. 3C has the same arrangement as that of FIG. 3B in that the high heat generation amount circuit board 301 is integrated in one place. However, since the low calorific value circuit board 302 is gathered in one place, the heat of the high calorific value circuit board 301 does not reach the lower part of the low calorific value circuit board 302 on the outer side (the left side of FIG. Since the lower portion of the low heat generation amount circuit board 302 cannot be used as the heat diffusion area of the heat generation amount circuit board 301, the cooling efficiency is worse than in FIG. 3A or 3B.
As a result, the temperature of the high heat generation circuit board 301 is
It becomes higher than that of (b). Also, as in the case of FIG. 3B, the temperature rise of the central high heat generation circuit board 301 (second from the right) is larger than that of the left and right high heat generation circuit boards 301. Furthermore, the temperature of the high heat generation circuit board 301 on the right side, where the lower part of the low heat generation circuit board 302 cannot be used as a heat diffusion region, becomes higher than the temperature of the high heat generation circuit board 301 on the left side. In the arrangement of FIG. 3C, the absolute value of the temperature is as shown in FIG.
Alternatively, not only the temperature becomes higher than that in FIG. 3B, but also the temperature variation of the high heat generation circuit board 301 becomes larger than that in FIG. 3B.

As described above, the arrangement shown in FIG.
It is superior to FIG. 3 (b) or FIG. 3 (c). In addition to the above three types of arrangements, there are several types of arrangement of the high heat generation amount circuit board 301 and the low heat generation amount circuit board 302, but the temperature rises are larger than those in FIG. 3A. That is, from the viewpoint of heat dissipation, the arrangement shown in FIG. 3A is optimal. FIG. 4 shows an example of a desirable arrangement when the circuit boards are arranged in a plane (two-dimensional). The desired arrangement in the case of arranging in one line may be expanded in two dimensions. That is, the front-back direction,
It is desirable that the low heat generation circuit board 402 is sandwiched between the high heat generation circuit boards 401 in both the left and right directions. By arranging in this way, the lower portion of the low heat value circuit board 402 can be used as the heat spreading area of the high heat value circuit board 401.

The semiconductor device of the present invention comprises a plurality of main circuit boards each including a switching element and a freewheel diode connected in antiparallel with the switching element, and an electrical means for connecting them in parallel, It is at least one sub-circuit board in which a snubber diode alone or a snubber resistor and a snubber diode are connected in parallel. Since the main circuit board generates heat when energized, the heat generation time is long, and the total heat generation amount or the heat generation amount per unit time (that is, the average heat generation amount) is large. On the other hand, the sub circuit board on which the parts of the snubber circuit are mounted generates heat only when switching, so the heat generation time is short,
The total calorific value or the average calorific value is small. Therefore, a circuit board having a high average calorific value and a circuit board having a low average calorific value are mixed in the same module.

On the other hand, since the present invention is intended for a semiconductor device that handles a large amount of power, structural restrictions are added to satisfy electrical characteristics. That is, it is a constraint for handling a high voltage and a constraint for handling a large current. Insulation distance must be increased to handle high voltage. Also,
In order to handle a large current, it is necessary to balance the inductive component of the current path. At large currents, the inductive component of the current path becomes important. This is a problem caused by the fact that the electromotive force accompanying a change in current is proportional to the product of the amount of change in current per unit time and the inductive component. When a large current is handled, the amount of change in current per unit time increases,
As a result, the electromotive force increases even with the same amount of inductive component.
Further, in order to handle a large amount of power, a parallel circuit is inevitably formed in the semiconductor device. Therefore, the balance of the inductive component of each unit in parallel and the induction of the wiring part for connecting the units in parallel are required. The balance of ingredients becomes important. The reason for this is that if the electromotive force due to the inductive component differs in the parallel portion, the switching operation will differ for each parallel portion, and the current will concentrate in either side. From this, it is necessary not only to equalize the amount of current handled by each unit, but also for each unit to have substantially the same size and shape in terms of the configuration of a semiconductor device that handles large power. The case where two units are connected in parallel will be described as an example in relation to the balance of the inductive component. FIG. 5 shows a simplified configuration in which two units are connected in parallel. The unit 501 has one collector internal terminal 502 and one emitter internal terminal 503. Here, the wiring in the unit and the display of the semiconductor elements constituting the unit are omitted. The internal terminals are named to distinguish them from external terminals outside the semiconductor device. Collector internal terminal 50
2, a collector lead-out line 504 is connected, and an emitter internal terminal 503 is connected to an emitter lead-out line 505. Since the inductive component directly depends on the length and cross-sectional shape of the wiring, it is desirable that the collector lead-out lines 504 and the emitter lead-out lines 505 have the same shape and the same length in order to equalize the inductive component. Next, in the collector parallel line 506 and the emitter parallel line 507, the currents of both units merge. The connection portion of the collector merging line 508 and the emitter merging line 509 to the collector parallel line 506 and the emitter parallel line 507 is preferably at the center of the collector parallel line 506 and the emitter parallel line 507. This is to align the left and right induction components.

As described above, the balance of wiring is important in a circuit handling a large current. Since the main circuit board on which the switching element and the free wheel diode, which are the basic constituent features of the present invention, handle a large current, the above configuration is essential. Also, in the sub circuit board in which only the snubber diode or the snubber resistor and the snubber diode are connected in parallel, the average current is small, but the instantaneous current is large. It is equivalent to a circuit board. Therefore, there is no change in that the sub circuit board also needs to be considered for the wiring balance equivalent to that of the main circuit board.

In consideration of induction balance, referring to FIG.
Moreover, the arrangement of the thermally balanced circuit board will be described. FIG. 6 shows an optimal arrangement in the case where there are two main circuit boards 601 having a large average heat generation amount and one sub circuit board 602 having a small average heat generation amount. On the main circuit board 601,
There is one collector internal terminal 603 and one emitter internal terminal 604. The sub-circuit board 602 has one anode internal terminal 605 and one cathode internal terminal 606. As in FIG. 5, the wiring and semiconductor elements in each circuit board are not shown.

First, the thermal balance will be described. The arrangement of the circuit boards in FIG. 6 is such that the sub circuit board 602 having a small average heat generation amount is sandwiched by the main circuit board 601 having a large average heat generation amount. This is the same as in FIG. 3A, and the optimum arrangement is used in which the area on which the sub circuit board 602 having a small average calorific value is mounted is used as the heat diffusion area of the main circuit board 601 having a large average calorific value. The temperature rise of the main circuit board 601 is suppressed.

Next, the quality of the arrangement viewed from the electrical characteristics will be described. The sub circuit board 602 is a snubber circuit,
It is a circuit that operates differently from the switching circuit.
From an electrical point of view, this arrangement is preferable. It mainly forms a switching circuit and relates to a path from the main circuit boards 601 at both ends connected in parallel to a terminal outside the semiconductor device. Especially, the collector internal terminal 60 through which the main current flows
3 and the path from the emitter internal terminal 604 to the outside of the semiconductor device are required to have the inductive components of the left and right paths connected in parallel, and this arrangement meets the requirement. When the collector internal terminals 603 and the emitter internal terminals 604 are combined into one while keeping the inductive component equal, the collector parallel line 607 and the emitter parallel line 608 are on the center line of the sub-circuit board 602 as indicated by a circle. . As shown in the figure, if the collector parallel line 607 and the emitter parallel line 608 are made to be close to each other, the wiring of the anode internal terminal 605 and the cathode internal terminal 606 will not be a hindrance. Moreover, if the collector parallel line 607 and the emitter parallel line 608 are close to each other, there is a secondary effect that the induction component of the wiring is reduced by the action of mutual induction. The left and right main circuit boards are symmetrically arranged because the collector merging line and the emitter merging line (not shown, see FIG. 5) are arranged substantially at the center of the semiconductor device. When a semiconductor device is combined to form a system, it is convenient that the external terminals of the collector and the emitter are on the center line of the semiconductor device. If the left and right main circuit boards are not arranged symmetrically,
The collector internal terminals 603 and the emitter internal terminal 6
If 04 are not symmetrically arranged, the wiring distances must be equal. Therefore, as shown in FIG. 5, the collector merging line 508 and the emitter merging line 509 are displaced left and right, so that the external terminals are also displaced left and right. . To avoid this, it is necessary to use mutual induction to adjust the left and right induction components, which complicates the structure.

Although FIG. 6 shows the most ideal arrangement, the semiconductor device has a horizontally long shape. Depending on the application,
In some cases, the oblong shape is not preferable. In such an application, the layout of the main circuit board and the sub circuit board of the semiconductor device is the same as in FIG. 6, and the layout of the external terminals is 9 in the entire semiconductor device.
There is also a configuration in which it is rotated 0 degrees. Further, as long as the number of main circuit boards is two, as a suboptimal arrangement, as shown in FIG. 7, the sub circuit board 702 is placed on the vertical bisector of the line segment connecting the centers of the two main circuit boards 701. It may be configured to be placed in. In this case, as shown in FIG. 7B, if two sub-circuit boards 702 are provided and are arranged vertically, the thermal balance is further improved.

According to the present invention, a high heat generation circuit board having a switching element and a freewheel diode mounted thereon, that is, a low heat generation circuit board in which only a snubber diode or a snubber diode and a snubber resistor are connected in parallel to a main circuit board, That is, the arrangement in which the sub-circuit boards are sandwiched, or, in the case where the number of main circuit boards is two, is such that the centers of the sub-circuit boards are equidistant from the two main circuit boards. The thermal balance and the electrical balance can also be satisfied.

The basic structure of the present invention is to provide a plurality of main circuit boards each having a switching element and a freewheel diode, and an electrical means for connecting them in parallel.
Further, in a semiconductor device in which a plurality of sub circuit boards in which only a snubber diode or a snubber resistor and a snubber diode are connected in parallel are mounted, are arranged adjacent to the sub circuit board. An arrangement of internal boards, where the circuit board is arranged to be the main circuit board. This arrangement is effective when a plurality of circuit boards having different heat generation amounts coexist in a switching module handling a large amount of electric power, especially a large amount of electric current.

FIG. 8 shows a typical shape of the semiconductor device according to the present invention. Originally, it was covered with a case made of organic resin, and external terminals were attached to the outside of the case, but the part was not shown. That is, FIG. 8 shows the internal shape of the semiconductor device. The basic part is that three ceramic wiring boards, that is, the left main circuit board 801, the sub circuit board 8 from the left side of FIG.
No. 03, and the right main circuit board 802 are arranged in this order, and they are fixed by soldering. This arrangement is shown in FIG.
Same as (a). Furthermore, a collector wiring 818, an emitter wiring 819, and a gate wiring 820 for connecting collectors, emitters, and gates of the left main circuit board 801 and the right main circuit board 802 to lead to an external terminal are provided on the surface of each wiring board. Collector wiring pattern 80
4. Soldered to the emitter wiring pattern 805 and the gate wiring pattern 806. A soldering point with each wiring on each wiring pattern corresponds to each internal terminal described above. Not only the switching element 809, the freewheel diode 810, the snubber diode 811, but also the snubber resistor 812 is a silicon chip. One of these internal terminals, that is, the collector, the cathode, and the internal terminal of the resistor is led from the electrode formed on the back surface of the chip by soldering via the collector wiring pattern 804 and the cathode wiring pattern 807. There is. Also, the emitter wiring pattern 805, the gate wiring pattern 806, and the anode wiring pattern 808 are connected from each chip by an emitter wire 813, a gate wire 814, an anode wire 815, an anode wire 816, and a resistance connection wire 817.

First, the problem of heat will be described. The amount of heat generated by the main circuit boards 801 and 802 is 100 W per sheet.
It is about. The amount of heat generated by the sub-circuit board 803 is a little large because the snubber resistor 812 that generates most of the heat generated by the snubber circuit is inserted, but it is still about 10 W. The temperature distribution of FIG. 8 is as shown in FIG. That is, the heat generated in the main circuit boards 801 and 802 has reached even the portion where the sub circuit board 803 is mounted. A portion immediately below the sub circuit board 803 in FIG. 8 and the sub circuit board 803.
That is, the exposed portion of the base plate 823 is used as a region for diffusing the heat generated in the main circuit boards 801 and 802. Therefore, the main circuit board 8
The temperature rises of 01 and 802 are suppressed small. Further, as in FIG. 3A, the thermal condition viewed from the left main circuit board 801, that is, the spread of the base board 823 around the left main circuit board 801, the heat generation portion of the sub circuit board 803, and the right main circuit. The thermal condition viewed from the substrate 802 is the amount of heat generated by the snubber diode 811 and the snubber resistance 812.
The difference is only in the amount of heat generation of the above, and since the absolute value of these amounts of heat generation is small and the influence is small, the temperature rises of both main circuit boards are almost equal. That is, the level of reliability is uniform.

As described above, the arrangement shown in FIG. 8 provides a thermally balanced arrangement. Next, the electrical balance will be described. First, the circuit patterns of the left and right main circuit boards 801 and 802 are described. The circuit pattern of the left main circuit board 801 and the circuit pattern of the right main circuit board 802 are reversed left and right. As a result, the left main circuit board 801 and the right main circuit board 802 are
Above, it is line symmetrical including the circuit pattern. The collector wiring 818 and the emitter wiring 819 are laterally symmetrical with respect to the center of the semiconductor device, and currents merge on the center line of the semiconductor device. The collector wiring 818 and the emitter wiring 819 that must balance the inductive component most
Is a structure that maintains balance. Moreover, the center of the semiconductor device is on the sub circuit board 803, and there is a relatively empty space. The space is used to connect to the outside.

Since the left-right inversion of the pattern of the main circuit board leads to an increase in the number of parts, it should be avoided if possible. In the structure shown in FIG. 8, however, the main terminal outside the module, that is, the collector external terminal and the emitter external terminal (both are Since a structure in which (not shown) is arranged on the center line of the module is taken as an example, the structure is left-right symmetric. When the pattern of right-and-left inversion is not used, if the balance is strictly balanced, the collector wiring and the emitter wiring through which the main current flows are shifted to the left and right as shown in FIG. Regarding the gate, since the current is small, it is not necessary to match the left and right wiring lengths. Therefore, the merging point of the gate wiring 820 may not be on the center line of the module but may be biased to the right, for example, in consideration of the external circuit. Further, the sub-circuit board 803, that is, the external terminal of the snubber circuit may also be moved to the left in consideration of the external circuit.

Although FIG. 8 takes the form of wire bonding, it need not be limited to wire bonding. Any known chip mounting method such as soldering or pressure contact may be used.

[0029]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described more specifically with reference to Examples. The present invention is not limited to these examples.

(Embodiment 1) FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present invention. In the figure, a part is cut out so that the inside can be seen.

The semiconductor device of the present invention has a structure in which a resin case 102 and a resin lid 103 are placed on a copper base substrate 101 plated with nickel. FIG. 9 is a circuit diagram of one phase of a motor control three-phase AC inverter circuit using the semiconductor device according to the first embodiment. DC power supply 9
The collector external terminal 112 and the anode external terminal 116 of the (plus side) module 903 are connected to the plus side of 01, and the emitter external terminal 113 and the cathode of another (minus side) module 903 are connected to the minus side of the DC power source 901. The external terminal 117 is connected. Further, the emitter external terminal 113 of the plus side module 903 and the collector external terminal 112 of the minus side module 903 are connected. This point becomes the AC output 902 for one phase. As is clear from this circuit diagram, this inverter is a two-level inverter. A snubber capacitor 904 composed of three capacitors is connected to the AC output 902, the cathode external terminal 117 of the plus side module 903, and the anode external terminal 116 of the minus side module 903. Three sets of circuits shown in FIG. 9 are prepared, and the DC side is connected in parallel to obtain a three-phase AC output. As a mounting form, three phases are combined into one block. A total of 6 modules 903 with 2 pieces for each phase are attached to one aluminum fixing plate (not shown). This fixing plate also serves as a heat sink. Mounting holes 118 are drilled at four corners of the copper base 101 of the module for mounting on the fixing plate. On the center line of the resin lid 103, the collector external terminal 1
12 and the emitter external terminal 113 are attached. These are main terminals through which the main current, that is, the main current flows. An auxiliary emitter external terminal 114 and a gate external terminal 115 are provided on the right side of these main terminals,
The anode external terminal 116 and the cathode external terminal 117 of the snubber circuit are attached to the left side.

Inside the semiconductor device, as shown in FIG.
The switching circuit boards 104 are mounted so as to face each other, that is, symmetrically. Further, the snubber circuit board 105 is mounted at a position (center portion) sandwiched between the two switching circuit boards 104. The details of the switching circuit board 104 are shown in FIG.
The details of No. 5 are shown in FIG. Collector wiring pattern 100
1 is connected to the collector internal terminals 1009, and is connected to the collector wiring 106 and the emitter internal terminal 1010 leading to the collector external terminal 112.
The emitter wiring 107 leading to 13 is connected to the left and right switching circuit boards 104. These wires carry the main current of the module 903 according to the invention. Two internal collector terminals 1009 to 112 external collector terminals
It is required that the inductive component in the path leading to the left and right paths should be as different as possible between the left and right paths. The same applies to the path from the emitter internal terminal 1010 to the emitter external terminal 113. In that respect, in the present embodiment in which the two switching circuit boards 104 are arranged symmetrically and both external terminals are located on the center line of the module, the values are almost exactly the same. In addition, each internal terminal is
Connection point with each wiring on each wiring pattern (soldering point)
It is a descriptive name given to, and does not have any special structure. Besides, the auxiliary emitter wiring 108 and the gate internal terminal 101 for connecting the auxiliary emitter internal terminal of the switching circuit board 104 and leading to the auxiliary emitter external terminal 114.
A gate wiring 109 that connects the two and leads to the gate external terminal 117 is connected to the switching circuit board 104. Since almost no current flows through these wirings, it is not necessary to adjust the inductive component, and the wirings are connected to both external terminals apart from the center line of the module without adjusting the length of the wiring path. However, as will be described later, the gate circuit has a high impedance MOS (Metal Oxide Semiconductor).
In the case of an on-ductor), it is likely to be disturbed by the main current, and attention must be paid to noise in the paths of the auxiliary emitter wiring 108 and the gate wiring 109. Twisting the auxiliary emitter wiring 108 and the gate wiring 109 is effective in preventing disturbance.

In this embodiment, I is used as a switching element.
I use GCT (Insulated Gate Controlled Thyristor). This element is an IGBT (Insulated Gate Bipol
ar Transistor) is a switching element that has characteristics similar to those of ar Transistor. That is, it is a voltage-driven switching element driven by MOS. Further, in the IGBT, the portion through which the main current flows is composed of a transistor, whereas in the IGCT, since a thyristor is used, it has a characteristic that the DC voltage drop is smaller than that of the IGBT at the same breakdown voltage and the same current density. ing. In the high breakdown voltage element, due to its structure,
Since the DC voltage drop inevitably becomes large, the IGCT is an element that has its advantages when designed for high voltage applications.

The switching circuit board 104 has an IGCT 10
Four 04 and two freewheel diodes 1005 are mounted. Both chips are square with a side of 13 mm. One snubber diode 1103 and two snubber resistors 1104 are mounted on the snubber circuit board 105. The snubber diode 1103 is the same as the freewheel diode. Therefore, the polarity is such that the bottom side of the chip, that is, the soldering side is the cathode, and the front side of the chip is the anode. Two snubber resistors 1104 are mounted. This utilizes the resistance of the silicon diffusion layer. The dimensions are the same as the snubber diode.

IGCT1004 has a withstand voltage of 4000 V and a current capacity of 4
1A. Therefore, the rating of the semiconductor device 903 is
It has a withstand voltage of 4000 V and a current capacity of 328 A. The external dimensions of the semiconductor device 903 are 148 mm wide and 90 mm long.

The switching circuit board 104 includes a collector wiring pattern 1001 and an emitter wiring pattern 1002.
Both the gate wiring pattern 1003 and the gate wiring pattern 1003 are vertically symmetrical. Therefore, the left and right switching circuit boards 104 can be arranged line-symmetrically only by rotating one kind of switching circuit board 104 by 180 degrees, and it is not necessary to prepare two kinds of boards for the right side and the left side.

When the peak current is 328 A under the motor load, IGCT1004 has about 90 W per chip, and freewheel diode 1005 has about 100 W per chip.
W generates heat. About one switching circuit board 104 generates heat of about 560W. On the other hand, the heat generated by the snubber circuit board 105 is about 50W. Since the portion of the copper base 101 directly below the snubber circuit board 105 is used as a heat spreading area, even if a total of 1170 W of heat is generated per semiconductor device, the temperature rise of the IGCT1004 is suppressed to about 20 ° C. below the bottom surface of the semiconductor device. I was able to. On the other hand, in a semiconductor device without the snubber circuit board 105 mounted therein, the bottom area of the semiconductor device for heat dissipation is small even though there is no heat generated from the snubber circuit, so the heat generation amount is small as 1120 W. The temperature increased by about 26 ° C.

Since the snubber diode has the following requirements, it is necessary to mount it in a semiconductor device.

(1) Electrical requirement In order for the snubber diode to follow the switching speed, it is necessary to minimize the inductive component existing between the switching element and the snubber diode.

(2) Thermal Requirement In order to satisfy the above (1) outside the semiconductor device, it is necessary to hold the diode in the air, so that heat dissipation is difficult.

The snubber resistor does not necessarily have to be mounted in the semiconductor device. First, electrically, the operation of the snubber resistor may be slow. Therefore, the inductive component with the switching circuit may be large. In terms of heat, the snubber resistor generates a considerable proportion of heat in the snubber circuit, which increases the amount of heat generated by the semiconductor device. When the heat generation of the semiconductor device increases, the ability of the heat sink must be increased, which leads to an increase in the size of the system.

However, in this embodiment, the snubber resistor is mounted in the module in order to downsize and simplify the system. List the reasons.

(1) Even in the maximum of the snubber circuit, the heat generation amount (absolute value) of the snubber resistance is smaller than that of the switching circuit.

(2) The effect of downsizing the semiconductor device by externally attaching the snubber resistor is small.

For example, even if the snubber resistor 1104 is omitted in FIG. 11, the effect of reducing the size of the entire semiconductor device is small because the size of the substrate is reduced in the vertical direction.

(3) The external additional circuit becomes small. If the snubber resistor is attached externally, it will become considerably large because it becomes air-cooled. Therefore, it is possible to reduce the size of the system by mounting the snubber resistor on the semiconductor device. Another advantage is that the external circuit is simple.

FIG. 13 shows the method of manufacturing the semiconductor device of this embodiment.
It will be described according to. In the figure, the left half shows the manufacturing process, and the right half shows the state after the end of each process (before the start of the next process).

(0) Preprocess (not shown) The IGCT 1004 and the freewheel diode 1005 are soldered to the switching circuit board 104, and then wire bonding is performed. At the same time, the snubber diode 1103 and the snubber resistor 1104 are soldered to the snubber circuit board, and then wire bonding is performed.

(1) Adhesion of Circuit Board A switching circuit board 104 having an IGCT 1004 and a freewheel diode 1005 (not shown) mounted thereon, and a snubber circuit board 105 having a snubber diode 1103 and a snubber resistor 1104 (not shown) mounted thereon are made of copper. Base 101
Solder to

(2) Soldering of internal terminals The resin lid 103 to which each wiring (only the collector wiring 106 is shown) is fixed in advance is placed on the switching circuit board 104 and the snubber circuit board 105. Place the paste-like solder on the contact part between the tip of each wiring and each wiring pattern,
Solder. This position is the internal terminal. In the figure,
Only the collector internal terminal 1009 is shown.

(3) Adhesion of Resin Case The resin case 102 is adhered to the copper base 101 and the resin lid 103 with an adhesive.

In this embodiment, the switching circuit board 10
Since the pattern No. 4 is vertically symmetrical, the left and right switching circuit boards 104 can be arranged symmetrically with one type of circuit board. Depending on the circuit, it may not be possible to take a vertically symmetrical pattern. At that time, the following three countermeasures can be taken.

(A) Two types of switching circuit boards are prepared to achieve left-right symmetry.

(B) Allowing the positions of the collector external terminal and the emitter external terminal to shift to the left and right instead of on the center line of the semiconductor device, the lengths of the collector wiring and the emitter wiring reaching the left and right switching circuit boards are adjusted.

(C) In the semiconductor device, the inductive component reaching the left and right switching circuit boards is matched by utilizing the canceling action of the inductive component due to mutual induction, even if the lengths of the collector wiring and the emitter wiring are not matched. According to this method,
The positions of the collector external terminal and the emitter external terminal can be arranged on the center line of the semiconductor device.

In either case, the switching circuit board is arranged so as to sandwich the snubber circuit board. (Second Embodiment) An inverter using the semiconductor device of the first embodiment is shown in FIG. The overall function is as follows: DC input terminal plus side 1201 and DC input terminal minus side 120
The DC supplied to 2 is output as a three-phase AC to the AC output terminal U-phase 1203, the AC output terminal V-phase 1204, and the AC output terminal W-phase 1205. Module 903 of the Invention
Is used for each phase, two for each phase, for a total of six. On the plus side, the collector external terminal 112 and the anode external terminal 116 of the plus side module 903 are connected to the DC power source. On the negative side, the external emitter terminal 113 and the external cathode terminal 117 of the negative side module 903 are connected to the DC power source. On the output side, the emitter external terminal 113 of the plus side module 903 and the collector external terminal 112 of the minus side module 903 are connected,
AC output terminal U phase 1203, AC output terminal V phase 1204
And the AC output terminal W phase 1205. The external snubber circuit is only the snubber capacitor 904. As shown in FIG. 9, three capacitors are mounted inside. In appearance, three terminals are arranged in a line. The upper terminal is connected to the cathode external terminal 117 of the positive side module 903, and the lower terminal is connected to the anode external terminal 116 of the negative side module 903, and the central capacitor central terminal 1206 is connected to the central short circuit plate 1.
207, that is, the emitter external terminal 113 of the positive side module 903 and the collector external terminal 112 of the negative side module 903 are connected to each other.
As is clear from FIG. 12, the mounting form including the snubber circuit is simple and compact. The arrangement of the external terminals of the module 903 has a great influence on the form of the entire inverter. Especially important is
The main terminals are located in the center (if possible, do not shift to the left and right), control terminals such as gates are located on the right side, and snubber terminals are located on the left side. Of course, the terminal arrangement with the right and left reversed also exhibits the same effect. For example, as shown in FIG. 5, when the positions of the collector internal terminal 502 and the emitter internal terminal 503 of the left and right units 501 are not symmetrical, the positions of the collector external terminal and the emitter external terminal are shifted to the left and right. In that case, the size of the central short-circuit plate 1207 is increased to the left and right by the amount of the shift. The distance between the external terminals of the semiconductor device must be a certain distance or more in order to have a withstand voltage. Therefore, when the central short-circuit plate 1207 becomes large, the size of the entire semiconductor device is affected. Therefore, the collector external terminal 112 and the emitter external terminal 1 are connected as much as possible.
13 is preferably arranged so that it does not shift left and right.

(Embodiment 3) Another embodiment of the present invention will be described with reference to FIGS.

FIG. 14 is a perspective view of the inside of the semiconductor device according to the present embodiment. In this embodiment, the output current is 1.5 times that of the first embodiment, and the external dimensions of the semiconductor device are large. However, the external appearance is the same as that of the first embodiment in the arrangement of the constituent members, constituent materials, and external terminals. Therefore, in the figure, the external structure of the semiconductor device is omitted and only the wiring board and the wiring of each terminal from the wiring board to the external terminals of the semiconductor device are shown. To avoid complicating the drawing,
Further, the wiring around the gate, that is, the gate wiring and the auxiliary emitter wiring are omitted.

The external dimensions of the semiconductor device are 130 mm long × 165 mm wide. As shown in FIG. 14, three switching circuit boards 1401 facing in the same direction are lined up inside, and at a position sandwiched by the switching circuit boards 1401.
Two snubber circuit boards 1402 facing the same direction are arranged. The switching circuit board 1401 has four IGCT 1409 and two freewheel diodes 1410.
Are arranged in a line. Further, the collector internal terminal 1416 and the emitter internal terminal 1417 are connected to the switching circuit board 1
The strips were arranged above and below 401, that is, in the longitudinal direction to form an elongated shape. By making the switching circuit board 1401 elongated in this way, the lateral dimension of the semiconductor device can be suppressed even if three switching circuit boards 1401 are arranged. In addition, the gate wiring pattern is divided into two to form an upper gate wiring pattern 1404 and a lower gate wiring pattern 1406. Snubber circuit board 14 using the recess formed between the two gate wiring patterns
02 is arranged and the increase in size due to the insertion of the snubber circuit board 1402 is suppressed. By separating the gate wiring pattern, the order in which the elements are arranged is different from that of the first embodiment in that two freewheel diodes 1410,
There are two IGCT1409s above and below it.

Next, one snubber diode 1411 is mounted on the snubber circuit board 1402. As described in the first embodiment, it is not necessary to dispose the snubber resistor near the switching circuit as an electrical requirement. In this embodiment, the main purpose is to make the semiconductor device as small as possible, and the snubber resistor is not built in, but the semiconductor device is connected as a discrete element outside the semiconductor device. Since the snubber resistor is not built in, the size of the snubber circuit board 1402 is small, and the snubber circuit board 1402 can be inserted into the recess of the switching circuit board 1401. Further, the snubber diode 1411 is vertically elongated to suppress an increase in the lateral dimension of the semiconductor device.

As described above, the large amount of heat generated in the switching circuit board 1401 is diffused in the region where the snubber circuit board 1402 having a small heat generation is mounted. It is a thing. In particular,
In the present embodiment, the snubber circuit board 1402 mounting portion has the switching circuit board 1401 portions above and below in the drawing,
Since the upper gate wiring pattern 1405 and the lower gate wiring pattern 1406 are portions that hardly generate heat, the heat radiation conditions are almost the same for all the chips on the switching circuit board 1401 arranged in a line. Further, since the snubber circuit boards 1402 are sandwiched one by one between the switching circuit boards 1401, all three switching circuit boards 1401 have substantially the same heat spreading conditions for releasing the generated heat. Therefore, the temperature rises of the 12 IGCT 1409 and the temperature rises of the 6 freewheel diodes 1410 are almost the same.
The IGCT1409 generates about 90 W per chip, and the freewheel diode 1410 generates about 100 W per chip. About 56 per switching circuit board 1401
0W. This is the same as in the first embodiment. On the other hand, in the snubber circuit board 1402, about 1 per board
Only 0 W heats up. Since the snubber resistor is externally attached and the snubber circuit board 1402 is divided into two pieces, the heat generation amount per board is smaller than that in the first embodiment. In the configuration in which the snubber resistor is externally attached and the number of the snubber circuit boards 1402 is two as in the present embodiment, heat generation of the snubber circuit board 1402 is reduced and the mounting portions of the snubber circuit board 1402 are dispersed. Therefore, as a region for diffusing the heat generated by the switching circuit board 1401,
It can be used more effectively than the first embodiment. Even if a total of 1700 W is generated per semiconductor device, the temperature rise of IGCT1409 is lower than that of the first embodiment, about 18 ° C. from the bottom of the semiconductor device.
I was able to keep it up. The calorific value is about 1.5 times that of the first embodiment, but the bottom area of the semiconductor device is about 1.6 times, the calorific value per unit bottom area is small, and the heat of dividing the snubber circuit board 1402 is small. This is because the effective bottom surface is effectively used.

In terms of electrical characteristics, this embodiment has a problem that the first embodiment does not have. That is, the switching circuit board 14
01 is three parallel connections, and the snubber circuit board 1402 is two parallel connections. Since both circuits have large current interruptions, the inductive components of the wiring must be the same.

First, the parallel connection of the snubber circuit boards 1402 will be described. 15 shows the cathode wiring 1 from FIG.
It is the figure which extracted only 426. Anode wiring 142
Since it is the same for 5 as well, it is omitted. The parallel connection of the two circuits is performed by the switching circuit board 104 of the first embodiment.
The same as the collector wiring 106 and the emitter wiring 107 in FIG. That is, two cathode internal terminals 14
It is necessary to make the distance from 22 to the cathode confluence 1501 equal. Therefore, the cathode confluence 15
01 is located on the center line of the semiconductor device.
In the first embodiment, the wiring after the merging is taken out vertically to the outside of the semiconductor device like the collector merging line 508 and the emitter merging line 509 in FIG. However, in this embodiment, both the anode external terminal and the cathode external terminal (neither are shown) are located on the left side of the semiconductor device as in the case of the first embodiment.
The positions of 25 and cathode line 1426 must be shifted to the left. Mutual induction of wiring by shifting cannot be completely avoided, but in order to reduce the influence as much as possible, the left arm 1502 and the horizontal portion 150 after merging are merged.
The distance of 3 was 20 mm. As a result, the path from the cathode internal terminal 1422 on the left side to the cathode external terminal position 1505 via the left arm 1502, the cathode merging point 1501, the post-merging horizontal portion 1503, and the cathode internal terminal 1422 on the right side to the right arm 1504, cathode Confluence point 1
501, the difference between the induction components in the path from the merged horizontal part 1503 to the cathode external terminal position 1505 is about 5 nH (nano henry), which is a practically acceptable value.

Next, parallel connection of the switching circuit boards 1401 will be described. Switching circuit board 14
All 01 are facing in the same direction. This arrangement
Three parallel connections are advantageous. That is, by arranging the circuit boards in the same direction, the intervals of the collector internal terminals 1416 at the three locations and the intervals of the emitter internal terminals 1417 at the three locations become equal. This means that the left and right internal terminals are arranged at the same distance when viewed from the central internal terminal. The inductive component is directly affected by the wiring length. Therefore, it is difficult to match the inductive component with the parallel connection of the three terminals. However, in this arrangement, at least the inductive components reaching the internal terminals at the left and right ends are matched from the beginning. Therefore, it is only necessary to consider the matching of the induction components of the central internal terminal and the internal terminals at both ends. This is a great advantage of this arrangement. The matching between the inductive component in the path from the central internal terminal to the external terminal and the inductive component in the path from the left and right internal terminals to the external terminal will be described with reference to FIG. 16 for the emitter wiring 1424. Note that FIG. 16 shows the emitter wiring 1 from FIG.
It is the figure which extracted only 424.

The internal emitter terminals 1417 are arranged in three lines at equal intervals. It is assumed that a current flows into the emitter internal terminals 1417 at three locations. The current is one flow from the emitter external terminal position 1601 to the emitter confluence 1602. Emitter confluence 1
At 602, the current is split in half into left and right. The current flowing in the left induction component adjusting arm 1603 is further divided into two at the left partial confluence point 1605. Two thirds of the current flows into the left emitter internal terminal 1417. Remaining 3
One part flows to the left arm 1608. On the other hand, the remaining half of the current flowing in the right induction component adjusting arm 1604 at the emitter junction point 1602 is further divided into two at the right side junction point 1606. Two thirds of the current flows into the emitter internal terminal 1417 on the right side. The remaining one-third flows to the right arm 1609. Finally, the currents in the left arm 1608 and the right arm 1609 are equal to each other at the emitter center separation point 1607.
And merge into the central emitter internal terminal 1417.

Now, the direction of the current will be described. The direction of the current flowing through the left induction component adjustment arm 1603 is
Right now, right to left. On the other hand, the left arm
The current through 1608 is from left to right. Similarly for the right half, the current flows in the opposite direction in the upper and lower parallel arms. When a current flows in the opposite direction in close proximity, mutual induction causes a canceling action of the induction component. From another perspective, we can think as follows. That is, if the distance between both arms is sufficiently large, the center emitter internal terminal 1
The route to 417 is closer to the emitter internal terminals 141 at both ends.
7 because it is longer than the path to 7
The inductive component to 17 becomes larger than the inductive component to the emitter internal terminals 1417 at both ends. However, when the distance between both arms becomes zero, the distance relationship is reversed, and the induction component to the central emitter internal terminal 1417 becomes smaller. If this interval is set to an appropriate value, the central emitter internal terminal 141
7 and the inductive component reaching the emitter internal terminals 1417 at both ends can be made equal. Depending on the shape of the semiconductor device, this distance has an optimum value of 10 mm or less.
In this embodiment, when the distance is set to 8 mm, the emitter external terminal position 1
The inductive components from 601 to the three emitter internal terminals 1417 are all the same.

The arrangement of the switching circuit board 1401 of this embodiment is advantageous from the viewpoint of the current flow, that is, the inductive component. However, from the viewpoint of the size of the semiconductor device, it is convenient to configure the switching circuit board 1401 at the right end in a left-right inverted pattern because the wasteful area is further reduced.

(Embodiment 4) An inverter using the semiconductor device of Embodiment 3 is shown in FIG. The size of the semiconductor device is simply increased, and the size of the semiconductor device is basically the same as that of the second embodiment. Therefore, the shape of the inverter is similar to that of FIG. Unlike the second embodiment, this embodiment is different in that a snubber resistor 1701 is externally attached. As shown in the figure, snubber resistor 17
A discrete element is used as 01, and is mounted in the air. One is that the snubber resistor does not need to operate at high speed, so it may be placed at a distant position. The other is that the heat generated from the snubber resistor is
This is because the heat is not transmitted to the heat radiation fins 1707 of the semiconductor device.

[0069]

According to the present invention, a switching element and an additional circuit supporting the switching element, that is, a semiconductor device having a freewheel diode and at least a snubber diode mounted therein, and an optimal layout of a circuit board mounted therein are realized. be able to.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional perspective view showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram corresponding to the first embodiment of the present invention.

FIG. 3 is an explanatory diagram showing the arrangement and temperature distribution of a high heat generation circuit board and a low heat generation circuit board.

FIG. 4 is an explanatory view showing an arrangement of a high heat generation amount circuit board and a low heat generation amount circuit board.

FIG. 5 is an explanatory diagram showing the balance of inductive components between the units of the present invention.

FIG. 6 is an explanatory diagram for explaining the balance of inductive components and the balance of heat generation between the units of the present invention.

FIG. 7 is a plan view showing an arrangement of substrates having different heat generation amounts in the semiconductor device of the present invention.

FIG. 8 is a perspective view showing a semiconductor device of the present invention.

FIG. 9 is a circuit diagram corresponding to the first embodiment of the present invention.

FIG. 10 is a plan view showing a switching circuit board according to the first embodiment of the present invention.

FIG. 11 is a plan view showing the snubber circuit according to the first embodiment of the present invention.

FIG. 12 is a diagram showing an inverter device according to a second embodiment of the present invention.

FIG. 13 is a diagram illustrating a manufacturing process of the semiconductor device according to the first embodiment of the present invention.

FIG. 14 is a perspective view showing a semiconductor device according to a third embodiment of the present invention.

FIG. 15 is a perspective view showing a cathode wiring according to a third embodiment of the present invention.

FIG. 16 is a perspective view showing an emitter wire according to a third embodiment of the present invention.

FIG. 17 is a plan view showing an inverter device according to a fourth embodiment of the present invention.

[Explanation of symbols]

101 ... Copper base substrate, 102 ... Resin case, 103 ...
Resin lid, 104, 1401 ... Switching circuit board, 10
5,1402 ... Snubber circuit board, 106, 818, 14
23 ... Collector wiring, 107, 819, 1424 ... Emitter wiring, 108 ... Auxiliary emitter wiring, 109, 820
... Gate wiring, 110,822,1426 ... Cathode wiring, 111,821,1425 ... Anode wiring, 112
... collector external terminal, 113 ... emitter external terminal, 11
4 ... Auxiliary emitter external terminal, 115 ... Gate external terminal,
116 ... Anode external terminal, 117 ... Cathode external terminal, 118 ... Mounting hole, 201, 901 ... DC power supply,
202, 902 ... AC output, 203 ... Switching circuit, 204 ... Upper arm switching element, 205 ... Lower arm switching element, 206 ... Upper arm freewheel diode, 207 ... Lower arm freewheel diode, 208 ... Snubber circuit, 209 ... upper arm snubber diode, 210 ... lower arm snubber diode, 211 ... upper arm snubber resistor, 212 ... lower arm snubber resistor, 301, 401 ... high heat generation circuit board,
302, 402 ... Low heat value circuit board, 303, 403 ...
Base substrate for heat diffusion, 304 ... Temperature graph, 501 ... Unit, 502, 603, 703, 1009, 1416
... Collector internal terminals, 503, 604, 704, 101
0, 1417 ... Emitter internal terminal, 504 ... Collector lead wire, 505 ... Emitter lead wire, 506, 60
7 ... Collector parallel line, 507, 608 ... Emitter parallel line, 508 ... Collector merging line, 509 ... Emitter merging line, 601, 701 ... Main circuit board, 602, 702, 8
03 ... Sub circuit board, 605, 705, 1108, 142
1 ... Anode internal terminal, 606, 706, 1107, 1
422 ... Cathode internal terminal, 801 ... Left main circuit board,
802 ... right main circuit board, 804, 1001, 1403 ... collector wiring pattern, 805, 1002, 1404 ... emitter wiring pattern, 806, 1003 ... gate wiring pattern, 807, 1101, 1408 ... cathode wiring pattern, 808, 1102, 1407 ... Anode wiring pattern, 809 ... Switching element, 810, 1005, 1
410 ... Free wheel diode, 811, 110
3, 1411 ... Snubber diodes, 812, 1104,
1701 ... Snubber resistance, 813, 1006, 1412 ...
Emitter wire, 814, 1007, 1413 ... Gate wire, 815, 816, 1008, 1105, 141
4, 1415 ... Anode wire, 817, 1106 ... Resistance connection wire, 823 ... Base substrate, 903 ... Module, 904 ... Snubber capacitor, 1004, 1409 ... IG
CT, 1011, 1418 ... auxiliary emitter internal terminal, 1
012 ... Gate internal terminal, 1201, 1702 ... DC input terminal plus side, 1202, 1703 ... DC input terminal minus side, 1203, 1704 ... AC output terminal U phase, 120
4, 1705 ... AC output terminal V phase, 1205, 1706
... AC output terminal W phase, 1206 ... Capacitor center terminal,
1207 ... Central short circuit board, 1405 ... Upper gate wiring pattern, 1406 ... Lower gate wiring pattern, 1419 ...
Upper gate internal terminal, 1420 ... Lower gate internal terminal,
1501 ... Cathode confluence, 1502, 1608 ... Left arm, 1503 ... Horizontal part after confluence, 1504, 1609
… Right arm, 1505… Cathode external terminal position, 1601
... Emitter external terminal position, 1602 ... Emitter confluence,
1603 ... Left guide component adjusting arm, 1604 ... Right guide component adjusting arm, 1605 ... Left partial confluence point, 160
6 ... Partial confluence on the right side, 1607 ... Emitter center separation point,
1707 ... Fins for heat dissipation.

Claims (12)

[Claims] 1. A plurality of main circuit boards comprising a plurality of switching elements and diodes connected in antiparallel with the switching elements on a base substrate, electrical means for connecting the main circuit boards in parallel, and diodes. Alternatively, in a semiconductor device including an electric component and at least one sub circuit board in which a diode is connected in parallel, a circuit board disposed adjacent to the sub circuit board is the main circuit board. Semiconductor device. 2. A two main circuit board having a plurality of switching elements and a diode connected in antiparallel with the switching element on a base board, an electric means for connecting the main circuit boards in parallel, and a diode. Alternatively, in a semiconductor device including one sub-circuit board in which electric components and diodes are connected in parallel, a center point of the sub-circuit boards is substantially equidistant from two center points of the main circuit boards. Semiconductor device. 3. The semiconductor device according to claim 2, wherein the main circuit boards are arranged symmetrically on a base substrate. 4. The semiconductor device according to claim 2, wherein the sub circuit board is arranged so as to be sandwiched between the main circuit boards. 5. The semiconductor device according to claim 2, wherein the sub circuit board is arranged so as to be surrounded by the main circuit board. 6. The semiconductor device according to claim 2, wherein the main circuit boards are arranged adjacent to each other. 7. The semiconductor device according to claim 1, wherein the main circuit board generates a larger amount of heat than the sub circuit board. 8. The semiconductor device according to claim 7, wherein the main circuit board having a large heat generation amount and the sub circuit board having a small heat generation amount are alternately arranged on the base substrate. 9. A plurality of main circuit boards each having a switching element and a diode connected in antiparallel to the switching element on a base board, and an electric means and a diode or an electric component for connecting the main circuit boards in parallel. In a semiconductor device including at least one sub-circuit board in which a diode and a diode are connected in parallel, a main current take-out line has substantially the same shape, and the inductive components of the take-out line are substantially equal to each other. And a sub circuit board. 10. A plurality of main circuit boards provided with a plurality of switching elements and diodes connected in antiparallel to the switching elements on a base substrate, electrical means for connecting the main circuit boards in parallel, and diodes or In a semiconductor device including an electrical component and at least one sub-circuit board in which a diode is connected in parallel, the maximum temperature during operation of the main circuit board is substantially the same in any of the main circuit boards. Semiconductor device. 11. A plurality of main circuit boards provided with a plurality of switching elements and diodes connected in antiparallel to the switching elements on a base substrate, electrical means for connecting the main circuit boards in parallel, and diodes or In a semiconductor device including an electric component and at least one sub-circuit board in which a diode is connected in parallel, a withstand voltage between main terminals of the semiconductor device is 3000 V or more, and a peak current output of the semiconductor device is 300 A or more. And the difference between the temperature of the hottest switching element in the semiconductor device and the temperature of the external bottom surface of the semiconductor device immediately below the device is 25 ° C. or less. 12. An inverter for converting a direct current to a three-phase alternating current, a plurality of main circuit boards provided with a plurality of switching elements and diodes connected in antiparallel with the switching elements on a base board, and the main circuit board. Is a semiconductor device including electrical means for connecting in parallel with each other, and at least one sub-circuit board in which a diode or an electric component and a diode are connected in parallel, and a circuit board arranged adjacent to the sub-circuit board. Is a semiconductor device unit in which a single semiconductor device, which is the main circuit board, or a plurality of semiconductor devices are connected in parallel.
By connecting in series to the stage, connecting both ends to a DC power supply, and making a group having an AC output terminal at the series connection point of both semiconductor device units as one phase, and connecting three groups in parallel to the DC power supply, An inverter characterized by obtaining a three-phase AC output.