JPH0818241A - Multilayer printed circuit board and method of manufacture - Google Patents

Abstract

PURPOSE:To provide a high-reliability multilayer printed circuit board by preventing loss of patterns and disconnection of components in the multilayer printed circuit board. CONSTITUTION:The multilayer printed circuit board, that comprise a lower layer part conductor circuit 5, that is formed on a lower layer insulator 1, and an upper layer part conductor circuit 14, that is formed on upper layer insulators 6 and 9, which are connected electrically through connecting holes 19 and 20 arranged on the upper insulators 6 and 9, has a structure that is formed of two layers that comprise first insulating layers I1 and I3, of which the upper insulators 6 and 9 have high insulation and good adhesion with the lower part conductor circuit 5 and second insulating layers I2 and I3 that has good adhesion with an upper part conductor circuit 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board and a method for manufacturing the same.

[0002]

2. Description of the Related Art With the recent increase in wiring density of electronic technology, a multilayer wiring board in which a plurality of wiring layers are laminated has been used as a printed wiring board.
In such a multilayer printed wiring board, through holes are generally formed to connect the wirings of the upper and lower outer layers, but in recent years, in order to improve the wiring density, the wiring layers of the inner layer or between the inner layer and the outer layer are connected. Blind via holes are being formed, and their importance is increasing.

Conventionally, as a method of manufacturing a multilayer printed wiring board having a blind via hole, a method is known in which a laminated board having a blind via hole is further laminated to form a through hole. In addition, as a method of manufacturing a multilayer printed wiring board having a blind via hole, a photoresist is applied as an insulating layer on the upper surface of the lower conductor circuit, and then each process of exposure and development is performed, and the insulating layer is cured ( There is also known a method in which post-cure) is performed and plating is performed to form a via hole for electrically connecting to the upper conductor circuit.

[0004]

In a method of further laminating laminated plates having blind via holes formed therein to form through holes, the blind hole plating and the through hole hole plating must be performed separately. However, there is a problem that the number of plating processes increases and the manufacturing cost increases.

Further, in forming the outer layer circuit, two plating layers are stacked on the outermost layer to be etched, and the total plating thickness becomes thick (usually 80 μm or more), resulting in a fine pattern (fine pattern). There is also a problem that formation becomes difficult. Furthermore, when laminating laminated boards with blind via holes, the resin of the B-stage prepreg, which functions as an adhesive between the laminated boards, exudes to the outer layers from the blind holes, and a separate work of removing the exuded resin is required. There is a problem.

On the other hand, in the method of forming a blind via hole by applying photoresist as an insulating layer to the lower conductor circuit, performing exposure, development, and post-cure treatment, and performing plating to form a blind via hole, the photoresist and this There are problems that the adhesion strength with the applied plating is low (usually 300 g / cm or less), and pattern defects and the like occur.
Further, there is also a problem that a photoresist having a better adhesion strength between the photoresist and the plating generally deteriorates the insulating property and the adhesion with the lower conductor circuit.

In view of the above points, the present invention provides a highly reliable multilayer printed wiring board and a manufacturing method thereof, which eliminates pattern defects and peeling of components.

The present invention particularly relates to a multilayer printed wiring having at least two conductor layers electrically insulated by a photoresist as an insulating layer, and each conductor layer being electrically connected by a blind via hole. About the board,
By providing an insulating layer that has excellent insulation properties, good adhesion strength with the lower conductor circuit layer, and excellent adhesion strength with the conductor layer formed by plating, pattern defects, parts The present invention provides a multilayer printed wiring board having improved reliability by eliminating peeling and the manufacturing method thereof.

[0009]

The multilayer printed wiring board according to the first aspect of the present invention is formed on the upper surface of the lower layer insulator 1 and on the lower layer conductor circuit 5 and the upper surfaces of the upper layer insulators 6 and 9. In a multilayer printed wiring board in which the upper layer conductor circuit 14 and the upper layer conductors 6 and 9 are electrically connected through the connection holes 19 provided in the upper layer insulators 6 and 9, the upper layer insulators 6 and 9 are electrically insulative and Of the first insulating layers I ₁ and I having excellent adhesion
₃ and the second insulating layers I ₂ and I _4, which have excellent adhesion to the upper conductor circuit 14, are formed.

A second aspect of the present invention is a multi-layer print of the first aspect.
In the wiring board, the first insulating layer I ₁, I₃Has insulation
Formed with a photoresist that has excellent adhesiveness and adhesion to copper foil.
The second insulating layer I₂, I_FourPhoto register with roughening
The structure is formed by a strike.

The method for manufacturing a multilayer printed wiring board according to the third aspect of the present invention comprises a step of forming a lower layer conductor circuit 5 on the upper surface of the lower insulating layer 1 and an insulating and lower layer portion covering the lower layer conductor circuit 5. First insulating layer I ₁ having excellent adhesion to the conductor circuit 5
(I ₃ ) and a second insulating layer I ₂ (I ₄ ) having excellent adhesion to the upper conductor circuit 14 and forming a two-layer upper layer insulator 6 (9); 2 and the first insulating layer I
₂ (I ₄ ) and I ₁ (I ₃ ) are provided with a step of forming a connection hole 8 facing the connection portion of the lower layer conductor circuit 5, and the lower layer through the connection hole 8 on the upper surface of the upper layer insulators 6 and 9. Part conductor circuit 5
There is a step of forming an upper layer conductor circuit 14 connected to.

A fourth aspect of the present invention is the method of manufacturing a multilayer printed wiring board according to the third aspect, wherein the first insulating layer I is used.
₁ (I ₃ ) is formed of a photoresist having excellent insulating properties and adhesion to a copper foil, and the second insulating layer I ₂ (I ₄ ) is formed of a roughening photoresist.

[0013]

According to the first aspect of the present invention, the upper-layer insulators 6 and 9 for insulating the lower-layer conductor circuit 5 and the upper-layer conductor circuit 14 from each other are the insulating layers I ₁ , I ₂ and I ₃ , I of the two-layer structure. by forming at _4, with excellent insulating properties with a first insulating layer I _1, I ₃ is obtained, the adhesion strength between the lower portion the conductor circuit 5 is sufficiently obtained, the second insulating layer I _2, I ₄ for upper conductor circuit 14
Adhesion strength with is sufficiently obtained. Moreover, insulation deterioration due to pinholes and the like does not occur. Therefore, the pattern loss,
There is no peeling of parts, etc., and high reliability of the multilayer printed wiring board can be achieved.

According to the second aspect of the present invention, in the multilayer printed wiring board according to the first aspect of the present invention, the first insulating layers I ₁ and I ₃ have excellent insulating properties and have good adhesion to the lower conductor circuit 5. Since it is formed of a different photoresist, it has excellent insulation and good adhesion with the lower conductor circuit 5. Further, since the second insulating layers I ₂ and I ₄ are formed of a roughening photoresist, the surfaces of the _second insulating layers I ₂ and I ₄ are roughened,
For example, the adhesion strength with the upper conductor circuit 14 by plating is improved. Therefore, pattern loss and peeling of parts are eliminated.

According to the method for manufacturing a multilayer printed wiring board according to the third aspect of the present invention, the first insulating layer that covers the lower layer conductor circuit 5 and is excellent in insulation and adhesion to the lower layer conductor circuit 5 is provided. By forming an insulator 6 (9) having a two-layer structure composed of I ₁ (I ₃ ) and a second insulating layer I ₂ (I ₄ ) having excellent adhesion to the upper conductor circuit 14, Sufficient insulation characteristics are obtained between the lower layer conductor circuit 5 and the upper layer conductor circuit 14 to be formed next, and the adhesion strength between the insulator 6 (9) and the lower layer conductor circuit 5 and the upper layer conductor circuit 14 is high. Can be obtained respectively. Therefore, it is possible to manufacture a highly reliable multilayer printed wiring board without pattern loss, peeling of components, and the like.

According to a fourth aspect of the present invention, in the method for manufacturing a multilayer printed wiring board according to the third aspect, the first insulating layer I ₁
Since (I ₃ ) is formed of the photoresist layer having excellent insulation and good adhesion to the lower conductor circuit 5, the insulating property is excellent and good adhesion to the lower conductor circuit 5 is obtained. Since the second insulating layer I ₂ (I ₄ ) is formed of a photoresist layer having a roughening property, the surface of the second insulating layer 6 (9) can be roughened, for example, by plating with the upper conductor circuit 14. Adhesion strength is improved.

Further, the first and second insulating layers I ₁ (I ₃ )
Since both I ₂ and I ₂ (I ₄ ) are formed of a photoresist, a connection hole can be easily formed by a photographic method such as exposure / development or other methods, and productivity can be improved and cost can be reduced.

[0018]

Embodiments of the multi-printed wiring board and the method for manufacturing the same according to the present invention will now be described in detail with reference to the drawings.

First, as shown in FIG. 1A, an inner layer core material 2 in which metal foils, for example, copper foils are formed on both surfaces of an insulating layer 1 is prepared, and one of the inner layer core material 2 is the first copper foil. An inner layer circuit (that is, a lower layer conductor circuit) is formed by patterning both copper foils so that the wiring layer (that is, a conductor circuit) 3 becomes the other copper foil that becomes the second wiring layer (that is, a conductor circuit) 4. 5 is formed.

In this case, as the inner core material 2 to be used, generally, the insulating layer 1 is made of a glass cloth impregnated with an epoxy resin having a thickness d ₁ = 50 μm or more, and the first wiring layer 3 and the second wiring layer 3 are formed. The thickness of the copper foil to be the wiring layer 4 is d ₂ = 35μ
It is preferable to use those having a thickness of m or less. Insulation layer 1
If the thickness d ₁ is less than 50 μm, the insulation reliability between the first wiring layer 3 and the second wiring layer 4 is reduced, which is not preferable. In addition, the first wiring layer 3 and the second wiring layer 4
When the thicknesses d ₂ and d _{3 of the} copper foil to be formed are thicker than 35 μm, the smoothness of the outer layer formed later is impaired, which is not preferable.

The pattern forming method for the first wiring layer 3 and the second wiring layer 4 can be a general method. For example, stick a dry film as an etching resist to a copper foil, expose it through a photo tool,
A photographic method can be used in which development, etching, and dry film peeling are performed sequentially to obtain a desired circuit pattern. A screen printing method can also be used as a method for forming the pattern of the etching resist.

Next, as shown in FIG. 1B, the first wiring layer 3 and the second wiring layer 4 having the desired pattern are thus formed.
After the formation, the two-layer structure including the first insulating layer I ₁ and the second insulating layer I ₂ having different characteristics described later on one surface of the inner layer core material 2 including the first wiring layer 3 Insulator 6
To form.

As a method of forming such first and second insulating layers I ₁ and I ₂ , for example, a method of applying a liquid photosolder resist by screen printing, a method of spraying or the like can be used. .

Next, as shown in FIG. 1C, an insulator 6 having a two-layer structure composed of _first and _second insulating layers I ₁ and I _2.
On the other hand, the blind hole 1 to be a blind via hole afterward facing the connecting portion 3a of the first wiring layer 3 therebelow.
Form 0. Normally, the two-layer insulator 6 made of photoresist is exposed through a photo tool,
Photographic techniques can be used to develop to form the desired holes 10. The holes 10 may be formed by laser light or sandblast.

Subsequently, as shown in FIG. 1D, as for the opposite surface of the inner core material 2, similarly to FIG. 1B, the first insulating layer having different characteristics is formed on the opposite surface including the second wiring layer 4. An insulator 9 having a two-layer structure is formed by I ₃ and the second insulating layer I ₄ . The insulating layers I ₃ and I ₄ can be formed by, for example, a method of applying a photo solder resist by screen printing or a method of spraying, as in the case of the insulating layers I ₁ and I ₂ .

Then, as shown in FIG. 2E, in the same manner as described with reference to FIG.
The blind hole 10 to be a blind via hole after the connection portion 4a of the wiring layer 4 is formed.

After forming the bridging holes 10 in the insulators 6 and 9 on both sides, as shown in FIG. 2E, both insulators 6 are formed.
Through holes 11 are formed so as to pass through the holes 9 and 9 and become the through holes. This through hole 1
1 is an ordinary drill (for example, a drill diameter of 0.2 to 0.4 m)
m)), but may be formed by punching using a die or laser.

Next, the blind hole 10 and the through hole
Layer I having a hole 11 formed therein₂, I _FourPart of resin layer (rear
Swell). Dimethy as a chemical used for this swelling
Rhoformamide (DMF), dimethylsulfoxide (D
MSO), N-methyl-2-pyrrolidone (NMP), pyridi
Can be used.

Then, the surface of the resin layer thus swollen, that is, the surfaces of the insulating layers I ₂ and I ₄ is roughened. For this roughening treatment, chemicals having oxidizing power such as potassium permanganate, potassium dichromate, concentrated sulfuric acid and the like can be used.

Next, as shown in FIG. 2F, a plating layer (for example, a copper plating layer) 13 is formed on the thus roughened material. The plating layer 13 is formed by electroless plating by a conventional method, but it is performed by using both electroless plating and electrolytic plating to form the surface of the second insulating layers I ₁ and I ₄ , the blind holes 8 and the through holes. It is preferable that the entire surface of the hole 11 is covered with the plating layer 13.

Next, after forming the plating layer 13, the plating layer 13 is patterned to form an outer layer circuit (that is, an upper conductor circuit) including the third wiring layer 15 and the fourth wiring layer 16 having a desired wiring pattern. ) 14 is formed. Thus, the first and third wiring layers 3 and 15 shown in FIG. 2G are formed.
, And the second and fourth wiring layers 4 and 16 are electrically insulated from each other by the blind via holes 19 which are insulated by the two-layered insulators 6 and 9 having different characteristics and which are provided with conductivity by the plated layer. To obtain the intended multilayer printed wiring board 18 in which the outer layers of the third and fourth wiring layers 15 and 16 are electrically connected to each other by the through holes 20 provided with conductivity by the plating layer.

The above-mentioned insulating layers I ₁ and I ₃ have high photosensitivity and can form via holes by a photographic method, and have excellent insulating properties, adhesion to copper foil, and heat resistance. Refers to resin. The insulating layers I ₂ and I ₄ are resin layers having excellent roughening characteristics and excellent adhesion to the plating layer 13.

The thicknesses d ₄ and d ₆ of the insulating layers I ₁ and I ₃ are preferably 10 to 100 μm. Also, the insulating layers I ₂ and I
The thickness d ₅ and d ₇ of ₄ is preferably 5 to 50 μm. The thicknesses d ₄ and d _{6 of the} insulating layers I ₁ and I ₃ are 100 μm,
The thicknesses d ₅ and d _{7 of the} insulating layers I ₂ and I ₄ are 50 μm,
If they exceed each other, for example, when forming a via hole via a photo tool, it is not preferable because sufficient exposure cannot be performed to the lower layer of the insulating layer. Further, if the thicknesses d ₄ and d _{6 of} the insulating layers I ₁ and I ₃ are less than 10 μm, sufficient insulating characteristics cannot be obtained and reliability is impaired, which is not preferable.
Further, the thicknesses d ₅ and d _{7 of} the insulating layers I ₂ and I ₄ are 5 μm.
In the case of the roughening treatment, the insulating layers I ₂ and I ₄
Is dissolved, a stable roughened surface cannot be obtained, and a desired peel strength cannot be obtained, which is not preferable.

As the resin for the above-mentioned insulating layers I ₂ and I ₄ , for example, the following resins can be used.
That is, a normal liquid photosolder resist mixed with a powdery epoxy compound can be used. When the resin thus prepared is subjected to a roughening treatment, the thermosetting reaction rate of the powdery epoxy compound is slower than the thermosetting reaction rate of the usual liquid photosolder resist. Thus, the plating anchor can be formed by dissolving only the uncured epoxy compound. The size of the plating anchor can be adjusted by the amount of the epoxy compound added.

The above-mentioned epoxy compound has a melting point of 6
It is desirable to add one having a temperature of 5 ° C. or higher in the range of 5 to 100 parts. In the case of an epoxy compound having a melting point of less than 65 ° C., the difference in thermosetting reaction rate is insufficient, the roughening property of the resins of the insulating layers I ₂ and I ₄ is insufficient, and the desired accuracy cannot be obtained.
Not suitable. Further, when the amount of the powdery epoxy compound to be kneaded exceeds 100 parts, the roughness of the resin of the insulating layers I ₂ and I ₄ becomes excessive, and the desired roughness is exceeded, and the insulating layer I ₂ , It is not preferable from the viewpoint of the mechanical strength of the resin of I ₄ being insufficient, deterioration of insulation, etc., and also from the viewpoint of a decrease in developability.

Examples of the roughening of the resin used to form the insulating layer I ₂ and I _4, it is desirable that the swollen resin and roughening treatment surface of the insulating layer I ₂ and I ₄ are 1~8μm roughened . That is, the roughness of the insulating layers I ₂ and I ₄ is 1 μm.
If it is less than this, sufficient adhesion strength between the insulating layers I ₂ and I ₄ and the plating layer 13 cannot be obtained, which is not good. In addition, the insulating layer I
_When the roughness of ₂ and I ₄ exceeds 8 μm, the smoothness of the upper surface of the plating layer 13 is impaired, which is not preferable.

As the resin for the insulating layers I ₂ and I ₄ , for example, the following resins can be used. That is, a normal liquid photosolder resist in which rubber is kneaded can be used. For example, it is possible to use an ordinary photo solder resist mixed with 3 to 20 wt% of butadiene rubber. The amount of butadiene rubber to be kneaded is 3 wt
When it is less than%, the roughness of the resin of the insulating layers I ₂ and I ₄ is insufficient, and the desired roughness cannot be obtained, which is not preferable.
If the amount of butadiene rubber to be kneaded exceeds 20 wt%,
From the viewpoints that the resin of the insulating layers I ₂ and I ₄ becomes excessively rough and exceeds a desired roughness, and the resin of the insulating layers I ₃ and I ₄ lacks mechanical strength and insulation is deteriorated. It is not preferable, and is also not preferable from the viewpoint of deterioration of developability. As the butadiene rubber used here, for example, Nisseki Polybutadiene M-1000-20 (trade name) can be used.

The insulating layers I ₂ and I ₄ may be formed by using the alkali developing resist ink described in Japanese Patent Application No. 5-315585 previously proposed. The alkali-developable resist ink comprises a composition comprising an epoxy compound having a slow reactivity with a carboxylic acid-added acrylate compound, an epoxy compound having a fast reactivity with the composition, and an epoxy compound having a moderate reactivity with the composition. The above-mentioned epoxy compound is contained.

The carboxylic acid-added acrylate compound contained in the composition is a compound having both a carboxylic acid for expressing alkali developability and an acrylate for photocuring, and is used for ordinary alkali developable resist ink. The same thing as the carboxylic acid addition acrylate compound mentioned above can be used.

Here, the reaction rate was evaluated by measuring the gelation time. First, the one having a gelation time of 9 minutes or more was used as the slow-reactive epoxy compound (group A), and the second A gelling time of 5 minutes or more and less than 9 minutes is a moderately reactive epoxy compound (group B)
Thirdly, an epoxy compound (group C) having a fast gelling time of less than 5 minutes is used as a highly reactive epoxy compound.

Specific examples of the slow-reactive epoxy resin (group A) include Epicoat 1 manufactured by Yuka Shell Co., Ltd.
001, Epicoat 1004, Dainippon Ink and Chemicals, Inc. Epicron 900, Epicron 1050, Toto Kasei Epototo YD-134, YD-011, Dow Chemical Co. D.I. E. FIG. R. 661, Ciba Geigy Araldide 6071, Asahi Kasei Corporation AER-661,
Sumitomo Chemical Co., Ltd. Sumi-epoxy ELA-134, ES
Phenoxy type epoxy compounds such as A-011 and the like (both are trade names) and Epicoat YL903, Y manufactured by Yuka Shell Co., Ltd.
L906, Epichron 15 manufactured by Dainippon Ink and Chemicals, Inc.
2, Epicron 1120, Epotote Y manufactured by Tohto Kasei Co., Ltd.
DB-400, YDB-500, Dow Chemical Company
D. E. FIG. R. 511, Ciba Geigy Araldide 8011, Asahi Kasei Kogyo AER-711, AER-7
55, Sumitomo Chemical Co., Ltd. Sumi-epoxy ELB-24
0, ESB-500, etc. (both are trade names), brominated epoxy compound, Epichron T manufactured by Dainippon Ink and Chemicals, Inc.
Rubber-modified epoxy compounds such as SR-930, TSR-601, Tohto Kasei Epotote YR-207, YR-450, YR-102 (all are trade names), or Toto Kasei Epotote YD-172 (trade name) Examples thereof include dimer acid-modified epoxy compounds and the like.

Specific examples of the above-mentioned moderately reactive epoxy compound (group B) include those manufactured by Yuka Shell Co., Ltd.
Epicoat 807,828, Dainippon Ink and Chemicals Incorporated Epicron 840, Toto Kasei Epotote YD-
128, D.C. manufactured by Dow Chemical Company. E. FIG. R. 331, Ciba Geigy Araldide GY260, Asahi Chemical Co., Ltd. AER331, Sumitomo Chemical Co., Ltd. Sumi-Epoxy E
Bisphenol A type epoxy compounds such as LA-128 (all are trade names), Epicoat 15 manufactured by Yuka Shell Co., Ltd.
4,181, made by Dainippon Ink and Chemicals, Inc. Epicron N
-740, N-865, N-665, N-695, Toto Kasei Epotote YDPN-638, YDCN-7
04, D.W. E. FIG. N. 431, D.I.
E. FIG. R. 438, Ciba Geigy Araldide EP
N1138, ECN1235, ECN1299, Nippon Kayaku Co. RE-306, EPPN-201, EOCN-.
1020, EOCN-104S, AE manufactured by Asahi Kasei Corporation
RECN-235, ECN-299, Sumitomo Chemical Co., Ltd. Sumi-epoxy ESCN-195X, ESCN-2
Novolak type epoxy compounds such as 20 (all are trade names) or Epiclon 83 manufactured by Dainippon Ink and Chemicals, Inc.
0, Tohto Kasei Epotote YDF-170, Ciba Geigy Araldide XPY306, etc. (all are trade names), bisphenol F type epoxy compounds, Yuka Shell YL-933, Dow Chemical T.I. E. FIG. N. (All are trade names) trihydroxyphenylmethane type epoxy compound, or YX-400 manufactured by Yuka Shell Co., Ltd.
0, Biphenyl type epoxy compound such as EXA-1514 (trade name) manufactured by Dainippon Ink and Chemicals, hydrogenated bisphenol A type epoxy compound such as Epototo ST-3000 (trade name) manufactured by Tohto Kasei Co., oiled shell Examples thereof include bis A novolac type epoxy compounds such as Epicoat E157S (trade name) manufactured by the company.

Further, specific examples of the epoxy compound (group C) having a high reactivity are Epicoat 604 manufactured by Yuka Shell Co., Ltd. and Epototo YH-43 manufactured by Tohto Kasei Co., Ltd.
4. Ciba Geigy Araldide MY720, Sumitomo Chemical Co., Ltd. Sumi-epoxy ELM-120 (all are trade names) glycidyl amine type epoxy compounds, Yuka Shell Co. Epicoat YL-931, Ciba Geigy Araldide 163 etc. Tetraphenylol ethane type epoxy compounds (all are trade names) or Ciba Geigy Araldide PT810, Nissan Kagaku T
Heterocyclic epoxy compounds such as EPIC (all are trade names), hydantoin type epoxy compounds such as Arubalide CY350 (trade name) manufactured by Ciba Geigy, Celoxide 2021, manufactured by Daicel Chemical Industries, Araldide CY175, CY179 manufactured by Ciba Geigy (all are available) Product name)
Alicyclic epoxy compounds and the like.

The content of the epoxy compounds of groups A, B and C in the alkali developing resist ink is
When only the group A is contained, it is preferably 20 to 220 parts by weight with respect to 100 parts by weight of the solid content of the carboxylic acid-added acrylate compound. A based on 100 parts by weight of the solid content of the acid-added acrylate compound
Is preferably 20 to 200 parts by weight and B is 1 to 80 parts by weight, and when groups A and C are contained, the solid content of the carboxylic acid addition acrylate compound is 1
A is 20 to 200 parts by weight and C is 1 to 100 parts by weight.
The amount is preferably 80 parts by weight, and when groups A, B and C are contained, A is 2 per 100 parts by weight of the solid content of the carboxylic acid-added acrylate compound.
0-200 parts by weight, B is 1-70 parts by weight, C is 1-70 parts by weight
It is preferable to use parts by weight.

Further, the epoxy compound of group A must account for 30% by weight or more, and preferably 50% by weight, of the total weight of the epoxy compounds in various combinations as described above.

The content of the epoxy compound of Group A is 100% of the solid content of the carboxylic acid-added acrylate compound.
When it is less than 20 parts by weight with respect to parts by weight, or less than 30% by weight of the total weight of the entire epoxy compound, the amount of the uncured epoxy compound after the first heat treatment is small,
Even if the surface is roughened, the amount of the uncured epoxy compound on the surface to be removed is small, it is difficult to make the surface of the insulating layer a good roughened surface, and it is difficult to form a plating anchor.

If the content of the epoxy compound of the group A is more than 220 parts by weight based on 100 parts by weight of the solid content of the carboxylic acid-added acrylate compound, alkali development becomes difficult, which is not preferable.

The alkali-developable resist ink used in the present invention may contain known and commonly used photopolymerization initiators and photopolymerizable monomers, and if necessary, known and commonly used fillers, color pigments and defoaming agents. You may also contain a leveling agent, an organic solvent, and an epoxy hardening agent.

Further, as a method for forming an insulating layer with the above-mentioned alkali-developable resist ink, a known and commonly used method such as a screen printing method, a spray method or a curtain coating method can be used.

According to the insulating layer formed of the alkali-developable resist ink, an epoxy compound having slow reactivity, that is, slow curing in the first heat treatment remains in an uncured state, and the insulating layer is in a semi-cured state. Becomes By removing the uncured epoxy compound on this surface, an uneven surface is formed, the surface of the insulating layer becomes a roughened surface, and a plating anchor is formed on the surface of the insulating layer. Therefore, when the plating layer is formed on this, the adhesion strength between the insulating layer and the plating layer is improved. After plating, if you perform the second heat treatment,
The remaining uncured epoxy compound is completely cured, and the adhesion strength between the insulating layer and the plating layer, that is, the wiring layer is further improved.

If at least one of a fast-reactive epoxy compound and a moderately-reactive epoxy compound is contained in addition to the epoxy compound slow-reactive with the carboxylic acid-added acrylate compound, the first heating is performed. When the insulating layer is semi-cured by the treatment, it is possible to create a relatively hardened portion and a non-hardened portion in a short time due to the difference in reactivity of the epoxy compound, and the plating anchor can be used for a short time. Is formed.

Insulating layer I described above₁And I₃Exposure sensitivity of
75-500 mJ / cm²Exposure at
It is desirable to be able to form a package. Ie, for example
Blind hole 8 is formed by exposure through a photo tool.
When forming, the exposure dose is 1000 mJ / cm²The following is desired
Yes. 1000 mJ / cm²If the exposure dose exceeds
It is not preferable from the viewpoint of deterioration. By the way, the insulating layer I
₁And I₃The amount of light reaching₂And I_FourTable of
Insulation layer I compared to surface₂, I_FourWith a film thickness of 25 μm
Since it is about 60%, the insulating layer I₁And I₃smell
And the exposure amount required to form the blind hole 8 is 500 mJ
/ Cm²Exceeds the insulation layer I₂, I_FourAbove,
1000 mJ / cm ²Needing more exposure than
Is not desirable.

If blind holes can be formed with an exposure dose of less than 75 mJ / cm ² , there is a risk of photo-curing with light other than the exposure device, which is not preferable because it is difficult to handle.

When forming the insulator 6 and the insulator 9,
When a structure having only one resin layer having excellent insulation properties, copper foil adhesion and heat resistance is formed, good roughening properties cannot be obtained and desired roughness cannot be obtained, which is not preferable. Even when it is formed with a resin layer single-layer structure having excellent roughening characteristics, good insulating characteristics, copper foil adhesion, and heat resistance cannot be obtained, which is not preferable. Furthermore, even when the resin layer is formed with a single-layer structure having excellent insulating properties, copper foil adhesion, heat resistance, and roughening properties, pinholes are highly likely to occur, which is a viewpoint of ensuring insulating properties. Is not preferable.

When manufacturing the multilayer printed wiring board 18, the existing printed wiring board equipment is sufficient as the manufacturing equipment.
No special equipment is required. Also, no special material is required. Therefore, the multilayer printed wiring board can be manufactured by using the equipment and materials of which reliability is established, and thus the reliability of the obtained multilayer printed wiring board 18 is high.

Next, specific examples will be shown. Example 1 (1) According to the manufacturing process shown in FIGS. 1 and 2, a multilayer printed wiring board was formed. In this case, the double-sided substrate used as the inner core material 2 is TLC-W- manufactured by Toshiba Chemical Co.
551 (trade name), thickness d ₁ = 0.2 mm, copper foil thickness d
₂ = 35 μm and copper foil thickness d ₃ = 35 μm were used.

(2) The first and second wiring layers 3 and 4 to be the lower layer conductor circuit 5 were formed on the copper foil of the double-sided board. That is, the surfaces of both copper foils were subjected to buffing and scrubbing, and a dry film (Sanford AQ5044 (trade name) manufactured by Asahi Kasei Kogyo Co., Ltd.) was attached to the entire surfaces of both copper foils. Next, it is exposed through a pattern film (Oak Co., exposure unit HMW-551D (trade name)), developed with 3% sodium carbonate at 30 ° C. for 60 seconds, and etched with a ferric chloride solution to give 3 The dry film was peeled off with% caustic soda to form the first and second wiring layers 3 and 4 to be the lower layer conductor circuit 5.

(3) Next, the first and second wiring layers 3 and
The copper foil surface of No. 4 and No. 4 is prepared by buffing and scrubbing.
The first and second insulating layers I on the upper surface including the first wiring layer 3.₁Over
And I ₂Was formed. That is, liquid photoresist (thick
YOKO INK MFG., BT-A1 (trade name) on one side
Apply by screen printing method, 8 in a box oven
The first insulating layer I was dried by heating at 0 ° C. for 10 minutes.₁Shape
Liquid photoresist (Taiyo Ink Manufacturing Company)
Manufactured by BT-90 (trade name) by screen printing
Cloth and heat dry in a box oven at 80 ℃ for 25 minutes
Conducting second insulating layer I₂Was formed. The screen
The printing device for printing is LS-50 manufactured by New Long Industrial Co., Ltd.
(Product name), screen version is Tetoron mesh 100,
The emulsion thickness was 20 μm, and after curing
First and second insulating layer I₁And I₂Has a total thickness of 48 μm
Met.

(4) Next, as shown in FIG. 1C, blind holes 8 were formed. That is, in order to form the blind hole 8 having a diameter of 0.1 to 0.3 mm at the blind via hole forming position, the photomask film is closely attached,
Exposure (exposure machine HMW-551D (trade name) manufactured by Oak Co., exposure amount 500 mJ / cm ² ) was performed with 3% sodium carbonate at 30 ° C. for 180 seconds to form blind holes 8.

(5) Subsequently, also on the opposite surface, the first and second insulating layers I ₃ and I ₄ are formed and the blind hole 8 is formed in the same manner as in the steps (3) and (4). did.

(6) Next, in a box oven, 150
Post-cure was performed at 30 ° C. for 30 minutes.

(7) Next, as shown in FIG. 2E, through hole holes 11 were formed. This through hole 11 is
NC drill machine (Hitachi Seiko, H-MAPK90)
J (trade name)) was fitted with a drill having a diameter of 0.25 mm.

(8) Next, the resin insulating layer I ₂ formed in the above steps (3) and (5) by a conditioner cleaner (Electrobright MLB Desmi Initiator DI-464 (trade name) manufactured by Uemura Kogyo Co., Ltd.) , I ₄ are swollen and roughened with potassium permanganate to improve the adhesion between the resin insulation layers I ₂ , I ₄ and the plating layer by the anchor effect, and subsequently, the panel plating process After electrolytic copper plating, electroplating was performed to form blind via holes 19 and through holes 20.

(9) Next, the resin insulation layer and the plating layer 13
In order to improve adhesion with
Minutes in a box oven.

(10) Next, the step (2) is repeated on the plating layers 13 on both sides to form the wiring layers 15 and 16 having a predetermined pattern to become the outer layer conductor circuits 14, and the four wiring layers 3 and 4 are formed. , 15 and 16 were produced.

[Embodiment 2] Wiring layers 3 and 15 (wiring layers 4 and 1) of a multilayer printed wiring board manufactured as in Embodiment 1
The withstand voltage between 6) was measured by changing the film thicknesses d ₄ and d ₆ of the insulating layers I ₁ and I ₃ . The film thickness d of the insulating layers I ₂ and I _4
5 and d ₇ were each 25 μm. As for the interlayer withstand voltage, when a voltage of 500 (V) is applied, mechanical damage,
○ If there is no abnormality such as flashover or dielectric breakdown
The other symbols are marked with x. Table 1 shows the results.

[0067]

[Table 1]

As described above, the thicknesses d ₄ and d ₆ of the insulating layers I ₁ and I ₃ were preferably 10 μm or more. It was also found that it is not preferable to manufacture this multilayer printed wiring board with the film thicknesses d ₄ and d ₆ of 0 μm, that is, the insulating layers I ₂ and I ₄ alone.

[Embodiment 3] The peel strength of the multilayer printed wiring board manufactured as in Embodiment 1 is controlled by the insulating layers I ₂ and I _4.
The film thickness was measured by changing the film thicknesses d ₅ and d ₇ . The peel strength was measured by the method of JIS-C-6581. Also,
At this time, the film thicknesses d ₄ and d ₆ of the insulating layers I ₁ and I ₃ are both 2
It was 5 μm. The results are shown in Table 2.

[0070]

[Table 2]

From the results shown in Table 2, it was found that the film thicknesses d ₅ and d ₇ of the insulating layers I ₂ and I ₄ were preferably ₅ μm or more.
Further, the film thicknesses I ₂ and I ₄ are 0 μm, that is, the insulating layers I ₁ and I ₄ are
It was also found that it is not preferable to manufacture this multilayer printed wiring board only with ₃ .

[Example 4] The photosensitivity of the insulating layers used in the multilayer printed wiring board manufactured as in Example 1 was evaluated by measuring the film thicknesses of the insulating layers I ₂ , I ₄ and I ₁ , I ₃ . d
_5, d ₇ and d _4, were carried out by varying the d _6. The case where the desired blind hole 8 was formed was taken as photosensitive, and the case where the blind hole 8 was not formed was taken as not photosensitive. The results are shown in Tables 3 and 4.

[0073]

[Table 3]

[0074]

[Table 4]

From the results of Tables 3 and 4, the insulating layers I ₂ and I ₄
It was found that the film thicknesses d ₅ and d ₇ are 50 μm or less, and the film thicknesses d ₄ and d ₆ of the insulating layers I ₁ and I ₃ are 100 μm or less.

According to the above-mentioned multilayer printed wiring board 18 according to the present invention, the insulators 6 and 9 for insulating between the lower conductor circuits, that is, the wiring layers 3 and 4 and the upper conductor circuits, that is, the wiring layers 15 and 16. However, 2 due to the photoresist with different characteristics
It is formed of an insulating layer having a layered structure. That is, the first insulating layer I ₁ ,
Since I ₃ has excellent insulation properties, copper foil adhesion, and heat resistance, insulation properties between the lower layer conductor circuit 5 and the upper layer conductor circuit 14 are excellent, and sufficient adhesion strength with the lower layer conductor circuit can be obtained. . Further, since the second insulating layers I ₂ and I ₄ have excellent roughening characteristics and excellent adhesion to the plating layer, the adhesion strength with the upper conductor circuit 14 is improved. Therefore, it is possible to obtain a highly reliable multilayer printed wiring board without pattern loss and peeling of parts.

In addition, since the build-up method is used for manufacturing the multilayer printed wiring board 18, there is no need for a lamination pressing step, so that the multilayer printed wiring board 18 can be easily manufactured and the production facility can be reduced. . Further, since the blind hole can be formed without using a drill, the productivity can be greatly improved and the cost can be reduced. In addition, since the plating process is performed only once, the cost can be reduced, and the outermost plating layer is 1 layer.
Since the layer can be made thin, it is possible to cope with a fine pitch.

The multilayer printed wiring board and the method for manufacturing the same according to the present invention are provided with the four wiring layers 3, 4, 15 and 16 of the above example.
The present invention can be applied not only to a multi-layered printed wiring board having a multi-layered printed wiring board, but also to a higher multi-layered printed wiring board having two layers, six layers, eight layers, or more wiring layers.

In the above example, the insulators 5 and 9 are formed of the first and second insulating layers I ₁ , I ₃ and I ₂ , I ₄ , but at least two layers of the first and second insulating layers are formed. If you have it,
In addition, it is possible to form the insulators 5 and 9 with three or more layers including at least one of another insulating layer, the first insulating layer, and the second insulating layer.

[0080]

According to the multilayer printed wiring board of the present invention, it has at least two wiring layers electrically insulated by an insulator, and each wiring layer is electrically connected by a blind via hole. In the multilayer printed wiring board having the above structure, the insulating body has an excellent insulating property by using an insulating layer having a two-layer structure having different characteristics, and sufficient adhesion strength with the lower layer conductor circuit and the upper layer conductor circuit is obtained. can get. Therefore, it is possible to provide a highly reliable multilayer printed wiring board by eliminating pattern defects and peeling of parts.

According to the present invention, in the multilayer printed wiring board as described above, the first insulating layer is formed of photoresist,
By forming the second insulating layer with a photoresist having a roughening property, it is possible to form an insulator having a two-layer structure having the above-mentioned characteristics and improve the reliability of the multilayer printed wiring board.

According to the manufacturing method of the present invention, it is possible to easily manufacture the above-mentioned highly reliable multilayer printed wiring board without pattern defects or peeling of parts, and it is possible to reduce the production equipment. In addition, the productivity can be greatly improved and the cost can be reduced. Further, it is possible to cope with a fine pitch of the wiring layer.

[Brief description of drawings]

FIG. 1A is a manufacturing process diagram of a multilayer printed wiring board according to the present invention. B is a manufacturing process diagram of the multilayer printed wiring board according to the present invention. FIG. C is a manufacturing process diagram of the multilayer printed wiring board according to the present invention. D is a manufacturing process diagram of a multilayer printed wiring board according to the present invention.

FIG. 2E is a manufacturing process diagram of a multilayer printed wiring board according to the present invention. F is a manufacturing process diagram of the multilayer printed wiring board according to the present invention. G is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Insulating layer 2 Inner layer core material 3,4 Wiring layer 5 Lower layer conductor circuit I ₁ , I ₂ , I ₃ , I ₄ Insulating layer 6, 9 Insulator 8 Blind hole 11 Through hole hole 13 Plating layer 14 Upper layer part Conductor circuit 15,16 Wiring layer 18 Multilayer printed wiring board 19 Blind via hole 20 Through hole

Claims (4)

[Claims] 1. A lower-layer conductor circuit formed on the upper surface of a lower-layer insulator and an upper-layer conductor circuit formed on the upper surface of an upper-layer insulator are electrically connected through a connection hole provided in the upper-layer insulator. In a connected multilayer printed wiring board, the first insulating layer, in which the upper layer insulator has excellent insulating properties and adhesion to the lower layer conductor circuit, and the first insulating layer having excellent adhesion to the upper layer conductor circuit, A multilayer printed wiring board formed by having at least two layers of two insulating layers. 2. The multilayer print according to claim 1, wherein the first insulating layer is formed of a photoresist, and the second insulating layer is formed of a roughening photoresist. Wiring board. 3. A step of forming a lower-layer conductor circuit on the upper surface of the lower-layer insulator, and a first insulating layer which covers the lower-layer conductor circuit and has excellent insulation properties and adhesion to the lower-layer conductor circuit. A step of forming an upper layer insulator having a two-layer structure composed of a second insulating layer having excellent adhesion to the upper layer conductor circuit; and a connecting portion of the lower layer conductor circuit on the second and first insulating layers. And a step of forming an upper-layer conductor circuit connected to the lower-layer conductor circuit through the connection hole on the upper surface of the upper-layer insulator. Manufacturing method of printed wiring board. 4. The multilayer printed wiring board according to claim 3, wherein the first insulating layer is formed of a photoresist, and the second insulating layer is formed of a roughening photoresist. Manufacturing method.