JPH06267988A - Method of manufacturing semiconductor circuit - Google Patents

Abstract

PURPOSE:To make it possible to form two kinds of TFTs, namely a TFT for high shifting and a TFT for low leak current, with minimum processes by forming an amorphous silicon film and an material having a catalyst element in close contact with it and by selectively irradiating the amorphous silicon region with a laser, etc. CONSTITUTION:At first, a ground film 11 of oxide silicon on a substrate 10 by sputtering to deposit a genuine amorphous silicon film 12 by a low-pressure CVD method. A nickel silicide 13 is continuously formed. Then, a laser beam is selectively applied to crystallize that region. Then, the film is annealed under a specific condition in a deoxidation gas to crystallize the region which is not irradiated with the laser. As a result, two kinds of crystalline silicon 12a, 12b are obtained. The region 12a has a high electric field mobility by the laser crystallization process. On the other hand, the region 12b which is crystallized with the thermal annealing leaks less current.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a thin film transistor (T
The present invention relates to a semiconductor circuit having a plurality of FTs) and a manufacturing method thereof. The thin film transistor manufactured by the present invention is formed on either an insulating substrate such as glass or a semiconductor substrate such as single crystal silicon. In particular, the present invention relates to a semiconductor circuit having a low-speed operation matrix circuit and a high-speed operation peripheral circuit for driving the same, such as a monolithic active matrix circuit (used for a liquid crystal display or the like).

[0002]

2. Description of the Related Art Recently, research has been conducted on an insulating gate type semiconductor device having a thin film active layer (also called an active region) on an insulating substrate. In particular, thin-film insulating gate transistors, so-called thin film transistors (TFTs), have been eagerly studied. These are intended to be used for controlling each pixel in a display device such as a liquid crystal having a matrix structure formed on a transparent insulating substrate and for a driving circuit. Amorphous silicon TFTs and crystalline silicon TFTs are distinguished by the crystalline state.

Generally, the electric field mobility of a semiconductor in an amorphous state is small, and therefore TF which requires high speed operation.
Not available for T. Therefore, recently, research and development of crystalline silicon TFTs have been advanced in order to manufacture higher performance circuits.

A crystalline semiconductor has a larger electric field mobility than an amorphous semiconductor, and therefore can operate at high speed. With crystalline silicon, not only an NMOS TFT but also a PMOS TFT can be obtained, so that a CMOS circuit can be formed. For example, in an active matrix type liquid crystal display device, not only an active matrix portion but also Peripheral circuit (driver etc.) is also C
There is known one having a so-called monolithic structure, which is constituted by a MOS crystalline TFT.

[0005]

FIG. 3 shows a block diagram of a monolithic active matrix circuit used in a liquid crystal display. A column decoder 1 and a row decoder 2 are provided as a peripheral driver circuit on the substrate 7, and a pixel circuit 4 including a transistor and a capacitor is formed in the matrix region 3, and a wiring 5 is provided between the matrix region and the peripheral circuit. , 6 are connected. The TFT used in the peripheral circuit is required to operate at high speed, and the TFT used in the pixel circuit is required to have a low leak current. Although those characteristics are physically contradictory, it was required to form them on the same substrate at the same time.

However, T produced by the same process
All FTs show similar characteristics. For example, to obtain crystalline silicon, laser crystallization (laser annealing)
However, in the case of silicon crystallized by laser crystallization, T of the matrix region is used.
The FT and the TFT in the peripheral drive circuit area have similar characteristics. Therefore, it is conceivable to adopt thermal crystallization for the matrix region and laser crystallization for the peripheral drive circuit region. For thermal crystallization, annealing at 600 ° C. for a long time of 24 hours or more is performed. Or, annealing at a high temperature of 1000 ° C. or higher was necessary. The former lowers the throughput, while the latter limits the substrate to quartz.

The present invention is intended to provide a solution to such a difficult problem, but it is not desirable that the process is complicated and the yield is reduced and the cost is increased. The object of the present invention is to easily produce two types of TFTs, one that requires high mobility and the other that requires low leakage current, by maintaining minimum productivity while maintaining mass productivity. To divide.

[0008]

As a result of the research conducted by the present inventor,
It has been revealed that the addition of a trace amount of a catalyst material to the substantially amorphous silicon coating can promote crystallization, lower the crystallization temperature, and shorten the crystallization time. Suitable catalyst materials are simple substances of nickel (Ni), iron (Fe), cobalt (Co), platinum (Pt), or compounds thereof such as silicides. Specifically, a film, particles, clusters or the like having these catalytic elements are formed in close contact with each other under or on the amorphous silicon film, or these catalytic elements are formed in the amorphous silicon film by a method such as an ion implantation method. Can be crystallized by introducing thermal annealing at a suitable temperature, typically below 580 ° C. and for a short time within 8 hours.

Further, when an amorphous silicon film is formed by a chemical vapor deposition method (CVD method), it is formed in a source gas, and when an amorphous silicon film is formed by a physical vapor phase method such as sputtering. These catalyst materials may be added to the film forming material such as the target and the vapor deposition source. As a matter of course, the higher the annealing temperature, the shorter the crystallization time. In addition, the higher the concentration of nickel, iron, cobalt, and platinum, the lower the crystallization temperature and the shorter the crystallization time. According to the research of the present inventors, the concentration of at least one of these elements must be 10 ¹⁷ cm ⁻³ or higher, preferably 5 × 10 ¹⁸ cm ⁻³ or higher in order to promote crystallization. I found out.

Since all of the above-mentioned catalyst materials are not preferable for silicon, it is desirable that their concentration be as low as possible. In the study of the present inventors, it is desired that the total concentration of these catalyst materials does not exceed 1 × 10 ²⁰ cm ⁻³ . In particular, it is desired that it does not exceed 1 × 10 ²⁰ cm ⁻³ locally (for example, grain boundary).

According to the present invention, a TFT (active matrix driver T having a high operating speed by laser crystallization) is used.
FT etc.) is selectively formed, while other characteristics of the crystallization by the catalyst material are used, other TFTs having a relatively low speed (such as a low leak TFT of a pixel circuit of an active matrix circuit) are kept at a low temperature. It is characterized by being used for crystallization in a short time. As a result, a circuit having contradictory transistors of low leakage current and high speed operation can be simultaneously formed on the same substrate. Hereinafter, the present invention will be described in more detail with reference to examples.

[0012]

【Example】

[Embodiment 1] This embodiment relates to a semiconductor circuit having an active matrix on one glass substrate as shown in FIG. 3 and a driving circuit around the active matrix. FIG. 1 shows a cross-sectional view of the manufacturing process of this embodiment. First, a 2000 Å-thick silicon oxide base film 11 was formed on a substrate (Corning 7059) 10 by a sputtering method. Furthermore, by the low pressure CVD method, a thickness of 500 to 1500Å,
For example, an intrinsic (I-type) amorphous silicon film 12 of 1500 Å was deposited. Continuously, by a sputtering method, a nickel silicide film having a thickness of 5 to 200 Å, for example, 20 Å (chemical formula NiSi _x , 0.4 ≦ x ≦ 2.5, for example,
x = 2.0) 13 was formed. (Fig. 1 (A))

Next, laser light was selectively irradiated to crystallize the region. KrF as a laser
Excimer laser (wavelength 248 nm, pulse width 20 n
sec) was used, but other lasers such as Xe
An F excimer laser (wavelength 353 nm), a XeCl excimer laser (wavelength 308 nm), an ArF excimer laser (wavelength 193 nm), or the like may be used. Laser energy density is 200-500 mJ / c
m ² , for example, 350 mJ / cm ² and 2 per location
Irradiation was performed for 10 shots, for example, 2 shots. During the laser irradiation, the substrate was heated to 200 to 450 ° C, for example 300 ° C.

As is apparent from FIG. 3, since there is a considerable distance between the region to be laser-crystallized (peripheral circuit region) and the region sufficient for thermal crystallization (matrix region), a photolithography process is particularly required. There wasn't.

Next, this is heated at 500 ° C. in a reducing atmosphere for 4 hours.
It was annealed for a period of time to crystallize the region (active matrix pixel circuit) which was not irradiated with laser. As a result, two types of crystalline silicon regions 12a and 12b were obtained. The region 12a has a high electric field mobility by the laser crystallization process, while the region 12b crystallized by thermal annealing.
Had a characteristic of low leakage current. (Fig. 1
(B))

The silicon film thus obtained was patterned by photolithography to form island-shaped silicon regions 14a (peripheral drive circuit regions) and 14b (matrix region). Further, a silicon oxide film 15 having a thickness of 1000 Å was deposited as a gate insulating film by the sputtering method. For sputtering, silicon oxide was used as a target, and the substrate temperature during sputtering was 2
00-400 ° C., for example 350 ° C., the sputtering atmosphere is oxygen and argon, argon / oxygen = 0-0.5,
For example, 0.1 or less. Subsequently, a thickness of 6000 to 8000 Å, for example, 6000 Å by the low pressure CVD method.
Of silicon film (containing 0.1 to 2% phosphorus) was deposited.
It is desirable that the steps of forming the silicon oxide and the silicon film are continuously performed. Then, the silicon film was patterned to form the gate electrodes 16a, 16b, 16c. (Fig. 1 (C))

Next, impurities (phosphorus and boron) were implanted into the silicon region by plasma doping using the gate electrode as a mask. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used as the doping gas,
In the former case, the acceleration voltage is 60 to 90 kV, for example 80
kV, in the latter case 40-80 kV, for example 65 kV
And The dose amount was 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, phosphorus was 2 × 10 ¹⁵ cm ⁻² and boron was 5 × 10 ¹⁵ . As a result, N-type impurity regions 17a and P-type impurity regions 17b and 17c are formed.

After that, the impurities were activated by laser annealing. As the laser, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but other lasers, for example, XeF excimer laser (wavelength 353 nm), XeCl excimer laser (wavelength 308 nm), ArF excimer laser (wavelength 193 nm) and the like are used. You may use. The energy density of the laser is 200 to 400 mJ / cm ² , for example, 2
The irradiation was performed at 50 mJ / cm ^2, and ² to 10 shots, for example, 2 shots were irradiated at one place. The substrate may be heated to 200 to 450 ° C. during laser irradiation. Instead of irradiating with a laser, you may anneal at 450-500 degreeC for 2-8 hours. In this way, the impurity regions 17a to 17c are activated. (Fig. 1 (D))

Then, a silicon oxide film 18 having a thickness of 6000Å is formed.
Is formed by plasma CVD as an interlayer insulator,
Further, the thickness is 500 to 100 by the sputtering method.
0Å, eg 800Å indium tin oxide film (ITO)
Was formed, and this was patterned to form a pixel electrode 19. Next, form a contact hole in the interlayer insulator,
Electrodes / wirings 20a, 20 of the peripheral drive circuit TFT are made of a metal material, for example, a multilayer film of titanium nitride and aluminum.
b, 20c, electrode / wiring 2 of the matrix pixel circuit TFT
0d and 20e were formed. Finally, annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm. The semiconductor circuit is completed through the above steps. (FIG. 1 (E)) When the concentration of nickel in the active region of the obtained TFT was measured by the secondary ion mass spectrometry (SIMS) method,
1 × 10 ^{18 to} 5 × for both peripheral drive circuit and pixel circuit
10 ¹⁸ cm ^-3 of nickel was observed.

[Embodiment 2] FIG. 2 shows a cross-sectional view of a manufacturing process of this embodiment. A 2000 Å-thick silicon oxide film 22 was formed on a substrate (Corning 7059) 21 by a sputtering method. Next, by the low pressure CVD method,
An amorphous silicon film 23 having a thickness of 200 to 1500Å, for example 500Å, was deposited. Then, nickel ions are implanted by an ion implantation method to form a region 24 in which the surface of the amorphous silicon contains 1 × 10 ¹⁸ to 2 × 10 ¹⁹ cm ⁻³ of nickel, for example, 5 × 10 ¹⁸ cm ^−3. did. The depth of this region 24 was 200 to 500 Å, and the optimum acceleration energy was selected accordingly. (Fig. 2 (A))

Next, the amorphous silicon film was selectively irradiated with laser light to crystallize the region. A KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used as the laser. The energy density of the laser is 200 to 500 mJ / cm ² ,
For example, 350 mJ / cm ² and ² to 10 per location
Shot, for example, 2 shots were irradiated. During the laser irradiation, the substrate was heated to 200 to 450 ° C, for example 400 ° C. Further, it was annealed at 500 ° C. for 4 hours in a reducing atmosphere to crystallize the amorphous silicon film in the region not irradiated with the laser. By this crystallization process, 2
A kind of crystalline silicon 23a, 23b was obtained. (Fig. 2
(B))

Thereafter, this silicon film was patterned to form island-shaped silicon regions 26a (peripheral drive circuit region) and 26b (matrix pixel circuit region). Furthermore, tetra-ethoxy-silane (Si (OC
₂ H ₅ ) ₄ , TEOS) and oxygen are used as raw materials to form a gate insulating film of a TFT by a plasma CVD method.
000Å silicon oxide 27 was formed. As the raw material, trichlorethylene (C ₂ HCl ₃ ) was used in addition to the above gas. Before film formation, 400 SCCM of oxygen is flown into the chamber, the substrate temperature is 300 ° C., the total pressure is 5 Pa, and the RF power is 150.
Plasma was generated with W and kept in this state for 10 minutes. Then, add 300 SCCM oxygen and 1 TEOS to the chamber.
A silicon oxide film was formed by introducing 5 SCCM and 2 SCCM of trichlorethylene. The substrate temperature, RF power, and total pressure were 300 ° C., 75 W, and 5 Pa, respectively. After the film formation was completed, 100 Torr of hydrogen was introduced into the chamber, and hydrogen annealing was performed at 350 ° C. for 35 minutes.

Subsequently, by the sputtering method,
An aluminum film (containing 2% of silicon) having a thickness of 6000 to 8000Å, for example, 6000Å was deposited. Instead of aluminum, tantalum, tungsten, titanium, molybdenum may be used. It should be noted that it is desirable that the steps of forming the silicon oxide 27 and the aluminum film be continuously performed.
Then, the aluminum film was patterned to form the gate electrodes 28a, 28b, 28c of the TFT. Further, the surface of this aluminum wiring was anodized to form oxide layers 29a, 29b and 29c on the surface. Anodization was performed in a 1-5% ethylene glycol solution of tartaric acid. The thickness of the obtained oxide layer was 2000Å. (Fig. 2 (C))

Next, impurities (phosphorus) were implanted into the silicon region by the plasma doping method. Phosphine (PH ₃ ) was used as the doping gas, and the acceleration voltage was 6
It was set to 0 to 90 kV, for example, 80 kV. 1x dose
10 ¹⁵ to 8 × 10 ¹⁵ cm ^-2 , for example, 2 × 10 ¹⁵ cm ^-2
And Thus, the N-type impurity region 30a was formed. Furthermore, this time the left TFT (N-channel type TF
T) is masked with a photoresist, and the peripheral circuit region TFT (P channel T
Impurities (boron) were implanted into the silicon regions of the FT) and the matrix region TFT. Diborane (B ₂ H ₆ ) was used as a doping gas, and the acceleration voltage was 50 to 80 k.
V, for example, 65 kV. The dose amount is 1 × 10 ¹⁵ to 8
× 10 ¹⁵ cm ^-2 , eg 5 more than the previously implanted phosphorus
It was set to × 10 ¹⁵ cm ^-2 . Thus, P type impurity regions 30b and 30c were formed.

After that, the impurities were activated by the laser annealing method. As a laser, a KrF excimer laser (wavelength 248 nm, pulse width 20 nse
c) was used. The energy density of the laser is 200-
400mJ / cm ^2, for example, with 250mJ / cm ^2,
Irradiation was performed for 2 to 10 shots, for example, 2 shots, at one location. (Fig. 2 (D))

Subsequently, as an interlayer insulator, the thickness is 2000 Å
CV using TEOS as a raw material for the silicon oxide film 31 of
It was formed by the D method, and further, an indium tin oxide film (ITO) having a thickness of 500 to 1000 Å, for example, 800 Å was deposited by the sputtering method. Then, this was etched to form the pixel electrode 32. Further, contact holes are formed in the interlayer insulator 31, and a source / drain electrode / wiring 3 of the peripheral driver circuit TFT is formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
3a, 33b, 33c and electrodes / wirings 33d, 33e of the pixel circuit TFT were formed. The semiconductor circuit is completed through the above steps. (Fig. 2 (E))

In the produced semiconductor circuit, the characteristics of the TFT in the peripheral driver circuit region were not inferior to those produced by the conventional laser crystallization. For example, the shift register manufactured according to this embodiment has a drain voltage of 15 V, 11 MHz, and 17 V, 16 M.
The operation of Hz was confirmed. Also, in the reliability test, no difference from the conventional one was found. Further, regarding the characteristics of the TFT (pixel circuit) in the matrix region, the leak current was 10 ⁻¹³ A or less.

[0028]

According to the present invention, a crystalline silicon TFT capable of high-speed operation and an amorphous silicon TFT featuring a low leak current can be formed on the same substrate. When this is applied to a liquid crystal display, mass productivity and characteristics can be improved.

The present invention can also improve the throughput by crystallization of silicon at a low temperature such as 500 ° C. and a short time of 4 hours. In addition, conventionally, when a process of 600 ° C. or higher is adopted, shrinkage or warpage of the glass substrate has been a problem as a cause of a decrease in yield, but by using the present invention, such a problem is solved at once. Was done.

Further, this means that a large area substrate can be processed at one time. That is, by processing a large-area substrate, a large number of semiconductor circuits (matrix circuits, etc.) can be cut out from one substrate, and the unit price can be significantly reduced. Thus, the present invention is an industrially useful invention.

[Brief description of drawings]

1A to 1C are cross-sectional views of a manufacturing process of Example 1.

2A to 2C are cross-sectional views of a manufacturing process of Example 2.

FIG. 3 shows a configuration example of a monolithic active matrix circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Substrate 11 ... Base insulating film (silicon oxide) 12 ... Amorphous silicon film 13 ... Nickel silicide film 14 ... Island silicon region 15 ... Gate insulating film (silicon oxide) 16・ ・ ・ Gate electrode (phosphorus-doped silicon) 17 ・ ・ ・ Source / drain regions 18 ・ ・ ・ Interlayer insulator (silicon oxide) 19 ・ ・ ・ Pixel electrode (ITO) 20 ・ ・ ・ Metal wiring / electrode (nitriding) Titanium / aluminum)

Claims (5)

[Claims] 1. A first step of forming an amorphous silicon film and a substance having a catalytic element in close contact therewith, and crystallizing the amorphous silicon region by selectively irradiating a laser or intense light equivalent thereto. A method of manufacturing a semiconductor circuit, comprising: a second step; and a third step of annealing at a temperature lower than a normal crystallization temperature of amorphous silicon. 2. The method for manufacturing a semiconductor circuit according to claim 1, wherein the catalytic element is at least one of nickel, iron, cobalt, and platinum. 3. A first step of introducing a catalytic element into an amorphous silicon film, and a second step of crystallizing the amorphous silicon region by selectively irradiating a laser or intense light equivalent thereto with a laser. And a third step of annealing at a temperature lower than the crystallization temperature of the amorphous silicon. 4. In the first step of claim 3, the catalyst element concentration in the amorphous silicon has an average value of 1 × 1.
A method of manufacturing a semiconductor circuit, characterized in that it is 0 ¹⁶ cm ^-3 or more. 5. The method for manufacturing a semiconductor circuit according to claim 4, wherein the concentration of the catalytic element is defined by a value measured by secondary ion mass spectrometry.