JPH0526915A - Frequency determining device - Google Patents

Abstract

PURPOSE:To enable estimation of a sampling frequency of an input signal by a method wherein a DC voltage obtained by smoothing a phase error voltage by a low-pass filter is compared with a reference voltage. CONSTITUTION:A phase comparator 1, a low-pass filter 2 and a variable frequency oscillator 3 constitute a phase synchronizing circuit (PLL), and a clock generated by the oscillator 3 and a sampling frequency of an input signal are made proportional with each other by an operation of PLL. Three kinds of sampling frequencies of 32kHz, 44.1kHz and 48kHz are used generally and therefore it is judged which kind of frequency is used. When oscillation frequencies are denoted by f1, f2 and f3, they are in the relationship of f1<f2<f3, and when control voltages in the oscillator 3 are denoted by V1, V2 and V3, the relationship of V1<V2<V3 is obtained. An output of the low-pass filter 2 is connected onto the noninverted input sides of voltage comparators 5 and 6, reference voltage sources 7 and 8 are connected onto the inverted input sides respectively and, voltage values thereof being denoted by VR1 and VR2, the relationships of V1<VR1<V2 and V2<VR2<V3 are set. Then outputs 9 and 10 for the sampling frequency are obtained. The kind of the sampling frequency can be decided easily from values of the outputs.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency judging device, and more particularly to a device for receiving a digital audio interface signal established by the Japan Electronic Machinery Manufacturers Association Standard CP-340.

[0002]

2. Description of the Related Art First, a digital audio interface standard will be described before describing conventional techniques. FIG. 3 is a diagram showing a signal transmission format of a standardized digital audio interface. As shown in the figure, one sampling period consists of two subframes of L channel and R channel, and one subframe is composed of a 32-bit signal.
One bit is allocated per subframe for channel status.

A word is composed of data for 192 frames, and information such as the audio sample word length, the number of audio channels, the sampling frequency, and the presence or absence of copy inhibition is transmitted. Originally, the sampling frequency of the transmitted signal can be judged on the receiving side from the channel status information, but in the products manufactured before the establishment of this standard, the sampling frequency information may not be transmitted in the channel status information. Therefore, in this case, it is more reliable to measure the sampling period of the signal being received and obtain the sampling frequency.

FIG. 4 is a block circuit configuration diagram of a conventional frequency determining apparatus having a means for obtaining a sampling frequency by measuring the sampling period of the received signal as described above. In the figure, 1 is a phase. Comparator, 2 is a low-pass filter, 3 is a voltage-controlled variable frequency oscillator, 4 is a terminal to which a digital audio interface modulation signal (hereinafter referred to as input signal) is input, 11 is a frequency measuring circuit, 12
Is a reference clock source, and 13 is a frequency determination output terminal.

Next, the operation will be described. Phase comparator 1
Then, the input signal and the phase of the clock generated by the variable frequency oscillator 3 are compared, and the phase difference is output as an error voltage.
Actually, the input signal is different from the normal clock, and the cycle is constantly changing depending on the content of the data. Therefore, it is not possible to directly compare the phase with the clock generated by the variable frequency oscillator 3, so that the input signal is fixed. It is general to detect the synchronization signal included in each period and compare the repetition period of the synchronization signal with the phase of the clock of the variable frequency oscillator 3 that has been divided until it corresponds to the period.

The phase error voltage thus obtained is smoothed by the low pass filter 2 and given to the variable frequency oscillator 3 as a DC voltage. The variable frequency oscillator 3 generates a clock having a frequency according to a given DC voltage value, and when the clock of the variable frequency oscillator 3 is behind the input signal, the system frequency is increased so as to increase the oscillation frequency of the variable frequency oscillator 3. Is determined, the phase comparator 1, the low pass filter 2,
The variable frequency oscillator 3 constitutes a phase-locked loop (hereinafter referred to as PLL), and the clock generated by the variable frequency oscillator 3 is synchronized with the input signal and used for demodulating the input signal and processing data.

On the other hand, the cycle of the frame forming the input signal is the same as the sampling cycle, and the clock generated by the variable frequency oscillator 3 synchronized with the input signal in the PLL is proportional to the sampling frequency. Since it is a frequency, the sampling frequency of the input signal can be estimated by measuring the frequency of this clock.

As a means for measuring the frequency of the clock to be measured generated by the variable frequency oscillator 3, the reference clock 1 is usually used.
2 is used. FIG. 5 is a diagram showing the relationship between the clock to be measured and the reference clock 12 in the frequency measuring circuit 11 used as a frequency determining device during the frequency measurement. In the frequency measuring circuit 11, the repetition cycle of the clock to be measured is shown. The number of reference clocks 12 that enter is measured.

FIG. 6 is a block diagram of a frequency measuring circuit 11 used in a conventional frequency judging device. In the figure, 21 is an edge detecting circuit, 22 is a counter, 23 is a count number judging circuit, and 12 is a reference clock source. , 13 are frequency judgment output terminals.

The edge detection circuit 21 detects an edge of the clock to be measured generated in the variable frequency oscillator 3 and supplies a reset pulse to the counter 22. The reference clock source 12 is connected to the clock terminal of the counter 22, and the counting of the reference clock number is repeated from edge to edge of the clock to be measured. The count number determination circuit holds the count value just before the counter 22 is reset at the edge of the clock under measurement, estimates the frequency of the clock under measurement according to the size of the count number, and outputs the result to the terminal 13
Output to.

[0011]

Since the conventional frequency determination device is constructed as described above, a reference clock source is required for frequency measurement, and a large-scale circuit such as a counter is required. There was a problem.

The present invention has been made to solve the above problems, and an object of the present invention is to obtain a frequency determining device for a circuit having a relatively small scale, which does not require a reference clock.

[0013]

A frequency determination device according to the present invention comprises voltage comparison means for comparing a reference voltage with a control voltage for controlling a voltage controlled variable frequency oscillator, and one input of the voltage comparison means. Is connected to a reference voltage source and the other input is connected to the output of the low pass filter.

[0014]

The frequency determining device according to the present invention can estimate the sampling frequency of the input signal by comparing the DC voltage obtained by smoothing the phase error voltage with the low pass filter and the reference voltage.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block circuit configuration diagram of a frequency determination device according to an embodiment of the present invention. In the figure, 5 and 6 are voltage comparators, 7 and 8 are reference voltage sources that take voltage values of V _R1 and V _R2 , respectively. Reference numerals 9 and 10 denote the outputs of the voltage comparators 5 and 6, respectively, and the phase comparator 1, the low-pass filter 2 and the variable frequency oscillator 3 that constitute the PLL have the same configuration as the conventional one. One input of the voltage comparators 5 and 6 is connected to the output of the low pass filter 2, and the other input is connected to the reference voltage sources 7 and 8, respectively.

FIG. 2 is a diagram showing an example of the characteristic of the oscillation frequency with respect to the control voltage of the voltage controlled variable frequency oscillator 3.

Next, the operation of this embodiment will be described.
It is the same as the operation of the conventional example that the clock generated by the variable frequency oscillator 3 and the sampling frequency of the input signal have a proportional relationship due to the action of the PLL.

Sampling frequencies used in digital audio equipment are typically 32 kHz, 44.1 kHz, 48 kHz.
There are three types of kHz, and the sampling frequency of the input signal need only be determined.

Since the oscillation frequency of the clock generated by the variable frequency oscillator 3 is proportional to the sampling frequency of the input signal,
Sampling frequency of input signal is 32kHz, 44.1kHz
The oscillation frequencies at z and 48 kHz are f ₁ , f ₂ , and f ₃
Then, f ₁ = K × 32 kHz f ₂ = K × 44.1 kHz f ₃ = K × 48 kHz (K is a proportional constant), and as shown in FIG. 3, f ₁ <f ₂ <f ₃ If the control voltages of the variable frequency oscillator 3 at those times are V ₁ , V ₂ and V ₃ , then V ₁ <V ₂ <V ₃
Can be obtained.

Now, the output of the low-pass filter 2, that is, the control voltage for controlling the variable frequency oscillator 3 is connected to the non-inverting input sides of the voltage comparators 5 and 6, respectively, and the reference voltage is provided to the inverting input sides, respectively. When the voltage sources 7 and 8 are connected and the voltage values of the reference voltage sources 7 and 8 are V _R1 and V _R2 , the relations of V ₁ <V _R1 <V ₂ V ₂ <V _R2 <V ₃ are set. If so, the outputs 9 and 10 with respect to the sampling frequency of the input signal are the input signal sampling frequency output 9 and the output 10 32 kHz L L 44.1 kHz H L 48 kHz H H. With this output, the sampling frequency is 32 kHz.
Since it can be determined which of z, 44.1 kHz and 48 kHz, the sampling frequency of the digital audio interface modulation signal can be determined without using the reference clock source or the counter.

In the above embodiment, the case where the sampling frequency of the input signal is one of the three kinds of sampling frequencies normally used in audio equipment has been described, but it is normally used in another equipment. When there are two or four sampling frequencies, the same effect can be obtained by using one or three voltage comparators, respectively.

[0022]

As described above, according to the frequency determining apparatus of the present invention, the sampling frequency of the input signal is determined by comparing the control voltage for controlling the variable frequency oscillator and the reference voltage with the voltage comparator. Since the determination is made, the reference clock source and the counter are not required, and the size of the device can be reduced.

[Brief description of drawings]

FIG. 1 is a block circuit configuration diagram showing a block configuration of a frequency determination device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an example of control voltage vs. oscillation frequency characteristics of a voltage controlled variable frequency oscillator.

FIG. 3 is a diagram showing a format of a standardized digital audio interface.

FIG. 4 is a block circuit configuration diagram showing a block configuration of a conventional frequency determination device.

FIG. 5 is a diagram showing a relationship between a clock under measurement and a reference clock of a frequency measurement circuit used in a conventional frequency determination device.

FIG. 6 is a block circuit configuration diagram showing a block configuration of a frequency measurement circuit used in a conventional frequency determination device.

[Explanation of symbols]

 1 Phase Comparator 2 Low Pass Filter 3 Voltage Controlled Variable Frequency Oscillator 5 Voltage Comparator 6 Voltage Comparator 7 Reference Voltage Source 8 Reference Voltage Source

Claims (1)

Claim: What is claimed is: 1. A phase locked loop circuit comprising a phase comparator, a voltage controlled variable frequency oscillator, and a low-pass filter is provided, and a sampling frequency of a standardized digital audio interface modulation signal is obtained. A frequency determining device for determining includes at least one voltage comparing means for comparing a reference voltage with a control voltage for controlling a voltage controlled variable frequency oscillator, and a reference voltage source is connected to one input of the voltage comparing means. Then
A frequency determination device characterized in that the output of the low-pass filter is connected to the other input.