JPH03110887A - Wiring of remodeled wire - Google Patents

Wiring of remodeled wire

Info

Publication number
JPH03110887A
JPH03110887A JP24964389A JP24964389A JPH03110887A JP H03110887 A JPH03110887 A JP H03110887A JP 24964389 A JP24964389 A JP 24964389A JP 24964389 A JP24964389 A JP 24964389A JP H03110887 A JPH03110887 A JP H03110887A
Authority
JP
Japan
Prior art keywords
wire
input
connection
output terminals
modification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24964389A
Other languages
Japanese (ja)
Inventor
Kazuto Koizumi
和人 小泉
Yasuo Kawamura
河村 泰雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP24964389A priority Critical patent/JPH03110887A/en
Publication of JPH03110887A publication Critical patent/JPH03110887A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/225Correcting or repairing of printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306Lead-in-hole components, e.g. affixing or retention before soldering, spacing means

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To execute a wiring operation easily, to eliminate a movement completely, to execute a remodeling operation easily and to increase a bonding area of a connecting pad by a method wherein a wire is laid between input/ output terminals which are bonded to a connecting pad which must be remodeled. CONSTITUTION:A connecting pattern 11-3 which has been continued to connecting pads 11-1b whose circuit on a substrate 11 must be remodeled is cut; a wire 3 is connected between input/output terminals 2-2a of a pin grid array type semiconductor device LSi 2 bonded to the connecting pads 11-1b by using other input/output terminals 2-2b as guides; the LSi 2 is mounted on the substrate 11; thereby, the wire 3 for remodeling use is wired between the connecting pads 11-1b whose circuit must be remodeled. As a result, the wire 3 can be laid easily, its movement is eliminated and a remodeling operation can be executed easily. Since only the connecting pattern 11-3 to a Via 11-2 is formed at respective connecting pads 11-1 arranged at a fine pitch on a main face of the substrate 11, a bonding area of the individual connecting pads 11-1 can be made large and the LSi 2 can be mounted easily.

Description

【発明の詳細な説明】 〔概 要〕 ピングリットアレイ形半導体装置が実装される各種プリ
ント板のパターン改造用として布線される改造ワイヤの
配線方法に関し、 改造用ワイヤの布線が容易となるとともに布線されたワ
イヤの移動が皆無となり、且つ接続パッドの接合面積を
大きくすることができる新しい改造ワイヤの配線方法の
提供を目的とし、半導体装置の入出力端子と接合する接
続パッド群を主面に配設して、内部導体と導通するVi
aと各該接続パッドの間に接続パターンを形成したプリ
ント回路基板を備え、当該基板の回路改造を要するそれ
ぞれ接続パッドと接続した接続パターンを切断するとと
もに、当該接続パッドと接合する上記半導体装置の入出
力端子間に他の入出力端子をガイドにして改造用のワイ
ヤを張架し、当該ワイヤと該入出力端子を接合手段によ
り接続して、上記基板の該接続パッド群と該半導体装置
の該入出力端子とを結合する。
[Detailed Description of the Invention] [Summary] This invention relates to a wiring method for modification wires that are wired for modifying the patterns of various printed circuit boards on which pin-grit array type semiconductor devices are mounted, which facilitates the wiring of modification wires. With the aim of providing a new modified wire wiring method that eliminates the movement of wires and increases the bonding area of connection pads, we mainly use connection pads that connect to input/output terminals of semiconductor devices. Vi arranged on the surface and electrically connected to the internal conductor
a printed circuit board on which a connection pattern is formed between a and each of the connection pads, the connection pattern connected to each connection pad that requires circuit modification of the board is cut, and the semiconductor device is bonded to the connection pad. A wire for modification is stretched between the input and output terminals using other input and output terminals as a guide, and the wire and the input and output terminal are connected by a bonding means to connect the group of connection pads on the board and the semiconductor device. and the input/output terminal.

〔産業上の利用分野〕[Industrial application field]

本発明は、ピングリットアレイ形半導体装置を実装する
各種プリント回路基板のパターン改造用ワイヤの配線方
法に関する。
The present invention relates to a method for wiring wires for pattern modification of various printed circuit boards on which pin-grit array type semiconductor devices are mounted.

最近、特に各種電算機等のプリント板に実装されるピン
グリットアレイ形半導体装置(以下LSiと略称する)
はますます高集積化されて入出力端子が増加し、一方、
プリント回路基板(以下基板と略称する)には前記入出
力端子と接合する接続パッドが高密度に配設されている
。しかるに、基板に形成したパターン変更、ビア断線等
に対処する改造において、微細径の改造用ワイヤを微小
ピッチで配列された隣接する接続パッド間に布線してい
るので、そのワイヤがLSiの入出力端子と接合する接
続パッド上に移動し、当該電子部品の実装時に布線され
たワイヤが邪魔となって実装作業に熟練と多くの時間を
要するため、改造作業が容易となるとともに布線された
ワイヤの移動が皆無となる新しい改造ワイヤの配線方法
が要求されている。
Recently, pin-grit array type semiconductor devices (hereinafter abbreviated as LSi) have been especially mounted on printed boards of various computers, etc.
are becoming more and more highly integrated and the number of input/output terminals is increasing.
A printed circuit board (hereinafter abbreviated as the board) has connection pads that are densely arranged to connect with the input/output terminals. However, when modifying the pattern to change the pattern formed on the board or dealing with broken vias, etc., the modification wires with a small diameter are wired between adjacent connection pads arranged at a micro pitch, so the wires are not connected to the LSi input. Wires that are moved onto the connection pads that connect to the output terminals and are wired when mounting the electronic component become an obstacle and require skill and a lot of time to perform the mounting work. There is a need for a new modified wire wiring method that eliminates all wire movement.

〔従来の技術] 従来広(使用されている改造ワイヤの配線方法を第4図
の工程順平面図に示す。
[Prior Art] A method of wiring a modified wire that has been used in the past is shown in the step-by-step plan view of FIG.

(a)は、ポリウレタン樹脂被覆を存する微細な。(a) is a fine material coated with polyurethane resin.

例えば80μm径のワイヤ3を布線ルートの長さに切断
して画先端縁の前記被覆を剥離し、そのワイヤ3をLS
i実装用基板の布線ルート形状に成形した状態、 0:1)は、第5図に示す電子部品搭載面に上記LSi
の入出力端子と接合する接続パッド1−1を微小ピッチ
、例えば0.45mmで配列して、その接続パッド1−
1 と内部導体と導通したV i a 1−2とを改造
用パッド1−3を介して接続パターン1−4で接続した
上記基板1に対して、第4図(b)に示すように回路の
改造を要するそれぞれ接続パッド1−1bの接続パター
ン1−4を改造用パッド1−3とVial−2間で切断
した状態、 (C)は、(a)項で成形されたワイヤ3を図示してい
ないピンセットにより挟んで、その一端縁を上記基板1
の接続パターン1−4を切断した一方の改造用パッドI
−3に当接させ、図示していないワイヤボンディング装
置のチップにより押圧して加熱することにより、その改
造用パッド1−3表面に形成した半田膜をリフローして
接続し、他端側を同じくピンセットで挟んで他方の改造
用パッド1−3に半田付けすることにより、基板1の主
面に微小ピッチで配列した隣接する接続パッド1−1の
間にワイヤ3を布線した状態、 (d)は、基板1の接続パッド1−1にLSi2の入出
力端子2−2を当接させてR置し、図示していないリフ
ロー槽に挿入して接続パッド1−1の表面に形成した半
田膜をリフローすることにより、基板lの部品搭載面に
LSi2を実装した状態、で示す順序によりLSi2を
実装した基板1の主面に改造用ワイヤ3が配線されてい
る。
For example, a wire 3 with a diameter of 80 μm is cut to the length of the wiring route, the coating on the edge of the image is peeled off, and the wire 3 is
When the i-mounting board is shaped into the wiring route shape (0:1), the above LSi is placed on the electronic component mounting surface as shown in Figure 5.
The connection pads 1-1 to be connected to the input/output terminals of are arranged at a minute pitch, for example, 0.45 mm,
1 and V i a 1-2, which are electrically connected to the internal conductor, are connected by a connection pattern 1-4 via a modification pad 1-3, and a circuit is constructed as shown in FIG. 4(b). (C) shows the state in which the connection pattern 1-4 of each connection pad 1-1b, which requires modification, is cut between the modification pad 1-3 and Vial-2. It is pinched with tweezers (not shown), and one edge of it is placed on the substrate 1.
One modification pad I with connection pattern 1-4 cut off.
-3, and by pressing and heating with a chip of a wire bonding device (not shown), the solder film formed on the surface of the modification pad 1-3 is reflowed and connected, and the other end is connected in the same way. A state in which wires 3 are wired between adjacent connection pads 1-1 arranged at minute pitches on the main surface of the board 1 by sandwiching them with tweezers and soldering them to the other modification pad 1-3, (d ) is solder formed on the surface of the connection pad 1-1 by placing the input/output terminal 2-2 of the LSi2 in contact with the connection pad 1-1 of the board 1 and inserting it into a reflow tank (not shown). By reflowing the film, the modification wire 3 is wired to the main surface of the substrate 1 on which the LSi 2 is mounted in the order shown in the state in which the LSi 2 is mounted on the component mounting surface of the substrate 1.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

以上説明した従来の改造ワイヤ配線方法で問題となるの
は、布線ルートにフォーミングされた微細径のワイヤを
ピンセットで挟んでその両端をそれぞれ改造用パッドと
半田接合を行うことにより、そのワイヤが微小ピッチで
基板の主面に配列された隣接する接続パッド間に布線さ
れるから、ワイヤのホーミングは布線ルートに対して正
確な形状に成形する必要が生じるともに、LSiの実装
時に布線されたワイヤの移動により入出力端子と基板の
接続パターン間に挟まれてショートするために、改造用
ワイヤの布線作業に熟練と多くの時間を要するという問
題が生じる。
The problem with the conventional modified wire wiring method described above is that the fine-diameter wire formed on the wiring route is held between tweezers and both ends are soldered to the modified pads. Since the wires are wired between adjacent connection pads arranged on the main surface of the board at a minute pitch, the homing of the wires needs to be formed into an accurate shape with respect to the wiring route, and the wiring is difficult to perform when mounting the LSi. As a result of the movement of the wires, they become caught between the connection patterns of the input/output terminals and the board, resulting in short circuits, resulting in the problem that wiring the modification wires requires skill and a lot of time.

また、基板の主面に微小ピッチで配列されたそれぞれの
接続パッドに対して、改造用パッドおよびViaとの接
続パターンを設けねばならないため、当該接続パッドの
接合面積が小さくなることによりLSiの実装が困難と
なるという問題が生じている。
In addition, since it is necessary to provide connection patterns with modification pads and vias for each connection pad arranged at a minute pitch on the main surface of the board, the bonding area of the connection pad becomes small, making it difficult to mount the LSi. The problem has arisen that it is difficult to

本発明は上記のような問題点に鑑み、改造用ワイヤの布
線が容易となるとともに布線されたワイヤの移動が皆無
となり、且つ接続パッドの接合面積を太き(することが
できる新しい改造ワイヤの配線方法の提供を目的とする
In view of the above-mentioned problems, the present invention is a new modification that facilitates wiring of modified wires, eliminates movement of the wires, and increases the bonding area of connection pads. The purpose is to provide a method for wiring wires.

C課題を解決するための手段〕 本発明は、第3図に示すようにLSiの入出力端子と接
合する接続バッド11−1群を主面に配設して、内部導
体と導通ずるV i a 11−2と各該接続バンド1
1−1の間に接続パターン11−3を形成した基板11
を備え、 第1図に示すように当該基板11の回路改造を要するそ
れぞれ接続パ・ンド1l−1bと接続した接続パターン
11−3を切断するとともに、当該接続バッド1l−1
bと接合するLSi2の入出力端子2−2b間に他の入
出力端子2−2aをガイドにして改造用のワイヤ3を張
架し、接合手段15により当該ワイヤ3と該入出力端子
2−2bを接続して、上記基板11の該接続バッド11
−1群と該LSi2の該入出力端子2−2a、2−2b
とを接合するする。
Means for Solving Problem C] As shown in FIG. 3, the present invention provides a group of connection pads 11-1 to be connected to input/output terminals of an LSi on the main surface, and conducts V i to an internal conductor. a 11-2 and each corresponding connection band 1
A substrate 11 on which a connection pattern 11-3 is formed between 1-1.
As shown in FIG.
A wire 3 for modification is stretched between the input/output terminals 2-2b of the LSi2 to be joined to the input/output terminal 2-2b using the other input/output terminal 2-2a as a guide, and the wire 3 and the input/output terminal 2-2 are connected by the joining means 15. 2b to connect the connection pad 11 of the board 11.
-1 group and the input/output terminals 2-2a, 2-2b of the LSi2
to join.

〔作 用〕[For production]

本発明では、基板11の回路改造を要する接続バンド1
l−1bと導通した接続パターン11−3を切断すると
ともに、当該接続バッド11−1 bと接合するLSi
2の入出力端子2−2b間に他の入出力端子2−2aを
ガイドとしてワイヤ3を接続して、そのLSi2を上記
基板IIに実装することにより回路改造を要する接続パ
ッド1i−tb間に改造用のワイヤ3が配線されるので
、ワイヤ3の布線が容易となるとともにその移動が皆無
となって改造作業が容易となる。
In the present invention, the connection band 1 requires circuit modification of the board 11.
The LSi connected to the connection pad 11-1b is cut off and connected to the connection pad 11-1b.
By connecting the wire 3 between the input/output terminals 2-2b of the second input/output terminal 2-2b using the other input/output terminal 2-2a as a guide, and mounting the LSi2 on the board II, the connection pads 1i-tb which require circuit modification are connected. Since the wires 3 for modification are wired, the wiring of the wires 3 is facilitated, and there is no movement of the wires, which facilitates the modification work.

また、基板11の主面に微小ピッチで配列されるそれぞ
れの接続パッド11−1にはV i al14との接続
パターン11−3のみを形成するために、各接続パッド
11−1の接合面積を大きくすることができてLSi2
の実装を容易にすることが可能となる。
In addition, in order to form only the connection pattern 11-3 with the Vial 14 on each connection pad 11-1 arranged at a minute pitch on the main surface of the substrate 11, the bonding area of each connection pad 11-1 is LSi2 can be made larger
This makes it possible to easily implement the .

〔実 施 例] 以下第1図乃至第3図について本発明の詳細な説明する
[Example] The present invention will be described in detail below with reference to FIGS. 1 to 3.

第1図は本発明の一実施例による改造ワイヤの配線方法
を示す斜視図、第2図は他の実施例を示す斜視図、第3
図は本実施例によるプリント回路基板の接続パッドの部
分平面図を示し、第4図と同一部材には同一記号が付し
であるが、その他の11はパターンの改造を要するLS
i搭載用基板。
FIG. 1 is a perspective view showing a modified wire wiring method according to one embodiment of the present invention, FIG. 2 is a perspective view showing another embodiment, and FIG.
The figure shows a partial plan view of the connection pad of the printed circuit board according to this embodiment, and the same members as in FIG.
i mounting board.

14は改造用ワイヤを布線ルートに張架するロボットハ
ンド、15は張架されたワイヤをLSiの入出力バッド
に接合するボンディングヘッドである。
14 is a robot hand that stretches the modification wire on the wiring route, and 15 is a bonding head that joins the stretched wire to the input/output pad of the LSi.

基板11は、第3図に示すように上記LSiの入出力端
子と接合する接続パッド11−1を電子部品搭載面に微
小ピッチで配列して、その接続パッド111と内層導体
と導通したV i a 11−2との間を導通する接続
パターン11−3を形成している。
As shown in FIG. 3, the substrate 11 has connection pads 11-1 that are connected to the input/output terminals of the LSi arranged at minute pitches on the electronic component mounting surface, and V i conductors that are electrically connected to the connection pads 111 and the inner layer conductor. A connection pattern 11-3 is formed that conducts between the a and 11-2.

ロボットハンド14は、第1図(b)に示すように布線
する改造用ワイヤ3を引っ掛けて摺動させる係合溝14
aを先端に設けて、図示していないアクチエターにより
その係合溝14aを上記基板11の主面に対して平行、
且つ直交方向へ移動させるとともに回動させるものであ
る。
The robot hand 14 has an engagement groove 14 on which the modification wire 3 to be wired is hooked and slid, as shown in FIG. 1(b).
a is provided at the tip, and the engaging groove 14a is parallel to the main surface of the substrate 11 by an actuator (not shown).
Moreover, it is moved in the orthogonal direction and rotated.

ポンディングヘッド15は、第1図(C)に示すように
、先端縁をLSi2の人出力パッド2−1に垂設された
入出力端子2−2bが挿入できる内径の円筒状に成形し
て、LSi2に対して垂直方向に移動することにより布
線されたワイヤ3をLSi2の入出力バッド2−1に熱
圧着する押圧部材である。
As shown in FIG. 1(C), the pounding head 15 has a tip end formed into a cylindrical shape with an inner diameter into which the input/output terminal 2-2b vertically installed on the human output pad 2-1 of the LSi2 can be inserted. , is a pressing member that thermally presses the wire 3 wired to the input/output pad 2-1 of the LSi2 by moving in a direction perpendicular to the LSi2.

上記部材を使用した改造ワイヤの配線方法は、第1図の
工程順斜視図に示すように、 (alは、LSi搭載用基板11の回路改造を要するそ
れぞれ接続パッド11−1 bとV i a 11−2
を接続する接続パターン11−3を切断した状態、(b
)は、上記基板11に搭載するLSi2の入出力端子2
−28をロボットハンド14と対向するように図示して
いない台上に載置し、リールより引き出されたワイヤ3
の先端側を一方のロボットハンド14−1の保合溝14
aに引っ掛けて、基板11の回路改造を要する一方の接
続パッド11−1 bと接合する入出力端子2−2bに
当接させ、他方のロボットハンド141の係合溝14a
にワイヤ3の前記リール側を引っ掛けて当該ロボットハ
ンド14−1を布線ルートに従って移動させることによ
り、他の入出力端子2−2aを布線のガイドとして他方
の入出力端子2−2bにワイヤ3を張架した状態、 (C)は、上記ワイヤ3を当接させたそれぞれ人出力端
子2−2bにボンディングヘッド15の先端孔を嵌入し
、そのワイヤ3をLSi2の入出力パッド21に押圧し
て加熱することにより入出力端子2−2b間に改造用の
ワイヤ3を熱圧着した状態、(d)は、基板11の接続
バンド11−1群にLSi2の入出力端子2−2a、2
−2bを当接させて′i1.置して図示していないリフ
ロー槽に挿入し、接続パッド11−1群の表面に形成し
た半田膜をリフローすることにより基板11の部品搭載
面にLSi2を実装した状態、 で示す工程順により改造用ワイヤ3を配線している。
The modified wire wiring method using the above-mentioned members is as shown in the process order perspective view of FIG. 11-2
(b) with connection pattern 11-3 connected to
) is the input/output terminal 2 of the LSi2 mounted on the board 11.
-28 is placed on a table (not shown) facing the robot hand 14, and the wire 3 is pulled out from the reel.
The distal end side of the retaining groove 14 of one robot hand 14-1
a, and bring it into contact with the input/output terminal 2-2b that is connected to one connection pad 11-1b, which requires circuit modification of the board 11, and the engagement groove 14a of the other robot hand 141.
By hooking the reel side of the wire 3 to the wire and moving the robot hand 14-1 along the wiring route, the wire is connected to the other input/output terminal 2-2b using the other input/output terminal 2-2a as a wiring guide. 3 is stretched, (C) shows that the tip hole of the bonding head 15 is inserted into the respective human output terminal 2-2b that the wire 3 is in contact with, and the wire 3 is pressed against the input/output pad 21 of the LSi2. (d) shows a state in which the wire 3 for modification is bonded by thermocompression between the input and output terminals 2-2b by heating the input and output terminals 2-2a and 2 of the LSi2 to the connection band 11-1 group of the board 11.
-2b in contact with 'i1. The LSi2 is mounted on the component mounting surface of the board 11 by inserting it into a reflow tank (not shown) and reflowing the solder film formed on the surface of the connection pad 11-1 group. Wire 3 is wired.

また、他の実施例として第2図に示すように、上記(C
)項においてLSi2の入出力端子2−2b間に布線さ
れたワイヤ3にレーザ光線25を照射して、その熱線に
より入出力パッド2−1とワイヤ3を接合しても艮い。
In addition, as another example, as shown in FIG.
), the wire 3 wired between the input/output terminals 2-2b of the LSi 2 may be irradiated with a laser beam 25, and the input/output pad 2-1 and the wire 3 may be joined by the heated rays.

その結果、LSi2の入出力端子2−28をガイドとし
て改造を要する接続パッド11〜1bと接合する入出力
端子2−2b間にワイヤ3を布線しているので、その布
線が容易となるとともに移動が皆無となって改造作業が
容易となり、且つ基板11の主面には接続パッド11−
1とV i alL2との接続パターン11−3のみを
形成するため、その接続パッドll−1の接合面積を大
きくすることができる。
As a result, the wire 3 is wired between the input/output terminals 2-2b that are connected to the connection pads 11-1b that require modification using the input/output terminals 2-28 of the LSi2 as a guide, making the wiring easy. In addition, the main surface of the board 11 is provided with connection pads 11-
Since only the connection pattern 11-3 between the connection pad ll-1 and the connection pad ll-1 is formed, the bonding area of the connection pad ll-1 can be increased.

〔発明の効果〕〔Effect of the invention〕

以上の説明から明らかなように本発明によれば極めて簡
単な構成で、改造用ワイヤの布線が容易となるとともに
布線されたワイヤの移動が皆無となり、且つ接続パッド
の接合面積を大きくすることができる等の利点があり、
著しい経済的及び、信頼性向上の効果が期待できる改造
ワイヤの配線方法を提供することができる。
As is clear from the above description, the present invention has an extremely simple configuration, facilitates wiring of modification wires, eliminates movement of the wires, and increases the bonding area of connection pads. There are advantages such as being able to
It is possible to provide a modified wire wiring method that can be expected to be significantly economical and to improve reliability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例による改造ワイヤの配線方法
を示す斜視図、 第2図は他の実施例を示す斜視図、 第3図は本実施例によるプリント回路基板の接続パッド
を示す部分平面図、 第4図は従来の改造ワイヤ配線方法を示す斜視図、 第5図は従来の接続パッドを示す部分平面図である。 図において、 2はLS i。 2−1は入出力パッド、 2−2a、 2−2bは入出力端子、 3はワイヤ、 11は基板、 11−1は接続パッド群、 1l−1a、 1l−1bは接続パッド、11−2はV
ia。 11−3は接続パターン、 14はロボットハンド、   14aは係合溝、15は
ボンディングヘッド、 25はレーザ光線、 ++JbJJtJ/lシΔ4 ノド卯(呵^−丈)白4PJl=tsdシEワイヤーロ
オ零ブD夫会木すψチ七iの 第1図 μa娃フイtm乙11乏2r殖 りよ−1斜要口 イ訃づCl古くトぞΣJを示tく陀す1イ31図第2図 4 W施fJ+−よ)フロ1ルト凹騒孝にの才参萩へ0
ソド。 fe末す卸今平面閏 第3図 イλ〔し4ミ/l#鵜)昏/に任プy之1g+円2イ6
Gσ第5図
FIG. 1 is a perspective view showing a modified wire wiring method according to one embodiment of the present invention, FIG. 2 is a perspective view showing another embodiment, and FIG. 3 is a perspective view showing a connection pad of a printed circuit board according to the present embodiment. FIG. 4 is a perspective view showing a conventional modified wire wiring method; FIG. 5 is a partial plan view showing a conventional connection pad. In the figure, 2 is LS i. 2-1 is an input/output pad, 2-2a, 2-2b is an input/output terminal, 3 is a wire, 11 is a board, 11-1 is a group of connection pads, 1l-1a, 1l-1b are connection pads, 11-2 is V
ia. 11-3 is a connection pattern, 14 is a robot hand, 14a is an engagement groove, 15 is a bonding head, 25 is a laser beam, ++JbJJtJ/lshiΔ4 Nodou (呵^-length) white 4PJl=tsdshiE wire rope zero block Figure 1 of D Huai Tree ψ Chi 7i 1 μa Birth tm O 11 Scarcity 2r Growth - 1 Diagonal Exit I Death Cl Old Tozo ΣJ Indicates 1 I 31 Figure 2 Figure 4 W use f J + - yo) From 1st to 0
Sodo. fe end wholesale now plane leap 3 figure I λ [shi 4 mi/l #cormorant] / nipu y 1 g + yen 2 i 6
Gσ Figure 5

Claims (1)

【特許請求の範囲】 半導体装置の入出力端子と接合する接続パッド(11−
1)群を主面に配設して、内部導体と導通するVia(
11−2)と各該接続パッド(11−1)の間に接続パ
ターン(11−3)を形成したプリント回路基板(11
)を備え、 当該基板(11)の回路改造を要するそれぞれ接続パッ
ド(11−1b)と接続した接続パターン(11−3)
を切断するとともに、当該接続パッド(11−1b)と
接合する上記半導体装置(2)の入出力端子(2−2b
)間に他の入出力端子(2−2a)をガイドにして改造
用のワイヤ(3)を張架し、当該ワイヤ(3)と該入出
力端子(2−2b)を接合手段(15)により接続して
、上記基板(11)の該接続パッド(11−1)群と該
半導体装置(2)の該入出力端子(2−2a,2−2b
)とを結合したことを特徴とする改造ワイヤの配線方法
[Claims] A connection pad (11-
1) Via (
11-2) and each of the connection pads (11-1) with a connection pattern (11-3) formed thereon.
), and a connection pattern (11-3) connected to each connection pad (11-1b) which requires circuit modification of the board (11).
and the input/output terminal (2-2b) of the semiconductor device (2) to be connected to the connection pad (11-1b).
), using the other input/output terminal (2-2a) as a guide, stretch the wire (3) for modification, and connect the wire (3) and the input/output terminal (2-2b) to the connecting means (15). to connect the group of connection pads (11-1) of the substrate (11) and the input/output terminals (2-2a, 2-2b) of the semiconductor device (2).
) A modified wire wiring method characterized by combining the following.
JP24964389A 1989-09-25 1989-09-25 Wiring of remodeled wire Pending JPH03110887A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24964389A JPH03110887A (en) 1989-09-25 1989-09-25 Wiring of remodeled wire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24964389A JPH03110887A (en) 1989-09-25 1989-09-25 Wiring of remodeled wire

Publications (1)

Publication Number Publication Date
JPH03110887A true JPH03110887A (en) 1991-05-10

Family

ID=17196074

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24964389A Pending JPH03110887A (en) 1989-09-25 1989-09-25 Wiring of remodeled wire

Country Status (1)

Country Link
JP (1) JPH03110887A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100772112B1 (en) * 2006-09-28 2007-11-01 주식회사 하이닉스반도체 Semiconductor package
CN111465312A (en) * 2020-04-14 2020-07-28 杭州洛微科技有限公司 Photoelectric product packaging production method based on periodic array arrangement

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100772112B1 (en) * 2006-09-28 2007-11-01 주식회사 하이닉스반도체 Semiconductor package
CN111465312A (en) * 2020-04-14 2020-07-28 杭州洛微科技有限公司 Photoelectric product packaging production method based on periodic array arrangement

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