JPH0290720A - Semiconductor relay circuit - Google Patents

Abstract

PURPOSE:To quicken the switching speed by applying electromagnetic coupling to the 1st and 2nd coils so that an electric charge is stored between the gate and source of an output MOSFET with an electromotive force induced in the 2nd coil the moment an input signal current flows to the 1st coil. CONSTITUTION:The 1st coil L1 is connected in series with a light emitting diode 1, the 2nd coil L2 is connected in series with a control MOSFET 4 to discharge the electric charge stored between the gate and source of an output MOSFET 3, and both the coils L1,L2 are subject to electromagnetic coupling. Thus, the gate and source of the output MOSFET 3 store an electric charge rapidly by the voltage and current generated by the electromagnetic coupling at a moment of the input and then the circuit acts like a conventional circuit. Thus, the time required to store the electric charge between the gate and source of the output MOSFET 3 is shortened and switching speed of a relay circuit is quickened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor relay circuit in which input and output are isolated using an optical coupling method.

[Prior art] Figure 4 shows a conventional optically coupled semiconductor relay circuit.
1-255023> is a circuit diagram. In this circuit, a photodiode array 2 receives an optical signal generated by a light emitting diode 1 connected between input terminals II and I2, generates a photovoltaic force, and transfers this photovoltaic force to a resistor 5. The voltage is applied between the gate and source of the output MOSFET 3 through the gate. The drain and source of the output MOSFET 3 are connected to output terminals 01.02, respectively.

A control MOSFET consisting of a depletion type MOSFET is installed at the gate and source of the output MOSFET 3.
The drain and source of the control MOSFET 4 are connected to each other, and the gate and source of the control MOSFET 4 are connected to both ends of a bias resistor 5.

When an input signal is applied to the light emitting diode 1 and a photovoltaic force is generated in the photodiode array 2, a photocurrent flows between the drain and source of the depletion type control MOSFET 4 and through the resistor 5, and a voltage is generated across the resistor 5. Voltage is generated. This voltage biases the control MOSFET 4 to a high resistance state, so the photoelectromotive force of the photodiode array 2 is applied between the gate and source of the output MOSFET 3, turning the output MOSFET 3 on.

When the input signal to the light emitting diode 1 is cut off, the photovoltaic force of the photodiode array 2 disappears, and the voltage across the resistor 5 disappears, so the depletion type control MOS
The FET 11 returns to the on state and discharges the accumulated charge between the gate and source of the output MOSFET 3.
Output mMOSFET3 is turned off.

The circuit shown in FIG. 5 is the fourth (2I) circuit in which a constant voltage element is connected in parallel with the bias resistor 5 to prevent the potential difference generated across the resistor 5 from rising above a predetermined voltage. Here, an enhancement type MOSF with a common gate and drain is used as a constant voltage element.
ET6 is used, and the potential difference generated across the resistor 5 is M
It is designed so that the voltage does not rise above the threshold voltage of OSFETf''.

Furthermore, the circuit shown in Fig. 3 (Patent Application No. 143698
(No.), the photovoltaic force of the photodiode array 2 is directly applied between the gate and source of the output MOSFET 3.Then, the photovoltaic force of the photodiode array 2 is directly applied between the gate and source of the output MOSFET 3. A control MOSFET consisting of a depletion type MOSFET that is biased into a high resistance state by applying the photovoltaic force of the photodiode array 2a between the gate and source is provided.
4 is provided, and the drain and source of this control MOSFET 4 are connected to the gates 1 and 1 and the source of the output MOSFET 3, respectively. Photodiode array 2a
A resistor 7 is connected in parallel to both ends of the resistor 7 for discharging residual charges when the photovoltaic force disappears.

When an input signal is applied to the light emitting diode 1 and a photovoltaic force is generated in the photodiode array 2a, the depression type control MO5FET 4 is biased to a high resistance state. At the same time, a photovoltaic force is generated in the photodiode array 2 and applied between the gate and source of the output MOSFET 3, turning the output MOSFET 3 on.

When the input signal to the light emitting diode 1 is cut off, the photovoltaic force of the photodiode arrays 2 and 2a disappears. The residual charge in the photodiode array 2a is discharged by the resistor 7, and the bias voltage between the gate and source of the depression-type control MOSFET 4 decreases, so the depression-type control MOSFET 4 returns to a low resistance state and the gate of the output MOSFET 3 decreases. By discharging the N bond charges between the I and source, the output MOSFET 3 is turned off.

[Problem to be Solved by the Invention] In each of the above-mentioned conventional circuits, when the photovoltaic force of the photodiode array 2 disappears, the output MOSFET 3
A normally-on element for discharging accumulated charge between the gate and source of is connected between the gate and source of the output MOSFET 3. Therefore, when the input signal is cut off and the photovoltaic force of the photodiode array 2 disappears, the accumulated charge between the gate and source of the output MO3FE and T3 is rapidly discharged, and the charge between the drain and source of the output MO3FIET3 is Rapidly switched to off state.

However, when accumulating charge between the gate and source of MO3 FIET 3 for output, the current value generated by photodiode array 2 due to the optical signal of light emitting diode 1 is extremely small (several JA), so MOSFE
It takes a relatively long time (approximately several microseconds) to accumulate enough charge to turn T3 on, slowing down the switching speed to turn it on.

The present invention has been made in view of these points, and its purpose is to improve the gate and output MOSFET.
An object of the present invention is to provide a semiconductor relay circuit with high switching speed by shortening the time required for charge accumulation between sources.

[Means for Solving the Problems] In the present invention, in order to solve the above problems, the first
As shown in the figure, a light emitting diode 1 is connected to input terminals TI and I2 and generates an optical signal in response to an input signal;
A photodiode array 2 that receives the optical signal from the light emitting diode 1 and generates a photovoltaic force, and a drain and source to which the photovoltaic force of the photodiode array 2 is applied between the gate and the source and connected to the output terminal. an output MOSFET 3 whose impedance changes from a first impedance state to a second impedance state; In a semiconductor relay circuit including a normally-on element (control MOSFET 4) that discharges a product charge, a first coil L1 is connected in series with the light emitting diode 1, and a second coil L1 is connected in series with the normally-on element. The first coil L2 is connected so that, at the moment when an input signal current flows through the first coil L1, charges are accumulated between the gate and source of the output MOSFET 3 due to the electromotive force generated in the second coil L2. and second
Coil L1. This is characterized by electromagnetically coupling L2.

[Function] As described above, in the circuit of FIG. 1, the first coil L1 is connected in series with the light emitting diode 1, and the output M
A second coil L is connected in series with the side MOSFET 4 for discharging the gate I...source charge of OSFET3.
2 and electromagnetically coupled both coils L1 and L2,
At the moment of input, charges can be accumulated between the gate and source of the output MOSFET 3 at a rapid speed due to the voltage and current generated by electromagnetic coupling, and thereafter the circuit operates in the same manner as a conventional circuit. Therefore, output MOSFET3
The time required to accumulate charge between the gate and source of the relay circuit can be shortened, and the switching speed of the relay circuit can be increased.

[Example] FIG. 1 is a circuit diagram of a first embodiment of the present invention.

The circuit configuration will be explained below. The input terminal 11 is connected to the anode of the light emitting diode 1 via the first coil L1, and the input terminal I2 is connected to the cathode of the light emitting diode 1. The light emitting diode 1 generates an optical signal in response to an input signal, and this optical signal is received by the photodiode array 2. The photodiode array 2 has a plurality of diodes connected in series, and the number of the diodes connected is set so as to be able to generate a voltage higher than the threshold voltage of the output MOSFET 3. The anode of photodiode array A2 is M for inside B.
It is connected to the gate of O9FET3, and its cathode is connected to the source of output MOSFET3 via resistor 5. The output MOSFET 3 is an enhancement type N-channel MOSFET, and its train is connected to the output terminal o1, and its source is connected to the output terminal 02. The second coil L is electromagnetically coupled to the first coil L1.
One end of 2 is connected to the gate of output MOSFET 3,
The other end of the coil L2 is connected to a train of control MOSFETs 4. The control MOSFET 4 is a depletion type N-channel MO9FET, and its source is connected to the source of the output MOSFET 3, and its gate is connected to the cathode of the photodiode array 2.

The operation of this embodiment will be explained below. Input terminal II
, I2, when an input signal current flows between them to cause the light emitting diode 1 to emit light, the output MOSFET 3 is connected to the coil L2 due to the electromagnetic coupling between the first and second coils LL and L2.
An electromotive force is generated in the direction where the gate side of is positive. Control M
As is well known, there is a reverse PN junction diode between the drain and source of OSFET4, so the second
Due to the electromotive force of the coil L2, the output MOS FET
3 gate l-to-source capacitance and control MOSFET 4
A current flows through the parasitic reverse PN junction diode between the drain and source of the output MO9FET3, and the gate-to-source capacitance of the output MO9FET3 is instantly charged. The number of turns of the first and second coils LL and L2 is set so that the charging voltage of the gate-source capacitance of the output MOSFET 3 exceeds the threshold voltage of the output MOSFET 3 when the input signal current rises.

After the input signal voltage rises and reaches a steady state, the relay circuit operates in a DC manner, so the first and second coils LL and L2 enter a low impedance state, resulting in the same operation as the conventional circuit shown in Figure 4. Become. That is, due to the photovoltaic force constantly generated in the photodiode array 2, a photocurrent flows between the train source of the depletion type control MOSFET 4 and through the resistor 5, and a voltage is generated across the resistor 5. With this voltage, 2 control MO9FIETs
4 is biased to a high resistance state, the output MOS
The photoelectromotive force of the photodiode array 2 is constantly applied 6 between the gate and source of the FET 3, and the output MOSFET 3 is maintained in the on state.

When the input signal to the light emitting diode 1 is cut off, the photovoltaic force of the photodiode array 2 disappears, and the voltage across the resistor 5 disappears, so the depletion type control MOS
The FET 4 returns to the OFF state, and by discharging the N-bond charge between the gate and source of the output MOSFET 3, the output MOSFET 3 becomes the OFF state. Furthermore, at the moment the input signal current flowing through the first coil L is cut off, an electromotive force is generated in the second coil L2 that makes the gate side of the output MOSFET 3 negative. The discharge time of accumulated charges can be shortened.

As a result, in this embodiment, the output MOSFE
Not only the on-state switching speed of T3 but also the off-state switching speed can be increased.

FIG. 2 is a circuit diagram of a second embodiment of the present invention.

In this embodiment, in the first embodiment described above, a constant voltage element is connected in parallel with the bias resistor 5, so that the potential difference generated across the resistor 5 does not exceed a predetermined voltage. This is what I did. Here, an enhancement-type N-channel MOSFET 6 with a common gate and train is used as a constant voltage element, and the potential difference generated across the resistor 5 is made such that it does not rise above the threshold voltage of MO3F[', T6. There is. Note that a Zener diode may be used as the constant voltage element.

FIG. 3 is a circuit diagram of a third embodiment of the present invention.

In this embodiment, in the conventional circuit shown in FIG. 6, the first coil L1 is connected in series with the light emitting diode 1, and the control M
OSFET4 drain and output MOSFET
A second coil L2 is inserted in series between the gates of No. 3,
At the moment when the input signal current flows through the first coil L1, the second
The output MOSFET is
The first and second coils are connected so that charge is stored between the gate and source of 1. It is an electromagnetic coupling of L2,
The same effects as in the first embodiment can be obtained.

In each of the above embodiments, the output MOSFET 3 is not limited to an enhancement type, but may be a depletion type. In addition, normally-on elements for discharging the accumulated charge between the gate and source of the output MOSFET 3 are not limited to MOSFETs, but JPETs and SITs.
You may also use .

Further, each MOSFET is not limited to N-channel, but may be P-channel.

[Effects of the Invention] In the present invention, the light 4T! In an i-type semiconductor relay circuit, a first coil is connected in series with a light emitting diode on the input side, and a normally-on element is used to discharge the love charge between the gate and source of the output MOSFET. A second coil is connected in series, and the moment the input signal current is applied to the first coil, the electromotive force generated in the second coil causes charge to be accumulated between the gate and source of the output MOSFET. Since the first and second coils are electromagnetically coupled to each other, even if the photocurrent generated by the photodiode array is excellent, the moment the input signal current flows, there is a voltage between the gate and source of the output MOSFET. Charge is accumulated, and this has the effect of increasing the switching speed.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention, FIG. 2 is a circuit diagram of a second embodiment of the present invention, FIG. 3 is a circuit diagram of a third embodiment of the present invention, and FIG. 4 is a conventional circuit diagram. FIG. 5 is a circuit diagram of another conventional example, and FIG. 6 is a circuit diagram of another conventional example. ■ is a light emitting diode, 2 is a photodiode array, 3
is an output MOSFET, 4 is a control MOSFET, 5 is a resistor, and Ll and L2 are coils.

Claims (1)

[Claims] (1) A light-emitting diode that is connected to an input terminal and generates an optical signal in response to an input signal, a photodiode array that generates a photovoltaic force by receiving the optical signal from the light-emitting diode, and a photovoltaic device for the photodiode array. an output MOSFET whose drain and source connected to an output terminal change from a first impedance state to a second impedance state when power is applied between the gate and source;
A semiconductor relay circuit comprising a normally-on element connected between the gate and source of the SFET to discharge the accumulated charge between the gate and source of the output MOSFET when the photovoltaic force disappears; 1 coil is connected, and a second coil is connected in series with the normally-on element, and the moment the input signal current flows through the first coil, the output MOSFET is activated by the electromotive force generated in the second coil. A semiconductor relay circuit characterized in that first and second coils are electromagnetically coupled so that charge is accumulated between a gate and a source.