JP6809511B2 - Through Silicon Via Substrates and Semiconductor Devices - Google Patents

Description

The present disclosure relates to a through silicon via substrate.

In recent years, a three-dimensional mounting technique in which semiconductor circuit boards on which integrated circuits are formed is vertically laminated has been used. In such a mounting technique, a substrate on which a through electrode is formed is used. Such a substrate is sometimes referred to as an interposer. Through electrodes are formed by arranging a conductor in a through hole formed in a substrate. In order to achieve high integration, it is necessary to miniaturize the through holes. For example, Patent Documents 1 and 2 disclose a technique of irradiating a glass substrate with a laser in order to form a fine through hole.

International Publication No. 2010/087483 Special Table 2014-501686

According to the techniques disclosed in Patent Documents 1 and 2, the through hole can be miniaturized, but the aspect ratio becomes large. When the aspect ratio becomes large, it becomes difficult to form a conductor inside the through hole.

An object of the embodiments of the present disclosure is to easily form a conductor inside a through hole.

According to one embodiment of the present disclosure, a substrate including a through hole having a minimum diameter inside the through hole penetrating from the first surface to the second surface, and a conductor arranged inside the through hole. The through hole is 6.25%, 18.75%, 31.25%, 43.75%, 56.25 from the first surface of the section from the first surface to the second surface. %, 68.75%, 81.25%, 93.75% of the inclination angle of the inner surface with respect to the central axis of the through hole (the angle at which the first surface side expands is defined as a positive inclination angle). A through electrode substrate that satisfies the condition that the total value is 8.0 ° or more is provided.

According to one embodiment of the present disclosure, a substrate including a through hole having a minimum diameter inside the through hole penetrating from the first surface to the second surface, and a conductor arranged inside the through hole. The through hole is located at a distance of 6.25%, 18.75%, 31.25%, 43.75% from the first surface in the section from the first surface to the second surface. The total value of the inclination angle of the inner surface with respect to the central axis of the through hole (the angle at which the first surface side expands is a positive inclination angle) is 4.0 ° or more, and 56.25% from the first surface. A through electrode substrate that satisfies the condition that the total value of the inclination angles of the inner surface with respect to the central axis of the through hole at the distances of 68.75%, 81.25%, and 93.75% is -4.0 ° or less. Is provided.

The conductor includes a first metal layer and a second metal layer, and the first metal layer is arranged between the second metal layer and the substrate, and the first surface and the second surface In both of the above, the first metal layer may be arranged at least partially.

At least a part of the first metal layer arranged on the first surface and the second surface may be connected to the first metal layer arranged inside the through hole.

The substrate may be a glass substrate.

The conductor may include a first metal layer arranged on the substrate and a second metal layer arranged on the first metal layer.

The aspect ratio of the through hole may be 4 or more.

According to one embodiment of the present disclosure, a semiconductor device including the through silicon via substrate described above and a semiconductor circuit board electrically connected to the conductor of the through electrode substrate is provided.

According to the embodiments of the present disclosure, a conductor can be easily formed inside the through hole.

It is a figure explaining the cross-sectional structure of the through silicon via substrate in 1st Embodiment of this disclosure. It is a figure explaining the manufacturing method of the through silicon via substrate in 1st Embodiment of this disclosure. It is a figure explaining the manufacturing method (formation of a through hole) of the through electrode substrate following FIG. It is a figure explaining the manufacturing method (formation of the 1st metal layer) of the through silicon via substrate following FIG. It is a figure explaining the manufacturing method (formation of the 1st metal layer) of the through silicon via substrate following FIG. It is a figure explaining the manufacturing method (formation of the 2nd metal layer) of the through silicon via substrate following FIG. It is a figure explaining the manufacturing method (the formation of the through electrode) of the through electrode substrate following FIG. It is a figure explaining the manufacturing method (forming of the wiring layer) of the through silicon via substrate following FIG. It is a figure explaining the shape example (shape A) of the through hole in the 1st Example of this disclosure. It is a figure explaining the shape example (shape B) of the through hole in the 2nd Example of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 1st Example (shape A1) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 1st Example (shape A2) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 1st Example (shape A3) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 1st comparative example (shape A4) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 1st comparative example (shape A5) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 2nd Example (shape B1) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 2nd Example (shape B2) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 2nd comparative example (shape B3) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 2nd comparative example (shape B4) of this disclosure. It is a figure explaining the shape example (shape C) of the through hole in the 3rd Example of this disclosure. It is a figure explaining the shape example (shape D) of the through hole in the 4th Example of this disclosure. It is a figure explaining the shape example (shape E) of the through hole in the 5th Example of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 3rd Example (shape C1) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 3rd Example (shape C2) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 3rd Example (shape C3) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 3rd comparative example (shape C4) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 4th Example (shape D1) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 4th Example (shape D2) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 4th comparative example (shape D3) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 4th comparative example (shape D4) of this disclosure. It is a figure explaining the shape characteristic of the through hole in the 5th Example (shape E1) of this disclosure. It is a figure which shows the semiconductor device in 2nd Embodiment of this disclosure. It is a figure which shows another example of the semiconductor device in 2nd Embodiment of this disclosure. It is a figure which shows still another example of the semiconductor device in 2nd Embodiment of this disclosure. It is a figure explaining the electronic device which used the semiconductor device in 2nd Embodiment of this disclosure.

Hereinafter, the through silicon via substrate according to each embodiment of the present disclosure will be described in detail with reference to the drawings. It should be noted that each of the embodiments shown below is an example of an embodiment of the present invention, and the present invention is not construed as being limited to these embodiments. In the drawings referred to in the present embodiment, the same part or a part having a similar function is given the same code or a similar code (a code in which A, B, etc. are simply added after the numbers), and the process is repeated. The description of may be omitted. In addition, the dimensional ratio of the drawing may differ from the actual ratio for convenience of explanation, or a part of the configuration may be omitted from the drawing.

<First Embodiment>
[Construction of through silicon via substrate]
FIG. 1 is a diagram illustrating a cross-sectional structure of a through silicon via substrate according to the first embodiment of the present disclosure. The through silicon via substrate 10 includes a glass substrate 100 and wiring layers 210 and 220. A wiring layer 210 is arranged on the first surface 101 side of the glass substrate 100. A wiring layer 220 is arranged on the second surface 102 side of the glass substrate 100. The glass substrate 100 includes a through hole 150 that penetrates from the first surface 101 to the second surface 102. The through electrode 50 is a conductor arranged inside the through hole 150, a part of the glass substrate 100 on the first surface 101 side, and a part of the second surface 102 side. The through silicon via 50 electrically connects the first surface 101 side and the second surface 102 side of the glass substrate 100. The wiring layer 210 includes a conductive layer 212 and an insulating layer 215. The wiring layer 220 includes a conductive layer 222 and an insulating layer 225. The conductive layer 212 and the conductive layer 222 are electrically connected via a through electrode 50. At least one or both of the wiring layer 210 and the wiring layer 220 may not be present.

In FIG. 1, the shape of the through hole 150 is shown as a cylindrical shape, but in reality, the inner surface of the through hole 150 has a complicated shape. The same applies to the description of FIGS. 2 to 8. As for the specific shape of the through hole 150, the shapes shown in FIGS. 9, 10, 22, 23, and 24, which will be described later, are exemplified.

[Manufacturing method of through silicon via substrate]
Subsequently, a method of manufacturing the through silicon via substrate 10 will be described with reference to FIGS. 2 to 8. First, a step of forming the through hole 150 in the glass substrate 100 will be described.

FIG. 2 is a diagram illustrating a method for manufacturing a through electrode substrate according to the first embodiment of the present disclosure. FIG. 3 is a diagram illustrating a method of manufacturing a through electrode substrate (formation of through holes) following FIG. First, the glass substrate 100 is prepared (FIG. 2). The thickness of the glass substrate 100 is 400 μm in this example. Instead of the glass substrate 100, a substrate made of another inorganic material such as a quartz substrate, a silicon wafer, or a ceramic may be used, or a substrate made of an organic material such as a resin substrate may be used. When a conductive substrate such as a silicon wafer is used, the substrate surface including the inner surface of the through hole is covered with an insulator so that the through electrode and the substrate do not conduct with each other when the through hole is formed. Will be.

Subsequently, a through hole 150 is formed in the glass substrate 100 (FIG. 3). As described above, the through hole 150 is formed so that the inner side surface has any of the shapes shown in FIGS. 9, 10, 20, 21 and 22. In this example, the shape of the through hole 150 satisfies any of the following first and second conditions.

(First condition)
The first condition is the condition shown in (1) and (2) below.
(1) The diameter Sd does not have a minimum value inside the through hole 150.
(2) The total value of the inclination angles of the plurality of measurement points on the inner surface of the through hole 150 is 8.0 ° or more.
Here, the plurality of measurement points are 6.25%, 18.75%, 31.25%, 43.75%, and 6.25%, 18.75%, 31.25%, and 43.75% of the section from the first surface 101 to the second surface 102. The distance positions are 56.25%, 68.75%, 81.25%, and 93.75% (8 points in total).

(Second condition)
The second condition is the condition shown in (3), (4) and (5) below.
(3) The diameter Sd has a minimum value inside the through hole 150.
(4) The first total value of the inclination angles of the plurality of first measurement points on the inner surface of the through hole 150 is 4.0 ° or more.
(5) The second total value of the inclination angles of the plurality of second measurement points on the inner surface of the through hole 150 is -4.0 ° or less.
Here, the plurality of first measurement points are 6.25%, 18.75%, 31.25%, 43.75 from the first surface 101 to 6.25% of the section from the first surface 101 to the second surface 102. % Distance position (4 points in total). The plurality of second measurement points are distances of 56.25%, 68.75%, 81.25%, 93.75% from the first surface 101 in the section from the first surface 101 to the second surface 102. (4 points in total).

The definitions of each of the above terms will be described. The inside of the through hole 150 refers to the space between the first surface 101 and the second surface 102 of the glass substrate 100 in the through hole 150. The diameter Sd of the through hole 150 indicates the distance from the central axis to the inner side surface in the cross-sectional shape perpendicular to the central axis of the through hole 150. The diameter Sd changes according to the position of the cross section perpendicular to the central axis. In this example, the cross-sectional shape is a circle. Therefore, the diameter Sd corresponds to the radius. The central axis is located at the center of the circle. Further, in this example, the central axis of the through hole 150 is perpendicular to the first surface 101 and the second surface 102. The inclination angle is an inclination angle of the inner surface of the through hole 150 with respect to the central axis. The tilt angle at which the first surface 101 side expands is set as a positive value.

The through hole 150 satisfying the first condition is formed by irradiating the glass substrate 100 with a laser under predetermined conditions. The through hole 150 satisfying the second condition is formed by irradiating the glass substrate 100 with a laser under predetermined conditions and then performing an etching treatment with a predetermined etching solution. The maximum value of the diameter Sd is about 35 μm to 45 μm. As described above, the thickness of the glass substrate 100 is 400 μm. Therefore, the aspect ratio (the ratio of the length of the through hole 150 (thickness of the glass substrate 100) to the diameter of the through hole 150 (maximum value of the diameter Sd × 2)) is about 5. It is desirable that the first condition or the second condition described above is applied when the through hole 150 has an aspect ratio of 4 or more. Regarding the through hole 150 satisfying any of the conditions, detailed processing conditions will be described in each embodiment described later.

Subsequently, a step of forming the through electrode 50 in the through hole 150 will be described.

FIG. 4 is a diagram illustrating a method for manufacturing a through silicon via substrate (formation of a first metal layer) following FIG. FIG. 5 is a diagram illustrating a method for manufacturing a through silicon via substrate (formation of a first metal layer) following FIG. FIG. 6 is a diagram illustrating a method for manufacturing a through silicon via substrate (formation of a second metal layer) following FIG. FIG. 7 is a diagram illustrating a method of manufacturing a through electrode substrate (formation of a through electrode) following FIG.

The first metal layer 51 is formed on the glass substrate 100 in which the through holes 150 are formed. The first metal layer 51 has a function of a seed layer for electroplating treatment. The first metal layer 51 is Ti. The first metal layer 51 may be any metal that functions as a seed layer for the electrolytic plating treatment, and may be, for example, a metal containing Cu, Ni, Cr, Ti, W, or the like.

The first metal layer 51 is first formed by a sputtering method from the first surface 101 side of the glass substrate 100 (FIG. 4). In this example, the first metal layer 51 is deposited from the first surface 101 side by the sputtering method while rotating the glass substrate 100. The rotation axis of the glass substrate 100 is inclined with respect to the normal line of the first surface 101. The inclination angle of the rotation axis is preferably 0 ° or more and 20 ° or less, and is 10 ° in this example. The normal of the surface of the target used for sputtering is parallel to this rotation axis.

At this point, the first metal layer 51 is formed on the first surface 101 side, but is not formed on the second surface 102 side. Further, the first metal layer 51 is formed on a part of the inner side surface of the through hole 150 on the first surface 101 side, but is not formed on a part on the second surface 102 side. Therefore, the first metal layer 51 is deposited from the second surface 102 side of the glass substrate 100 by the sputtering method (FIG. 5). By this treatment, the surface of the glass substrate 100 is covered with the first metal layer 51. On the first surface 101 (and the second surface 102), the first metal layer 51 is preferably deposited so as to have a thickness of 0.1 μm or more and 3 μm or less, and in this example, a thickness of 1.5 μm. Is deposited at. The first metal layer 51 deposited on the inner surface of the through hole 150 is thinner than the first metal layer 51 deposited on the first surface 101.

Subsequently, the first metal layer 51 is used as a seed layer, and the second metal layer 52 is grown by electroplating. Before the electroplating treatment, a mask is formed in the region where the second metal layer 52 is not grown with an insulator such as a resist, and the mask is removed after the second metal layer 52 is grown (FIG. 6). In this way, since the second metal layer 52 does not grow on the portion where the mask is formed, the first metal layer 51 is exposed in the region where the mask is removed.

The second metal layer 52 is Cu. The second metal layer 52 may be a metal containing Au, Ag, Pt, Al, Ni, Cr, Sn and the like. In this example, the second metal layer 52 is formed with a film thickness that does not fill the inside of the through hole 150. The space in the through hole 150 formed by not being filled may be in a state where a gas exists, may be filled with an insulator such as resin, or may be filled with another conductor such as a metal. May be good. The second metal layer 52 may be formed with a film thickness sufficient to fill the inside of the through hole 150.

Subsequently, when the exposed first metal layer 51 is etched using the second metal layer 52 as a mask, the through electrode 50 is formed (FIG. 7). The through silicon via 50 has a laminated structure of the first metal layer 51 and the second metal layer 52, but the laminated structures are shown together without distinction in each drawing.

As the aspect ratio of the through hole 150 increases, the first metal layer 51 may not be formed on a part of the inner surface of the through hole 150. If there is a region in which the first metal layer 51 is not formed, a region in which the second metal layer 52 is not formed is generated in the electrolytic plating treatment in the next step. As a result, there is a defect that continuity between the first surface 101 side and the second surface 102 side is not realized.

On the other hand, when the shape of the through hole 150 satisfies the above-mentioned first condition or the second condition, the first metal layer 51 is formed over almost the entire inner surface of the through hole 150. As a result, the second metal layer 52 is less likely to be separated inside the through hole 150, so that the through electrode 50 that realizes continuity between the first surface 101 side and the second surface 102 side can be formed.

FIG. 8 is a diagram illustrating a method of manufacturing a through silicon via substrate (formation of a wiring layer) following FIG. When the through electrode 50 is formed on the glass substrate 100, the wiring layer 210 is subsequently formed on the first surface 101 side of the glass substrate 100. The wiring layer 210 is realized, for example, by forming an insulating layer 215 having contact holes and forming a conductive layer 212. The insulating layer 215 is formed, for example, by a photosensitive dry film resist. A dry film resist is formed on the glass substrate 100, exposed in a predetermined pattern, and developed to form contact holes. The conductive layer 212 may be formed by electroplating or by vapor deposition using a sputtering method or the like, similarly to the through electrode 50 described above. The wiring layer 210 having a multi-layer structure is formed by repeatedly forming the insulating layer 215 and the conductive layer 212.

Subsequently, when the wiring layer 220 is formed on the second surface 102 side of the glass substrate 100, the structure shown in FIG. 1 is realized. The above is the description of the manufacturing method of the through silicon via substrate 10.

<Example>
[Shape of through hole (no minimum value of diameter Sd)]
The shape of the through hole 150 and the manufacturing method for realizing this shape will be described. First, a shape in which the diameter Sd does not have a minimum value inside the through hole 150 will be described. Here, the first embodiment (shape A) and the second embodiment (shape B) will be described.

FIG. 9 is a diagram illustrating a shape example (shape A) of the through hole in the first embodiment of the present disclosure. The diameter Sd of the through hole 150A shown in FIG. 9 is the largest on the first surface 101 side, becomes smaller toward the second surface 102 side, and is the smallest on the second surface 102 side. In FIG. 9, the central axis CA of the through hole 150A corresponds to the center of the circle that appears when the through hole 150A is cut by a plane parallel to the first surface 101. Therefore, the distance (radius of the circle) from the central axis CA to the inner surface of the through hole 150A corresponds to the diameter Sd. Further, the inclination angle TA is an angle of the inner surface with respect to the central axis CA. In FIG. 9, the angle between the inclination SS of the inner surface and the central axis CA at 175 μm (43.75%) from the first surface 101 is exemplified as the inclination angle TA.

FIG. 10 is a diagram illustrating a shape example (shape B) of the through hole in the second embodiment of the present disclosure. The diameter Sd of the through hole 150B shown in FIG. 10 is smaller on the second surface 102 side than on the first surface 101 side, and increases once and then decreases from the first surface 101 side to the second surface 102 side. That is, the diameter Sd has a maximum value inside the through hole. The position where the diameter Sd reaches the maximum value exists on the first surface 101 side of the central position of the first surface 101 and the second surface 102.

The through holes of the shapes A and B were made by using the apparatus for irradiating the laser disclosed in Patent Document 1 (International Publication No. 2010/087483) described above. For the irradiation of the excimer laser light, the irradiation fluence on the processed surface of the glass substrate 100 was adjusted every 50 μm. By adjusting the irradiation fluence in this way, the shape of the through hole formed was controlled.

[First Example and First Comparative Example]
The influence of various shapes of the through hole 150A on the premise of the shape A on the formation of the first metal layer 51 was evaluated. Here, as a first embodiment, through holes of shapes A1 to A3 are formed. Further, as a first comparative example, through holes of shapes A4 and A5 were formed. The relationship between the depth Fd and the irradiation fluence (and the number of shots) in each shape is as shown in Table 1 below. The depth Fd corresponds to the distance from the first surface 101. Therefore, the depth Fd = 0 μm corresponds to the first surface 101, and the depth Fd = 400 μm corresponds to the second surface 102.

FIG. 11 is a diagram illustrating the shape characteristics of the through hole in the first embodiment (shape A1) of the present disclosure. FIG. 12 is a diagram illustrating the shape characteristics of the through hole in the first embodiment (shape A2) of the present disclosure. FIG. 13 is a diagram illustrating the shape characteristics of the through hole in the first embodiment (shape A3) of the present disclosure. FIG. 14 is a diagram illustrating the shape characteristics of the through hole in the first comparative example (shape A4) of the present disclosure. FIG. 15 is a diagram illustrating the shape characteristics of the through hole in the first comparative example (shape A5) of the present disclosure. The shape characteristics of the through holes shown in FIGS. 11 to 15 are the relationship between the depth Fd and the diameter Sd, and the relationship between the depth Fd and the inclination angle TA. The measurement position of the inclination angle TA is 6.25% (25 μm), 18.75% (75 μm), and 31.25% from the first surface 101 in the section from the first surface 101 to the second surface 102. (125 μm), 43.75% (175 μm), 56.25% (225 μm), 68.75% (275 μm), 81.25% (325 μm), 93.75% (375 μm) distance positions (8 in total) Point).

Through holes 150A of shapes A1 to A5 formed through electrodes 50 by the method described in the first embodiment above. The cross section of the through silicon via 50 of each shape was observed, and it was evaluated whether or not the first metal layer 51 was formed on the entire inner surface of the through hole 150A. If there is no region where the first metal layer 51 is not formed, it is considered good (OK), and if there is a region where the first metal layer 51 is not formed, it is considered poor (NG). Since the first metal layer 51 is very thin, the second metal layer 52 is formed by electroplating, and the first metal layer 51 is indirectly formed by observing the state of the second metal layer 52. It was evaluated whether or not it was.

As a result, it was determined that the shapes A1, A2, and A3 were good, and the shapes A4 and A5 were poor.

[Second Example and Second Comparative Example]
The influence of various shapes of the through hole 150B on the premise of the shape B on the formation of the first metal layer 51 was evaluated. Here, as a second embodiment, through holes of shapes B1 and B2 are formed. Further, as a second comparative example, through holes of shapes B3 and B4 were formed. The relationship between the depth Fd and the irradiation fluence (and the number of shots) in each shape is as shown in Table 2 below.

FIG. 16 is a diagram illustrating the shape characteristics of the through hole in the second embodiment (shape B1) of the present disclosure. FIG. 17 is a diagram illustrating the shape characteristics of the through hole in the second embodiment (shape B2) of the present disclosure. FIG. 18 is a diagram illustrating the shape characteristics of the through hole in the second comparative example (shape B3) of the present disclosure. FIG. 19 is a diagram illustrating the shape characteristics of the through hole in the second comparative example (shape B4) of the present disclosure. The shape characteristics of the through holes shown in FIGS. 16 to 19 are the relationship between the depth Fd and the diameter Sd, and the relationship between the depth Fd and the inclination angle TA. In the evaluation method, it was evaluated whether or not the first metal layer 51 was formed on the entire inner surface of the through hole 150B in the same manner as described above.

As a result, it was determined that the shapes B1 and B2 were good and the shapes B3 and B4 were poor.

[Relationship between evaluation result and tilt angle (no minimum value of diameter Sd)]
Based on the evaluation results of the first example, the first comparative example, the second example, and the second comparative example, good evaluation results can be obtained when the total value TSA of the inclination angle TA satisfies a predetermined condition. Found. The total tilt angle TSA is the sum of the eight tilt angles TA. Table 3 below shows the relationship between the total tilt angle TSA and the evaluation results for each shape.

As shown in Table 3, when the total inclination angle TSA at the eight measurement points is 8 ° or more, the evaluation result is good. This indicates that the above-mentioned through hole 150 has a shape satisfying the "first condition".

[Shape of through hole (with minimum value of diameter Sd)]
A shape having a minimum diameter Sd inside the through hole 150 will be described. Here, a third embodiment (shape C), a fourth embodiment (shape D), and a fifth embodiment (shape E) will be described.

FIG. 20 is a diagram illustrating a shape example (shape C) of the through hole in the third embodiment of the present disclosure. The diameter Sd of the through hole 150C shown in FIG. 20 is the largest on the first surface 101 side and the second surface 102 side, and has a minimum value near the center inside the through hole. The vicinity of the center is a position where the depth Fd is between 43.75% (175 μm) and 56.25% (225 μm), and is approximately 50% (200 μm).

FIG. 21 is a diagram illustrating a shape example (shape D) of the through hole in the fourth embodiment of the present disclosure. The diameter Sd of the through hole 150D shown in FIG. 21 has a minimum value near the center inside the through hole, and is at an intermediate position between the first surface 101 and the vicinity of the center and an intermediate position between the second surface 102 and the vicinity of the center. It has a maximum value.

FIG. 22 is a diagram illustrating a shape example (shape E) of the through hole in the fifth embodiment of the present disclosure. The diameter Sd of the through hole 150E shown in FIG. 22 has a maximum value on the first surface 101 side and the second surface 102 side, and has an intermediate position between the first surface 101 and the vicinity of the center and the second surface 102 and the vicinity of the center. It has a local minimum value at the intermediate position of. Except for the diameter Sd on the first surface 101 and the diameter Sd on the second surface 102, the diameter Sd has a maximum value near the center.

The through holes of the shapes C, D, and E were created by using the laser irradiation apparatus and the etching apparatus disclosed in Patent Document 2 (Japanese Patent Laid-Open No. 2014-501686) described above. Specifically, a damaged region is formed inside the glass substrate 100 by irradiating a UV laser beam using the Nd: KGW laser apparatus described in the above document. At this time, the laser beam irradiation from the first surface 101 side of the glass substrate 100 and the laser beam irradiation from the second surface 102 side were performed in order. The conditions are the same for laser beam irradiation from any surface side.

After the laser beam irradiation on both sides is completed, the glass is subjected to a 10-minute etching treatment in an ultrasonic bath using an etching solution (HF (20% by volume) + HNO3 (10% by volume) aqueous solution) at 35 ° C. The damaged area of the substrate 100 was melted.

Among the above processes, the shape of the damaged region formed on the glass substrate 100 was adjusted by adjusting the irradiation conditions of the laser beam. When the shape of the damaged area changes, the shape of the through hole also changes with the change. The irradiation conditions are the inlet aperture diameter of the laser beam (the aperture diameter on the surface of the glass substrate 100), the intermediate aperture diameter (the aperture diameter near the center of the glass substrate 100 (200 μm from the surface)), and the irradiation time. The inlet aperture and the intermediate aperture are adjusted by changing the lens NA and the focal position.

[Third Example and Third Comparative Example]
The influence of various shapes of the through hole 150C on the premise of the shape C on the formation of the first metal layer 51 was evaluated. Here, as a third embodiment, through holes of shapes C1, C2, and C3 are formed. Further, as a third comparative example, a through hole having a shape C4 was formed. The irradiation conditions for each shape are as shown in Table 4 below.

FIG. 23 is a diagram illustrating the shape characteristics of the through hole in the third embodiment (shape C1) of the present disclosure. FIG. 24 is a diagram illustrating the shape characteristics of the through hole in the third embodiment (shape C2) of the present disclosure. FIG. 25 is a diagram illustrating the shape characteristics of the through hole in the third embodiment (shape C3) of the present disclosure. FIG. 26 is a diagram illustrating the shape characteristics of the through hole in the third comparative example (shape C4) of the present disclosure. The shape characteristics of the through holes shown in FIGS. 23 to 26 are the relationship between the depth Fd and the diameter Sd, and the relationship between the depth Fd and the inclination angle TA. In the evaluation method, it was evaluated whether or not the first metal layer 51 was formed on the entire inner surface of the through hole 150C in the same manner as described above.

As a result, it was determined that the shapes C1, C2, and C3 were good, and the shape C4 was poor.

[Fourth Example and Fourth Comparative Example]
The influence of various shapes of the through hole 150D on the premise of the shape D on the formation of the first metal layer 51 was evaluated. Here, as a fourth embodiment, through holes of shapes D1 and D2 are formed. Further, as a fourth comparative example, through holes of shapes D3 and D4 were formed. The irradiation conditions for each shape are as shown in Table 5 below.

FIG. 27 is a diagram illustrating the shape characteristics of the through hole in the fourth embodiment (shape D1) of the present disclosure. FIG. 28 is a diagram illustrating the shape characteristics of the through hole in the fourth embodiment (shape D2) of the present disclosure. FIG. 29 is a diagram illustrating the shape characteristics of the through hole in the fourth comparative example (shape D3) of the present disclosure. FIG. 30 is a diagram illustrating the shape characteristics of the through hole in the fourth comparative example (shape D4) of the present disclosure. The shape characteristics of the through holes shown in FIGS. 27 to 30 are the relationship between the depth Fd and the diameter Sd, and the relationship between the depth Fd and the inclination angle TA. In the evaluation method, it was evaluated whether or not the first metal layer 51 was formed on the entire inner surface of the through hole 150D in the same manner as described above.

As a result, it was determined that the shapes D1 and D2 were good and the shapes D3 and D4 were poor.

[Fifth Example]
The influence of various shapes of the through hole 150E on the premise of the shape E on the formation of the first metal layer 51 was evaluated. Here, a through hole of shape E1 was formed as the Eth embodiment. The irradiation conditions in this shape are as shown in Table 6 below.

FIG. 31 is a diagram illustrating the shape characteristics of the through hole in the fifth embodiment (shape E1) of the present disclosure. The shape characteristics of the through hole shown in FIG. 31 are the relationship between the depth Fd and the diameter Sd, and the relationship between the depth Fd and the inclination angle TA. In the evaluation method, it was evaluated whether or not the first metal layer 51 was formed on the entire inner surface of the through hole 150E in the same manner as described above.

As a result, the shape E1 was determined to be good.

[Relationship between evaluation result and tilt angle (with minimum value of diameter Sd)]
Based on the evaluation results of the above-mentioned 3rd Example, 3rd Comparative Example, 4th Example, 4th Comparative Example and 5th Example, a good evaluation result is obtained when the total value TSA of the inclination angle TA satisfies a predetermined condition. Was found to be obtained. The total tilt angle TSA is the sum of the four tilt angles TA. Table 7 below shows the relationship between the total tilt angle TSA and the evaluation results for each shape. The measurement position of the inclination angle TA is 6.25% (25 μm), 18.75% (75 μm), and 31.25% (125 μm) from the first surface 101 in the section from the first surface 101 to the second surface 102. ), 4 points at a distance of 43.75% (175 μm).

Regarding the through holes of the shapes C, D, and E, the first surface 101 side and the second surface 102 side have a symmetrical relationship with respect to the center (50%, 200 μm) of the through holes. Therefore, the measurement position of the inclination angle TA is 56.25% (225 μm), 68.75% (275 μm), 81.25% from the first surface 101 in the section from the first surface 101 to the second surface 102. In the case of four points at a distance of (325 μm) and 93.75% (375 μm), the total inclination angle value TSA is a value obtained by reversing the positive and negative directions.

As shown in Table 6, four measurement points (6.25% (25 μm), 18.75% (75 μm), 31 of the section from the first surface 101 to the second surface 102 from the first surface 101). When the total tilt angle TSA at 0.25% (125 μm) and 43.75% (175 μm) distance positions) is 4 ° or more, the evaluation result is good. At this time, as a result, four measurement points (first surface 101 or 56.25% (225 μm), 68.75% (275 μm) of the section from the first surface 101 to the second surface 102). When the total tilt angle TSA at 81.25% (325 μm) and 93.75% (375 μm) distance positions) is -4 ° or less, the evaluation result is good. This indicates that the above-mentioned through hole 150 has a shape satisfying the "second condition".

<Second Embodiment>
In the second embodiment, the semiconductor device manufactured by using the through silicon via substrate 10 in the first embodiment will be described.

FIG. 32 is a diagram showing a semiconductor device according to the second embodiment of the present invention. The semiconductor device 1000 has three stacked via electrode substrates 10 (10-1, 10-2, 10-3) and is connected to the LSI substrate 70. The through silicon via substrate 10-1 has, for example, a semiconductor element such as a DRAM, and also has connection terminals 81-1 and 82-1 formed of conductive layers 212, 222, and the like. These through electrode substrates 10 (10-1, 10-2, 10-3) do not have to use the glass substrate 100, and some of the through electrode substrates 10 are different from the other through electrode substrates 10. Substrates made of different materials may be used. The connection terminal 81-1 is connected to the connection terminal 80 of the LSI board 70 via the bump 90-1. The connection terminal 82-1 is connected to the connection terminal 81-2 of the through electrode substrate 10-2 via the bump 90-2. The connection terminal 82-2 of the through silicon via 10-2 and the connection terminal 83-1 of the through silicon via 10-3 are also connected via bumps 90-3. For the bump 90 (90-1, 90-2, 90-3), for example, a metal such as indium, copper, or gold is used.

When the through silicon via substrates 10 are laminated, the number of layers is not limited to three, and may be two layers or four or more layers. Further, the connection between the through electrode substrate 10 and another substrate is not limited to the one by bumps, and other bonding techniques such as eutectic bonding may be used. Further, the through electrode substrate 10 and another substrate may be adhered by applying and firing polyimide, epoxy resin, or the like.

FIG. 33 is a diagram showing another example of the semiconductor device according to the second embodiment of the present invention. The semiconductor device 1000 shown in FIG. 33 has a laminated structure in which semiconductor circuit boards (semiconductor chips) 71-1 and 71-2 such as a MEMS device, CPU, and memory, and a through electrode substrate 10 are laminated, and has an LSI substrate 70. It is connected to the.

The through silicon via substrate 10 is arranged between the semiconductor circuit board 71-1 and the semiconductor circuit board 71-2, and is connected to each of them via bumps 90-1 and 90-2. The semiconductor circuit board 71-1 is mounted on the LSI board 70. The LSI board 70 and the semiconductor circuit board 71-2 are connected by a wire 95. In this example, the through silicon via substrate 10 is used as an interposer for laminating and three-dimensionally mounting a plurality of semiconductor circuit boards. By connecting the through silicon via 10 to a plurality of semiconductor circuit boards having different functions, a multifunctional semiconductor device can be realized. For example, by using the semiconductor circuit board 71-1 as a 3-axis acceleration sensor and the semiconductor circuit board 71-2 as a 2-axis magnetic sensor, it is possible to realize a semiconductor device in which a 5-axis motion sensor is realized by one module. ..

When the semiconductor circuit board is a sensor formed by a MEMS device or the like, the sensing result may be output as an analog signal. In this case, the low-pass filter, amplifier, and the like may also be formed on the semiconductor circuit board or the through silicon via board 10.

FIG. 34 is a diagram showing another example of the semiconductor device according to the fifth embodiment of the present invention. The above two examples (FIGS. 32 and 33) were three-dimensional mounting, but in this example, they are applied to 2.5-dimensional mounting. In the example shown in FIG. 34, six through electrode substrates 10 (10-1 to 10-6) are laminated and connected to the LSI substrate 70. However, not only are all the through electrode substrates 10 stacked and arranged, but they are also arranged side by side in the in-plane direction of the substrate.

In the example of FIG. 34, the through electrode substrates 10-1, 10-5 are connected on the LSI substrate 70, the through electrode substrates 10-2, 10-4 are connected on the through electrode substrate 10-1, and the through electrode substrates are connected. The through electrode substrate 10-3 is connected on 10-2, and the through electrode substrate 10-6 is connected on the through electrode substrate 10-5. As in the example shown in FIG. 33, such 2.5-dimensional mounting is possible even when the through electrode substrate 10 is used as an interposer for connecting a plurality of semiconductor circuit boards. For example, through electrode substrates 10-3, 10-4, 10-6 and the like may be replaced with semiconductor circuit boards.

The semiconductor device 1000 manufactured as described above includes various devices such as mobile terminals (mobile phones, smartphones, notebook personal computers, etc.), information processing devices (desktop personal computers, servers, car navigation systems, etc.), home appliances, and the like. It is installed in electrical equipment.

FIG. 35 is a diagram showing an electronic device using the semiconductor device according to the fifth embodiment of the present invention. The semiconductor device 1000 is mounted on various electric devices such as mobile terminals (mobile phones, smartphones, notebook personal computers, etc.), information processing devices (desktop personal computers, servers, car navigation systems, etc.), home appliances, and the like. As an example of the electric device on which the semiconductor device 1000 is mounted, a smartphone 500 and a notebook personal computer 600 are shown. These electric devices have a control unit 1100 composed of a CPU or the like that executes an application program and realizes various functions. The various functions include a function of using an output signal from the semiconductor device 1000. The semiconductor device 1000 may have the function of the control unit 1100.

10 ... through electrode substrate, 50 ... through electrode, 51 ... first metal layer, 52 ... second metal layer, 70 ... LSI substrate, 71 ... semiconductor circuit board, 80, 81, 82 ... connection terminals, 90 ... bumps, 95 ... wire, 100 ... glass substrate, 101 ... first surface, 102 ... second surface, 150 ... through hole, 210, 220 ... wiring layer, 212, 222 ... conductive layer, 215,225 ... insulating layer, 500 ... smartphone, 600 ... notebook personal computer, 1000 ... semiconductor device, 1100 ... control unit

Claims (11)

A substrate diameter containing no through-holes of the pole small value in penetrating holes inside the second surface from the first surface,
A conductor arranged along the inner surface of the through hole and
With
An insulating region surrounded by the conductor is arranged inside the through hole.
The through holes are 6.25%, 18.75%, 31.25%, 43.75%, 56.25%, 68 of the section from the first surface to the second surface. The total value of the inclination angle of the inner surface with respect to the central axis of the through hole at the distances of .75%, 81.25%, and 93.75% (the angle at which the first surface side expands is defined as a positive inclination angle) is , A through electrode substrate that satisfies the condition of 8.0 ° or more. A substrate including a through-hole having a penetrating diameter is extremely small value inside the hole on the second surface from the first surface,
A conductor arranged along the inner surface of the through hole and
With
An insulating region surrounded by the conductor is arranged inside the through hole.
The through hole is the penetration at a distance of 6.25%, 18.75%, 31.25%, 43.75% from the first surface in the section from the first surface to the second surface. The total value of the inclination angle of the inner surface with respect to the central axis of the hole (the angle at which the first surface side expands is a positive inclination angle) is 4.0 ° or more, and 56.25%, 68.75 from the first surface. A through electrode substrate that satisfies the condition that the total value of the inclination angles of the inner surface with respect to the central axis of the through hole at the distances of%, 81.25%, and 93.75% is -4.0 ° or less. The insulating region is a region where insulation body is filled, the through electrode substrate according to claim 1 or claim 2. The through silicon via substrate according to claim 3, wherein the insulator contains a resin. The conductor includes a first metal layer and a second metal layer.
The first metal layer is arranged between the second metal layer and the substrate.
The through electrode substrate according to any one of claims 1 to 4, wherein the first metal layer is arranged on at least a part of both the first surface and the second surface. The fifth aspect of the present invention, wherein at least a part of the first metal layer arranged on the first surface and the second surface is connected to the first metal layer arranged inside the through hole. Through electrode substrate. The through silicon via according to any one of claims 1 to 6, wherein the substrate is a glass substrate. The through silicon via substrate according to any one of claims 1 to 7, wherein the conductor includes a first metal layer arranged on the substrate and a second metal layer arranged on the first metal layer. .. The through electrode substrate according to any one of claims 1 to 8, wherein the through hole has an aspect ratio of 4 or more. The through electrode substrate according to any one of claims 1 to 9, wherein the through hole has a maximum diameter inside the hole. The through silicon via substrate according to any one of claims 1 to 10 .
A semiconductor circuit board electrically connected to the conductor of the through silicon via substrate,
Semiconductor device with.

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