JP4659087B2 - Differential balanced signal transmission board - Google Patents

Differential balanced signal transmission board Download PDF

Info

Publication number
JP4659087B2
JP4659087B2 JP2008321235A JP2008321235A JP4659087B2 JP 4659087 B2 JP4659087 B2 JP 4659087B2 JP 2008321235 A JP2008321235 A JP 2008321235A JP 2008321235 A JP2008321235 A JP 2008321235A JP 4659087 B2 JP4659087 B2 JP 4659087B2
Authority
JP
Japan
Prior art keywords
wiring
signal line
balanced signal
differential balanced
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2008321235A
Other languages
Japanese (ja)
Other versions
JP2009060150A (en
Inventor
秀樹 岩城
哲義 小掠
豊 田口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2008321235A priority Critical patent/JP4659087B2/en
Publication of JP2009060150A publication Critical patent/JP2009060150A/en
Application granted granted Critical
Publication of JP4659087B2 publication Critical patent/JP4659087B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Landscapes

  • Structure Of Printed Boards (AREA)

Description

本発明は、差動信号を高速に伝送する素子間を接続する差動平衡信号伝送基板に関する。   The present invention relates to a differential balanced signal transmission board that connects elements that transmit a differential signal at high speed.

ＡＶ機器間や、パソコンと周辺機器の間で、静止画または動画や音声等のデータを高速で転送する技術の１つに、シリアルインタフェースのＩＥＥＥ１３９４がある。このデータ伝送には、差動平衡信号伝送方式が用いられる。これは、１つの信号から、非反転信号と反転信号との２相の信号を発生し、２本の信号線を用いて伝送する方式である。   One of the technologies for transferring data such as still images or moving images or audio between AV devices or between a personal computer and peripheral devices at high speed is IEEE1394 of a serial interface. A differential balanced signal transmission system is used for this data transmission. This is a system in which a two-phase signal of a non-inverted signal and an inverted signal is generated from one signal and transmitted using two signal lines.

差動平衡信号伝送方式を用いて機器間を接続する場合は、同軸ケーブルを用いなくても外部からのコモンモード・ノイズを防ぐことが可能であり、通常、ツイストペアと呼ばれるケーブルが用いられる。これは、２本の線をより合わせることにより信号線にノイズが乗りにくくなるとともに、伝送線として一定のインピーダンスのケーブルとして扱うことができるという利点がある。   When devices are connected using a differential balanced signal transmission method, common mode noise from the outside can be prevented without using a coaxial cable, and a cable called a twisted pair is usually used. This is advantageous in that noise can hardly be applied to the signal line by matching the two lines together, and it can be handled as a cable having a certain impedance as a transmission line.

従来の差動平衡信号伝送基板は、一般的に、少なくとも一層の配線層を備え、一つの配線層内に少なくとも一対のデータ伝送回路（差動平衡信号線対）を有すると共に、他の配線層に電源用配線や接地用配線を有する構成であった。   Conventional differential balanced signal transmission boards generally include at least one wiring layer, and have at least a pair of data transmission circuits (differential balanced signal line pairs) in one wiring layer, and other wiring layers. The power supply wiring and the ground wiring are included.

また、特開平１０−３０３５２１号公報には、液晶ディスプレイとドライバ用ＬＳＩとの間のデータ転送に、終端抵抗と差動インピーダンスとの整合をとり、信号の品質低下やノイズの放射を防ぐため、一対のデータ伝送回路（差動平衡信号線対）のうち、一方の電気信号路と他方の電気信号路とを、複数の配線層における互いに異なる配線層に、段違いに平行に配置した構成が開示されている。   Japanese Patent Laid-Open No. 10-303521 discloses that data transfer between a liquid crystal display and a driver LSI is matched with a termination resistor and a differential impedance to prevent signal degradation and noise emission. Disclosed is a configuration in which one electrical signal path and the other electrical signal path in a pair of data transmission circuits (differential balanced signal line pairs) are arranged in parallel on different wiring layers in a plurality of wiring layers. Has been.

すなわち、図１３に示すように、絶縁層２０８の両面に、信号線２０６と信号線２０７とが段違いの平行線として配置され、それらを覆うようにコーティング層２０９が配置されている。コーティング層２０９は、例えばポリイミドで形成される。この構成において、信号線２０６と信号線２０７との間隔を、例えば、水平方向で２５０μｍ、厚さ方向で２５μｍとし、信号線２０６・２０７の幅をそれぞれ２００μｍとすれば、信号線２０６・２０７の差動インピーダンスを１００Ω近辺にすることができる。
特開平１０−３０３５２１号公報 That is, as shown in FIG. 13, the signal line 206 and the signal line 207 are arranged as parallel lines on both sides of the insulating layer 208, and the coating layer 209 is arranged so as to cover them. The coating layer 209 is made of polyimide, for example. In this configuration, if the distance between the signal line 206 and the signal line 207 is, for example, 250 μm in the horizontal direction and 25 μm in the thickness direction, and the width of the signal lines 206 and 207 is 200 μm, respectively, The differential impedance can be around 100Ω.
JP-A-10-303521

近年のコンピュータの高速化に伴い、半導体チップが高速で動作すると、半導体チップを内蔵するパッケージやそれを実装する回路基板内に配置された配線中においても、信号を高速で伝送させる必要がある。このため、半導体パッケージ内の信号配線や回路基板中の信号配線を、伝送線路として捉えて設計しなければならない。また、半導体パッケージの入出力端子の増加により、パッケージ内に配線する信号線の数が飛躍的に増加している。そのため、配線を高密度に配置しなければならず、おのずと配線の間隔も狭める必要がある。   With the recent increase in the speed of computers, when semiconductor chips operate at high speed, it is necessary to transmit signals at high speed even in a package incorporating the semiconductor chip and a wiring arranged in a circuit board on which the semiconductor chip is mounted. For this reason, the signal wiring in the semiconductor package and the signal wiring in the circuit board must be designed as transmission lines. Also, the number of signal lines wired in the package has increased dramatically due to an increase in input / output terminals of the semiconductor package. Therefore, it is necessary to arrange the wirings at a high density, and it is necessary to narrow the intervals between the wirings.

しかしながら、高速信号を伝送する信号配線同士を近接して配置すると、信号配線間に発生する寄生成分、特に配線間容量（浮遊容量）や相互インダクタンスにより、クロストーク等のノイズが問題となる。   However, if signal wirings that transmit high-speed signals are arranged close to each other, noise such as crosstalk becomes a problem due to parasitic components generated between the signal wirings, particularly capacitance between wirings (floating capacitance) and mutual inductance.

特に、回路基板中の信号伝送方式として差動平衡信号伝送方式を採用した場合、コモンモード・ノイズの影響を抑制することが可能である反面、差動平衡信号伝送方式以外の方式と比較して、配線の本数が単純には２倍となる。これにより、隣接する配線同士をさらに高密度に配置しなければならず、クロストークなどのノイズの問題はさらに深刻となる。   In particular, when the differential balanced signal transmission method is adopted as the signal transmission method in the circuit board, it is possible to suppress the influence of common mode noise, but compared with methods other than the differential balanced signal transmission method. The number of wires is simply doubled. As a result, adjacent wirings must be arranged with higher density, and noise problems such as crosstalk become more serious.

さらに、ＩＥＥＥ１３９４の規格を満たすためには、２本の信号線間の差動モードインピーダンスだけでなくコモンモードインピーダンスも所定の範囲に収まることが必要である。例えば、差動モードインピーダンスは（１１０±６）Ω、コモンモードインピーダンスは（３３±６）Ωと、規定されている。そのため、接地用配線と信号線との物理的な配置を制御することが必要となる。   Further, in order to satisfy the IEEE 1394 standard, it is necessary that not only the differential mode impedance between the two signal lines but also the common mode impedance fall within a predetermined range. For example, the differential mode impedance is defined as (110 ± 6) Ω and the common mode impedance is defined as (33 ± 6) Ω. For this reason, it is necessary to control the physical arrangement of the grounding wiring and the signal line.

本発明は、上記の問題に鑑み、接地用配線や電源用配線と、信号線との物理的な配置を考慮することにより、クロストークなどのノイズを抑制すると共に、インピーダンスを所定の範囲に制御することが可能な差動平衡信号伝送基板を提供することを目的とする。   In view of the above problems, the present invention suppresses noise such as crosstalk and controls the impedance within a predetermined range by considering the physical arrangement of the ground wiring, power supply wiring, and signal line. An object of the present invention is to provide a differential balanced signal transmission board that can be used.

上記の目的を達成するために、本発明の第１の差動平衡信号伝送基板は、絶縁体層と、前記絶縁体層上に設けられた少なくとも一層の配線層とを備えると共に、第１の信号線の電圧と第２の信号線の電圧との和が常に一定である差動平衡信号線対を同一の配線層内に２対以上有し、前記差動平衡信号線対同士の間に、接地用配線および電源用配線の少なくとも一方が設けられたことを特徴とする。   In order to achieve the above object, a first differential balanced signal transmission board of the present invention includes an insulator layer and at least one wiring layer provided on the insulator layer. Two or more differential balanced signal line pairs in which the sum of the voltage of the signal line and the voltage of the second signal line is always constant are provided in the same wiring layer, and between the differential balanced signal line pairs. Further, at least one of a grounding wiring and a power supply wiring is provided.

この構成によれば、同一の配線層内で隣接する差動平衡信号線対同士の間に、接地用配線および電源用配線の少なくとも一方が設けられたことにより、従来のように差動平衡信号線対と接地用配線および電源用配線とが互いに異なる配線層に設けられた構成と比較して、設置する接地用配線および電源用配線の本数を少なくしてもクロストークが小さく抑制された差動平衡信号伝送基板を提供することが可能となる。   According to this configuration, since at least one of the grounding wiring and the power supply wiring is provided between the differential balanced signal line pairs adjacent in the same wiring layer, the differential balanced signal is conventionally provided. Compared to the configuration in which the wire pair, grounding wiring, and power supply wiring are provided in different wiring layers, the difference in which crosstalk is suppressed even if the number of grounding wirings and power supply wirings to be installed is reduced. It is possible to provide a dynamic balance signal transmission board.

上記第１の差動平衡信号伝送基板において、差動平衡信号線対同士の間に、接地用配線および電源用配線の対が設けられたことが好ましい。   In the first differential balanced signal transmission board, a pair of ground wiring and power wiring is preferably provided between the differential balanced signal line pairs.

この構成によれば、同一の配線内で隣接する差動平衡信号線対同士の間に、接地用配線および電源用配線の対が設けられたことにより、クロストークが小さく抑制されると共に、電源と接地との間のインピーダンスが小さく抑制された差動平衡信号伝送基板を提供することが可能となる。   According to this configuration, by providing a pair of grounding wiring and power supply wiring between adjacent differential balanced signal line pairs in the same wiring, crosstalk is suppressed to a small level and power supply It is possible to provide a differential balanced signal transmission board in which the impedance between the ground and the ground is suppressed to be small.

上記第１の差動平衡信号伝送基板において、さらに、接地用配線と電源用配線との間隙に、前記絶縁体層の比誘電率よりも大きな比誘電率の誘電体が充填されたことが好ましい。   In the first differential balanced signal transmission board, it is preferable that a gap between the grounding wiring and the power supply wiring is filled with a dielectric having a relative dielectric constant larger than that of the insulating layer. .

この構成によれば、接地用配線と電源用配線との間の対向容量が増加するので、電源と接地との間のインピーダンスがさらに小さく抑制される。   According to this configuration, since the opposing capacitance between the grounding wiring and the power supply wiring is increased, the impedance between the power supply and the ground is further reduced.

上記第１の差動平衡信号伝送基板において、さらに、接地用配線と電源用配線との間隔が、前記差動平衡信号線対と、前記電源用配線および接地用配線の対との間隔以下であることが好ましい。   In the first differential balanced signal transmission board, the distance between the ground wiring and the power wiring is not more than the distance between the differential balanced signal line pair and the pair of the power wiring and the ground wiring. Preferably there is.

この構成によれば、接地用配線と電源用配線との間の対向容量が増加するので、電源系のインピーダンスを小さく抑えることができる。   According to this configuration, since the opposing capacitance between the grounding wiring and the power supply wiring is increased, the impedance of the power supply system can be kept small.

上記第１の差動平衡信号伝送基板において、同一の差動平衡信号線対における第１の信号線と第２の信号線との間隙に、前記絶縁体層の比誘電率よりも大きな比誘電率の誘電体が充填されたことが好ましい。   In the first differential balanced signal transmission board, a relative dielectric constant larger than a relative dielectric constant of the insulator layer is formed in a gap between the first signal line and the second signal line in the same differential balanced signal line pair. Preferably, the dielectric material is filled.

この構成によれば、差動平衡信号線対における第１の信号線と第２の信号線との間のカップリングが強くなるので、同一配線層内の他の差動平衡信号線対に対するクロストーク等の影響をさらに抑制することができる。   According to this configuration, since the coupling between the first signal line and the second signal line in the differential balanced signal line pair becomes strong, the crossing with respect to another differential balanced signal line pair in the same wiring layer The influence of talk or the like can be further suppressed.

上記第１の差動平衡信号伝送基板は、絶縁体層の一方の面側に第１の配線層を備えると共に、前記絶縁体層の他方の面側に第２の配線層を備え、前記第１の配線層における前記差動平衡信号線対と、前記第２の配線層における前記差動平衡信号線対とが平行でないことが好ましい。   The first differential balanced signal transmission board includes a first wiring layer on one surface side of the insulator layer, and a second wiring layer on the other surface side of the insulator layer. It is preferable that the differential balanced signal line pair in one wiring layer and the differential balanced signal line pair in the second wiring layer are not parallel.

この構成によれば、第１の配線層と第２の配線層との間で配線方向が平行でないことにより、一方の配線層におけるリターン電流が他方の配線層に影響を及ぼすことがないので、インピーダンスを所望の値に決定することが容易となる。   According to this configuration, since the wiring direction is not parallel between the first wiring layer and the second wiring layer, the return current in one wiring layer does not affect the other wiring layer. It becomes easy to determine the impedance to a desired value.

さらに、前記第１の配線層における差動平衡信号線対の第１の信号線と、前記第２の配線層における差動平衡信号線対の第１の信号線とが、前記絶縁体層に形成された貫通孔を介して電気的に接続され、前記第１の配線層における差動平衡信号線対の第２の信号線と、前記第２の配線層における差動平衡信号線対の第２の信号線とが、前記絶縁体層に形成された貫通孔を介して電気的に接続され、前記貫通孔を介して接続された前記第１の配線層の差動平衡信号線対と前記第２の配線層の差動平衡信号線対とにおいて、第１の信号線の配線長の和が第２の信号線の配線長の和と等しいことが好ましい。   Furthermore, the first signal line of the differential balanced signal line pair in the first wiring layer and the first signal line of the differential balanced signal line pair in the second wiring layer are in the insulator layer. Electrically connected via the formed through hole, and the second signal line of the differential balanced signal line pair in the first wiring layer and the second signal line of the differential balanced signal line pair in the second wiring layer. 2 signal lines are electrically connected via a through hole formed in the insulator layer, and the differential balanced signal line pair of the first wiring layer connected via the through hole and the signal line In the differential balanced signal line pair of the second wiring layer, the sum of the wiring lengths of the first signal lines is preferably equal to the sum of the wiring lengths of the second signal lines.

この構成によれば、第１の信号線の配線長と第２の信号線の配線長とが互いに等しいことにより、信号の伝搬遅延差がなくなるので、信号の受信端でのホールド時間を短くすることが可能となる。これにより、高速信号を伝送することが可能な差動平衡信号伝送基板を提供することができる。   According to this configuration, since the wiring length of the first signal line and the wiring length of the second signal line are equal to each other, there is no difference in signal propagation delay, so that the hold time at the signal receiving end is shortened. It becomes possible. Thereby, a differential balanced signal transmission board capable of transmitting a high-speed signal can be provided.

さらに、前記絶縁体層の一方の面側と他方の面側に形成された前記電源用配線同士および接地用配線同士を接続する前記貫通孔同士の最長距離が、前記差動平衡信号線対を伝送する信号の波長の１／４以下であることが好ましい。   Further, the longest distance between the through holes connecting the power supply wirings and the grounding wirings formed on one surface side and the other surface side of the insulator layer is the differential balanced signal line pair. It is preferable that it is 1/4 or less of the wavelength of the signal to be transmitted.

この構成によれば、高周波的に安定した低インピーダンスの接地層および電源層を形成することができるため、差動平衡信号線のインピーダンスを高周波領域まで一定に保つことが可能となる。これにより、反射の少ない信号伝送が可能な差動平衡信号伝送基板を提供することができる。   According to this configuration, it is possible to form a low-impedance ground layer and a power supply layer that are stable in terms of high frequency, so that the impedance of the differential balanced signal line can be kept constant up to the high frequency region. Thereby, a differential balanced signal transmission board capable of signal transmission with less reflection can be provided.

また、上記の目的を達成するために、本発明にかかる第２の差動平衡信号伝送基板は、絶縁体層と、前記絶縁体層の両面に形成された少なくとも２層の配線層とを備え、第１の信号線の電圧と第２の信号線の電圧との和が常に一定である差動平衡信号線対のうち、前記第１の信号線を前記絶縁体層の一方の面に形成された第１の配線層内に有し、前記第２の信号線を前記絶縁体層の他方の面に形成された第２の配線層内に有すると共に、前記差動平衡信号線対同士の間に、接地用配線または電源用配線を備えたことを特徴とする。   In order to achieve the above object, a second differential balanced signal transmission board according to the present invention includes an insulator layer and at least two wiring layers formed on both sides of the insulator layer. Among the differential balanced signal line pairs in which the sum of the voltage of the first signal line and the voltage of the second signal line is always constant, the first signal line is formed on one surface of the insulator layer. In the first wiring layer, the second signal line in the second wiring layer formed on the other surface of the insulator layer, and the pair of differential balanced signal lines A grounding wiring or a power supply wiring is provided between them.

この構成によれば、隣接する差動平衡信号線対同士の間に、接地用配線および電源用配線の少なくとも一方が設けられたことにより、従来のように差動平衡信号線対と接地用配線および電源用配線とが互いに異なる配線層に設けられた構成と比較して、クロストークが小さく抑制された差動平衡信号伝送基板を提供することが可能となる。   According to this configuration, at least one of the grounding wiring and the power supply wiring is provided between the adjacent differential balanced signal line pairs, so that the differential balanced signal line pair and the grounding wiring are conventionally provided. In addition, it is possible to provide a differential balanced signal transmission board in which crosstalk is suppressed to be small as compared with a configuration in which wiring for power supply is provided in different wiring layers.

上記の第２の差動平衡信号伝送基板は、差動平衡信号線対の第１の信号線と第２の信号線とが、前記絶縁体層を挟んで対向する位置に配置されたことが好ましい。   In the second differential balanced signal transmission board, the first signal line and the second signal line of the differential balanced signal line pair are disposed at positions facing each other across the insulator layer. preferable.

この構成によれば、差動平衡信号線対の第１の信号線と第２の信号線とが絶縁体層を挟んで対向するように配置されたことにより、信号が伝送される際に発生する電界のほとんどが絶縁体層中に集中する。これにより、差動平衡信号伝送基板外へ放射される電磁波が抑制されるので、放射ノイズを抑制することができる。   According to this configuration, the first signal line and the second signal line of the differential balanced signal line pair are arranged so as to oppose each other with the insulator layer interposed therebetween, and thus generated when a signal is transmitted. Most of the electric field is concentrated in the insulator layer. Thereby, since the electromagnetic wave radiated | emitted out of a differential balanced signal transmission board | substrate is suppressed, radiation noise can be suppressed.

また、信号が伝送される際の電流が、差動平衡信号線対の第１の信号線と第２の信号線とのそれぞれにおいて互いに対向する面に集中して流れるため、差動平衡信号線対を同一配線層内に隣接して配置した場合に比べて、電流が流れる断面積が広くなり、抵抗成分が小さくなる。これにより、信号が伝送される際の減衰が小さくなるという利点もある。   Further, since the current when the signal is transmitted flows in a concentrated manner on the surfaces of the first and second signal lines of the differential balanced signal line pair that face each other, the differential balanced signal line Compared to the case where the pairs are arranged adjacent to each other in the same wiring layer, the cross-sectional area through which the current flows is increased, and the resistance component is reduced. This also has the advantage that the attenuation when a signal is transmitted is reduced.

さらに、前記第１の配線層に、前記第１の信号線を挟むように接地用配線および電源用配線の対が設けられると共に、前記第２の配線層に、前記第２の信号線を挟むように接地用配線および電源用配線の対が設けられたことが好ましい。   Furthermore, a pair of ground wiring and power supply wiring is provided in the first wiring layer so as to sandwich the first signal line, and the second signal line is sandwiched in the second wiring layer. Thus, it is preferable that a pair of ground wiring and power supply wiring is provided.

この構成によれば、他の差動平衡信号線対との間のクロストークが抑制されると共に、リターン電流が、差動平衡信号線対の第１の信号線または第２の信号線に隣接する接地用配線または電源用配線に流れる。これにより、ループ断面積が小さくなり、放射ノイズを抑制することができると共に、外部ノイズの影響も受けにくくなる。   According to this configuration, crosstalk with other differential balanced signal line pairs is suppressed, and the return current is adjacent to the first signal line or the second signal line of the differential balanced signal line pair. Flows to the grounding wiring or power wiring. Thereby, the loop cross-sectional area is reduced, radiation noise can be suppressed, and the influence of external noise is less likely.

さらに、第１の配線層における接地用配線および前記電源用配線の対と、前記第２の配線層における接地用配線および電源用配線の対とが、接地用配線と電源用配線とが前記絶縁体層を挟んで対向するように配置されたことが好ましい。   Further, the ground wiring and the power wiring pair in the first wiring layer and the ground wiring and power wiring pair in the second wiring layer are insulated from the ground wiring and power wiring. It is preferable that the body layers are disposed so as to face each other.

この構成によれば、各配線に流れる電流によるリターン電流が、絶縁体層を挟んで対向する位置に配置された配線に流れるので、各配線に流れる信号に対するループ面積が小さくなる。これにより、放射ノイズを抑制することができる。   According to this configuration, since the return current due to the current flowing through each wiring flows through the wiring arranged at the position facing the insulating layer, the loop area for the signal flowing through each wiring is reduced. Thereby, radiation noise can be suppressed.

または、前記絶縁体層における前記接地用配線と前記電源用配線とに挟まれた部分の比誘電率が、前記絶縁体層における他の部分の比誘電率より大きいことが好ましい。   Alternatively, it is preferable that a relative dielectric constant of a portion sandwiched between the grounding wiring and the power supply wiring in the insulator layer is larger than a relative dielectric constant of another portion in the insulator layer.

この構成によれば、接地用配線と電源用配線とのカップリングが強まるため、電源と接地との間のインピーダンスを抑制することができる。   According to this configuration, since the coupling between the grounding wiring and the power supply wiring is strengthened, the impedance between the power supply and the ground can be suppressed.

上記の第２の差動平衡信号伝送基板は、前記絶縁体層における前記差動平衡信号線対の第１の信号線と第２の信号線とに挟まれた部分の比誘電率が、前記絶縁体層における他の部分の比誘電率より大きいことが好ましい。   The second differential balanced signal transmission board has a relative dielectric constant of a portion sandwiched between the first signal line and the second signal line of the differential balanced signal line pair in the insulator layer, It is preferable that the relative dielectric constant of the other part in the insulator layer is larger.

この構成によれば、差動平衡信号線対の第１の信号線と第２の信号線とのカップリングが強まるため、インピーダンスを抑制することができる。また、第１の信号線と第２の信号線との間の電界が、絶縁体層における比誘電率の高い部分に集中するため、他の差動平衡信号線対との間のクロストークを抑制することができ、放射ノイズも抑制できる。   According to this configuration, since the coupling between the first signal line and the second signal line of the differential balanced signal line pair is strengthened, the impedance can be suppressed. In addition, since the electric field between the first signal line and the second signal line is concentrated on a portion having a high relative dielectric constant in the insulator layer, crosstalk with other differential balanced signal line pairs is prevented. It is possible to suppress radiation noise.

また、上記の第２の差動平衡信号伝送基板は、差動平衡信号線対の第１の信号線と前記第２の信号線とが前記絶縁体層を挟んで対向しない位置に配置された構成であってもよい。   The second differential balanced signal transmission board is disposed at a position where the first signal line of the differential balanced signal line pair and the second signal line do not face each other with the insulator layer interposed therebetween. It may be a configuration.

この構成によれば、例えば、絶縁体層の誘電率が大きい場合や、差動平衡信号線対の線幅が広い場合等、前記第１の信号線と前記第２の信号線とが前記絶縁体層を挟んで対向しない位置に配置することにより、差動モードインピーダンスを所望の値に制御することが可能となる。   According to this configuration, for example, when the dielectric constant of the insulator layer is large, or when the differential balanced signal line pair has a wide line width, the first signal line and the second signal line are not insulated from each other. The differential mode impedance can be controlled to a desired value by disposing the body layers at positions that do not face each other.

さらに、前記第１の配線層に、前記第１の信号線を挟むように接地用配線および電源用配線の対が設けられると共に、前記第２の配線層に、前記第２の信号線を挟むように接地用配線および電源用配線の対が設けられたことが好ましい。   Furthermore, a pair of ground wiring and power supply wiring is provided in the first wiring layer so as to sandwich the first signal line, and the second signal line is sandwiched in the second wiring layer. Thus, it is preferable that a pair of ground wiring and power supply wiring is provided.

この構成によれば、他の差動平衡信号線対との間のクロストークが抑制されると共に、リターン電流が、差動平衡信号線対の第１の信号線または第２の信号線に隣接する接地用配線または電源用配線に流れる。これにより、ループ断面積が小さくなり、放射ノイズを抑制することができると共に、外部ノイズの影響も受けにくくなる。   According to this configuration, crosstalk with other differential balanced signal line pairs is suppressed, and the return current is adjacent to the first signal line or the second signal line of the differential balanced signal line pair. Flows to the grounding wiring or power wiring. Thereby, the loop cross-sectional area is reduced, radiation noise can be suppressed, and the influence of external noise is less likely.

なお、上記の第１および第２の差動平衡信号伝送基板は、前記接地用配線および前記電源用配線のそれぞれの幅が、前記差動平衡信号線対の第１の信号線および第２の信号線のそれぞれの幅よりも広いことが好ましい。   In the first and second differential balanced signal transmission boards, the widths of the ground wiring and the power supply wiring are such that the first signal line and the second differential signal line pair of the differential balanced signal line pair It is preferable that the width of each signal line is wider.

また、上記の第１および第２の差動平衡信号伝送基板は、差動平衡信号線対の第１の信号線および第２の信号線のそれぞれと、同一配線層内で前記第１の信号線および第２の信号線のそれぞれに隣接して形成された接地用配線または電源用配線との間隔が、前記第１の信号線および第２の信号線のそれぞれの幅以下であることが好ましい。   In addition, the first and second differential balanced signal transmission boards may include the first signal line and the second signal line of the differential balanced signal line pair in the same wiring layer as the first signal line. It is preferable that an interval between a grounding wiring or a power supply wiring formed adjacent to each of the line and the second signal line is equal to or less than a width of each of the first signal line and the second signal line. .

また、上記の第１および第２の差動平衡信号伝送基板は、前記差動平衡信号線対の第１の信号線と第２の信号線との間隔が、前記第１の信号線および第２の信号線のそれぞれと、同一配線層内で前記第１の信号線および第２の信号線のそれぞれに隣接して形成された接地用配線または電源用配線との間隔よりも大きいことが好ましい。   In the first and second differential balanced signal transmission boards, the distance between the first signal line and the second signal line of the differential balanced signal line pair may be the first signal line and the second signal line. It is preferable that the distance between each of the two signal lines and the ground wiring or the power supply wiring formed adjacent to each of the first signal line and the second signal line in the same wiring layer is larger. .

以上に説明したように、本発明によれば、差動平衡信号線対を高密度に配置してもクロストークが抑制され、電源と接地との間のインピーダンスが抑制された差動平衡信号伝送基板を提供することが可能となる。   As described above, according to the present invention, the differential balanced signal transmission in which the crosstalk is suppressed even when the differential balanced signal line pairs are arranged at a high density, and the impedance between the power source and the ground is suppressed. A substrate can be provided.

以下、本発明の実施の形態について、図面を用いて詳細に説明する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

（実施の形態１）
図１は、本発明の実施の形態１における差動平衡信号伝送基板の構成の概略を示す断面図である。なお、本実施の形態では、１層の配線層を備える差動平衡信号伝送基板を例に挙げて本発明を説明するが、本発明は、２層以上の配線層を備えた差動平衡信号伝送基板としても同様に実施することができることはいうまでもない。 (Embodiment 1)
FIG. 1 is a cross-sectional view schematically showing a configuration of a differential balanced signal transmission board according to Embodiment 1 of the present invention. In the present embodiment, the present invention will be described by taking a differential balanced signal transmission board having one wiring layer as an example. However, the present invention provides a differential balanced signal having two or more wiring layers. Needless to say, the present invention can also be implemented as a transmission board.

本差動平衡信号伝送基板は、図１に示すように、誘電体層１０１（絶縁体層）の片面に、隣接して形成された一対の＋線１０２ａおよび−線１０２ｂからなる差動平衡信号線対を有する。また、上記一対の＋線１０２ａおよび−線１０２ｂの両側に、接地用配線１０３・１０３が配置されている。   As shown in FIG. 1, the differential balanced signal transmission board includes a differential balanced signal composed of a pair of + line 102a and − line 102b formed adjacent to one side of a dielectric layer 101 (insulator layer). Has a line pair. In addition, ground wirings 103 and 103 are arranged on both sides of the pair of + line 102a and − line 102b.

つまり、一組の＋線１０２ａおよび−線１０２ｂからなる差動平衡信号線対と、この差動平衡信号線対に隣接する、他の一組の＋線１０２ａおよび−線１０２ｂからなる差動平衡信号線対との間に、接地用配線１０３が形成されている。   That is, a differential balanced signal line pair composed of a pair of + lines 102a and − lines 102b and a differential balanced line composed of another set of + lines 102a and − lines 102b adjacent to the differential balanced signal line pair. A grounding wire 103 is formed between the signal line pair.

このように、本差動平衡信号伝送基板では、差動平衡信号線対と、これに隣接する他の差動平衡信号線対との間に接地用配線が形成されているため、配線を高密度に形成しても、クロストークを抑制することができる。   Thus, in this differential balanced signal transmission board, since the grounding wiring is formed between the differential balanced signal line pair and another differential balanced signal line pair adjacent thereto, the wiring is increased. Even if the density is formed, crosstalk can be suppressed.

また、差動平衡信号線対の＋線１０２ａと−線１０２ｂとの間隔が、＋線１０２ａおよび−線１０２ｂのそれぞれと接地用配線１０３との間隔よりも大きい構成が、コモンモードインピーダンスより作動モードインピーダンスを大きくすることが可能となるので好ましい。   Further, the configuration in which the distance between the + line 102a and the − line 102b of the differential balanced signal line pair is larger than the distance between each of the + line 102a and the − line 102b and the ground wiring 103 is an operation mode more than the common mode impedance. This is preferable because the impedance can be increased.

なお、本発明は上記した実施の形態に限定されるものではなく、接地用配線１０３の代わりに電源用配線を用いても同様の効果が得られる。すなわち、隣接する差動平衡信号線対同士の間に、接地用配線と電源用配線とのいずれか一方が配置されていればよく、同様の効果が得られる。   The present invention is not limited to the above-described embodiment, and the same effect can be obtained by using a power supply wiring instead of the ground wiring 103. That is, any one of the grounding wiring and the power supply wiring may be disposed between the adjacent differential balanced signal line pairs, and the same effect can be obtained.

（実施の形態２）
図２は、本発明の実施の形態２における差動平衡信号伝送基板の構成の概略を示す断面図である。なお、本実施の形態では、１層の配線層を備える差動平衡信号伝送基板を例に挙げて本発明を説明するが、本発明は、２層以上の配線層を備えた差動平衡信号伝送基板としても同様に実施することができることはいうまでもない。 (Embodiment 2)
FIG. 2 is a cross-sectional view schematically showing the configuration of the differential balanced signal transmission board according to the second embodiment of the present invention. In the present embodiment, the present invention will be described by taking a differential balanced signal transmission board having one wiring layer as an example. However, the present invention provides a differential balanced signal having two or more wiring layers. Needless to say, the present invention can also be implemented as a transmission board.

本差動平衡信号伝送基板は、図２に示すように、誘電体層１０１の片面に、隣接して形成された一対の＋線１０２ａおよび−線１０２ｂからなる差動平衡信号線対を有する。また、接地用配線１０３および電源用配線１０４からなる一組の配線が、上記一対の＋線１０２ａおよび−線１０２ｂの両側に、それぞれ形成されている。図２に示した例では、＋線１０２ａの外側に接地用配線１０３が配置され、−線１０２ｂの外側に電源用配線１０４が形成されている。   As shown in FIG. 2, the differential balanced signal transmission board has a differential balanced signal line pair including a pair of + lines 102 a and − lines 102 b formed adjacent to each other on one surface of the dielectric layer 101. In addition, a pair of wirings including a grounding wiring 103 and a power supply wiring 104 are formed on both sides of the pair of + line 102a and − line 102b, respectively. In the example shown in FIG. 2, the ground wiring 103 is disposed outside the + line 102a, and the power wiring 104 is formed outside the − line 102b.

つまり、本差動平衡信号伝送基板では、一対の＋線１０２ａおよび−線１０２ｂからなる差動平衡信号線対と、この差動平衡信号線対に隣接する、他の一対の＋線１０２ａおよび−線１０２ｂからなる差動平衡信号線対との間に、一組の接地用配線１０３および電源用配線１０４が形成されている。   That is, in this differential balanced signal transmission board, a differential balanced signal line pair consisting of a pair of + lines 102a and − lines 102b and another pair of + lines 102a and − adjacent to this differential balanced signal line pair. A pair of grounding wiring 103 and power supply wiring 104 are formed between the differential balanced signal line pair consisting of the line 102b.

このように、本差動平衡信号伝送基板では、差動平衡信号線対と、これに隣接する他の差動平衡信号線対との間に、接地用配線１０３および電源用配線１０４が形成されているため、配線を高密度に形成しても、クロストークを抑制することができる。   Thus, in this differential balanced signal transmission board, the ground wiring 103 and the power wiring 104 are formed between the differential balanced signal line pair and another differential balanced signal line pair adjacent thereto. Therefore, crosstalk can be suppressed even if the wiring is formed with high density.

しかも、接地用配線１０３と電源用配線１０４とが必ず隣接していることから、それぞれの配線間での対向容量があるため、電源と接地との間のインピーダンスを低く抑えることが可能となる。   In addition, since the grounding wiring 103 and the power supply wiring 104 are necessarily adjacent to each other, there is an opposing capacitance between the respective wirings, so that the impedance between the power supply and the ground can be kept low.

また、接地用配線１０３および電源用配線１０４は、直流電流が流れるため、信号線（＋線１０２ａ、−線１０２ｂ）よりも配線幅を広くすれば、電源系配線での電圧の損失を低く抑えることができる。   Further, since a direct current flows in the ground wiring 103 and the power supply wiring 104, if the wiring width is made wider than the signal lines (+ line 102a, −line 102b), the voltage loss in the power supply system wiring is kept low. be able to.

また、隣接する接地用配線１０３と電源用配線１０４との間隔を、＋線１０２ａと接地用配線１０３との間隔、または−線１０２ｂと電源用配線１０４との間隔よりも小さくすれば、接地用配線１０３と電源用配線１０４との間の容量成分が大きくなるため、電源系のインピーダンスを低くすることが可能である。さらに、接地用配線１０３と電源用配線１０４との間隔を、＋線１０２ａおよび−線１０２ｂの幅よりも小さくすることによっても、インピーダンスを低くすることが可能である。   If the distance between the adjacent ground wiring 103 and the power supply wiring 104 is smaller than the distance between the + line 102a and the ground wiring 103 or the distance between the − line 102b and the power supply wiring 104, the ground wiring Since the capacitance component between the wiring 103 and the power supply wiring 104 is increased, the impedance of the power supply system can be reduced. Furthermore, the impedance can be lowered by making the distance between the ground wiring 103 and the power supply wiring 104 smaller than the widths of the + line 102a and the − line 102b.

（実施の形態３）
図３は、本発明の第３の実施の形態における差動平衡信号伝送基板の構成の概略を示す断面図である。なお、本実施の形態では、１層の配線層を備える差動平衡信号伝送基板を例に挙げて本発明を説明するが、本発明は、２層以上の配線層を備えた差動平衡信号伝送基板としても同様に実施することができることはいうまでもない。 (Embodiment 3)
FIG. 3 is a cross-sectional view schematically showing the configuration of the differential balanced signal transmission board according to the third embodiment of the present invention. In the present embodiment, the present invention will be described by taking a differential balanced signal transmission board having one wiring layer as an example. However, the present invention provides a differential balanced signal having two or more wiring layers. Needless to say, the present invention can also be implemented as a transmission board.

本差動平衡信号伝送基板は、誘電体層１０１の片面に、隣接して形成された一対の＋線１０２ａおよび−線１０２ｂからなる差動平衡信号線対を有する。また、接地用配線１０３および電源用配線１０４からなる一組の配線が、上記一対の＋線１０２ａおよび−線１０２ｂの両側に、それぞれ形成されている。図３に示した例では、＋線１０２ａの外側に接地用配線１０３が配置され、−線１０２ｂの外側に電源用配線１０４が形成されている。   This differential balanced signal transmission board has a differential balanced signal line pair consisting of a pair of + line 102 a and − line 102 b formed adjacent to each other on one surface of the dielectric layer 101. In addition, a pair of wirings including a grounding wiring 103 and a power supply wiring 104 are formed on both sides of the pair of + line 102a and − line 102b, respectively. In the example shown in FIG. 3, the ground wiring 103 is arranged outside the + line 102a, and the power wiring 104 is formed outside the − line 102b.

つまり、本差動平衡信号伝送基板では、一対の＋線１０２ａおよび−線１０２ｂからなる差動平衡信号線対と、この差動平衡信号線対に隣接する、他の一対の＋線１０２ａおよび−線１０２ｂからなる差動平衡信号線対との間に、一組の接地用配線１０３および電源用配線１０４が形成されている。   That is, in this differential balanced signal transmission board, a differential balanced signal line pair consisting of a pair of + lines 102a and − lines 102b and another pair of + lines 102a and − adjacent to this differential balanced signal line pair. A pair of grounding wiring 103 and power supply wiring 104 are formed between the differential balanced signal line pair consisting of the line 102b.

さらに、接地用配線１０３、電源用配線１０４、＋線１０２ａ、および−線１０２ｂの各々の間に、誘電体層１０１よりも比誘電率の大きい誘電体が充填されることにより、誘電体層１０７が形成されている。   Further, the dielectric layer 107 is filled by filling a dielectric having a relative dielectric constant higher than that of the dielectric layer 101 between the ground wiring 103, the power supply wiring 104, the + line 102a, and the − line 102b. Is formed.

ここで、図４（ａ）〜（ｄ）を参照しながら、本差動平衡信号伝送基板の製造工程について説明する。   Here, the manufacturing process of the differential balanced signal transmission board will be described with reference to FIGS.

まず、図４（ａ）に示すように、誘電体層１０１の片側全面に、信号配線用導体１０５を形成した後、信号配線用導体１０５上に、レジストパターン１０６を形成する。なお、レジストパターン１０６は、接地用配線１０３、電源用配線１０４、＋線１０２ａ、および−線１０２ｂを形成すべき部分に形成される。   First, as shown in FIG. 4A, a signal wiring conductor 105 is formed on the entire surface of one side of the dielectric layer 101, and then a resist pattern 106 is formed on the signal wiring conductor 105. The resist pattern 106 is formed in a portion where the ground wiring 103, the power supply wiring 104, the + line 102a, and the − line 102b are to be formed.

そして、図４（ｂ）に示すように、エッチングにより、接地用配線１０３、電源用配線１０４、＋線１０２ａ、および−線１０２ｂを形成する。   Then, as shown in FIG. 4B, the grounding wiring 103, the power supply wiring 104, the + line 102a, and the − line 102b are formed by etching.

さらに、図４（ｃ）に示すように、接地用配線１０３、電源用配線１０４、＋線１０２ａ、−線１０２ｂ、およびこれらの配線の上面に残存するレジストパターン１０６のすべてを覆うように、誘電体層１０７の材料となる誘電体を塗布する。   Further, as shown in FIG. 4 (c), the ground wiring 103, the power wiring 104, the + line 102a, the − line 102b, and the resist pattern 106 remaining on the upper surface of these wirings are all covered. A dielectric serving as a material for the body layer 107 is applied.

次に、図４（ｄ）に示すように、レジストパターン１０６を除去することにより、本差動平衡信号伝送基板が完成する。   Next, as shown in FIG. 4D, by removing the resist pattern 106, the differential balanced signal transmission board is completed.

このように、配線間に誘電体層１０７を備えた構造とすることにより、差動平衡信号配線の＋線１０２ａと−線１０２ｂとの間の容量を向上させることができる。これにより、＋線１０２ａと−線１０２ｂとの間のカップリングが強くなるため、差動平衡信号配線と、隣接する他の差動平衡信号配線との間の影響を抑制でき、クロストークを抑制することができる。しかも、接地用配線１０３と電源用配線１０４との間の容量も向上するため、電源用配線１０４と接地用配線１０３との間の対向容量が増し、電源と接地との間のインピーダンスを更に低く抑えることが可能となる。   As described above, the structure including the dielectric layer 107 between the wirings can improve the capacitance between the + line 102a and the − line 102b of the differential balanced signal wiring. As a result, the coupling between the + line 102a and the − line 102b becomes strong, so that the influence between the differential balanced signal wiring and another adjacent differential balanced signal wiring can be suppressed, and crosstalk can be suppressed. can do. In addition, since the capacitance between the ground wiring 103 and the power wiring 104 is improved, the opposing capacitance between the power wiring 104 and the ground wiring 103 is increased, and the impedance between the power source and the ground is further reduced. It becomes possible to suppress.

（実施の形態４）
図５は、本発明の第４の実施の形態における差動平衡信号伝送基板の構成の概略を示す断面図である。なお、本実施の形態では、２層の配線層を備える差動平衡信号伝送基板を例に挙げて本発明を説明するが、本発明は、２層以外の層数の差動平衡信号伝送基板としても同様に実施することができることはいうまでもない。 (Embodiment 4)
FIG. 5 is a cross-sectional view schematically showing the configuration of the differential balanced signal transmission board according to the fourth embodiment of the present invention. In the present embodiment, the present invention will be described by taking a differential balanced signal transmission board having two wiring layers as an example. However, the present invention is a differential balanced signal transmission board having a number of layers other than two. Needless to say, it can be implemented in the same manner.

本差動平衡信号伝送基板は、図５に示すように、誘電体層１０１を挟んで対向するように、差動平衡信号線対の＋線１０２ａおよび−線１０２ｂが形成されている。また、誘電体層１０１の両面において、＋線１０２ａの両側、および−線１０２ｂの両側に、接地用配線１０３・１０３が形成されている。   As shown in FIG. 5, the differential balanced signal transmission board is formed with a + line 102 a and a − line 102 b of a differential balanced signal line pair so as to face each other with the dielectric layer 101 interposed therebetween. Further, on both surfaces of the dielectric layer 101, ground wirings 103 and 103 are formed on both sides of the + line 102a and on both sides of the − line 102b.

このように、本差動平衡信号伝送基板では、隣接する他の差動平衡信号線対との間に接地用配線１０３が形成されているため、配線を高密度に形成しても、クロストークを抑制することができる。   As described above, in this differential balanced signal transmission board, the ground wiring 103 is formed between the other adjacent differential balanced signal line pairs. Can be suppressed.

しかも、差動平衡信号線対を構成する一対の＋線１０２ａおよび−線１０２ｂは、誘電体層１０１を挟んで互いに対向するように配置されている。これにより、信号が伝送される際に発生する電界のほとんどが誘電体層１０１中に集中するため、差動平衡信号伝送基板の外へ放射される電磁波が抑制される。   In addition, the pair of + line 102 a and − line 102 b constituting the differential balanced signal line pair is arranged to face each other with the dielectric layer 101 interposed therebetween. As a result, most of the electric field generated when a signal is transmitted is concentrated in the dielectric layer 101, so that electromagnetic waves radiated out of the differential balanced signal transmission substrate are suppressed.

また、差動平衡信号線対を構成する一対の＋線１０２ａおよび−線１０２ｂが、誘電体層１０１を挟んで互いに対向するように配置されたことにより、差動平衡信号線対中の信号が高周波信号を含む場合、信号が伝送される際の電流は、＋線１０２ａおよび−線１０２ｂにおける互いに対向する面に集中して流れる。これにより、実施の形態１〜３で説明した構成のように差動平衡信号線対の＋線１０２ａおよび−線１０２ｂを同一面に隣接して配置した構成に比べて、電流が流れる断面積が広くなる。この結果、抵抗成分が小さくなり、信号を伝送する際の減衰が小さくなる。   Further, the pair of + lines 102a and − line 102b constituting the differential balanced signal line pair are arranged so as to face each other with the dielectric layer 101 interposed therebetween, so that the signals in the differential balanced signal line pair can be transmitted. When a high-frequency signal is included, the current when the signal is transmitted flows in a concentrated manner on the surfaces of the + line 102a and the − line 102b that face each other. As a result, the cross-sectional area through which current flows is larger than in the configuration in which the + line 102a and the −line 102b of the differential balanced signal line pair are arranged adjacent to each other as in the configuration described in the first to third embodiments. Become wider. As a result, the resistance component is reduced, and the attenuation during signal transmission is reduced.

さらに、接地用配線１０３と差動平衡信号線対の＋線１０２ａまたは−線１０２ｂとの間隔を、＋線１０２ａと−線１０２ｂとの間隔よりも小さくすれば、コモンモードインピーダンスを低くすることができる。これにより、信号を送信する半導体素子の出力バッファの負荷を軽減でき、立ち上がり立ち下がり時間の短い信号を伝送することが可能となる。   Further, if the distance between the ground wiring 103 and the + line 102a or − line 102b of the differential balanced signal line pair is made smaller than the distance between the + line 102a and the − line 102b, the common mode impedance can be lowered. it can. As a result, the load on the output buffer of the semiconductor element that transmits the signal can be reduced, and a signal having a short rise / fall time can be transmitted.

（実施の形態５）
図６は、本発明の第５の実施の形態における差動平衡信号伝送基板の構成の概略を示す断面図である。なお、本実施の形態では、２層の配線層を備える差動平衡信号伝送基板を例に挙げて本発明を説明するが、本発明は、２層以外の層数の差動平衡信号伝送基板としても同様に実施することができることはいうまでもない。 (Embodiment 5)
FIG. 6 is a cross-sectional view schematically showing the configuration of the differential balanced signal transmission board according to the fifth embodiment of the present invention. In the present embodiment, the present invention will be described by taking a differential balanced signal transmission board having two wiring layers as an example. However, the present invention is a differential balanced signal transmission board having a number of layers other than two. Needless to say, it can be implemented in the same manner.

本差動平衡信号伝送基板は、図６に示すように、誘電体層１０１を挟んで対向するように、差動平衡信号線対の＋線１０２ａおよび−線１０２ｂが形成されている。また、誘電体層１０１の両面において、＋線１０２ａまたは−線１０２ｂを挟むように、接地用配線１０３および電源用配線１０４が形成されている。   As shown in FIG. 6, the differential balanced signal transmission board is formed with a differential balanced signal line pair + line 102 a and − line 102 b so as to face each other with the dielectric layer 101 interposed therebetween. Further, on both surfaces of the dielectric layer 101, a ground wiring 103 and a power wiring 104 are formed so as to sandwich the + line 102a or the − line 102b.

このように、本差動平衡信号伝送基板では、隣接する他の差動平衡信号線対との間に接地用配線１０３または電源用配線１０４が形成されているため、配線を高密度に形成しても、クロストークを抑制することができる。   As described above, in this differential balanced signal transmission board, the ground wiring 103 or the power wiring 104 is formed between the other adjacent differential balanced signal line pairs. However, crosstalk can be suppressed.

しかも、差動平衡信号線対を構成する一対の＋線１０２ａおよび−線１０２ｂは、誘電体層１０１を挟んで互いに対向するように配置されている。これにより、信号が伝送される際に発生する電界のほとんどが誘電体層１０１中に集中するため、差動平衡信号伝送基板の外へ放射される電磁波が抑制される。   In addition, the pair of + line 102 a and − line 102 b constituting the differential balanced signal line pair is arranged to face each other with the dielectric layer 101 interposed therebetween. As a result, most of the electric field generated when a signal is transmitted is concentrated in the dielectric layer 101, so that electromagnetic waves radiated out of the differential balanced signal transmission substrate are suppressed.

また、差動平衡信号線対を構成する一対の＋線１０２ａおよび−線１０２ｂが、誘電体層１０１を挟んで互いに対向するように配置されたことにより、差動平衡信号線対中の信号が高周波信号を含む場合、信号が伝送される際の電流は、＋線１０２ａおよび−線１０２ｂにおける互いに対向する面に集中して流れる。これにより、実施の形態１〜３で説明した構成のように差動平衡信号線対の＋線１０２ａおよび−線１０２ｂを同一面に隣接して配置した構成に比べて、電流が流れる断面積が広くなる。この結果、抵抗成分が小さくなり、信号を伝送する際の減衰が小さくなる。   Further, the pair of + lines 102a and − line 102b constituting the differential balanced signal line pair are arranged so as to face each other with the dielectric layer 101 interposed therebetween, so that the signals in the differential balanced signal line pair can be transmitted. When a high-frequency signal is included, the current when the signal is transmitted flows in a concentrated manner on the surfaces of the + line 102a and the − line 102b that face each other. As a result, the cross-sectional area through which current flows is larger than in the configuration in which the + line 102a and the −line 102b of the differential balanced signal line pair are arranged adjacent to each other as in the configuration described in the first to third embodiments. Become wider. As a result, the resistance component is reduced, and the attenuation during signal transmission is reduced.

さらに、差動平衡信号線対の＋線１０２ａおよび−線１０２ｂのそれぞれの両側には、接地用配線１０３と電源用配線１０４とが必ず配置されているため、信号配線中に流れる信号の負荷を通って信号源に帰ってくるリターン電流が、必ず、隣接する配線中を流れる。これにより、信号配線中を流れる電流と、負荷を通って信号源に帰るリターン電流が形成するループ断面積が小さくなり、放射ノイズを抑制することができ、外部ノイズの影響も受けにくくなる。   Further, since the ground wiring 103 and the power wiring 104 are always arranged on both sides of the + line 102a and the − line 102b of the differential balanced signal line pair, the load of the signal flowing in the signal wiring is reduced. The return current that passes through and returns to the signal source always flows in the adjacent wiring. As a result, the loop cross-sectional area formed by the current flowing in the signal wiring and the return current that returns to the signal source through the load is reduced, so that radiation noise can be suppressed and it is less susceptible to external noise.

（実施の形態６）
図７は、本発明の第６の実施の形態における差動平衡信号伝送基板の構成の概略を示す断面図である。なお、本実施の形態では、２層の配線層を備える差動平衡信号伝送基板を例に挙げて本発明を説明するが、本発明は、２層以外の層数の差動平衡信号伝送基板としても同様に実施することができることはいうまでもない。 (Embodiment 6)
FIG. 7 is a cross-sectional view schematically showing the configuration of the differential balanced signal transmission board according to the sixth embodiment of the present invention. In the present embodiment, the present invention will be described by taking a differential balanced signal transmission board having two wiring layers as an example. However, the present invention is a differential balanced signal transmission board having a number of layers other than two. Needless to say, it can be implemented in the same manner.

本差動平衡信号伝送基板は、図７に示すように、誘電体層１０１を挟んで対向するように、差動平衡信号線対の＋線１０２ａおよび−線１０２ｂが形成されている。また、誘電体層１０１の両面において、＋線１０２ａまたは−線１０２ｂを挟むように、接地用配線１０３および電源用配線１０４が形成されている。また、接地用配線１０３と電源用配線１０４とは、誘電体層１０１を挟んで対向する位置に配置されている。   As shown in FIG. 7, the differential balanced signal transmission board is formed with a + line 102a and a − line 102b of a differential balanced signal line pair so as to face each other with the dielectric layer 101 interposed therebetween. Further, on both surfaces of the dielectric layer 101, a ground wiring 103 and a power wiring 104 are formed so as to sandwich the + line 102a or the − line 102b. Further, the ground wiring 103 and the power supply wiring 104 are arranged at positions facing each other with the dielectric layer 101 interposed therebetween.

このように、本差動平衡信号伝送基板では、隣接する他の差動平衡信号線対との間に接地用配線１０３または電源用配線１０４が形成されているため、配線を高密度に形成しても、クロストークを抑制することができる。   As described above, in this differential balanced signal transmission board, the ground wiring 103 or the power wiring 104 is formed between the other adjacent differential balanced signal line pairs. However, crosstalk can be suppressed.

しかも、差動平衡信号線対を構成する一対の＋線１０２ａおよび−線１０２ｂは、誘電体層１０１を挟んで互いに対向するように配置されている。これにより、信号が伝送される際に発生する電界のほとんどが誘電体層１０１中に集中するため、差動平衡信号伝送基板の外へ放射される電磁波が抑制される。   In addition, the pair of + line 102 a and − line 102 b constituting the differential balanced signal line pair is arranged to face each other with the dielectric layer 101 interposed therebetween. As a result, most of the electric field generated when a signal is transmitted is concentrated in the dielectric layer 101, so that electromagnetic waves radiated out of the differential balanced signal transmission substrate are suppressed.

また、差動平衡信号線対を構成する一対の＋線１０２ａおよび−線１０２ｂが、誘電体層１０１を挟んで互いに対向するように配置されたことにより、差動平衡信号線対中の信号が高周波信号を含む場合、信号が伝送される際の電流は、＋線１０２ａおよび−線１０２ｂにおける互いに対向する面に集中して流れる。これにより、実施の形態１〜３で説明した構成のように差動平衡信号線対の＋線１０２ａおよび−線１０２ｂを同一面に隣接して配置した構成に比べて、電流が流れる断面積が広くなる。この結果、抵抗成分が小さくなり、信号を伝送する際の減衰が小さくなる。   Further, the pair of + lines 102a and − line 102b constituting the differential balanced signal line pair are arranged so as to face each other with the dielectric layer 101 interposed therebetween, so that the signals in the differential balanced signal line pair can be transmitted. When a high-frequency signal is included, the current when the signal is transmitted flows in a concentrated manner on the surfaces of the + line 102a and the − line 102b that face each other. As a result, the cross-sectional area through which current flows is larger than in the configuration in which the + line 102a and the −line 102b of the differential balanced signal line pair are arranged adjacent to each other as in the configuration described in the first to third embodiments. Become wider. As a result, the resistance component is reduced, and the attenuation during signal transmission is reduced.

さらに、差動平衡信号線対の両側には、必ず接地用配線１０３および電源用配線１０４が配置され、かつ接地用配線１０３と電源用配線１０４とが誘電体層１０１を挟んで対向する位置に配置されているので、電流が流れる配線の全てにおいて、誘電体層１０１を挟んで対向する位置にリターン電流が流れるため、各配線に流れる信号に対するループ面積が最小となる。従って、放射ノイズを小さく抑制することができる。   Further, the ground wiring 103 and the power wiring 104 are always arranged on both sides of the differential balanced signal line pair, and the ground wiring 103 and the power wiring 104 are opposed to each other with the dielectric layer 101 interposed therebetween. As a result, the return current flows in positions facing each other across the dielectric layer 101 in all the wirings through which the current flows, so that the loop area for the signal flowing through each wiring is minimized. Therefore, radiation noise can be suppressed small.

（実施の形態７）
図８は、本発明の第７の実施の形態における差動平衡信号伝送基板の構成の概略を示す断面図である。なお、本実施の形態では、２層の配線層を備える差動平衡信号伝送基板を例に挙げて本発明を説明するが、本発明は、２層以外の層数の差動平衡信号伝送基板としても同様に実施することができることはいうまでもない。 (Embodiment 7)
FIG. 8 is a cross-sectional view schematically showing the configuration of the differential balanced signal transmission board according to the seventh embodiment of the present invention. In the present embodiment, the present invention will be described by taking a differential balanced signal transmission board having two wiring layers as an example. However, the present invention is a differential balanced signal transmission board having a number of layers other than two. Needless to say, it can be implemented in the same manner.

本差動平衡信号伝送基板は、図８に示すように、誘電体層１０１を挟んで対向するように、差動平衡信号線対の＋線１０２ａおよび−線１０２ｂが形成されている。また、誘電体層１０１の両面において、＋線１０２ａまたは−線１０２ｂを挟むように、接地用配線１０３および電源用配線１０４が形成されている。また、接地用配線１０３と電源用配線１０４とは、誘電体層１０１を挟んで対向する位置に配置されている。さらに、本差動平衡信号伝送基板の誘電体層１０１は、表面に配線が形成された領域１０１ａと、表面に配線が形成されていない領域１０１ｂとが、比誘電率が互いに異なる誘電体によってそれぞれ形成されており、領域１０１ａの比誘電率の方が、領域１０１ｂの比誘電率よりも大きい。   As shown in FIG. 8, the differential balanced signal transmission board is formed with a differential balanced signal line pair + line 102a and − line 102b so as to face each other with the dielectric layer 101 interposed therebetween. Further, on both surfaces of the dielectric layer 101, a ground wiring 103 and a power wiring 104 are formed so as to sandwich the + line 102a or the − line 102b. Further, the ground wiring 103 and the power supply wiring 104 are arranged at positions facing each other with the dielectric layer 101 interposed therebetween. Furthermore, the dielectric layer 101 of the differential balanced signal transmission board includes a region 101a where wiring is formed on the surface and a region 101b where wiring is not formed on the surface by dielectrics having different relative dielectric constants. The relative permittivity of the region 101a is larger than the relative permittivity of the region 101b.

ここで、図９（ａ）〜（ｄ）を参照しながら、本差動平衡信号伝送基板の製造工程について説明する。   Here, a manufacturing process of the differential balanced signal transmission board will be described with reference to FIGS.

まず、図９（ａ）に示すように、誘電体層１０１の両面において、接地用配線１０３、電源用配線１０４、＋線１０２ａ、および−線１０２ｂを形成すべき領域以外の領域に、メッキレジスト１１０を形成する。なお、本実施形態の誘電体層１０１は、光照射によって高誘電率化する材料によって形成される。このような材料としては、例えば、ジアゾ系化合物を含む樹脂組成物を用いることができる。   First, as shown in FIG. 9A, on both surfaces of the dielectric layer 101, plating resist is formed in regions other than regions where the ground wiring 103, the power wiring 104, the + line 102a, and the − line 102b are to be formed. 110 is formed. Note that the dielectric layer 101 of this embodiment is formed of a material whose dielectric constant is increased by light irradiation. As such a material, for example, a resin composition containing a diazo compound can be used.

次に、メッキレジスト１１０に吸収され、かつ誘電体層１０１を高誘電率化する波長の光を照射することにより、図９（ｂ）に示すように、誘電体層１０１におけるメッキレジスト１１０が表面に形成されていない領域、すなわち領域１０１ａの誘電体を、高誘電率化させる。   Next, by irradiating light with a wavelength that is absorbed by the plating resist 110 and increases the dielectric constant of the dielectric layer 101, the plating resist 110 in the dielectric layer 101 is exposed to the surface as shown in FIG. The dielectric in the region that is not formed in the region, that is, the region 101a is made high in dielectric constant.

その後、誘電体層１０１の表面におけるメッキレジスト１１０が形成されていない部分に、銅などの金属をメッキによって形成することにより、図９（ｃ）に示すように、接地用配線１０３、電源用配線１０４、＋線１０２ａ、および−線１０２ｂを形成する。   Thereafter, a metal such as copper is formed on the surface of the dielectric layer 101 where the plating resist 110 is not formed by plating, so that the ground wiring 103 and the power supply wiring are formed as shown in FIG. 104, + line 102a, and -line 102b are formed.

最後に、メッキレジスト１１０を除去することにより、図９（ｄ）に示すように、本差動平衡信号伝送基板が完成する。   Finally, by removing the plating resist 110, the differential balanced signal transmission board is completed as shown in FIG. 9D.

このように形成された本差動平衡信号伝送基板は、誘電体層１０１を挟んで対向する配線間（領域１０１ａ）に、誘電体層１０１において表面に配線が形成されない領域１０１ｂよりも大きい比誘電率の誘電体が配置されているため、差動平衡信号線対の＋線１０２ａと−線１０２ｂとのカップリングが強まる。これにより、誘電体層１０１を厚くしても、所望のインピーダンスに制御することが可能である。   The differential balanced signal transmission board thus formed has a relative dielectric constant larger than that of the region 101b in which no wiring is formed on the surface of the dielectric layer 101 between the opposing wirings (region 101a) with the dielectric layer 101 interposed therebetween. Since the dielectric of the ratio is arranged, the coupling between the + line 102a and the − line 102b of the differential balanced signal line pair is strengthened. Thereby, even if the dielectric layer 101 is thickened, it is possible to control to a desired impedance.

しかも、差動平衡信号線対の＋線１０２ａと−線１０２ｂとの間の電界が、誘電体層１０１における高誘電率の領域１０１ａに集中するため、領域１０１ｂの電界が弱くなり、隣接する他の差動平衡信号線対との影響が抑制される。つまり、差動平衡信号線対を高密度に形成してもクロストークを抑制することができ、差動平衡信号伝送基板外への放射ノイズを抑制できる。   In addition, since the electric field between the + line 102a and the − line 102b of the differential balanced signal line pair is concentrated on the high dielectric constant region 101a in the dielectric layer 101, the electric field in the region 101b becomes weak and adjacent to the other The effect of the differential balanced signal line pair is suppressed. That is, even when the differential balanced signal line pairs are formed with high density, crosstalk can be suppressed, and radiation noise to the outside of the differential balanced signal transmission board can be suppressed.

また、同時に、接地用配線１０３と電源用配線１０４とのカップリングも強まるため、電源と接地との間のインピーダンスが低くなるという利点もある。   At the same time, since the coupling between the ground wiring 103 and the power supply wiring 104 is strengthened, there is an advantage that the impedance between the power supply and the ground is lowered.

（実施の形態８）
図１０は、本発明の第８の実施の形態における差動平衡信号伝送基板の構成の概略を示す断面図である。なお、本実施の形態では、２層の配線層を備える差動平衡信号伝送基板を例に挙げて本発明を説明するが、本発明は、２層以外の層数の差動平衡信号伝送基板としても同様に実施することができることはいうまでもない。 (Embodiment 8)
FIG. 10 is a cross-sectional view schematically showing the configuration of the differential balanced signal transmission board according to the eighth embodiment of the present invention. In the present embodiment, the present invention will be described by taking a differential balanced signal transmission board having two wiring layers as an example. However, the present invention is a differential balanced signal transmission board having a number of layers other than two. Needless to say, it can be implemented in the same manner.

本差動平衡信号伝送基板は、図１０に示すように、差動平衡信号線対を構成する一対の＋線１０２ａおよび−線１０２ｂが、誘電体層１０１を挟んで段違いの平行位置に形成されている。また、誘電体層１０１の両面において、＋線１０２ａまたは−線１０２ｂを挟むように、接地用配線１０３および電源用配線１０４が形成されている。   In the differential balanced signal transmission board, as shown in FIG. 10, a pair of + line 102 a and − line 102 b constituting the differential balanced signal line pair is formed at different levels in parallel with the dielectric layer 101 interposed therebetween. ing. Further, on both surfaces of the dielectric layer 101, a ground wiring 103 and a power wiring 104 are formed so as to sandwich the + line 102a or the − line 102b.

なお、差動平衡信号線対を構成する一対の＋線１０２ａおよび−線１０２ｂの位置関係は、誘電体層１０１の厚さ、誘電体層１０１の比誘電率、＋線１０２ａおよび−線１０２ｂの線幅、＋線１０２ａまたは−線１０２ｂと接地用配線１０３または電源用配線１０４との間隔、接地用配線１０３および電源用配線１０４の線幅、＋線１０２ａおよび−線１０２ｂと接地用配線１０３および電源用配線１０４との間隙１０８の比誘電率に基づいて決定される。図には間隙１０８には空気層のみが存在する例を示したが、実用的にはレジスト層等が形成される。その場合は、レジスト層等の誘電率により差動平衡信号線対の位置関係が決定する。   The positional relationship between the pair of + line 102a and −line 102b that constitute the differential balanced signal line pair is as follows: the thickness of the dielectric layer 101, the relative dielectric constant of the dielectric layer 101, the + line 102a and the −line 102b. Line width, spacing between + line 102a or −line 102b and grounding wiring 103 or power supply wiring 104, linewidth of grounding wiring 103 and power supply wiring 104, + line 102a and −line 102b and grounding wiring 103 and It is determined based on the relative dielectric constant of the gap 108 with the power supply wiring 104. Although the figure shows an example in which only the air layer exists in the gap 108, a resist layer or the like is practically formed. In that case, the positional relationship of the differential balanced signal line pair is determined by the dielectric constant of the resist layer or the like.

誘電体層１０１の誘電率が大きく、差動平衡信号線対の＋線１０２ａおよび−線１０２ｂの幅が広い場合、実施の形態６で説明した構成のように、差動平衡信号線対を構成する一対の＋線１０２ａおよび−線１０２ｂを、誘電体層１０１を挟んで対向させて配置すると、差動モードインピーダンスが低くなりすぎることがある。これに対して、本実施形態の構成は、差動平衡信号線対を構成する一対の＋線１０２ａおよび−線１０２ｂを、誘電体層１０１を挟んで段違いの平行位置に形成したことにより、差動モードインピーダンスを所望のインピーダンスに制御することが可能である。   When the dielectric constant of the dielectric layer 101 is large and the widths of the + line 102a and the − line 102b of the differential balanced signal line pair are wide, the differential balanced signal line pair is configured as described in the sixth embodiment. If the pair of + line 102a and − line 102b are arranged opposite to each other with the dielectric layer 101 in between, the differential mode impedance may be too low. On the other hand, the configuration of the present embodiment is different in that the pair of + line 102a and − line 102b constituting the differential balanced signal line pair are formed at different parallel positions across the dielectric layer 101. It is possible to control the dynamic mode impedance to a desired impedance.

また、本差動平衡信号伝送基板は、隣接する他の差動平衡信号線対との間に、接地用配線１０３または電源用配線１０４が形成されているため、差動平衡信号線対を高密度に配置しても、クロストークを抑制することができる。さらに、差動平衡信号線対の両側に必ず接地用配線１０３および電源用配線１０４が配置されているため、信号配線中に流れる信号の負荷を通って信号源に帰ってくるリターン電流が、必ず隣接する配線中を流れる。これにより、ループ断面積が小さくなり、放射ノイズを抑制することができる。   In addition, since the differential balanced signal transmission board has the ground wiring 103 or the power supply wiring 104 formed between other differential balanced signal line pairs adjacent to each other, the differential balanced signal line pair is raised. Even if it arrange | positions at a density, crosstalk can be suppressed. Furthermore, since the ground wiring 103 and the power wiring 104 are always arranged on both sides of the differential balanced signal line pair, the return current that returns to the signal source through the load of the signal flowing in the signal wiring is always Flows in adjacent wiring. Thereby, a loop cross-sectional area becomes small and radiation noise can be suppressed.

（実施の形態９）
図１１（ａ）は、本発明の実施の形態９における差動平衡信号伝送基板の構成の概略を示す斜視図である。図１１（ｂ）は、この差動平衡信号伝送基板の平面図である。 (Embodiment 9)
FIG. 11A is a perspective view schematically showing the configuration of the differential balanced signal transmission board according to the ninth embodiment of the present invention. FIG. 11B is a plan view of the differential balanced signal transmission board.

なお、本実施の形態では、２層の配線層を備える差動平衡信号伝送基板を例に挙げて本発明を説明するが、本発明は、２層以外の層数の差動平衡信号伝送基板としても同様に実施することができることはいうまでもない。   In the present embodiment, the present invention will be described by taking a differential balanced signal transmission board having two wiring layers as an example. However, the present invention is a differential balanced signal transmission board having a number of layers other than two. Needless to say, it can be implemented in the same manner.

本差動平衡信号伝送基板は、誘電体層（図示省略）の一方の面に、２組の差動平衡信号線対、すなわち、一対の＋線１０２ａ1および−線１０２ｂ1と、一対の＋線１０２ａ2および−線１０２ｂ2とを有する。また、上記誘電体層の他方の面に、同じく２組の差動平衡信号線対として、一対の＋線１０２ａ3および−線１０２ｂ3と、一対の＋線１０２ａ4および−線１０２ｂ4とを有する。 The differential balanced signal transmission board has two pairs of differential balanced signal lines, that is, a pair of + lines 102a 1 and − lines 102b 1 and a pair of + lines on one surface of a dielectric layer (not shown). It has a line 102a 2 and a −line 102b 2 . Also, on the other surface of the dielectric layer, as a pair of differential balanced signal lines, a pair of + line 102a 3 and − line 102b 3 and a pair of + line 102a 4 and − line 102b 4 are provided. Have.

なお、図１１（ｂ）から分かるように、＋線１０２ａ3、−線１０２ｂ3、＋線１０２ａ4、および−線１０２ｂ4は、＋線１０２ａ1、−線１０２ｂ1、＋線１０２ａ2、および−線１０２ｂ2に対して投影的に直交する方向に配置されている。また、これらの差動平衡信号線対の各組の両側には、一方の側に接地用配線１０３が、他方の側に電源用配線１０４が、差動平衡信号線対に平行にそれぞれ配置されている。 As can be seen from FIG. 11B, the + line 102a 3 , the − line 102b 3 , the + line 102a 4 , and the − line 102b 4 are the + line 102a 1 , the − line 102b 1 , the + line 102a 2 , and - it is arranged in a direction of projecting manner perpendicular to the line 102b 2. Further, on both sides of each pair of these differential balanced signal line pairs, a ground wiring 103 is arranged on one side, and a power wiring 104 is arranged on the other side in parallel to the differential balanced signal line pair. ing.

差動平衡信号線対の＋線１０２ａ1は、誘電体層（図示省略）に形成されたビアホール内に設けられた導体１０９を介して、差動平衡信号線対の＋線１０２ａ3に接続されている。同様にして、−線１０２ｂ1と−線１０２ｂ3、＋線１０２ａ2と＋線１０２ａ4、−線１０２ｂ2と−線１０２ｂ4が、ビアホールを介してそれぞれ接続されている。 The + line 102a 1 of the differential balanced signal line pair is connected to the + line 102a 3 of the differential balanced signal line pair via a conductor 109 provided in a via hole formed in a dielectric layer (not shown). ing. Similarly, - lines 102b 1 and - line 102b 3, + lines 102a 2 and + line 102a 4, - a line 102b 2 - line 102b 4 are connected to each other by via holes.

なお、図１１（ｂ）に示すように、各差動平衡信号線対における＋線と−線との間隔は均一であり、＋線と−線とは互いに等しい幅で形成されている。また、例えば、＋線１０２ａ1が−線１０２ｂ1よりも長く、＋線１０２ａ3が−線１０２ｂ3よりも短く、＋線１０２ａ1と−線１０２ｂ3との一部が、誘電体層を介して重なり合うように配置されたことにより、接続された＋線１０２ａ1および＋線１０２ａ3の配線長と、接続された−線１０２ｂ1および−線１０２ｂ3の配線長とは互いに等しい。同様に、接続された＋線１０２ａ2および＋線１０２ａ4の配線長と、接続された−線１０２ｂ2および−線１０２ｂ4の配線長とは互いに等しい。 As shown in FIG. 11B, the distance between the + line and the − line in each differential balanced signal line pair is uniform, and the + line and the − line are formed to have the same width. Further, for example, + line 102a 1 is - greater than the line 102b 1, the + line 102a 3 - shorter than the line 102b 3, + line 102a 1 and - a portion of the line 102b 3, the dielectric layer by arranged so as to overlap Te, and the wiring length of the connected + lines 102a 1 and + line 102a 3, connected - line 102b 1 and - are equal to each other and the wiring length of the line 102b 3. Likewise, the wiring length of the connected + lines 102a 2 and + lines 102a 4, connected - line 102b 2 and - they are equal to each other and the wiring length of the line 102b 4.

また、誘電体層（図示せず）の両側にそれぞれ配置された接地用配線１０３同士も、この誘電体層に形成されたビアホールを介して接続されている。同様に、誘電体層（図示せず）の両側にそれぞれ配置された電源用配線１０４同士も、この誘電体層に形成されたビアホールを介して接続されている。   Further, the ground wirings 103 arranged on both sides of the dielectric layer (not shown) are also connected through via holes formed in the dielectric layer. Similarly, the power supply wirings 104 disposed on both sides of the dielectric layer (not shown) are also connected via via holes formed in the dielectric layer.

なお、差動平衡信号線対の＋線と−線との間隔は、その間隙の比誘電率と、差動平衡信号線対の厚みと、差動平衡信号線対の差動モードインピーダンスとにより決定される。また、差動平衡信号線対と、接地用配線または電源用配線との距離は、その間隙の比誘電率と、差動平衡信号線対、接地用配線、および電源用配線のそれぞれの厚みと、差動平衡信号線対のコモンモードインピーダンスとにより決定される。   The distance between the + line and the − line of the differential balanced signal line pair depends on the relative permittivity of the gap, the thickness of the differential balanced signal line pair, and the differential mode impedance of the differential balanced signal line pair. It is determined. The distance between the differential balanced signal line pair and the grounding wiring or power supply wiring is determined by the relative permittivity of the gap and the thickness of each of the differential balanced signal line pair, grounding wiring, and power supply wiring. , And the common mode impedance of the differential balanced signal line pair.

差動平衡信号伝送を行う際に、差動平衡信号の＋線と−線の信号線の間で配線長が異なる場合は、出力端で同時に信号を発信しても受信端では伝送した場所の違いや経路の違いによる配線長の違いにより信号線間にスキューと呼ばれる伝搬遅延差が発生する。つまり、信号の受信端において、差動平衡信号線対の＋線および−線の一方に先に信号が伝達してから、＋線および−線の両方に信号が伝達するまでの時間が、データが確定するまでに要する時間となる。従って、＋線および−線の配線長の違いによる上記の伝搬遅延差が大きいと、データの確定に時間を要する。   When performing differential balanced signal transmission, if the wiring lengths of the differential balanced signal + line and-line are different, even if the signal is transmitted simultaneously at the output end, A propagation delay difference called skew occurs between the signal lines due to a difference in wiring length due to a difference or a difference in route. That is, at the signal receiving end, the time from when a signal is first transmitted to one of the + line and the − line of the differential balanced signal line pair until the signal is transmitted to both the + line and the − line is data This is the time it takes to settle. Therefore, if the above-mentioned propagation delay difference due to the difference in wiring length between the + line and the − line is large, it takes time to determine data.

これに対して、本差動平衡信号伝送基板は、各差動平衡信号線対の＋線の配線長と−線の配線長とが等しいことにより、＋線と−線との間での信号伝搬遅延差が無い。これにより、信号の受信端でのホールド時間を短くできるので、高速信号の伝送が可能である。   On the other hand, the differential balanced signal transmission board has a signal line between the + line and the − line, because the + line length and the − line length of each differential balanced signal line pair are equal. There is no difference in propagation delay. As a result, the hold time at the signal receiving end can be shortened, so that high-speed signal transmission is possible.

また、差動平衡信号線対の＋線と−線との間隔を調整することにより、差動モードインピーダンスを制御でき、差動平衡信号線対と接地用配線および電源用配線のそれぞれとの距離を調整することにより、コモンモードインピーダンスを制御できる。これにより、ＩＥＥＥ１３９４等のシステムにも適応可能である。   In addition, the differential mode impedance can be controlled by adjusting the distance between the + line and the − line of the differential balanced signal line pair, and the distance between the differential balanced signal line pair and each of the ground wiring and the power wiring. By adjusting, the common mode impedance can be controlled. As a result, the present invention can be applied to a system such as IEEE1394.

また、少なくとも２層の配線によって、差動平衡信号線対のあらゆる配線が可能となるため、配線層数を少なく抑制することが可能となる。また、隣接する他の差動平衡信号線対との間に接地用配線または電源用配線が配置されているため、他の差動平衡信号線対とのクロストークを抑制することも可能である。   In addition, since any wiring of the differential balanced signal line pair is possible by at least two layers of wiring, the number of wiring layers can be reduced. In addition, since the grounding wiring or the power supply wiring is disposed between the other adjacent differential balanced signal line pairs, it is possible to suppress crosstalk with the other differential balanced signal line pairs. .

さらに、異なる配線層の電源用配線同士および接地用配線同士を接続するために誘電体層中に形成されたビアホールと、同一誘電体層内で最も近接するビアホールとの最長距離を、信号線中を伝送する信号の波長の１／４とすることで、高周波的に安定した低インピーダンスの接地層および電源層を形成することができる。   Furthermore, the maximum distance between the via hole formed in the dielectric layer to connect the power supply wiring and ground wiring in different wiring layers and the nearest via hole in the same dielectric layer is determined in the signal line. By setting the wavelength to 1/4 of the signal transmitted, a low impedance ground layer and a power supply layer that are stable in terms of high frequency can be formed.

これは、次のように説明できる。まず、図１４に示すように、負荷ＺLから特性インピーダンスＺ0の伝送線路の長さＬだけ離れた点からみた入力インピーダンスＺinは、
Ｚin＝Ｚ0×（ＺLｃｏｓβＬ＋ｊＺ0ｓｉｎβＬ）／（Ｚ0ｃｏｓβＬ
＋ｊＺLｓｉｎβＬ）
と表せる。βは２π／λで、λは信号の波長である。
このとき、負荷ＺLのインピーダンスが０で、伝送線路の長さがλ／４の場合、入力インピーダンスＺinは無限大となる。即ち、本来の接地層からビアで接地用配線を異なる配線層に形成した場合、ビアからの接地用配線の長さが信号の波長の１／４となる領域では、本来の接地としての機能はなく、完全にオープンとなる。 This can be explained as follows. First, as shown in FIG. 14, the input impedance Z in viewed from a point separated from the load Z L by the length L of the transmission line having the characteristic impedance Z 0 is
Z in = Z 0 × (Z L cos βL + jZ 0 sin βL) / (Z 0 cos βL
+ JZ L sin βL)
It can be expressed. β is 2π / λ, and λ is the wavelength of the signal.
At this time, when the impedance of the load Z L is 0 and the length of the transmission line is λ / 4, the input impedance Z in is infinite. That is, when the grounding wiring is formed in a different wiring layer from the original ground layer to the via, in the region where the length of the grounding wiring from the via is 1/4 of the signal wavelength, the function as the original grounding is Not completely open.

従って、異なる配線層に形成された電源用配線同士および接地用配線同士を接続する隣接したビアホール間の最長距離を、信号線中を伝送する信号の波長の１／４とすることで、差動平衡信号線対のインピーダンスを、高周波領域まで一定に保つことが可能となり、反射の少ない信号伝送が可能となる。   Accordingly, the longest distance between adjacent via holes connecting the power supply wirings and the grounding wirings formed in different wiring layers is set to 1/4 of the wavelength of the signal transmitted through the signal line. The impedance of the balanced signal line pair can be kept constant up to the high frequency region, and signal transmission with less reflection is possible.

なお、上記の説明では、誘電体層の両面に形成された配線が投影的に直交する構成を例示したが、本発明はこれに限定されず、第１の方向と第２の方向が垂直な関係である図面を用いて説明したが、誘電体層の両面に形成された配線が平行でなければ、同様の効果が得られる。特に、誘電体層の両面に形成された配線が投影的になす角が４５度または６０度である構成においても、設計がしやすく、ＬＳＩ間を最短距離で配線することが可能となるので、好ましい。   In the above description, the configuration in which the wirings formed on both surfaces of the dielectric layer are orthogonally projected is exemplified, but the present invention is not limited to this, and the first direction and the second direction are perpendicular to each other. Although described using the related drawings, the same effect can be obtained if the wirings formed on both surfaces of the dielectric layer are not parallel. In particular, even in a configuration in which the projection angle formed by the wiring formed on both surfaces of the dielectric layer is 45 degrees or 60 degrees, it is easy to design and wiring between LSIs can be performed at the shortest distance. preferable.

（実施の形態１０）
図１２（ａ）は、本発明の実施の形態１０における差動平衡信号伝送基板の構成の概略を示す斜視図である。図１２（ｂ）は、この差動平衡信号伝送基板の平面図である。 (Embodiment 10)
FIG. 12A is a perspective view schematically showing the configuration of the differential balanced signal transmission board in the tenth embodiment of the present invention. FIG. 12B is a plan view of the differential balanced signal transmission board.

なお、本実施の形態では、２層の配線層を備える差動平衡信号伝送基板を例に挙げて本発明を説明するが、本発明は、２層以外の層数の差動平衡信号伝送基板としても同様に実施することができることはいうまでもない。   In the present embodiment, the present invention will be described by taking a differential balanced signal transmission board having two wiring layers as an example. However, the present invention is a differential balanced signal transmission board having a number of layers other than two. Needless to say, it can be implemented in the same manner.

本差動平衡信号伝送基板は、誘電体層（図示省略）の一方の面に、２組の差動平衡信号線対、すなわち、一対の＋線１０２ａ1および−線１０２ｂ1と、一対の＋線１０２ａ2および−線１０２ｂ2とを有する。また、上記誘電体層の他方の面に、同じく２組の差動平衡信号線対として、一対の＋線１０２ａ3および−線１０２ｂ3と、一対の＋線１０２ａ4および−線１０２ｂ4とを有する。
なお、図１２（ｂ）から分かるように、＋線１０２ａ3、−線１０２ｂ3、＋線１０２ａ4および−線１０２ｂ4は、＋線１０２ａ1、−線１０２ｂ1、＋線１０２ａ2、および−線１０２ｂ2に対して投影的に直交する方向に配置されている。また、これらの差動平衡信号線対の各組の両側には、接地用配線１０３および電源用配線１０４の対が、差動平衡信号線対に平行に配置されている。 The differential balanced signal transmission board has two pairs of differential balanced signal lines, that is, a pair of + lines 102a 1 and − lines 102b 1 and a pair of + lines on one surface of a dielectric layer (not shown). It has a line 102a 2 and a −line 102b 2 . Also, on the other surface of the dielectric layer, as a pair of differential balanced signal lines, a pair of + line 102a 3 and − line 102b 3 and a pair of + line 102a 4 and − line 102b 4 are provided. Have.
As can be seen from FIG. 12B, the + line 102a 3 , the − line 102b 3 , the + line 102a 4 and the − line 102b 4 are the + line 102a 1 , the − line 102b 1 , the + line 102a 2 , and the − line. It is arranged in a direction orthogonal to the line 102b 2 in a projection. Further, on both sides of each pair of these differential balanced signal line pairs, a pair of ground wiring 103 and power supply wiring 104 is arranged in parallel to the differential balanced signal line pair.

差動平衡信号線対の＋線１０２ａ1は、誘電体層（図示省略）に形成されたビアホール内に設けられた導体１０９を介して、差動平衡信号線対の＋線１０２ａ3に接続されている。同様にして、−線１０２ｂ1と−線１０２ｂ3、＋線１０２ａ2と＋線１０２ａ4、−線１０２ｂ2と−線１０２ｂ4が、ビアホールを介してそれぞれ接続されている。 The + line 102a 1 of the differential balanced signal line pair is connected to the + line 102a 3 of the differential balanced signal line pair via a conductor 109 provided in a via hole formed in a dielectric layer (not shown). ing. Similarly, - lines 102b 1 and - line 102b 3, + lines 102a 2 and + line 102a 4, - a line 102b 2 - line 102b 4 are connected to each other by via holes.

また、誘電体層（図示せず）の両側にそれぞれ配置された接地用配線１０３同士も、この誘電体層に形成されたビアホールを介して接続されている。同様に、誘電体層（図示せず）の両側にそれぞれ配置された電源用配線１０４同士も、この誘電体層に形成されたビアホールを介して接続されている。   Further, the ground wirings 103 arranged on both sides of the dielectric layer (not shown) are also connected through via holes formed in the dielectric layer. Similarly, the power supply wirings 104 disposed on both sides of the dielectric layer (not shown) are also connected via via holes formed in the dielectric layer.

なお、差動平衡信号線対の＋線と−線との距離は、その間隙の比誘電率と、差動平衡信号線対の厚みと、差動平衡信号線対の差動モードインピーダンスとにより決定される。また、差動平衡信号線対と、接地用配線または電源用配線との距離は、その間隙の比誘電率と、差動平衡信号線対、接地用配線、および電源用配線のそれぞれの厚みと、差動平衡信号線対のコモンモードインピーダンスとにより決定される。   The distance between the + line and the − line of the differential balanced signal line pair depends on the relative dielectric constant of the gap, the thickness of the differential balanced signal line pair, and the differential mode impedance of the differential balanced signal line pair. It is determined. The distance between the differential balanced signal line pair and the grounding wiring or power supply wiring is determined by the relative permittivity of the gap and the thickness of each of the differential balanced signal line pair, grounding wiring, and power supply wiring. , And the common mode impedance of the differential balanced signal line pair.

このように形成された本差動平衡信号伝送基板は、＋線と−線との間の伝搬遅延差が無く、少なくとも２層の配線層により、コモンモードインピーダンスと差動モードインピーダンスとが決定できる、あらゆる配線を行うことができる。   The differential balanced signal transmission board thus formed has no propagation delay difference between the + line and the − line, and the common mode impedance and the differential mode impedance can be determined by at least two wiring layers. Any wiring can be done.

また、差動平衡信号線対の両側に、接地用配線と電源用配線との対が隣接して配置されているため、それぞれの配線間に対向容量が存在し、電源と接地との間のインピーダンスを低く抑えることが可能となる。   In addition, since the pair of grounding wiring and power supply wiring are arranged adjacent to each other on both sides of the differential balanced signal line pair, there is a counter capacitance between the respective wirings, and there is a gap between the power supply and ground. Impedance can be kept low.

本発明の実施の形態１にかかる差動平衡信号伝送基板の概略構成を示す断面図である。It is sectional drawing which shows schematic structure of the differential balanced signal transmission board | substrate concerning Embodiment 1 of this invention. 本発明の実施の形態２にかかる差動平衡信号伝送基板の概略構成を示す断面図Sectional drawing which shows schematic structure of the differential balanced signal transmission board | substrate concerning Embodiment 2 of this invention. 本発明の実施の形態３にかかる差動平衡信号伝送基板の概略構成を示す断面図Sectional drawing which shows schematic structure of the differential balanced signal transmission board | substrate concerning Embodiment 3 of this invention. （ａ）〜（ｄ）は、本発明の実施の形態３にかかる差動平衡信号伝送基板の製造工程の概略を示す断面図(A)-(d) is sectional drawing which shows the outline of the manufacturing process of the differential balanced signal transmission board | substrate concerning Embodiment 3 of this invention. 本発明の実施の形態４にかかる差動平衡信号伝送基板の概略構成を示す断面図Sectional drawing which shows schematic structure of the differential balanced signal transmission board | substrate concerning Embodiment 4 of this invention. 本発明の実施の形態５にかかる差動平衡信号伝送基板の概略構成を示す断面図Sectional drawing which shows schematic structure of the differential balanced signal transmission board | substrate concerning Embodiment 5 of this invention. 本発明の実施の形態６にかかる差動平衡信号伝送基板の概略構成を示す断面図Sectional drawing which shows schematic structure of the differential balanced signal transmission board | substrate concerning Embodiment 6 of this invention. 本発明の実施の形態７にかかる差動平衡信号伝送基板の概略構成を示す断面図Sectional drawing which shows schematic structure of the differential balanced signal transmission board | substrate concerning Embodiment 7 of this invention. （ａ）〜（ｄ）は、本発明の実施の形態７にかかる差動平衡信号伝送基板の製造工程の概略を示す断面図(A)-(d) is sectional drawing which shows the outline of the manufacturing process of the differential balanced signal transmission board | substrate concerning Embodiment 7 of this invention. 本発明の実施の形態８にかかる差動平衡信号伝送基板の概略構成を示す断面図Sectional drawing which shows schematic structure of the differential balanced signal transmission board | substrate concerning Embodiment 8 of this invention. （ａ）は、本発明の実施の形態９にかかる差動平衡信号伝送基板の概略構成を示す斜視図、（ｂ）は、この差動平衡信号伝送基板の平面図(A) is a perspective view which shows schematic structure of the differential balanced signal transmission board | substrate concerning Embodiment 9 of this invention, (b) is a top view of this differential balanced signal transmission board | substrate. （ａ）は、本発明の実施の形態１０にかかる差動平衡信号伝送基板の概略構成を示す斜視図、（ｂ）は、この差動平衡信号伝送基板の平面図(A) is a perspective view which shows schematic structure of the differential balanced signal transmission board | substrate concerning Embodiment 10 of this invention, (b) is a top view of this differential balanced signal transmission board | substrate. 従来の伝送線路基板の一例の概略構成を示す断面図Sectional drawing which shows schematic structure of an example of the conventional transmission line board | substrate. 本発明の実施の形態９にかかる差動平衡信号伝送基板を用いた場合の効果を説明するための図The figure for demonstrating the effect at the time of using the differential balanced signal transmission board | substrate concerning Embodiment 9 of this invention.

符号の説明Explanation of symbols

１０１ 誘電体層
１０２ａ 差動平衡信号線対の＋線
１０２ｂ 差動平衡信号線対の−線
１０３ 接地用配線
１０４ 電源用配線
１０５ 信号配線用導体
１０６ レジストパターン
１０９ 導体
１１０ メッキレジスト DESCRIPTION OF SYMBOLS 101 Dielectric layer 102a + line of differential balanced signal line pair 102b-line of differential balanced signal line pair 103 Grounding wiring 104 Power supply wiring 105 Signal wiring conductor 106 Resist pattern 109 Conductor 110 Plating resist

Claims (8)

絶縁体層と、前記絶縁体層上に設けられた少なくとも一層の配線層とを備えると共に、第１の信号線の電圧と第２の信号線の電圧との和が常に一定である差動平衡信号線対を同一の配線層内に２対以上有し、
前記差動平衡信号線対同士の間に、接地用配線および電源用配線の対が設けられており、
前記差動平衡信号線対における第１の信号線と第２の信号線の配線は等しい幅で設けられている差動平衡信号伝送基板。 A differential balance comprising an insulator layer and at least one wiring layer provided on the insulator layer, and the sum of the voltage of the first signal line and the voltage of the second signal line is always constant Having two or more signal line pairs in the same wiring layer,
Between the differential balanced signal line pairs, a pair of ground wiring and power wiring is provided,
The differential balanced signal transmission board, wherein the first signal line and the second signal line in the differential balanced signal line pair are provided with equal width. 前記接地用配線と前記電源用配線との間隙に、前記絶縁体層の比誘電率よりも大きな比誘電率の誘電体が充填された請求項１に記載の差動平衡信号伝送基板。   2. The differential balanced signal transmission board according to claim 1, wherein a gap between the ground wiring and the power supply wiring is filled with a dielectric having a relative dielectric constant larger than that of the insulator layer. 同一の差動平衡信号線対における第１の信号線と第２の信号線との間隙に、前記絶縁体層の比誘電率よりも大きな比誘電率の誘電体が充填された請求項１に記載の差動平衡信号伝送基板。   The dielectric material having a relative dielectric constant larger than that of the insulator layer is filled in a gap between the first signal line and the second signal line in the same differential balanced signal line pair. The differential balanced signal transmission board described. 前記絶縁体層の一方の面側に第１の配線層を備えると共に、前記絶縁体層の他方の面側に第２の配線層を備え、
前記第１の配線層における前記差動平衡信号線対と、前記第２の配線層における前記差動平衡信号線対とが平行でない請求項１に記載の差動平衡信号伝送基板。 A first wiring layer is provided on one surface side of the insulator layer, and a second wiring layer is provided on the other surface side of the insulator layer,
The differential balanced signal transmission board according to claim 1, wherein the differential balanced signal line pair in the first wiring layer and the differential balanced signal line pair in the second wiring layer are not parallel. 前記第１の配線層における差動平衡信号線対の第１の信号線と、前記第２の配線層における差動平衡信号線対の第１の信号線とが、前記絶縁体層に形成された貫通孔を介して電気的に接続され、
前記第１の配線層における差動平衡信号線対の第２の信号線と、前記第２の配線層における差動平衡信号線対の第２の信号線とが、前記絶縁体層に形成された貫通孔を介して電気的に接続され、
前記貫通孔を介して接続された前記第１の配線層の差動平衡信号線対と前記第２の配線層の差動平衡信号線対とにおいて、第１の信号線の配線長の和が第２の信号線の配線長の和と等しい請求項４に記載の差動平衡信号伝送基板。 The first signal line of the differential balanced signal line pair in the first wiring layer and the first signal line of the differential balanced signal line pair in the second wiring layer are formed in the insulator layer. Electrically connected through the through-holes,
A second signal line of the differential balanced signal line pair in the first wiring layer and a second signal line of the differential balanced signal line pair in the second wiring layer are formed in the insulator layer. Electrically connected through the through-holes,
In the differential balanced signal line pair of the first wiring layer and the differential balanced signal line pair of the second wiring layer connected via the through hole, the sum of the wiring lengths of the first signal lines is The differential balanced signal transmission board according to claim 4, wherein the differential balanced signal transmission board is equal to a sum of wiring lengths of the second signal lines. 前記絶縁体層の一方の面側と他方の面側に形成された前記電源用配線同士および接地用配線同士を接続する前記貫通孔同士の最長距離が、前記差動平衡信号線対を伝送する信号の波長の１／４以下である請求項５に記載の差動平衡信号伝送基板。   The longest distance between the through holes that connect the power supply wirings and the grounding wirings formed on one surface side and the other surface side of the insulator layer transmits the differential balanced signal line pair. 6. The differential balanced signal transmission board according to claim 5, wherein the differential balanced signal transmission board is ¼ or less of a signal wavelength. 前記差動平衡信号線対を形成する第１の信号線と第２の信号線の配線間隔は前記差動平衡信号線対同士で均一である請求項１に記載の差動平衡信号伝送基板。 2. The differential balanced signal transmission board according to claim 1, wherein a wiring interval between the first signal line and the second signal line forming the differential balanced signal line pair is uniform between the differential balanced signal line pairs. 絶縁体層と、前記絶縁体層上に設けられた少なくとも一層の配線層とを備えると共に、第１の信号線の電圧と第２の信号線の電圧との和が常に一定である差動平衡信号線対を同一の配線層内に１対以上有し、前記差動平衡信号線対の両側の一方に前記接地用配線が配置され、他方に前記電源用配線が配置されたことを特徴とする差動平衡信号伝送基板。   A differential balance comprising an insulator layer and at least one wiring layer provided on the insulator layer, and the sum of the voltage of the first signal line and the voltage of the second signal line is always constant One or more signal line pairs are provided in the same wiring layer, the ground wiring is disposed on one side of the differential balanced signal line pair, and the power wiring is disposed on the other side. Differential balanced signal transmission board.
JP2008321235A 2008-12-17 2008-12-17 Differential balanced signal transmission board Expired - Lifetime JP4659087B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008321235A JP4659087B2 (en) 2008-12-17 2008-12-17 Differential balanced signal transmission board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008321235A JP4659087B2 (en) 2008-12-17 2008-12-17 Differential balanced signal transmission board

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP17323499A Division JP4373531B2 (en) 1999-06-18 1999-06-18 Differential balanced signal transmission board

Publications (2)

Publication Number Publication Date
JP2009060150A JP2009060150A (en) 2009-03-19
JP4659087B2 true JP4659087B2 (en) 2011-03-30

Family

ID=40555534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008321235A Expired - Lifetime JP4659087B2 (en) 2008-12-17 2008-12-17 Differential balanced signal transmission board

Country Status (1)

Country Link
JP (1) JP4659087B2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010263366A (en) * 2009-05-01 2010-11-18 Seiko Epson Corp Sensor system, electronic equipment using the same, and sensor module
JP5242605B2 (en) * 2010-01-28 2013-07-24 ルネサスエレクトロニクス株式会社 Wiring structure
JP2012009573A (en) * 2010-06-23 2012-01-12 Sumitomo Bakelite Co Ltd Circuit board
JP6157047B2 (en) * 2011-02-01 2017-07-05 スリーエム イノベイティブ プロパティズ カンパニー IC device socket
JP6157048B2 (en) * 2011-02-01 2017-07-05 スリーエム イノベイティブ プロパティズ カンパニー IC device socket
JP2018009994A (en) * 2017-08-04 2018-01-18 スリーエム イノベイティブ プロパティズ カンパニー Socket for ic device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02240994A (en) * 1989-03-14 1990-09-25 Toshiba Corp Signal wiring board
JPH10223997A (en) * 1997-02-12 1998-08-21 Canon Inc Printed wiring board
JPH10303521A (en) * 1997-04-23 1998-11-13 Hitachi Ltd Transmission line board
JPH1168322A (en) * 1997-08-09 1999-03-09 Ibiden Co Ltd Multi-layer printed wiring board
JPH11162265A (en) * 1997-11-25 1999-06-18 Hitachi Ltd Signal transmission cable
JPH11284126A (en) * 1998-03-31 1999-10-15 Kanji Otsuka Electronic device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02240994A (en) * 1989-03-14 1990-09-25 Toshiba Corp Signal wiring board
JPH10223997A (en) * 1997-02-12 1998-08-21 Canon Inc Printed wiring board
JPH10303521A (en) * 1997-04-23 1998-11-13 Hitachi Ltd Transmission line board
JPH1168322A (en) * 1997-08-09 1999-03-09 Ibiden Co Ltd Multi-layer printed wiring board
JPH11162265A (en) * 1997-11-25 1999-06-18 Hitachi Ltd Signal transmission cable
JPH11284126A (en) * 1998-03-31 1999-10-15 Kanji Otsuka Electronic device

Also Published As

Publication number Publication date
JP2009060150A (en) 2009-03-19

Similar Documents

Publication Publication Date Title
JP4373531B2 (en) Differential balanced signal transmission board
US6420778B1 (en) Differential electrical transmission line structures employing crosstalk compensation and related methods
JP4371065B2 (en) Transmission line, communication apparatus, and wiring formation method
US8847696B2 (en) Flexible interconnect cable having signal trace pairs and ground layer pairs disposed on opposite sides of a flexible dielectric
JP3530195B2 (en) Circuit board, assembly, and method for increasing the impedance of an assembly for carrying high speed signals
US6372996B2 (en) Circuit board having shielding planes with varied void opening patterns for controlling the impedance and the transmission time
JP5194440B2 (en) Printed wiring board
US20100182105A1 (en) Impedance-controlled coplanar waveguide system for the three-dimensional distribution of high-bandwidth signals
US20080088007A1 (en) System, device and method for reducing cross-talk in differential signal conductor pairs
JPH08506696A (en) Circuit board array including shield grid and structure thereof
JP4659087B2 (en) Differential balanced signal transmission board
JP4656212B2 (en) Connection method
KR101136423B1 (en) Circuit board assembly with reduced capacitive coupling
JP4848490B2 (en) Transmission line, wiring board having the same, and semiconductor device
US6225568B1 (en) Circuit board having shielding planes with varied void opening patterns for controlling the impedance and the transmission time
US20030096447A1 (en) Single and multiple layer packaging of high-speed/high-density ICs
US20070194434A1 (en) Differential signal transmission structure, wiring board, and chip package
US6992255B2 (en) Via and via landing structures for smoothing transitions in multi-layer substrates
JP4222943B2 (en) Electronic device carrier suitable for high-frequency signal transmission
US6875930B2 (en) Optimized conductor routing for multiple components on a printed circuit board
JP5051836B2 (en) Semiconductor device and design method thereof
EP1568099B1 (en) A circuit that taps a differential signal
WO2009119849A1 (en) Composite wiring board
CN107360663B (en) Circuit board structure capable of selecting corresponding grounding layer
JP6080729B2 (en) Multilayer substrate, printed circuit board, semiconductor package substrate, semiconductor package, semiconductor chip, semiconductor device, information processing apparatus and communication apparatus

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20081217

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20101202

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20101224

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140107

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4659087

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

EXPY Cancellation because of completion of term