JP4191073B2 - Waveform data output device - Google Patents

Description

  The present invention relates to a waveform data output device used for an electronic musical instrument, and more particularly to a waveform data output device that stores a plurality of waveform data at the same address of a waveform memory and enables various readout of waveform data. It is.

  The present applicant has proposed the configuration shown in FIG. 9 and FIG. 10 in the previous application instead of the prior art (see Patent Document 1 below).

  That is, FIG. 9A shows a configuration in which the tone generator 210 is single and the waveform memory 212 has a single configuration. In such a one-chip configuration, if the number of simultaneous sounds is 64 channels, one channel is accessed (obtains 2 sample values) within one sampling time, with one channel (arbitrary channel is n), As shown in FIG. 10A, each waveform data is read every other time slot, such as n-1, n, n + 1, n + 2, n + 3,.

  Further, FIG. 9B shows that when the number of simultaneous sound generations is 64 channels in the same chip configuration, access (indicated by n and n ′) twice (indicated by n and n ′) within one sampling time (4 sample values are set). As shown in FIG. 10 (b), n-1, n-1 ', n, n', n + 1, n + 1 ', n + 2, n + 2', n + 3, n + 3 ',... In all time slots, there are two accesses, and waveform data is read out.

Further, in FIG. 9C, unlike the above configuration, in a two-chip configuration (a configuration in which the tone generators are 210 and 211 and a waveform memory 212 is a single configuration), when the number of simultaneous sounds is 64 channels, one sampling is performed. In time, access is made once in each channel n, 64 + n, and as shown in FIG. 10 (c), n-1, 64 + n-1, n, 64 + n, n + 1, 64 + n + 1, n + 2, 64 + n + 2, n + 3, 64 + n + 3, The waveform data of each channel is read out in all time slots like time slots (since there are 64 channels, the next to n is 64 + n).
Japanese Patent Application No. 2003-408393

  However, the configuration of the two chips shown in FIG. 9C and FIG. 10C that can only be accessed once per channel (to obtain two sample values), or one channel, although not shown. In the case of a configuration in which only one access can be taken per time, there has been a problem that the frequency number can only be less than 2.

  When 4-point interpolation is performed in the interpolation processing performed after the waveform data sample values are read out, in addition to the read point sample values, the past three-point sample values are included. Therefore, interpolation processing between them can be performed.

  In the case of a configuration that allows only one access per channel, the four-point interpolation process can handle a frequency number of less than 2. If the frequency number can correspond to less than 4, double access slots are required.

  Further, in the above-described 2-chip configuration in which only one access can be made per channel, waveform data of two sample values can be read with one access, and waveform sample values can be skipped. However, since there is no empty time slot, the frequency number can only be less than 2.

  The present invention was devised in view of the above problems, and is a waveform data output device used for an electronic musical instrument, and even if it is configured to allow only one access per channel, the frequency number is not limited. It is intended to provide a waveform data output device that can handle two or more.

Therefore, the waveform data output device according to the present invention is
Waveform data having N sample values in one word and waveforms having M sample values greater than N in one word with respect to waveforms in the same sound range in order to correspond to timbres with a wide range of pitch change a waveform data storage means for storing the data,
Frequency information generating means for generating a frequency number less than a predetermined value or a frequency number greater than a predetermined value in response to selection of a timbre with a wide range of pitch change ,
When the frequency number is less than a predetermined value, the frequency number is accumulated to generate a frequency address that is phase information for reading waveform data having N sample values in one word from the waveform data storage means. On the other hand, when the frequency number is equal to or higher than a predetermined value, the frequency number is also accumulated to generate a frequency address for reading waveform data having M sample values in one word from the waveform data storage means. It has a basic feature of having at least frequency address generating means.

  In the present invention, in the case of a waveform having a frequency number of 2 or more (high-frequency waveform), the present inventor proposes the above configuration on the assumption that there is no problem even if the bit accuracy is sacrificed. . According to the above configuration, a plurality of waveform data is stored at the same address of the waveform data storage means, and the frequency number is less than a predetermined value (for example, 2 in the case of the embodiment configuration described later) by the frequency address generation means. At this time, a frequency address for reading out waveform data having N sample values (for example, 2 sample values in the case of an embodiment described later) in one word is generated from the waveform data storage means, and the frequency number is set to a predetermined value. When the value is equal to or greater than the value, a frequency address for reading out waveform data having M sample values (for example, 4 sample values in the case of the embodiment configuration described later) in one word is generated from the waveform data storage means. Therefore, even in a configuration where only one access can be obtained per channel, for example, the frequency number is 2 Like also becomes possible to correspond to the above, it is possible to high frequency reading of waveform data than ever.

According to the waveform data output device of the present invention, when the selected timbre has a wide range of pitch change, it is possible to cope with the case where the frequency number changes from a predetermined value to a predetermined value or more. Even when a plurality of waveform data is stored at the same address of the waveform data storage means and only one access can be obtained per channel for various readings of the waveform data, for example, the frequency number can be more than two. For example, it is possible to obtain an excellent effect that waveform data having a higher frequency than ever can be read.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a schematic circuit diagram of an electronic musical instrument (for example, an electronic organ) having the configuration of a waveform data output device according to the present invention.

  This electronic musical instrument can play any tone on the keyboard of the electronic piano, and can assign different tones to the upper and lower hand keyboards and foot keyboards of the electronic organ. The same tone can be set at each position. Therefore, when these keys are pressed, the number of channels necessary for the simultaneous generation of each musical tone often exceeds the number of 64 channels.

  As shown in FIG. 1, the electronic musical instrument is configured such that a CPU 201, a ROM 202, a RAM 203, a panel scan circuit 204 a, a keyboard scan circuit 205 a, and a tone generator 100 are connected to each other via a system bus 200. The system bus 200 is used for transmitting and receiving an address signal, a data signal, a control signal, and the like (a signal bus including an address bus, a data bus, and a control signal line).

  The CPU 201 is a central processing unit that controls the electronic musical instrument. The CPU 201 controls the keyboard scan circuit 205a and the panel scan circuit 204a according to a program stored in the ROM 202, which will be described later, and controls the keys of the keyboard 205 and the operation panel 204. A tone setting switch or the like is scanned, and the key generation data [key ON / OFF, key identification information (key number, etc.), key touch response: key data] accompanying the key press / release of the keyboard 205 is input to the musical tone generation unit 100. Control is performed so as to generate a desired musical tone signal from the musical tone generator 100 according to the allocation processing, the tone color setting switch of the operation panel 204, and the volume.

  The ROM 202 is a read-only memory that stores various parameter data that the CPU 201 refers to when generating musical sounds in addition to the above-described program for the CPU 201.

  The RAM 203 is a readable / writable memory that temporarily stores data at the processing stage in the program processing in the CPU 201 and stores parameter data that can be edited. A part of the data is backed up by a battery, and necessary data corresponding to the tone color setting of the operation panel 204 can be stored and held (stored and held even when the power is turned off). In addition, a register, a counter, a flag function, and the like are defined in this RAM as necessary.

  The panel scan circuit 204a scans each switch on the operation panel 204 in response to a command from the CPU 201, and each switch corresponds to 1 bit based on a signal indicating the open / closed state of each switch obtained by this scan. Create the panel data. Each bit represents, for example, “1” indicating a switch-on state, and “0” indicating a switch-off state. This panel data is sent to the CPU 201 via the system bus 200. This panel data is used to determine whether an on event or an off event of a switch on the operation panel 204 has occurred.

  Further, the panel scan circuit 204a sends the display data sent from the CPU 201 to the LED display and the LCD on the operation panel 204. Thus, the LED display is turned on / off according to the data sent from the CPU 201, and a message is displayed on the LCD.

  An operation panel 204 is connected to the panel scan circuit 204a. The operation panel 204 has a display unit including a switch and a volume for selecting and setting a timbre, the LCD or LED display for displaying the selection and setting state, and the like. A timbre setting flag is set by selecting a timbre on the operation panel 204. Further, the tone color setting flag may be directly changed by the player's operation on the operation panel 204. In particular, there are timbres with a wide range of pitch change. As will be described later, when the frequency number is 2 or more and less than 4, the waveform memory 101 may read waveform data in which 4 sample values are stored in one word. is there.

  The keyboard scan circuit 205 a is a detection circuit that detects key press data generated by the keyboard 205. That is, each of these keys 205 is provided with a two-point switch, and when it is detected that an arbitrary key 205 has been pressed down to a predetermined depth or more, the key press of the pitch data (key number) of that key is detected. In addition to generating a signal, velocities are generated from the speed passing between the two-point switches, and they are sent to the keyboard scan circuit 205a as key press data. As the two-point switch, an optical sensor, a pressure sensor, or other sensors that can detect that the key has been pressed down to a predetermined depth or more can be used. When the keyboard scan circuit 205 a receives key depression data from the two-point switch, it sends it to the CPU 201.

  The key depression data from the keyboard scan circuit 205a is sent by the CPU 201 to the tone generator 100 corresponding to each channel by referring to the tone color setting flag on the RAM 203.

  The tone generator 100 is designed by a dedicated LSI, and generates a read address corresponding to a key played on the keyboard 205 with a tone selected and set on the operation panel 204 (a frequency address generator 110 described later). Then, after reading the original data from a waveform memory 101 (to be described later) corresponding to the waveform data storage means of the present application, and further performing interpolation processing of the original data (by the interpolator 121 of the decoder 104 (to be described later)) The envelope for each timbre generated by the circuit (by an amplitude envelope generator 108 described later) is multiplied (by a multiplier 107 described later), and the waveform data of each timbre is accumulated for the set channel, and the external A musical tone signal is generated. Details of this configuration will be described later. Moreover, although not shown in figure, you may also provide the acoustic effect addition structure which adds a predetermined acoustic effect (a reverberation effect is included) to this musical sound signal. Further, the musical sound signal output from the musical sound generating unit 100 is input to the D / A conversion circuit 206, converted from digital to analog, amplified by the amplifier 207, and emitted from the speaker 208 to the outside as a musical sound.

  The waveform memory 101 stores musical sound waveform data corresponding to the tone color and tone range (pitch), and is a read signal from the tone generator 100 according to the desired tone frequency in accordance with the tone color selection and key depression data. The data is read out.

  The D / A conversion circuit 206 is a digital-analog converter that converts the digital tone signal generated by the tone generator 100 into an analog tone signal.

  The amplifier 207 is a power amplifier that amplifies the analog musical sound signal that has been subjected to analog processing so as to be generated by the speaker 208.

  The speaker 208 is a speaker that emits an analog signal as an audible signal, and includes one or more speakers.

  2 and 3 show schematic views of the configuration of the waveform data output device according to the present invention (FIG. 3 shows the control information and the like sent from the system bus 200 side in more detail).

  Among them, the waveform memory 101 is the same as that shown in FIG. 1, and desired waveform data includes, for example, waveform data composed of a head portion and a loop portion (as will be described later, STA → LEA → LTA → LEA → LTA → LEA → LTA → LEA…, a memory that is stored as a waveform data with a portion that is read once and a portion that is repeatedly read), and is stored in a predetermined area related to the timbre and range. .

  As described above, the tone generator 100 is composed of a dedicated LSI, and its internal configuration includes a frequency information generator 102, a frequency address generator 103, and a decoder 104 as shown in FIG. ing.

  The frequency information generating unit 102 is configured to generate a frequency number corresponding to the instructed pitch, as shown in FIG. 6B described later, and a pitch parameter corresponding to the key number in the key pressing data. Is generated.

  The frequency address generator 103 includes an adder and an accumulator, and responds to key press data [key ON / OFF, key identification information (key number, etc.), key touch response: key data] and tone color information. In order to read out the desired musical sound waveform data stored from the waveform memory 101 at a speed corresponding to the desired musical sound frequency, the phase information is accumulated by accumulating the frequency number given from the frequency information generating unit 102. Generate a frequency address that is In this configuration, as will be described later, when the frequency number is less than 2 (predetermined value), waveform data having 2 (N) sample values per word from the waveform memory 101 (waveform data a, waveform data). b, an address for reading waveform data c,... is generated, and when the frequency number is 2 or more, waveform data (waveform) having 4 (M) sample values per word from the waveform memory 101 An address for reading data a ′) is generated.

  The decoder 104 is configured to decompress and restore the waveform data read according to the frequency address (musical tone frequency) generated by the frequency address generator 103, and to interpolate sample values. If the waveform data is compressed, sample value interpolation is performed after decompression and restoration, or if the waveform data is a linear value, only sample value interpolation is performed.

  In addition, in the configuration of this embodiment, the configuration of the waveform data output device includes the configuration of the filter 105, the filter control information generator 106, the multiplier 107, and the amplitude envelope generator 108.

  The filter 105 is a filter circuit that controls the frequency component included in the waveform data output from the decoder 104 according to the musical tone frequency in response to control information generated by a filter control information generator 106 described later. .

  The filter control information generator 106 is a circuit that generates control information for controlling the filter characteristics of the filter 105. The key control data [key ON / OFF, key identification information (key number, etc.), key touch response : Key data] and timbre information, this filter control information is generated.

  The multiplier 107 multiplies the musical tone waveform data controlled to have a desired filter characteristic output from the filter 105 and an envelope signal from an amplitude envelope generator 108, which will be described later, and outputs the musical tone waveform data to which the envelope is added. .

  The amplitude envelope generator 108 outputs the amplitude of the musical tone waveform data controlled to a desired filter characteristic output from the filter 105 as key press data [key ON / OFF, key identification information (key number, etc.), key touch response. : Key data] and a circuit for generating an envelope signal for control in response to timbre information.

  FIG. 4 is an explanatory diagram showing the storage state of the waveform data in the waveform memory 101 used in the configuration of the present embodiment.

  The waveform memory 101 in FIG. 9A stores data such as waveform data a, waveform data a ′, waveform data b, waveform data c,... As shown in FIG. The stored musical sound waveform data is stored in correspondence with the tone color and tone range (pitch). However, the waveform data a 'is stored as waveform data related to the waveform data a (as waveform data read out when the frequency number is 2 or more) in order to achieve the above-described configuration of the present application.

  FIG. 4C shows a storage state of each waveform data that can be read out by one access. The readout unit is 2 sample values for waveform data a, waveform data b, waveform data c,..., And 4 sample values for waveform data a ′. That is, the waveform data a, waveform data b, waveform data c,... Are composed of waveform data of 2 sample values per word so that waveform data of 2 sample values can be read out by 1 access. ing.

  However, as will be described later, even when the frequency number is 2 or more and less than 4, in order to enable reading (corresponding) with one access, the waveform data a ′ has a waveform of 4 sample values per word. It consists of data. As will be described later, in that case, the bit precision per one sample value is stored with being lowered (for example, the above-mentioned waveform data of one word and two sample values, one sample value is a 16 bit structure, but one word is four sample values) In the waveform data a ′, one sample value has an 8-bit configuration). As described above, since the bit precision is stored at a reduced level, waveform data of 4 sample values can be read out by one access. However, as described above, such a configuration can be made because there is no problem even if the bit accuracy is sacrificed in the case of a waveform having a frequency number of 2 or more (high frequency waveform).

  On the other hand, in the waveform data shown in FIG. 5, the storage state of the waveform data in the waveform memory 101 not using the configuration of the present application is shown as a comparative example. In the case of FIG. 4 described above, there is no waveform data stored in a state like the waveform data a ′ as the waveform data related to the waveform data a. What is shown on the right side between (b) and (c) in the figure shows in what form the waveform data is basically stored. Thus, one waveform data consists of a head portion (a portion that is read only once) and a loop portion (a portion that is read once and then repeatedly read). Although not shown, only the loop portion may be repeatedly stored as waveform data. The lower part of the figure shows the state of the address generated in response to the musical tone frequency for reading the waveform data consisting of the head portion and the loop portion. A read location is designated by a start address (STA), a loop top address (LTA), and a loop end address (LEA). Therefore, since there is repeated reading of the loop portion, STA → LEA → LTA → LEA → LTALEA →.

  FIG. 6 shows a frequency number that is generated by the frequency information generation unit 102 and serves as a basis of frequency information, and frequency information that is generated by the frequency address generation unit 103 in response to a musical tone frequency based on the frequency number. It is explanatory drawing which shows these relationships.

As shown in FIG. 5B, the frequency numbers are indicated by F _N12 , F _N11 , F _N10 , F _N9 , F _N8 ,... , Between F _N11 and F _N10 . That is, F _N12 , F _N11 , decimal point, F _N10 , F _N9 , F _N8 ,..., 11.111 is about 3.9. As shown in the figure, when F _N12 = 0, the frequency number is less than 2 (about 1.9...), And when F _N12 = 1, the frequency number is 2 or more. As described above, these frequency numbers are determined in advance as pitch parameters corresponding to the key numbers in the key pressing data.

As shown in FIG. 5A, the frequency information is generated by the frequency address generating unit 103 and is generated in response to the musical sound frequency obtained by accumulating the frequency numbers. The information includes an integer part (... I ₅ , I ₄ , I ₃ , I ₂ , I ₁ , I ₀ ) and a decimal part (F ₀ , F ₋₁ , F ₋₂ , F ₋₃ , F ₋₄ , F _-5 , ...).

Among these, the upper part of the integer part is used as an access signal to the waveform memory 101, and the lower part of the integer part is used for selecting a sample value. For example, when F _N12 = 1 and the frequency number is 2 or more, up to ~ I ₂ are handled as frequency information for accessing the waveform memory 101, and the waveform data is read from the storage area of the waveform data a ′. . When F _N12 = 0 and the frequency number is less than 2, up to ~ I ₁ are handled as frequency information for accessing the waveform memory 101, and the waveform data is read from the storage area of the waveform data a. become.

  Furthermore, the upper part of the decimal part of the frequency information (how many bits are used depends on how much the interpolation accuracy is made) is used as information for generating an interpolation coefficient used in sample value interpolation.

  FIG. 7 is an explanatory diagram showing a configuration of the waveform memory 101, the frequency address generation unit 103, and the decoder 104 in FIGS.

  The waveform memory 101 is as shown in FIG. Among the waveform data a, b, and c, a certain tone color in a certain range related to the waveform data b and c can be handled with a frequency number less than 2, so the data is read with two sample values in one access. Although only a storage format that can be output, a certain tone color in a certain sound range related to the waveform data a may be read out even with a frequency number of 2 or more, and therefore waveform data a ′ is stored as a countermeasure in this case. By reading this storage area, it is possible to cope with frequency numbers from 2 to less than 4.

  The frequency address generator 103 has a configuration of a frequency address generator 110 and a selector 111 as shown in FIG.

Among them, the frequency address generator 110 is a circuit that generates frequency information generated in response to the musical tone frequency shown in FIG. That is, it is obtained by accumulating the input frequency numbers (F _N12 , F _N11 , F _N10 , F _N9 , F _N8 ,...), And its output range is the start address (STA) described above. It changes within the range set by the loop top address (LTA) and the loop end address (LEA).

When the frequency number F _N12 supplied as a selection signal to the S terminal on the drawing is “0” (when the frequency number is less than 2), the selector 111 receives the signal (area a). select the integral part I ₁ or more) of the specified signal and the frequency information, when the frequency number F _N12 is "1" in the opposite (when frequency number is less than 2 or more to 4) is supplied to a terminal 1 This is a configuration of a selector that selects a signal (area a ′ designation signal and integer part I ₂ or more of frequency information). The output of the selector 111 is as shown in Table 1 below.

  The decoder 104 has a configuration of a sample selector 120 and an interpolator 121 as shown in the drawing.

Among them, the sample selector 120 stores the waveform data read from the waveform memory 101 and stored as 1 access 2 sample values and 1 access 4 sample values by the frequency number F _N12 and the integer parts I ₁ and I _{0 of the} frequency information. A desired sample value is selected from the obtained waveform data and supplied to the interpolator 121 together with the sample value read and stored in the past. If four-point interpolation is performed by the interpolator 121, in addition to the sample values of the read waveform data, there are past three-point sample values, and interpolation processing between them can be performed.

The interpolator 121 is configured to perform interpolation based on the four sample values supplied from the sample selector 120. The interpolation coefficient is supplied with the upper bits of the signal generated as a fractional part from the frequency address generator 110. . In the configuration of the present embodiment, 7 bits F _{0 to} F _-6 are supplied.

  FIG. 8 is an explanatory diagram showing the detailed configuration of the sample selector 120 and the interpolator 121 shown in FIG.

  Among these, the sample selector 120 includes a data holder 1000, selectors 1001 and 1002, a selector 1003 to 1005, a selector 1006, a sample holding register 1007 to 1009, a selector 1010 to 1013, And a selector 1014. Details of these will be described later. The interpolator 121 includes multipliers 1100 to 1103, interpolation coefficient memories 1110 to 1113, and an adder 1200. These details will also be described later.

The data holder 1000 of the sample selector 120 is a register that holds the waveform data WD read from the waveform memory 101. In this case, when the waveform memory 101 is 32 bits, 32-bit data D _{31 to} D ₀ are held. As shown in FIG. 4, the 32-bit data D _{31 to} D ₀ are waveform data in which one sample value is 16 bits in the case of the waveform data a, b, and c. In the case of the waveform data a ′, 1 sample value becomes 8-bit waveform data (thus, 4 samples of 32 bits are read at the time of 1 access).

In the configuration of the selectors 1001 and 1002, when the frequency number F _N12 supplied as a selection signal to the S terminal is “0” (when the frequency number is less than 2), the signal supplied to the terminal 0 is used. When the selection is made (D _{31 to} D ₁₆ and D _{15 to} D _{0, respectively} ), and the frequency number F _N12 is “1” (when the frequency number is 2 or more to less than 4), it is supplied to the terminal 1 Are selectors (D _{15 to} D ₈ and D _{7 to} D ₀ ), respectively, and output the selected waveform data as Db and Da. In addition, D _{31 to} D ₂₄ are supplied as Dd and D _{23 to} D ₁₆ are supplied as Dc.

Here, the waveform data supplied to the interpolation operation in the next interpolator 121 is supplied as waveform data D _{31 to} D ₀ as shown in Table 2 below according to the frequency number F _N12 given as the selection signal. Will be.

The selectors 1003 to 1005 select the signal supplied to the terminal 0 when the frequency number F _N12 supplied as a selection signal to each S terminal is “0” (when the frequency number is less than 2). On the other hand, when the frequency number F _N12 is “1” (when the frequency number is 2 or more and less than 4), it is a selector for selecting a signal supplied to the terminal 1 and the state of the integer part described later. This is a configuration for selecting which sample value is stored in the sample holding registers 1007 to 1009 for storing past sample values when the value changes. Here, the waveform data Dd, Dc, Db, and Da are selected as shown in Table 3 below according to the frequency number F _N12 given as the selection signal.

The selector 1006 is a selector that supplies timings for storing sample values in the sample holding registers 1007 to 1009 described later as past sample values. The frequency number F _N12 supplied to the S terminal as a selection signal is “0”. (When the frequency number is less than 2), the timing when the carry occurs in the integer part I ₀ to I ₁ is supplied, and conversely, when the frequency number F _N12 is “1” (the frequency number is When the value is 2 or more and less than 4), the timing when the carry occurs in the integer part I ₁ to I ₂ is supplied.

  The sample holding registers 1007 to 1009 are registers that are stored as sample values read in the past when the state of the integer part is changed, and the timing thereof depends on a timing signal supplied from the selector 1006.

To _summarize the signal flow up to the above configuration, when F _N12 is “0” and there is a carry in the integer part I ₀ to I ₁ , Z ₃ ← Z _1out , Z ₂ ← Da, Z ₁ ← Db Also, when F _N12 is “1”, if there is a carry in the integer part I ₁ to I ₂ , Z ₃ ← Db, Z ₂ ← Dc, Z ₁ ← Dd.

  Further, the selectors 1010 to 1013 select the signal at the terminal 0 when the selection signal from the selector 1014 described later is input to the S terminal and the selection signal input to the S terminal is “0 (00b)”. When “1 (01b)”, the signal of terminal 1 is selected, when “2 (10b)”, the signal of terminal 2 is selected, and when “3 (11b)”, the signal of terminal 3 is selected. Selector to be selected. The sample values of the selected waveform data are multiplied by interpolation coefficients (coefficients stored in interpolation coefficient memories 1110 to 1113 described later) by multipliers 1100 to 1103 connected to the next stage.

The selector 1014 receives the signal (I ₀ ) supplied to the terminal 0 when the frequency number F _N12 supplied as a selection signal to the S terminal is “0” (when the frequency number is less than 2). On the contrary, when the frequency number F _N12 is “1” (when the frequency number is 2 or more and less than 4), it is a selector that selects the signals (I ₀ and I ₁ ) supplied to the terminal 1. is there. Therefore, for this selector output, when F _N12 is “1”, changes of I ₁ : I ₀ “11b”, “10b”, “01b”, “00b” are output, and when F _N12 is “0”. Changes in I ₀ “01b” and “00b” are output.

  On the other hand, the multipliers 1100 to 1103 constituting the interpolator 121 are configured to multiply the sample values selected by the selectors 1010 to 1013 and interpolation coefficients stored in interpolation coefficient memories 1110 to 1113 described later.

Similarly, the interpolation coefficient memories 1110 to 1113 constituting the interpolator 121 correspond to upper bits (7 bits F _{0 to} F _{-6 in} the case of the configuration of the present embodiment) of the decimal part of the frequency information shown in FIG. A memory for supplying interpolation coefficients C _m , C ₀ ,... C ₂ to the multipliers 1100 to 1103.

  Similarly, an adder 1200 constituting the interpolator 121 adds the four sample values obtained by multiplying the interpolation coefficient supplied from the interpolation coefficient memories 1110 to 1113 and the selected sample value by the multipliers 1100 to 1103. Thus, the interpolated sample value IpW is output. The output is supplied to the filter 105 shown in FIGS.

When the signal processing up to the selectors 1010 to 1014, the multipliers 1100 to 1103, the interpolation coefficient memories 1110 to 1113, and the adder 1200 is summarized, when F _N12 is “0” (when the frequency number is less than 2), I Depending on the state of ₀ , when I ₀ = “0”, the output of the adder 1200 is IpW = C _m × Z ₃ + C ₀ × Z ₂ + C ₁ × Z ₁ + C ₂ × Da, and I ₀ = “ In the case of 1 ″, the output of the adder 1200 is IpW = C _m × Z ₂ + C ₀ × Z ₁ + C ₁ × Da + C ₂ × Db.

On the other hand, when F _N12 is “1” (when the frequency number is 2 or more), depending on the state of I ₁ and I ₀ , if I ₁ I ₀ = "0", the output IpW = C _m × Z ₃ + C ₀ × Z ₂ + C ₁ × Z ₁ + C ₂ × Da When I ₁ I ₀ = “1”, the output IpW of the adder 1200 is IpW = C _m × Z ₂ + C ₀ × Z ₁ + C ₁ × Da + C ₂ × Db, and when I ₁ I ₀ = “2”, the output of the adder 1200 is IpW = C _m × Z ₁ + C ₀ × Da + C ₁ × Db + C ₂ × Dc, When I ₁ I ₀ = “3”, the output of the adder 1200 is IpW = C _m × Da + C ₀ × Db + C ₁ × Dc + C ₂ × Dd. That is, the waveform data is read out from the storage area a ′ in FIG. 4 according to the values taken by these I ₁ and I ₀ , and each of them is subjected to 4-sample interpolation processing and output.

  According to the configuration of the present embodiment described above, for a part of waveform data, a plurality of waveform data a and a ′ are stored at the same address in the waveform memory 101, and the frequency number is set to 2 by the frequency address generator 103. When the frequency number is less than 1, a frequency address for reading the waveform data a having two sample values in one word from the waveform memory 101 is generated. On the other hand, when the frequency number is 2 or more, the waveform memory 101 changes to one word. Since the frequency address for reading the waveform data a ′ having four sample values is generated and these data are read, the frequency number is 2 even if only one access can be obtained per channel. It becomes possible to cope with the above cases, and it becomes possible to read waveform data having a higher frequency than ever before.

  Note that the waveform data output apparatus of the present invention is not limited to the above-described illustrated examples, and it is needless to say that various modifications can be made without departing from the scope of the present invention.

It is the circuit schematic diagram of the electronic musical instrument provided with the structure of the waveform data output device which concerns on this invention. It is a schematic diagram of a device configuration of a waveform data output device according to the present invention. It is an outline figure of the device composition of a waveform data output device similarly. It is explanatory drawing which shows the storage state of the waveform data of the waveform memory. It is explanatory drawing which shows the storage state of the waveform data of the waveform memory 101 which does not use the structure of this application shown as a comparative example. Explanatory drawing which shows the relationship between the frequency number used as the basis of frequency information generated in the frequency information generation part 102, and the frequency information generated in the frequency address generation part 103 in response to a musical tone frequency based on the frequency number. It is. FIG. 3 is an explanatory diagram showing a configuration of a waveform memory 101, a frequency address generation unit 103, and a decoder 104. FIG. 3 is a configuration explanatory diagram showing detailed configurations of a sample selector 120 and an interpolator 121. It is an outline explanatory view of the composition proposed by the previous application of the present applicant. It is a time chart which shows the waveform data read-out timing in the said proposal structure.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Music sound generation part 101 Waveform memory 102 Frequency information generation part 103 Frequency address generation part 104 Decoder 105 Filter 106 Filter control information generator 107 Multiplier 108 Amplitude envelope generator 110 Frequency address generator 111 Selector 120 Sample selector 121 Interpolator 201 CPU
202 ROM
203 RAM
204 Operation Panel 204a Panel Scan Circuit 205 Keyboard 205a Keyboard Scan Circuit 206 D / A Conversion Circuit 207 Amplifier 208 Speaker 210, 211 Musical Sound Generation Unit 212 Waveform Memory 1000 Data Holder 1001-1006 Selector 1007-1009 Sample Holding Register 1010-1014 Selector 1100 to 1103 Multiplier 1110 to 1113 Interpolation coefficient memory 1200 Adder

Claims (1)

Waveform data having N sample values in one word and waveforms having M sample values greater than N in one word with respect to waveforms in the same sound range in order to correspond to timbres with a wide range of pitch change a waveform data storage means for storing the data,
Frequency information generating means for generating a frequency number less than a predetermined value or a frequency number greater than a predetermined value in response to selection of a timbre with a wide range of pitch change ,
When the frequency number is less than a predetermined value, the frequency number is accumulated to generate a frequency address that is phase information for reading waveform data having N sample values in one word from the waveform data storage means. On the other hand, when the frequency number is equal to or higher than a predetermined value, the frequency number is also accumulated to generate a frequency address for reading waveform data having M sample values in one word from the waveform data storage means. A waveform data output device comprising at least frequency address generating means.

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