JP3377931B2 - Solar cell element - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solar cell device, and more particularly, to a solar cell device using a silicon substrate. 2. Description of the Related Art Usually,
When forming a solar cell element using a polycrystalline silicon substrate, first, a 15 μm
Etch to the extent. For example, when etching is performed while an aqueous solution of sodium hydroxide having a concentration of about 15% is maintained at 80 ° C., the etching can be performed at about 15 μm in about 7 minutes. Further, in order to further reduce the reflectance on the substrate surface, the etching is performed with an alkaline aqueous solution having a low concentration. For example, when etching is performed while maintaining an aqueous solution of sodium hydroxide having a concentration of about 5% at 75 ° C., fine irregularities are formed on the surface, and the reflectance on the substrate surface can be reduced to some extent. However, when a single crystal silicon substrate having a (100) plane orientation is used, a pyramid structure called a texture structure can be uniformly formed on the substrate surface by such a method. When a solar cell element is formed on a substrate, the problem that the pyramid structure cannot be formed uniformly because etching with an alkaline aqueous solution depends on the plane orientation of the crystal, and therefore the overall reflectance cannot be reduced effectively. there were. If the reflectance on the substrate surface cannot be effectively reduced, the characteristics of the solar cell element cannot be effectively improved. In order to solve such a problem, when a solar cell element is formed on a polycrystalline silicon substrate, fine projections are formed on the substrate surface by a reactive ion etching (RIE) method. (For example, JP-B-60-27195, JP-A-5-751).
No. 52, JP-A-9-102625). According to this method, fine projections can be uniformly formed without being affected by the plane orientation of irregular crystals in the polycrystalline silicon. Particularly, in a solar cell element using polycrystalline silicon, the effect is more effective. The reflectivity can be effectively reduced. However, when a solar cell element is formed by forming fine projections on the substrate surface, there is a problem that the short-circuit current value does not improve so much, although the reflectivity on the substrate surface is greatly reduced. Improvement was desired. The present invention has been made in view of such prior art, and has solved the problem of the prior art in that the surface reflectivity can be reduced but the short-circuit current value cannot be improved correspondingly. An object is to provide a battery element. In order to achieve the above object, in a solar cell element according to the present invention, a reverse conductivity type semiconductor impurity is provided on a surface side of a polycrystalline silicon substrate containing a semiconductor impurity of one conductivity type. And an electrode formed on the front side and the back side of the silicon substrate.
A number of fine projections having an aspect ratio of 0.1 to 2 with a thickness of not more than μm are provided, and the sheet resistance on the surface side of this silicon substrate is 60 μm.
The above-described semiconductor impurity of the opposite conductivity type is contained so as to be 300 Ω / □, and the short-circuit current value in a size of 15 cm × 15 cm is 7.94 A or more. Further, in the solar cell element according to the present invention,
This is particularly effective when a polycrystalline silicon substrate is used. The present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 is a sectional view showing one embodiment of a solar cell element according to the present invention. In FIG. 1, 1 is a silicon substrate, 2 is an antireflection film, 3 is a front electrode, and 4 is a back electrode. The silicon substrate 1 is made of a polycrystalline silicon substrate. This silicon substrate 1 is a substrate containing one conductivity type semiconductor impurity of about 1 × 10 ¹⁶ atoms / cm ³ and a specific resistance of about 1.5 Ωcm. This silicon substrate 1
May be p-type or n-type, and is formed by a casting method or the like. Polycrystalline silicon can be mass-produced and is extremely advantageous over single crystal silicon in terms of manufacturing cost. 30 ingots formed by pulling or casting
Slice to a thickness of about 0μm, 10cm x 10cm
Alternatively, the silicon substrate is cut into a size of about 15 cm × 15 cm. On the surface side of silicon substrate 1, a layer 1a in which a semiconductor impurity of the opposite conductivity type is diffused is formed. The layer 1a in which the opposite conductivity type semiconductor impurity is diffused is provided for forming a semiconductor junction in the silicon substrate 1. For example, when an n-type impurity is diffused, POCl _{3 is used.}
, A coating diffusion method using P ₂ O ₅ , and an ion implantation method for directly diffusing P ⁺ ions. The layer 1 containing the opposite conductivity type semiconductor impurity is formed at a depth of about 0.3 to 0.5 μm. An antireflection film 2 is formed on the surface of the silicon substrate 1. The antireflection film 2 is provided to prevent light from being reflected on the surface of the silicon substrate 1 and to effectively take in light into the silicon substrate 1. This antireflection film is made of a material having a refractive index of about 2 in consideration of a refractive index difference from the silicon substrate 1 and the like, and has a thickness of 500 to 2
It is composed of a silicon nitride (SiN _x ) film or a silicon oxide (SiO ₂ ) film of about 000 °. It is desirable to form a layer 1b in which a semiconductor impurity of one conductivity type is diffused at a high concentration on the back side of the silicon substrate 1. The layer 1b in which the one-conductivity-type semiconductor impurity is diffused at a high concentration forms an internal electric field on the back surface side of the silicon substrate 1 in order to prevent a decrease in efficiency due to carrier recombination near the back surface of the silicon substrate 1. is there. That is,
As a result of the carriers generated near the back surface of the silicon substrate 1 being accelerated by this electric field, power is effectively extracted, and in particular, the long-wavelength photosensitivity is increased and the deterioration of solar cell characteristics at high temperatures can be reduced. As described above, the sheet resistance on the back surface side of the silicon substrate 1 on which the layer 1b in which the one conductivity type semiconductor impurity is diffused at a high concentration is formed is 1
It becomes about 5Ω / □. A surface electrode 3 is provided on the front side of the silicon substrate 1.
Are formed. The surface electrode 3 has a two-layer structure of silver (Ag) and copper (Cu). The surface electrode 3 has, for example, a width of about 80 μm and a pitch of 1.6 mm.
It is composed of a large number of finger electrodes formed to a certain extent and two bus bar electrodes interconnecting the large number of finger electrodes. A solder layer or the like for connecting a plurality of solar cell elements with lead wires is formed on the surface of the front electrode 3. On the back side of the silicon substrate 1, a back electrode 4
Are formed. The back electrode 4 also has a two-layer structure of silver (Ag) and copper (Cu), and further has a solder layer formed thereon. In the solar cell element according to the present invention, a large number of fine projections 1c are formed on the surface side of the silicon substrate 1. The fine projections 1c are provided to reduce the surface reflection by multiple-reflecting the light applied to the surface side of the silicon substrate 1. The fine projection 1c has a conical shape or a shape like a series of conical shapes, and its size can be changed by controlling the gas concentration or the etching time by the RIE method. This fine projection 1
The width and height of c are each formed to be 2 μm or less. When the width and height of the projections 1c are 2 μm or more, the processing time for etching is prolonged, but the reflectance on the surface of the substrate 1 is not so reduced. In order to form the fine projections 1c uniformly and accurately with controllability over the entire surface of the silicon substrate 1, the thickness is preferably 1 μm or less.
Even if the minute projections are extremely small, they have the effect of reducing the reflectance. However, in order to form them uniformly and accurately in a plane, it is desirable that the thickness be 1 nm or more in the manufacturing process. It is desirable that the aspect ratio (height / width of the projection 1c) of the fine projection 1c is 0.1 to 2. When the aspect ratio is 0.1 or less, for example, the average reflectance of light having a wavelength of 500 to 1000 nm is about 25%, and the reflectance on the surface of the substrate 1 increases. Further, when the aspect ratio is 2 or more, the fine projections 1c are damaged in the manufacturing process, and when a solar cell element is formed, a leak current increases and good output characteristics cannot be obtained. In the solar cell element according to the present invention, the sheet resistance of the surface portion of the silicon substrate 1 on which many fine projections 1c are formed is set to 60 to 300 Ω / □. This value is a value measured by the four probe method. That is, the silicon substrate 1
Four metal needles lined up in a straight line are brought into contact with the surface while pressing, and when a current is applied to the two outer needles, the voltage generated between the two inner needles is measured. The resistance value is obtained from this voltage and the flowing current according to Ohm's law. When the sheet resistance of the surface portion of the silicon substrate 1 on which many fine protrusions 1c are formed is set to 60 to 300Ω / □, the short-circuit current when forming a solar cell can be greatly increased. That is, when the fine projections 1c as described above are formed on the surface of the silicon substrate 1, the opposite conductivity type semiconductor impurities are deposited on the surface side of the silicon substrate 1 as compared with the case where such fine projections 1c are not formed. It becomes easy to diffuse, and the opposite conductivity type semiconductor impurity is diffused deeply and in large quantities. Therefore, it is considered that the semiconductor junction is formed at a deep place away from the surface of the silicon substrate 1, and it is difficult for light to reach the semiconductor junction and the short-circuit current is not improved. Therefore, in the present invention, when a large number of fine protrusions 1c are formed on the surface of the silicon substrate 1, the sheet resistance value of the surface portion of the silicon substrate 1 is set to be higher than that of the conventional product, and the semiconductor bonding portion is formed. The short-circuit current value is improved by being formed at a relatively shallow portion of the silicon substrate 1. In the case of a 15 cm × 15 cm solar cell element, when the sheet resistance value of the substrate surface is 60Ω / □ or less, a short-circuit current Isc of only 7.6 A is obtained as described later, but the sheet resistance of the silicon substrate 1 surface portion is 60Ω. When the value is // or more, the short-circuit current Isc also becomes 7.9 A or more, and the short-circuit current value sharply increases. If the sheet resistance value of the wafer surface is 300 Ω / or more, it is difficult to uniformly diffuse the opposite conductivity type semiconductor impurity over the entire surface of the substrate 1, which is not suitable. Next, a method for manufacturing a solar cell element according to the present invention will be described in detail with reference to FIG. First, a silicon substrate 1 containing a semiconductor impurity of one conductivity type is prepared. The silicon substrate 1 is cut out from an ingot into a predetermined size (see FIG. 1A). In order to remove slice damage on the surface of the silicon substrate 1, the silicon substrate 1 is immersed in an aqueous solution of HNO ₃ : HF = 7: 1, etched about 15 μm, and then subjected to RI
Many fine projections 1c are formed by the E method. In this RIE method, for example, 12.0 sc of methane trifluoride (CHF ₃ )
cm, about 72 sccm of chlorine (Cl ₂ ), about 9 sccm of oxygen (O ₂ ), and sulfur hexafluoride (SF).
₆ ) The reaction pressure is 50 mT while
This is performed for about 10 seconds to 15 minutes at about RF power of about 500 W or about orr. Next, a layer 1a containing the opposite conductivity type semiconductor impurity is formed on the surface portion of the silicon substrate 1 by diffusing the opposite conductivity type semiconductor impurity by a vapor phase growth method, a coating diffusion method, an ion implantation method, or the like. At the same time, other portions are removed by etching so that this layer 1a remains only on the front surface side of the substrate 1 (see FIG. 3C). Next, a metal paste containing, for example, aluminum (Al) as a main component is applied and baked on the back surface of the silicon substrate 1 to diffuse a large amount of one-conductivity-type semiconductor impurities on the back surface of the silicon substrate 1. The formed layer 1b is formed (see FIG. 4D). Next, an anti-reflection film 2 made of, for example, a silicon nitride film is formed on the surface side of the silicon substrate 1 by plasma CV.
It is formed to a thickness of about 500 to 2000 mm by a method D or the like (see FIG. 3E). Finally, silver (Ag) is sputter-deposited on both the front and back surfaces of the silicon substrate 1, copper (Cu) is plated, finger electrodes and bus bar electrodes are formed, and the surface coated with solder by a solder dip method is used. Electrode 3 The back electrode 4 is formed and completed (see FIG. 1). EXAMPLE The thickness is 300 μm and the specific resistance is 1.5 Ωcm
Of 15 cm × 15 cm square polycrystalline silicon is immersed in a solution of HNO ₃ : HF = 7: 1 to form
After the μm etching, 12 sccm of methane trifluoride (CHF ₃ ), 72 sccm of chlorine (Cl ₂ ), 9 sccm of oxygen (O ₂ ), and sulfur hexafluoride (SF ₆ )
While the reaction pressure is 50 mTorr,
Fine projections were formed on the substrate surface by RIE at an RF power of 500 W. Next, the sheet resistance of the surface portion of the silicon substrate is 40Ω / □, 50Ω / □, 60Ω / □, 70Ω / □.
□, 80Ω / □, 90Ω / □, 100Ω / □, 120Ω
Phosphorus (P) was diffused so as to be / □. Next, an aluminum (Al) paste was screen-printed on the back surface side of the silicon substrate and fired at a temperature of 750 ° C. The sheet resistance on the back side of this silicon substrate was 15Ω / □. An SiN film having a refractive index of 2.1 and a film thickness of 800 ° was formed on the surface side of the silicon substrate by a plasma CVD method to form an antireflection film. Silver (Ag) is vapor-deposited on both sides of the silicon substrate by a sputtering method, copper (Cu) plating is performed, and a width of 80
μm, 1.6 mm pitch finger electrode and 2 mm width
Were formed, and a solder layer was formed on the electrode surface by a solder dipping method to form a solar cell element. For each sample, the short-circuit current Isc
Was planned. The results are shown by the black diamond line in FIG. In addition,
A black square line (B) in FIG. 3 is a conventional solar cell etched at 85 ° C. for 7 minutes using an aqueous solution of sodium hydroxide (NaOH) having a concentration of 15% instead of forming fine projections by the RIE method. This is the short-circuit current value of the element. As is apparent from FIG. 3, in the conventional solar cell element having no fine projections, the short-circuit current when the sheet resistance of the surface of the silicon substrate is 50Ω / □ is 7.5.
At 1 A, the short-circuit current at 60 Ω / □ was 7.60 A. On the other hand, in the solar cell element having fine projections formed by the RIE method, the short-circuit current at the sheet resistance of the substrate surface was 50 Ω / □. The current is 7.62 A, which is not much different from a solar cell element that does not form fine projections, but the short-circuit current at 60 Ω / □ is 7.94 A, which is compared with a solar cell element that did not form fine projections. And it turned out that it improved greatly. Further, in a solar cell element having fine projections formed by the RIE etching method, the short-circuit current increases as the sheet resistance of the substrate surface becomes 70Ω / □, 80Ω / □, 90Ω / □, and is smaller than that of the conventional solar cell element. It was also found that a much larger short-circuit current value could be obtained. As described above, according to the solar cell element of the present invention, the width and height are each 2 μm or less and the aspect ratio is 0.1 to 2 on the surface side of the polycrystalline silicon substrate. A large number of fine projections are provided, and a semiconductor impurity of the opposite conductivity type is contained so that the sheet resistance on the surface side of the silicon substrate is 60 to 300 Ω / □, and the short-circuit current value in a size of 15 cm × 15 cm is 7.94 A As described above, the reflectivity on the surface side of the solar cell element can be reduced as much as possible to effectively use light, and the short-circuit current value can be improved by forming the semiconductor junction at a relatively shallow place. It becomes a solar cell element that can obtain an efficient output. In particular, it is extremely effective in a solar cell element using polycrystalline silicon having a non-uniform plane orientation.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing one embodiment of a solar cell element according to the present invention. FIG. 2 is a view showing a manufacturing process of the solar cell element according to the present invention. FIG. 3 is a view showing the relationship between the sheet resistance of the surface of the solar cell element according to the present invention and the short-circuit current. [Description of Signs] 1... Silicon substrate, 1c...
... Anti-reflective coating, 3 ... Front electrode, 4 ... Back electrode

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-5-75152 (JP, A) JP-A-8-85874 (JP, A) JP-A-9-167850 (JP, A) JP-A 9-167 102625 (JP, A) JP-A-5-259488 (JP, A) JP-A-55-105382 (JP, A) JP-A-5-21821 (JP, A) (58) Fields investigated (Int. ⁷ , DB name) H01L 31/04-31/078

Claims (1)

(57) [Claim 1] A polycrystalline silicon substrate containing a semiconductor impurity of one conductivity type, a semiconductor impurity of a reverse conductivity type is contained on the surface side of the silicon substrate, and the surface side of the silicon substrate is contained. And a solar cell element having electrodes formed on the back side, the width and height are each 2 μm or less on the front side of the silicon substrate and the aspect ratio is
Are provided with a large number of fine projections of 0.1 to 2 and the opposite conductive semiconductor impurities are contained so that the sheet resistance on the surface side of the silicon substrate is 60 to 300 Ω / □, and 15 cm ×
The short circuit current value at a size of 15 cm is 7.94 A or more
Solar cell elements, characterized in that that.