JP3182446B2 - Schottky barrier rectifier semiconductor device - Google Patents

Schottky barrier rectifier semiconductor device

Info

Publication number
JP3182446B2
JP3182446B2 JP08973392A JP8973392A JP3182446B2 JP 3182446 B2 JP3182446 B2 JP 3182446B2 JP 08973392 A JP08973392 A JP 08973392A JP 8973392 A JP8973392 A JP 8973392A JP 3182446 B2 JP3182446 B2 JP 3182446B2
Authority
JP
Japan
Prior art keywords
type semiconductor
conductivity type
schottky barrier
semiconductor device
electrode metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP08973392A
Other languages
Japanese (ja)
Other versions
JPH05259436A (en
Inventor
勝 若田部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
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Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP08973392A priority Critical patent/JP3182446B2/en
Publication of JPH05259436A publication Critical patent/JPH05259436A/en
Application granted granted Critical
Publication of JP3182446B2 publication Critical patent/JP3182446B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、ショットキバリア整流
半導体装置の構造に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure of a Schottky barrier rectifying semiconductor device.

【0002】[0002]

【従来の技術】整流半導体装置は、順方向特性、逆方向
特性に種々の改善がなされ、損失低減の努力がなされて
いる。例えば、一導電型半導体(例えば、N型)表面に
逆導電型半導体領域(例えばP+型)を形成し、一導電
型半導体とはショットキバリア接触をし、逆導電型半導
体領域とはオ−ミック性接触をなすショットキバリア整
流半導体装置は、順方向降下電圧VFをそれほど犠牲に
する(2)ことなく、逆方向漏れ電流IRを小さく抑制
し得る構造として有効である。
2. Description of the Related Art In a rectifying semiconductor device, various improvements have been made in forward characteristics and reverse characteristics, and efforts have been made to reduce losses. For example, a reverse conductivity type semiconductor region (for example, P + type) is formed on the surface of a one conductivity type semiconductor (for example, N type), and a Schottky barrier contact is made with the one conductivity type semiconductor, and an opposite conductivity type semiconductor region is formed with an ohmic contact. The Schottky barrier rectifying semiconductor device having a mimic contact is effective as a structure capable of suppressing the reverse leakage current IR without sacrificing the forward drop voltage VF so much (2).

【0003】その構造例として、図1及び図2の断面構
造図のものがある。1は高濃度一導電型半導体(例え
ば、N+)、2は一導電型半導体(例えば、N)、3は
逆導電型半導体(例えば、P+)、4は電極金属、Aは
アノ−ド、Cはカソ−ドである。
As an example of the structure, there is a sectional structure shown in FIGS. 1 is a high-concentration one conductivity type semiconductor (for example, N +), 2 is one conductivity type semiconductor (for example, N), 3 is a reverse conductivity type semiconductor (for example, P +), 4 is an electrode metal, and A is an anode. , C is a cathode.

【0004】しかして、0.5Volt以下の低い順方向電
圧降下VFにおける順方向電流が流れる有効面積は、図
示のa部(2−4間接触部)によって決定し、b部(3
−4間接触部)は実質的には順方向電流の流れない領域
である。又、約0.5Volt以上のVFでは、逆導電型半
導体領域がP型の場合、少数キャリアが電子電流と同等
量流れる場となり、特に電極金属4にCr、Tiのよう
なバリア高さφBNの低い金属を用いて、小さいVFを得
るために設計した整流半導体装置においては、通常、使
用する順方向電流密度が50〜200Amp/cm2の領域
であり、この領域では、VFは0.5Voltより小さい値
である。
The effective area in which a forward current flows at a low forward voltage drop VF of 0.5 Volt or less is determined by a portion a (contact portion between 2-4) shown in FIG.
−4 contact portion) is a region where substantially no forward current flows. Further, at a VF of about 0.5 Volt or more, when the semiconductor region of the opposite conductivity type is P-type, a field in which minority carriers flow in the same amount as the electron current is generated. In particular, the electrode metal 4 has a barrier height φBN such as Cr or Ti. In a rectifying semiconductor device designed to obtain a small VF by using a low metal, the forward current density to be used is usually in a range of 50 to 200 Amp / cm2, and in this region, the VF is smaller than 0.5 Volt. Value.

【0005】従って、φBNの小さなショットキバリア整
流半導体装置としての有効面は、a部のみとなり、半導
体チップ内の有効面積活用率は20〜50%程度の低い
値となる。言い換えれば、一定の順方向電流を得るチッ
プとしては、大きなチップ面積を用意する必要があり、
高価な半導体装置となる欠点がある。
Therefore, the effective surface of the Schottky barrier rectifying semiconductor device having a small φBN is only the portion a, and the effective area utilization rate in the semiconductor chip is a low value of about 20 to 50%. In other words, it is necessary to prepare a large chip area for a chip to obtain a constant forward current,
There is a disadvantage that it becomes an expensive semiconductor device.

【0006】前記の欠点を解決するため、図3の断面構
造図に示す従来構造が提案されている。一導電型半導体
2と電極金属4の接触面をc部及びd部に増加するため
トレンチ溝による三面構造を形成している。しかして、
図3の構造では、順方向電流が主として流れるショット
キバリア接触面のc部及びd部とカソ−ドC間のそれぞ
れのシリ−ズ抵抗値が異なる。即ち、c部からの抵抗は
(r1+r2)、d部からの抵抗は略r1〜(r1+r2)
となる。このため、順(3)方向電流は、抵抗の小なる
方に偏りやすく、高電流密度領域では、主として、d部の
逆導電型半導体領域3(P+型)との境界寄りに電流が
集中し、c部の接触面にはほとんど電流が流れなくな
る。従って、図3の構造は、シリ−ズ抵抗が比較的、効
かない低電流密度領域で、VFを大幅に低減できるが、
高電流密度領域では接触面積を増加した割合ほど、VF
を小さくできない。
In order to solve the above-mentioned drawback, a conventional structure shown in a sectional structural view of FIG. 3 has been proposed. In order to increase the contact surface between the one conductivity type semiconductor 2 and the electrode metal 4 to the portions c and d, a three-sided structure with a trench is formed. Then
In the structure of FIG. 3, the series resistances between the cathode C and the portions c and d of the Schottky barrier contact surface through which the forward current mainly flows are different. That is, the resistance from the part c is (r1 + r2), and the resistance from the part d is approximately r1 to (r1 + r2).
Becomes For this reason, the forward (3) direction current tends to be biased toward the smaller resistance, and in the high current density region, the current mainly concentrates near the boundary of the d portion with the opposite conductivity type semiconductor region 3 (P + type). However, almost no current flows through the contact surface of the portion c. Therefore, the structure of FIG. 3 can greatly reduce VF in a low current density region where the series resistance is relatively ineffective,
In the high current density region, the rate of increase in the contact area
Cannot be reduced.

【0007】[0007]

【発明が解決しようとする課題】従来構造については、
半導体チップ内の有効面積活用率が低い。換言すれば、一
定の電流を得るために大きな半導体チップ面積を必要と
する点、及び改善された従来構造においても高電流密度
領域では、接触面積を増したほど、VFを小さくできない
点、などが問題点である。
SUMMARY OF THE INVENTION With respect to the conventional structure,
The effective area utilization rate in the semiconductor chip is low. In other words, the point that a large semiconductor chip area is required to obtain a constant current, and that the VF cannot be reduced as the contact area increases in the high current density region even in the improved conventional structure. It is a problem.

【0008】[0008]

【課題を解決するための手段】本発明は、電極金属と一
導電型半導体間の一部に、一導電型半導体より高濃度の
第2の一導電型半導体領域を電極金属とショットキバリ
ア接触をなすように設ける事を主たる特徴とする構成に
より、シリーズ抵抗を大きくしないで、実質的に順方向
電流密度又はショットキバリア接触面を増加したショッ
トキバリア整流半導体装置を実現する。
SUMMARY OF THE INVENTION According to the present invention, a part of a second one conductivity type semiconductor region having a higher concentration than the one conductivity type semiconductor is formed in a part between the electrode metal and the one conductivity type semiconductor. With a configuration mainly characterized in that it is provided so as to provide a Schottky barrier rectifying semiconductor device in which the forward current density or the Schottky barrier contact surface is substantially increased without increasing the series resistance.

【0009】[0009]

【実施例】図4は、本発明構造の実施例1を示す断面構
造図であって、同一符号は同一部分をあらわす。5は、
本発明の要部であって、電極金属4と一導電型半導体
(N)2の間に形成した2より高濃度の第2の一導電型
半導体領域(N+)である。電極金属4、例えば、Cr
は、一導電型半導体2とのa部、及び2とのe部、及び
f部でショットキバリア接触を形成し、又、逆導電型半
導体領域3とはオ−ミック性接触をなして同電位とな
る。従って、順方向電流の主たる流路は、前記のa部、
e部、及びf部となる。しかして、図3の従来構造で
は、約50Amp/cm2以上の高電流密度領域において、
3との境界(4)寄りのd部に電流集中がおきるのに対
して、実施例1では、シリ−ズ抵抗の関係からe部及び
f部が主たる流路となる。従って、順方向電流の流れる
有効面積を増大したことになる。
FIG. 4 is a sectional structural view showing a first embodiment of the structure of the present invention, and the same reference numerals denote the same parts. 5 is
It is a main part of the present invention, and is a second one conductivity type semiconductor region (N +) having a higher concentration than 2 formed between the electrode metal 4 and the one conductivity type semiconductor (N) 2. Electrode metal 4, for example, Cr
Form a Schottky barrier contact at the a portion with the one conductivity type semiconductor 2, the e portion and the f portion with the one conductivity type semiconductor 2, and make an ohmic contact with the opposite conductivity type semiconductor region 3 at the same potential. Becomes Therefore, the main flow path of the forward current is the part a,
The part becomes e part and f part. Thus, in the conventional structure of FIG. 3, in a high current density region of about 50 Amp / cm2 or more,
On the other hand, the current concentration occurs in the d section near the boundary (4) with the section 3, whereas in the first embodiment, the e section and the f section are the main flow paths due to the series resistance. Therefore, the effective area in which the forward current flows is increased.

【0010】図5は、本発明構造の実施例2を示す断面
構造図である。又、前図までと同一符号は同一部分を示
す。(以下の実施例においても同様とする。)図5は、高
濃度の第2の一導電型半導体領域5と、逆導電型半導体
領域3が接するように形成した構造である。実施例1に
比して、順方向電流流路e部がなく、a部及びf部が流
路となる。しかして、本発明構造の実現において、現状
では実施例2の方が製造容易である。
FIG. 5 is a sectional view showing a second embodiment of the structure of the present invention. Further, the same reference numerals as those in the previous figures indicate the same parts. (The same applies to the following embodiments.) FIG. 5 shows a structure in which a high-concentration second one-conductivity-type semiconductor region 5 and a reverse-conductivity-type semiconductor region 3 are formed so as to be in contact with each other. As compared with the first embodiment, there is no forward current flow path e part, and the a part and the f part are flow paths. Thus, in realizing the structure of the present invention, the second embodiment is currently easier to manufacture.

【0011】次いで、実施例2の設計例を公知の製造手
段で試作した各部寸法例を示す。一導電型半導体2とし
て、0.5Ω・cm(1×1016Atoms/cm3)N型シリコ
ン・エピタキシアル成長層を用い、複数個のトレンチ溝
(凸部幅m=2.0μm)を形成した。各領域につい
て、第2の一導電型半導体領域5(N+)は、表面濃度
1×1017Atoms/cm3、g=1μm、h=0.5μm
で、一対の5の間隔j=1.0μm、トレンチ溝の底部
に設けた逆導電型半導体領域3(P+)は、1×1020
Atoms/cm3、i=3μm、l=0.3μm、一対の3の
間隔k=1.4μm、電極金属4は、Crを2000オ
ングストロ−ム蒸着した。
Next, examples of the dimensions of each part which are prototypes of the design example of the second embodiment by known manufacturing means will be shown. A plurality of trench grooves (projection width m = 2.0 μm) were formed using a 0.5 Ω · cm (1 × 10 16 Atoms / cm 3) N-type silicon epitaxial growth layer as the one conductivity type semiconductor 2. . In each region, the second one conductivity type semiconductor region 5 (N +) has a surface concentration of 1 × 10 17 atoms / cm 3, g = 1 μm, and h = 0.5 μm.
The opposite conductive type semiconductor region 3 (P +) provided at the bottom of the trench with a distance j of a pair of 5 = 1.0 μm is 1 × 10 20.
Atoms / cm @ 3, i = 3 .mu.m, l = 0.3 .mu.m, spacing between a pair of three k = 1.4 .mu.m, and electrode metal 4 was 2,000 Å of Cr vapor-deposited.

【0012】図6、図7、図8、図9は、いづれも本発
明構造の他の実施例を示す断面構造図であって、図4及
び図5と同様に、実質的に順方向電流密度又はショット
キ接触面を増加したショットキバリア整流半導体装置を
提供する。順方向電流の主たる流路は、図6、図7、図
8では、a部及びf部、図9では、f部及びe部とな
る。
FIGS. 6, 7, 8, and 9 are cross-sectional views showing other embodiments of the structure of the present invention. As shown in FIGS. Provided is a Schottky barrier rectifying semiconductor device having an increased density or Schottky contact surface. The main flow paths of the forward current are the portions a and f in FIGS. 6, 7, and 8, and the portions f and e in FIG.

【0013】又、図8は、第2の一導電型半導体領域5
が逆導電型半導体領域3の上部の電極金属4とも接して
形成すると順方向電流に対する無効面積分が減少して効
果的である。ただし、実用的には、平面構造的にみて、
P+領域3の一部が電極金属4とオーミック性接触をす
る領域を形成し、逆方向漏れ電流を十分小さくする必要
がある。
FIG. 8 shows a second one conductivity type semiconductor region 5.
Is formed in contact with the electrode metal 4 on the upper part of the reverse conductivity type semiconductor region 3, so that an ineffective area for a forward current is reduced, which is effective. However, practically, when viewed from a planar structure,
It is necessary to form a region where a part of the P + region 3 makes ohmic contact with the electrode metal 4 and sufficiently reduce the reverse leakage current.

【0014】発明者等が、逆方向漏れ電流を改善するた
めに先に出願した、電極金属と一導電型半導体の接触面
からの逆導電型半導体領域の深さ、一対の逆導電型半導
体領域の間隔、逆導電型半導体領域と一導電型半導体の
境界での接線のなす角度等についての発明を併用するこ
とにより、更に、順方向、逆方向特性、及びスイッチング
特性の優れたショットキバリア整流半導体装置を得る。
The depth of the reverse conductivity type semiconductor region from the contact surface between the electrode metal and the one conductivity type semiconductor, and a pair of the opposite conductivity type semiconductor regions, which the inventors have previously filed to improve the reverse leakage current. In addition, Schottky barrier rectifier semiconductors with excellent forward, reverse, and switching characteristics can be obtained by using the invention of the distance between the semiconductor layers, the angle between the tangent line at the boundary between the opposite conductivity type semiconductor region and the one conductivity type semiconductor, and the like. Get the device.

【0015】図12は、本発明構造を従来構造と対比し
て示した順方向特性図であり、順電圧降下VFと順方向
電流の関係が図1、図2、図3のいづれの従来構造より
優れていることを示している。
FIG. 12 is a forward characteristic diagram showing the structure of the present invention in comparison with the conventional structure. The relationship between the forward voltage drop VF and the forward current is shown in FIG. 1, FIG. 2 and FIG. It shows that it is better.

【0016】図13は、本発明構造を従来構造と対比し
て示した逆方向特性図であり、逆方向電圧VRと逆方向
漏れ電流IRの関係は、図1、図2、図3の従来構造に
比して若干、悪くなったが、実用上、問題とならない範
囲であった。
FIG. 13 is a reverse characteristic diagram showing the structure of the present invention in comparison with the conventional structure. The relationship between the reverse voltage VR and the reverse leakage current IR is the same as that shown in FIGS. Although slightly worse than the structure, it was in a range that would not cause any problem in practical use.

【0017】その他、本発明の構成要件を満足するなら
ば、いづれの変形、付加、変換等の変更を行っても本発
明の範囲に含まれるものである。
In addition, any modifications, additions, conversions, and the like are included in the scope of the present invention as long as the constituent requirements of the present invention are satisfied.

【0018】[0018]

【発明の効果】以上説明したように、順方向電流の局部
的電流集中がなく、実質的に、ショットキバリア接触面
を増加したショットキバリア整流半導体装置を得るの
で、電源機器をはじめ、各種機器に利用して、産業上の
効果、極めて大なるものである。(6)
As described above, a Schottky barrier rectifying semiconductor device having a substantially increased Schottky barrier contact surface without a local current concentration of a forward current can be obtained. Utilizing the industrial effect is extremely great. (6)

【図面の簡単な説明】[Brief description of the drawings]

【図1】 従来構造の断面構造図である。FIG. 1 is a sectional structural view of a conventional structure.

【図2】 従来構造の断面構造図である。FIG. 2 is a sectional structural view of a conventional structure.

【図3】 従来構造の断面構造図である。FIG. 3 is a sectional structural view of a conventional structure.

【図4】 本発明構造の実施例1を示す断面構造図で
ある。
FIG. 4 is a sectional structural view showing Example 1 of the structure of the present invention.

【図5】 本発明構造の実施例2を示す断面構造図で
ある。
FIG. 5 is a sectional structural view showing a second embodiment of the present invention;

【図6】 本発明構造の他の実施例を示す断面構造図
である。
FIG. 6 is a sectional structural view showing another embodiment of the structure of the present invention.

【図7】 本発明構造の他の実施例を示す断面構造図
である。
FIG. 7 is a sectional structural view showing another embodiment of the structure of the present invention.

【図8】 本発明構造の他の実施例を示す断面構造図
である。
FIG. 8 is a sectional structural view showing another embodiment of the structure of the present invention.

【図9】 本発明構造の他の実施例を示す断面構造図
である。
FIG. 9 is a sectional structural view showing another embodiment of the structure of the present invention.

【図12】 順方向特性図である。FIG. 12 is a forward characteristic diagram.

【図13】 逆方向特性図である。FIG. 13 is a reverse characteristic diagram.

【符号の説明】[Explanation of symbols]

1 高濃度一導電型半導体(例えば N+) 2 一導電型半導体(例えば N) 3 逆導電型半導体領域(例えば P+) 4 電極金属 5 2より高濃度の第2の一導電型半導体領域(例
えばN+) A アノード C カソード a,b,c,d,e,f 指定の位置 g,h,i,j,k,l,m 指定の寸法 VF 順方向電圧降下 JF 順方向電流 VR 逆方向電圧 IR 逆方向漏れ電流
Reference Signs List 1 high-concentration one-conductivity-type semiconductor (for example, N +) 2 one-conductivity-type semiconductor (for example, N) 3 reverse-conductivity-type semiconductor region (for example, P +) 4 electrode metal 5 2 ) A anode C cathode a, b, c, d, e, f Designated position g, h, i, j, k, l, m Designated dimensions VF Forward voltage drop JF Forward current VR Reverse voltage IR Reverse Directional leakage current

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平3−181172(JP,A) 特開 平5−114723(JP,A) 特開 平5−90565(JP,A) 特開 平5−63184(JP,A) 特開 平4−71273(JP,A) 特開 平3−276762(JP,A) 特開 平3−105975(JP,A) 特開 昭62−296474(JP,A) 特開 昭59−92575(JP,A) 特開 昭56−88376(JP,A) 特許3051528(JP,B2) 特許2835544(JP,B2) 特許2826914(JP,B2) (58)調査した分野(Int.Cl.7,DB名) H01L 29/872 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-3-181172 (JP, A) JP-A-5-114723 (JP, A) JP-A-5-90565 (JP, A) JP-A-5-90565 63184 (JP, A) JP-A-4-71273 (JP, A) JP-A-3-276762 (JP, A) JP-A-3-105975 (JP, A) JP-A-62-296474 (JP, A) JP-A-59-92575 (JP, A) JP-A-56-88376 (JP, A) Patent 3051528 (JP, B2) Patent 2835544 (JP, B2) Patent 2826914 (JP, B2) (58) Int.Cl. 7 , DB name) H01L 29/872

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】一導電型半導体表面に複数個の逆導電型半
導体領域を形成し、一導電型半導体とはショットキバリ
ア接触を、又、逆導電型半導体領域とはオーム性接触を
なす電極金属を設けるように構成したショットキバリア
整流半導体装置において、電極金属と一導電型半導体間
の一部に、一導電型半導体より高濃度の第2の一導電型
半導体領域を電極金属とショットキバリア接触をなすよ
うに設けた事を特徴とするショットキバリア整流半導体
装置。
An electrode metal having a plurality of opposite conductivity type semiconductor regions formed on a surface of one conductivity type semiconductor and having a Schottky barrier contact with the one conductivity type semiconductor and an ohmic contact with the opposite conductivity type semiconductor region. In the Schottky barrier rectifying semiconductor device configured to provide the second conductive type semiconductor region having a higher concentration than the one conductive type semiconductor, the Schottky barrier contact with the electrode metal is partially formed between the electrode metal and the one conductive type semiconductor. A Schottky barrier rectifying semiconductor device, characterized in that it is provided in such a manner.
【請求項2】 一対の第2の一導電型半導体領域と、一
対の逆導電型半導体領域を形成し、一導電型半導体及び
第2の一導電型半導体領域にまたがってショットキバリ
ア接触をなすように、電極金属を設けたことを特徴とす
る請求項1のショットキバリア整流半導体装置。
2. A semiconductor device comprising: a pair of second semiconductor regions of one conductivity type; and a pair of semiconductor regions of opposite conductivity type formed so as to form a Schottky barrier contact over the semiconductor region of one conductivity type and the second semiconductor region of one conductivity type. 2. The Schottky barrier rectifier semiconductor device according to claim 1, further comprising an electrode metal.
【請求項3】 一導電型半導体表面と電極金属の接する
面からの深さにおいて、第2の一導電型半導体領域の方
が逆導電型半導体領域より浅くしたことを特徴とする請
求項1、又は請求項2のショットキバリア整流半導体装
置。
3. The semiconductor device according to claim 1, wherein the second one-conductivity-type semiconductor region is shallower than the opposite-conductivity-type semiconductor region in a depth from a contact surface between the one-conductivity-type semiconductor surface and the electrode metal. Or the Schottky barrier rectifier semiconductor device according to claim 2.
JP08973392A 1992-03-13 1992-03-13 Schottky barrier rectifier semiconductor device Expired - Fee Related JP3182446B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP08973392A JP3182446B2 (en) 1992-03-13 1992-03-13 Schottky barrier rectifier semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP08973392A JP3182446B2 (en) 1992-03-13 1992-03-13 Schottky barrier rectifier semiconductor device

Publications (2)

Publication Number Publication Date
JPH05259436A JPH05259436A (en) 1993-10-08
JP3182446B2 true JP3182446B2 (en) 2001-07-03

Family

ID=13978970

Family Applications (1)

Application Number Title Priority Date Filing Date
JP08973392A Expired - Fee Related JP3182446B2 (en) 1992-03-13 1992-03-13 Schottky barrier rectifier semiconductor device

Country Status (1)

Country Link
JP (1) JP3182446B2 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001508946A (en) * 1997-01-20 2001-07-03 エービービー リサーチ リミテッド Schottky diode using SiC and method of manufacturing the same
DE102004059640A1 (en) 2004-12-10 2006-06-22 Robert Bosch Gmbh Semiconductor device and method for its production
JP2006352028A (en) * 2005-06-20 2006-12-28 Sumitomo Electric Ind Ltd Rectifier element and manufacturing method thereof
JP2006352006A (en) * 2005-06-20 2006-12-28 Sumitomo Electric Ind Ltd Rectifier element and manufacturing method thereof
JP4939839B2 (en) * 2006-05-30 2012-05-30 株式会社東芝 Semiconductor rectifier
JP5621198B2 (en) * 2009-03-04 2014-11-05 日産自動車株式会社 Semiconductor device
JP2011166181A (en) * 2011-05-31 2011-08-25 Sumitomo Electric Ind Ltd Rectifying element and method of manufacturing the same
JP6012743B2 (en) * 2012-09-06 2016-10-25 三菱電機株式会社 Silicon carbide semiconductor device and manufacturing method thereof
US20240014328A1 (en) * 2022-07-11 2024-01-11 Semiconductor Components Industries, Llc Diodes with schottky contact including localized surface regions

Also Published As

Publication number Publication date
JPH05259436A (en) 1993-10-08

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