JP3082458B2 - Image modification device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image correcting apparatus for correcting an error pixel used in a digital video tape recorder or the like.

[0002]

2. Description of the Related Art In recent years, with the development of magnetic recording / reproducing technology,
The digitization of video tape recorders is progressing. These devices use error correction codes such as Reed-Solomon codes to compensate for errors in the electromagnetic conversion system and reproduce high-quality images, and when an error pixel exceeding its correction capability occurs, replace it with the pixel of the previous frame. An image retouching device that minimizes the effects of errors is employed.

[0003] A conventional image modifying apparatus will be described below. FIG. 5 shows a configuration diagram of this conventional image modifying apparatus. In FIG. 5, an error correction unit 101 inputs a data block, which is a unit of data input / output, and outputs a corrected output to an input control unit 102 and error information to an error information register 103. The output control unit 104 is a control unit that receives error information from the error information register 103 and outputs a data block. The memory 105 is a memory that stores the data block transferred from the input control unit 102 and outputs the data block to the output control unit 104. The address switch 106 has a surface control register 107, and switches the write address generated by the input control unit 102, the read address generated by the output control unit 104, and the modification signal in accordance with the respective access timings, and provides the switch 105 with the memory 105. is there.

[0004] The operation of the image modifying apparatus configured as described above will be described below. The error correction unit 101 performs an error correction process on the input data block and transfers the corrected data block to the input control unit 102. If the correction result is uncorrectable, the error information is Notify the error information register 103. The error information register 103 stores the notified error information at a position corresponding to the data block. Input control unit 102
Calculates the write address corresponding to the data block transferred from the error correction unit 101, gives the address to the address switch 106, and stores the data block in the memory 1
05 and stored. FIG. 6 is a memory configuration diagram showing the relationship between the logical structure of the memory 105, the logical structure of the error information register 103, and the surface control register 107. In FIG. 6, the memory 105 is logically divided into two planes, a 0th plane and a 1st plane, and each plane is accessed. Each plane has an area for storing N data blocks from data block 1 to data block N. Have. Also, one surface corresponds to one frame of the image. The error information register 103 has a structure for storing N flags corresponding to the N data blocks on a one-to-one basis, and stores a value 1 if the corresponding data block is an error, and stores a value 0 if the corresponding data block is not an error. . The surface control register 107 is, of the two surfaces of the memory 105,
A register indicating a criterion for determining which side to use,
A value of 0 indicates that the 0th surface is a reference, and a value of 1 indicates that the first surface is a reference. Now, when the data block 3 is input, the input control unit 102 calculates a corresponding address and gives it to the address switch 106.
Is added to the address by one bit of the value of the plane control register 107 as the most significant bit and given to the memory 105, so that the area of the corresponding data block on the reference plane, that is, the 0th bit in the example shown in FIG. Surface data block 3
Will store the received data block. Also,
The surface control register 107 reversely stores the value when processing of one frame is completed, so that two surfaces are alternately used for each frame.

When it is time to output a data block, the output control unit 104 calculates an address on the corresponding memory 105 as a read address, gives it to the address switch 106, and outputs the error information register 103.
Enter the error information of the corresponding data block from
This is given to the address switch 106 as a modification signal. When the modification signal is false, that is, when modification is unnecessary, the address switch 106 adds the value of the plane control register 107 as the most significant bit to the given read address as the most significant bit, and provides the same to the memory 105. When the signal is true, that is, when the signal needs to be modified, the value of the plane control register 107 is inverted to the given read address and one bit is added to the most significant bit, and the result is given to the memory 105. Now, in the example of FIG. 6, since the error information of the data block 1 is 0, the modification signal is false, and the data block on the 0th plane is read. However, the modification signal of the data block 2 is 1 because the error information is 1. If true, the data block on the first surface is read. Therefore, a data block at the same position in the immediately preceding frame is output as modified data to a data block requiring modification.

As described above, in the conventional example, the surface control register 107 for alternately using the two surfaces of the memory 105 for each frame is provided, and a data block in which an error has occurred is provided with a surface opposite to the surface indicated by the surface control register 107; That is, a modification process of outputting a data block replaced by a data block one frame before as a modified data block is realized.

[0007]

However, in the above-described conventional configuration, when an error occurs in a data block at the same position for two consecutive frames, the 0th data block is stored in the memory 105.
Since both the data block on the surface and the data block on the first surface cause an error, the error data block one frame before is output as the modified data, which causes a problem of causing a loss in the image. Was.

SUMMARY OF THE INVENTION In view of the above problems, the present invention provides an image correction apparatus which outputs modified data containing no error even if an error occurs in a data block at the same position continuously for two or more frames and does not cause loss in an image. The purpose is to supply.

[0009]

In order to achieve this object, an image correcting apparatus according to the present invention comprises a memory which is logically divided into two planes and which is accessed, and a data block which is a unit of modification processing. A modification flag register for storing a modification flag corresponding to one-to-one, modification decision means for deciding whether or not to perform modification processing for each data block, and resetting the corresponding modification flag; An input control means for selecting and writing any one of the surfaces of the memory according to the value of the modification flag, and selecting one of the surfaces of the memory according to the value of the modification flag corresponding to the data block to be output. And output control means for reading the data block.

[0010]

According to the present invention, since the modification flag register stores the result of the modification judgment for each data block which is a unit of the modification processing, the input control means refers to the modification flag register for each data block. Therefore, the input data is stored on the surface opposite to the surface of the memory read by the output control means, so that even if an error occurs for two or more consecutive frames, the error is not necessarily included in any one surface of the memory. Since the data blocks are stored, a data block having no error is always output to prevent loss of the image.

[0011]

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a configuration diagram of an image modifying apparatus according to an embodiment of the present invention. In FIG. 1, an error correction unit 1 inputs a data block, outputs a corrected output to an input control unit 2, and outputs error information to an error information register 3. The modification determining unit 4 refers to the error information register 3 and
The modification flag which is the modification judgment result is stored in the modification flag register 5
The modification flag register 5 gives the modification flag to the input control unit 2 and the output control unit 6. The input control unit 2 and the output control unit 6 are control units that calculate addresses of data blocks and control input / output of data blocks.
The memory 7 is a memory that stores the data block transferred from the input control unit 2 and outputs the data block to the output control unit 6. The address switch 8 is a switch that switches between a write address generated by the input control unit 2 and a read address generated by the output control unit 6 in accordance with the respective access timings and supplies the read address to the memory 7.

The operation of the image modifying apparatus configured as described above will be described below. The error correction unit 1 performs an error correction process on the input data block,
The corrected data block is transferred to the input control unit 2, and if the correction result is uncorrectable, the error information is notified to the error information register 3. The error information register 3 stores the notified error information at a position corresponding to the data block. FIG. 2 is a memory configuration diagram showing the relationship between the logical structure of the memory 7, the logical structure of the error information register 3, and the modification flag register 5 in the data block input operation. In FIG. 2, the structures of the memory 7 and the error information register 3 are the same as those of the above-described conventional example, and the description is omitted. The modification flag register 5 is a register for storing a modification flag indicating a reference as to which of the two surfaces of the memory 7 is to be used for each data block. The 0th plane is accessed, and if the value is 1, the 1st plane is accessed. Now, when the data block 3 is input, the input control unit 2 calculates the corresponding address, and adds one bit as the most significant bit to the value of the corresponding modification flag to form a write address, and the address switch 8
The address switch 8 supplies the write address to the memory 7 at the same timing. Therefore, the received data block is stored in the area of the corresponding data block on the surface indicated by the modification flag, that is, in the data block 3 on the 0th surface in the example shown in FIG.

The modification judging section 4 executes the modification judging processing in order from the data block whose writing to the memory 7 is completed by the input control section 2. In the modification judging process, the modification judging section 4 reads out the corresponding error information of the data block to be processed from the error information register 3 and determines that the modification is not necessary, that is, if the error information is 0, the corresponding modification flag is set. Is inverted and stored in the modification flag register 5, and if it is determined that modification is necessary, that is, if the error information is 1, the value of the modification flag is held. FIG. 3 is a memory configuration diagram showing the result of executing the modification judgment process from the state of FIG. In FIG. 3, since the data blocks 2 and 3 require modification, the value of the modification flag is held, and the data blocks 1 and 3 are modified.
Since N does not require modification, the value of the modification flag is inverted.

After completion of the modification judgment processing, the output control unit 6 comes to a timing to output the data block, calculates the address on the corresponding memory 7, inverts the value of the corresponding modification flag, and sets one bit as the most significant bit. Add to form a read address. The address switch 8 supplies the read address to the memory 7 at the same time as the timing, and reads the data block. Accordingly, from the area of the corresponding data block on the opposite side of the side indicated by the modification flag, that is, in the example shown in FIG.
Are read from the first surface. That is, a data frame at the same position as the immediately preceding frame is output as modified data to a data block requiring modification.

When the input control unit 2 starts receiving the data block of the next frame from the state shown in FIG. 3, the data block 1, the data block 2, and the data block N are on the first side, and the data block 3 is on the first side. It will be written on the 0 plane. Since the modification flag indicates a surface that was not used for output in the immediately preceding frame, the input control unit 2
The data block output immediately before is always held in the memory 7 for the writing of the data block.
Here, the modification judgment processing is also performed. As a result, the data block used for the output in the immediately preceding frame is always used for the modification. That is, even when the next frame is input from the state of FIG. 3 and the data block 3 continues to be in error, the modification judgment processing result is as shown in FIG. 4, and the data block 3 is held from two frames before. Is output from the first surface that is continuously being processed. That is, no error data block is output even for consecutive errors.

As described above, in this embodiment, the modification flag memory for storing the modification flag is provided for each data block which is a unit of the modification processing, and the surface to be held in the memory 7 by the modification flag and the input of the next frame are provided. Since a data block can identify a surface that can be rewritten for each data block, a data block output in the immediately preceding frame, that is, a data block without error, can be always held on one of the surfaces. Therefore, even when a certain data block becomes an error block continuously for two or more frames, the data block can be replaced with an error-free data block and output, and loss of an image can be prevented. Further, since the modification judgment unit 4 inverts the modification flag for the data block which does not require modification, even if a data block which does not generate an error is provided without providing a modification flag initialization circuit at the time of frame transition. The two surfaces of the memory 7 are automatically used alternately for each frame, and can be realized by an extremely simple circuit.

In this embodiment, the correction processing unit of the error correction unit 1 is the same as the data block which is the modification processing unit of the modification judgment unit 4. However, a plurality of correction processing units are assigned to one data block. It may be configured to include. In addition, a second error correction unit for processing a product code is provided together with the error correction unit 1. The second error correction unit accesses the memory 7 with reference to the modification flag register 5, and the modification determination unit 4 After completion of the error correction process 2, the modification determination process may be executed.

[0019]

As described above, according to the present invention, since the modification flag register stores the result of the modification judgment for each data block, the input control means refers to the modification flag register for each data block, thereby making the output control means. Will store the input data on the opposite side of the surface of the memory from which the data has been read, so that even if an error occurs continuously for two or more frames, a data block containing no error is always stored on one of the surfaces of the memory. be able to. Therefore, an error-free data block is always output, and no loss occurs in the image. Further, since this can be realized at a low cost with a very simple circuit configuration, the effect is great.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an image modifying apparatus according to an embodiment of the present invention.

FIG. 2 is a memory configuration diagram when a data block is input in the embodiment.

FIG. 3 is a memory configuration diagram at the time of completion of modification judgment processing in the embodiment.

FIG. 4 is a memory configuration diagram at the time of completion of modification judgment processing in the embodiment.

FIG. 5 is a block diagram showing a configuration of a conventional image modifying apparatus.

FIG. 6 is a memory configuration diagram for explaining a modification process in the conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Error correction part 2 Input control part 3 Error information register 4 Modification judgment part 5 Modification flag register 6 Output control part 7 Memory 8 Address switch

Claims (2)

(57) [Claims] 1. A memory which is logically divided into two planes and accessed, and a data block which is a unit of data modification processing has a one-to-one correspondence.
A modification flag register that stores a modification flag corresponding to the data block; and a data block that determines whether to execute a modification process of outputting a data block of another surface instead of the data block stored on the surface indicated by the modification flag of the memory. A modification determination unit that determines each modification and resets the corresponding modification flag; and an input control unit that selects and writes an input data block by selecting one of the surfaces of the memory according to the value of the modification flag. An image modifying apparatus comprising: output control means for selecting one of the surfaces of the memory according to the value of a modifying flag corresponding to a data block to be output and reading out the data block. 2. The image modification apparatus according to claim 1, wherein the modification determination unit inverts a corresponding modification flag when the modification processing is not performed on the data block.