JP2664827B2 - Real-time information transfer control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for controlling asynchronous data transfer by DMA between a computer and a peripheral device. The present invention provides a system with high real-time
It can be used for data transfer between a central processing unit and a peripheral device in the center device of the information storage and exchange service.

[0002]

2. Description of the Related Art In a system for handling data in real time, a transfer request from a computer to a peripheral device is asynchronously performed between a computer and a peripheral device, and a transfer request from a peripheral device to a computer is simultaneously performed in parallel. These must be controlled efficiently as they occur.

As a transfer control method satisfying the above conditions,
IPSJ 41st Annual Convention Lecture Papers, pp. 1-115, SCS for Real-Time Video / Audio Transfer Controller
There is a method disclosed in the I application method (lecture number 1Q-2). That is, in this transfer control method, for a transfer request from a peripheral device to a computer that occurs asynchronously, a reception command is issued from the computer to the peripheral device in advance to prepare for transfer, and the computer and the peripheral device are once connected. The transfer interface is released, and when a transfer request is actually generated from the peripheral device to the computer, the peripheral device is reconnected to the computer and the transfer data is transferred to the computer. According to this method, when a transfer request is issued from the peripheral device to the computer, the transfer can be started quickly by the peripheral device.

[0004] The configuration of a conventional computer of the above system will be described with reference to FIG. The computer 4 controls the transfer interface and communicates with the main storage unit (described later) via the host computer internal bus via the
A transfer interface controller (hereinafter, IFC
41), an arithmetic control unit (hereinafter abbreviated as CPU) 42 for performing internal processing of a computer, a memory management unit (hereinafter MMU) mounted on the CPU 42 and controlling access to the main storage unit from the CPU 42 and the IFC 41. 4)
3. a main storage unit (hereinafter abbreviated as MEM) 44 in which programs and data processed by a computer are stored;
41, an internal bus interconnecting the CPU 42 (hereinafter referred to as an internal bus).
BUS) 45 and other internal structural units. The MEM 44 includes an area 61 of an application program (hereinafter abbreviated as AP) for realizing data transfer in real time and a control program (hereinafter referred to as O) for managing the system.
(Abbreviated as S).

[0005] The OS or AP occupies a part of the internal configuration unit of the computer as its own operation environment for a certain period of time, and identifies those resources by their own addresses. The address by which the OS identifies a resource is called a system virtual address, and the address by which the AP identifies a resource is called a user virtual address. An address space based on a physical address is referred to as a physical space, an address space based on a system virtual address is referred to as a system virtual space, an address space based on a user virtual address is referred to as a user virtual space, and a system virtual space and a user virtual space are collectively referred to as a virtual space. In FIG. 5, the space (address space on the BUS 45) handled by the IFC 41 is a physical space, and the MEM 4
4 is virtual space, AP area 61 is user virtual space, OS
The area 62 is a system virtual space.

[0006] owns region 621 for DMA transfer using the BUS45 in <br/> space system virtual space 62 of the MEM address managed before MMU43, OS is AP
Every time a data transfer request requiring a DMA area is received from the DMA area 621, an operation of allocating a necessary area from the DMA area 621 is performed. When the data transfer using the DMA is completed, the OS returns to the DMA area 62 allocated for the data transfer.
Release 1 for reuse.

Next, a conventional control method will be described with reference to FIG. A program (A) on a computer that realizes real-time transfer
P) issues a transfer block reception request to the peripheral device 3 in advance so as to always be able to respond to the transfer request from the peripheral device 3 to the computer 4. Issues a transfer block transmission request to the peripheral device when necessary.

The transfer block reception request is issued by designating an address of an area for receiving a transfer block in the AP (hereinafter abbreviated as an AP reception buffer) and a maximum possible block length (hereinafter abbreviated as an AP reception size). (7
1). Thereby, the OS first allocates an area corresponding to the AP reception size in the DMA area, and sets the AP reception buffer as a transfer destination. Second, the IFC
At 41, necessary initial settings such as the address and size of the allocated area in the DMA area (hereinafter abbreviated as "DMA area"), a reception command issued to the peripheral device, and the like are made (81), and thirdly, the IFC 41 is started. ( 82 ). The IFC 41 controls the peripheral device 3 via the transfer interface 5 according to the initial setting, and sequentially transfers data received from the peripheral device 3 to the AP via the DMA area 621 (9).
1, 93). Thereafter, when a signal indicating the end of the transfer is notified from the peripheral device 3 (92), the IFC 41 notifies the OS of the end of the transfer by interruption (83).
The MA area 621 is released to notify the AP of the completion of the reception request (72).

The transfer block transmission request is the same except that the command issued to the peripheral device 3 is a transmission command, and that the IFC 41 sequentially receives data from the AP via the DMA area 621 and transmits the data to the peripheral device. Is controlled in the manner described above.

[0010]

As described above, according to the conventional control method, when transferring data between a plurality of peripheral devices and a computer, it is necessary to secure the DMA area in the computer. In a computer that implements a real-time service or the like, the AP occupies a DMA area for each peripheral device because the AP waits while securing the DMA area so as to be able to respond to transfer requests from a plurality of peripheral devices. In order for the computer to manage this DMA area, as shown in FIG.
Is converted using. The MMU usually manages the entire space of the MEM in page units. In order to secure the DMA area in page units, a larger number of pages is required in order to secure the necessary DMA area. Occurs. Further, the number of necessary DMA areas is required in proportion to the number of peripheral devices. As a result, the amount of DMA-related resources provided in the computer is unnecessarily occupied, and as a result, there is a problem that the number of peripheral devices that can be transferred asynchronously, that is, simultaneously accommodated peripheral devices, is restricted.

An object of the present invention is to provide a real-time information transfer method for preventing the amount of DMA-related resources provided in a computer from being unnecessarily occupied and consequently increasing the number of asynchronously transferable peripheral devices. Is to provide.

[0012]

In order to achieve the above object, according to the present invention, before starting DMA, a system virtual space is required.
In addition, the DMA for the required storage capacity according to the number of peripheral devices
The entire area is continuously and collectively secured , and the secured DMA
The area is managed separately based on the device number of the peripheral device and the distinction between transmission and reception, and in the case of asynchronous data transfer from the peripheral device to a computer, data from the peripheral device is transferred according to the device number of the peripheral device. D determined in advance
DMA transfer is performed to the MA area, and after the DMA transfer is completed, the data is mapped into the user virtual space.
Again to the user virtual space via the received buffer
In the case of asynchronous data transfer from the computer to the peripheral device , address mapping is similarly performed in the user virtual space.
Via the pinged transmission buffer, data existing in the user virtual space is copied to the DMA area determined in advance according to the device number of the peripheral device, and then copied from the DMA region to each peripheral device. The DMA transfer is performed.

[0013]

According to the conventional method, the MMU sets D for each peripheral device.
The MA area is allocated, and direct DMA transfer between the physical space and the virtual space of the IFC is realized via the allocated DMA area. This directly transfers data from the IFC to the AP transmission / reception buffer in the user virtual space. In the computer, since the AP waits while securing the DMA area so as to be able to respond to transfer requests from a plurality of peripheral devices, the AP occupies a DMA area for each peripheral device, and the MMU is used for each peripheral device. DMA
Since the area is allocated, there is a problem that fragments are generated in the allocated page, and the number of peripheral devices that can be accommodated decreases because the number of DMA areas is required in proportion to the number of peripheral devices. .

On the other hand, according to the present invention, before starting the DMA, a DMA area for a necessary transfer capacity is continuously and once secured from the system virtual space where the DMA can be performed according to the number of peripheral devices. , Based on the device number of the peripheral device and the distinction of transmission / reception, the divided DMA regions are configured and managed. After such setting, in the case of asynchronous data transfer from the IFC of each peripheral device to the computer, the IFC
DMA transfer is performed from the physical space to the corresponding partitioned DMA area, and after the end of the DMA transfer, the data is transferred again to the user virtual space accessible by the AP on the computer. Conversely, in the case of asynchronous data transfer from the computer to the IFC, data existing in the user virtual space accessible by the AP on the computer is once copied to the corresponding partitioned DMA area, and then the data is transferred from this area to the I / O area.
DMA transfer is performed to the physical space of the FC. For this reason, unlike the prior art in which the MMU allocates a DMA area for each peripheral device, the MMU manages only the minimum necessary DMA area.
The number of peripheral devices that can be transferred asynchronously, that is, the number of simultaneously accommodated peripheral devices increases.

[0015]

FIG. 1 shows an example of the configuration of a computer according to the present invention. Although the basic configuration is the same as that of FIG. 5, in order to realize the present invention, the DMA area 62 which is collectively secured with the AP transmission / reception buffers 611 and 612 in the user virtual space.
It is necessary to configure a data transfer mechanism between the two. For this reason, in FIG. 1, the AP buffers 611 and 612 on the user virtual space 61 are address-mapped using the MMU 43 in the same system virtual space 62 as the DMA area 621 to be collectively secured, and can be directly referenced. Such transmission / reception buffers 631 and 632 are provided.

First, a control method for transmitting data from the computer 4 to the peripheral device 3 by DMA will be described with reference to FIG.

(1) The OS is a DMA required by each peripheral device.
The space 621 is collectively secured in the system virtual space 62.

(2) The AP issues a transfer block transmission request by designating the address of the AP transmission buffer 612 and the AP transmission size as in the conventional system (71).

(3) First, the OS performs address mapping of the address of the in-AP transmission buffer 612 accompanying the transfer block transmission request by the MMU 43, and
In a state that can be accessed on the virtual space (the transmission buffer 6
32), and transfers the contents of the transmission buffer 632 to a predetermined DMA area 621 ' (73).
Second, the IFC 41 notifies the IFC 41 of the address and size of the allocated DMA area 621 'in the DMA space secured collectively and the command to be issued to the peripheral device 3 (81). Third, the IFC 41 is started (8
2).

(4) The IFC 41 controls the peripheral device 3 via the transfer interface 5 in accordance with the initial setting, and transfers information transferred from the DMA space 621 'to the peripheral device 3 via the physical space 461 ( 94,9
5).

(5) The peripheral device 3 notifies the IFC 41 of a transfer end signal at the end of the transfer as in the conventional method (9).
2).

(6) When the transfer end signal is notified from the peripheral device 3 as in the conventional system, the IFC 41 notifies the OS of the end of the transfer by interruption (83).

[0023] (7) OS is the end of the transfer by an interrupt as in the conventional method is notified, in the system virtual space
The transmission buffer area 632 is released, and the AP is notified of the completion of the transfer block transmission request (72).

(8) Subsequent transfer block transmission requests operate according to the following procedure (2).

Next, referring to FIG.
A control method when data is received by DMA will be described. As described with reference to FIG. 2, it is assumed that collectively securing the DMA space 621 necessary for each peripheral device in the system virtual space 62 has already been executed only once when the computer is started and has been collectively secured.

(1) The AP issues a transfer block reception request by designating the address of the AP reception buffer 611 and the AP reception size as in the conventional system (74).

(2) First, the OS performs necessary initialization of the address of the DMA area allocated to the IFC 41, the size specified by the AP, and the reception command issued to the peripheral device 3 (81). Second, start the IFC 41
(82) .

(3) The IFC 41 controls the peripheral device 3 via the transfer interface 5 according to the initial setting, and transfers information received from the peripheral device 3 via the physical space 461 to the DMA area 621 (91, 91). 96).

(4) The peripheral device 3 notifies the IFC 41 of a transfer end signal at the end of transfer as in the conventional method (9).
2).

(5) When the transfer end signal is notified from the peripheral device as in the conventional system, the IFC 41 notifies the OS of the transfer end by interruption (8).
3). (6) When the OS is first notified of the end of the transfer by the interrupt, the OS maps the address of the AP reception buffer 611 to the system virtual space 62 (sets the reception buffer 631) so that the OS can be accessed from the system virtual space. To Secondly, transfer is again performed from the DMA area 621 'to the AP reception buffer 611 via the reception buffer 631 (84). Third, when the transfer of the reception information is completed, the reception buffer area 63 in the system virtual space is set.
1 is released, and the AP is notified of the completion of the transfer block reception request (72).

(7) Subsequent transfer block reception requests operate according to the following procedure (1).

FIG. 4 shows a user virtual space in the case of the present invention.
The correspondence between the DMA area and the physical area is shown. In the present invention, DM
A A DMA area 621 corresponding to a required transfer capacity in accordance with the number of peripheral devices in a system virtual space in which DMA can be performed before activation.
Are continuously secured at one time, and the secured DMA area 621 is separately configured and managed based on the device number of the peripheral device and the distinction between transmission and reception. After the above setting, in the case of asynchronous data transfer from each peripheral device to the computer, data is transferred from the IFC physical space to the corresponding partitioned DMA area, and after the completion of the DMA transfer, the data is transferred. The transfer is performed again to the user virtual space accessible by the AP on the computer. In the case of asynchronous data transfer from a computer to a peripheral device, an AP on the computer
Temporarily copies data existing in the user virtual space accessible to the corresponding partitioned DMA area (user space mapping), and then performs DMA transfer from this area to the IFC physical space. FIG. 4 shows an example of transmission / reception to / from the terminal 2. In the case of FIG. 4, since the computer manages only the minimum necessary DMA area, the number of required allocated pages is reduced, and the fragment hardly occurs, and the number of generated fragments is small.

[0033]

As described above, according to the present invention,
Conventionally, when a plurality of peripheral devices capable of asynchronous data transfer are connected to a computer, the AP waits while securing a DMA area so as to be able to respond to a transfer request from a plurality of peripheral devices, and waits for a DMA for each peripheral device. In order to occupy the area and secure it in units of pages managed by the MMU for each requested DMA area, fragments are generated and necessary DM
Since the number of A areas is required in proportion to the number of peripheral devices, the amount of DMA-related resources provided in the computer is wasted and the number of peripheral devices that can be transferred asynchronously is consequently limited. Is resolved. For this reason, a large number of peripheral devices can be connected, and the minimum system resources are used, so that the throughput of the entire system is also improved.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration example of a computer system according to a method of the present invention.

FIG. 2 is a diagram illustrating transfer control when a transfer block transmission request is made according to the method of the present invention.

FIG. 3 is a diagram illustrating transfer control at the time of a transfer block reception request according to the method of the present invention.

FIG. 4 is a diagram showing an example of a mapping of a DMA area of a computer according to the method of the present invention.

FIG. 5 is a diagram showing a configuration example of a computer system in a case of a conventional method.

FIG. 6 is a diagram for explaining transfer control at the time of a transfer block reception request according to a conventional method.

FIG. 7 is a diagram showing mapping of a DMA area of a computer in the case of a conventional method.

[Explanation of symbols]

 3 Peripheral device 4 Computer 41 Transfer interface control unit 42 Operation control unit 43 Memory management unit 44 Main storage unit (virtual space) 61 User virtual space 62 System virtual space 621 Batch DMA area

Claims (1)

(57) [Claims] 1. A system in which a plurality of peripheral devices are connected to a computer.
In a real-time information transfer control method for performing a DMA transfer operation between a computer and a peripheral device asynchronously with each other in a system, before starting the DMA, the system is placed in a memory space where the computer can perform DMA (hereinafter referred to as a system virtual space). A DMA area for a necessary storage capacity is continuously and collectively secured in accordance with the number of peripheral devices, and the secured DMA regions are separately managed based on a device number of the peripheral device and a distinction between transmission and reception; In the case of asynchronous data transfer from a peripheral device to a computer, data from the peripheral device is transferred to a DMA area determined in advance according to the device number of the peripheral device.
A transfer is performed, and when the DMA transfer is completed, a reception buffer address-mapped to a space accessible by a program on a computer (hereinafter referred to as a user virtual space) is set in the system virtual space, and the data is transferred to the DMA area. From the computer to the user virtual space via the reception buffer. In the case of asynchronous data transfer from the computer to the peripheral device, the data is transferred to a space (user virtual space) accessible to a program on the computer on the system virtual space. Set an address-mapped transmission buffer, copy the data present in the user virtual space to the DMA area predetermined according to the device number of the peripheral device via the transmission buffer, Real-time information transfer control characterized by performing DMA transfer from a DMA area to each peripheral device Method.