JP2013503491A - スーパージャンクショントレンチパワーmosfetデバイス - Google Patents
スーパージャンクショントレンチパワーmosfetデバイス Download PDFInfo
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Abstract
【選択図】図1
Description
この出願は、本出願の譲受人に譲渡された「Super Junction Trench Power MOSFET Device Fabrication」と題されるGao等による2009年8月27日に出願された同時係属の米国特許出願第12/549,190号に関連する。
第2型ドーパントのカラムを前記第1型ドーパントの第1のカラムから分離する絶縁材料を備える第1のカラムと、
前記第2型ドーパントの前記カラムを前記第1型ドーパントの第2のカラムから分離する絶縁材料を備える第2のカラムと、
絶縁材料の前記第1のカラムと絶縁材料の前記第2のカラムとの間に位置合わせされる電界効果トランジスタのためのゲート要素と、
を備えるスーパージャンクショントレンチパワーMOSFET。
前記第1型ドーパントの基板と、
前記基板に結合されるとともに、前記第1型ドーパントの柱状の第1の領域と前記第1型ドーパントの柱状の第2の領域との間に配置される第2型ドーパントの柱状領域を備え、前記第2型ドーパントの前記領域が、第1の絶縁層によって前記第1型ドーパントの前記第1の領域から分離されるとともに、第2の絶縁層によって前記第1型ドーパントの前記第2の領域から分離される、スーパージャンクション構造体と、
前記スーパージャンクション構造体に結合されるとともに、ゲート要素を備え、前記ゲート要素が前記第2型ドーパントの前記領域の長手方向軸と位置合わせされる電界効果トランジスタと、
を備える半導体デバイス。
前記第1型ドーパントの基板と、
前記基板に結合されるとともに、前記第1型ドーパントの第1の領域と前記第1型ドーパントの第2の領域との間に配置された第2型ドーパントの領域を備え、前記第2型ドーパントの前記領域および前記第1型ドーパントの前記第1および第2の領域がそれぞれ第2の寸法よりも大きい第1の寸法を有し、前記第1の寸法が第1の方向で測定され、前記第2の寸法が前記第1の方向と直交する第2の方向で測定される、スーパージャンクション構造体と、
ゲート要素を備え、前記第2型ドーパントの前記領域が前記第1の方向で前記ゲート要素と前記基板との間に位置する、電界効果トランジスタと、
前記第1の方向および前記第2の方向の両方と直交する第3の方向で前記第2型ドーパントの前記領域に電気的に短絡されるソース金属の層と、
を備える半導体デバイス。
Claims (20)
- 第1型ドーパントのチャネルを有するスーパージャンクショントレンチパワー金属酸化膜半導体電界効果トランジスタ(MOSFET)デバイスであって、
第2型ドーパントのカラムを前記第1型ドーパントの第1のカラムから分離する絶縁材料を備える第1のカラムと、
前記第2型ドーパントの前記カラムを前記第1型ドーパントの第2のカラムから分離する絶縁材料を備える第2のカラムと、
絶縁材料の前記第1のカラムと絶縁材料の前記第2のカラムとの間に位置合わせされる電界効果トランジスタのためのゲート要素と、
を備えるスーパージャンクショントレンチパワーMOSFET。 - 前記ゲート要素を前記第2型ドーパントの前記カラムから分離する絶縁層を更に備える請求項1に記載のスーパージャンクショントレンチパワーMOSFET。
- 前記第1型ドーパントがn型ドーパントを備える場合には前記第2型ドーパントがp型ドーパントを備え、前記第1型ドーパントがp型ドーパントを備える場合には前記第2型ドーパントがn型ドーパントを備える請求項1に記載のスーパージャンクショントレンチパワーMOSFET。
- 前記第2型ドーパントの前記カラムに電気的に短絡されるソース金属の層を更に備える請求項1に記載のスーパージャンクショントレンチパワーMOSFET。
- 前記ゲート要素と隣接するゲート要素との間に形成されたトレンチを更に備え、前記ソース金属が前記トレンチを満たす請求項4に記載のスーパージャンクショントレンチパワーMOSFET。
- 前記ゲート要素と前記トレンチとの間に配置された前記第2型ドーパントのボディ領域および前記第1型ドーパントのソース領域を更に備える請求項5に記載のスーパージャンクショントレンチパワーMOSFET。
- 前記トレンチは、前記第1型ドーパントの前記第1のカラムの長手方向軸と位置合わせされる請求項5に記載のスーパージャンクショントレンチパワーMOSFET。
- 前記トレンチは、前記第2型ドーパントの領域によって前記第1型ドーパントの前記第1のカラムから分離される請求項7に記載のスーパージャンクショントレンチパワーMOSFET。
- 第1型ドーパントのチャネルを有する半導体デバイスであって、
前記第1型ドーパントの基板と、
前記基板に結合されるとともに、前記第1型ドーパントの柱状の第1の領域と前記第1型ドーパントの柱状の第2の領域との間に配置される第2型ドーパントの柱状領域を備え、前記第2型ドーパントの前記領域が、第1の絶縁層によって前記第1型ドーパントの前記第1の領域から分離されるとともに、第2の絶縁層によって前記第1型ドーパントの前記第2の領域から分離される、スーパージャンクション構造体と、
前記スーパージャンクション構造体に結合されるとともに、ゲート要素を備え、前記ゲート要素が前記第2型ドーパントの前記領域の長手方向軸と位置合わせされる電界効果トランジスタと、
を備える半導体デバイス。 - 前記ゲート要素を前記第2型ドーパントの前記領域から分離する酸化物層を更に備える請求項9に記載の半導体デバイス。
- 前記第2型ドーパントの前記領域に電気的に短絡されるソース金属の層を更に備える請求項9に記載の半導体デバイス。
- 前記ゲート要素と隣接するゲート要素との間に形成されるトレンチを更に備え、前記ソース金属が前記トレンチを満たす請求項11に記載の半導体デバイス。
- 前記ゲート要素と前記トレンチとの間に配置される前記第2型ドーパントのボディ領域および前記第1型ドーパントのソース領域を更に備える請求項12に記載の半導体デバイス。
- 前記トレンチは、前記第1型ドーパントの前記第1の領域の長手方向軸と位置合わせされる請求項12に記載の半導体デバイス。
- 第1型ドーパントのチャネルを有する半導体デバイスであって、
前記第1型ドーパントの基板と、
前記基板に結合されるとともに、前記第1型ドーパントの第1の領域と前記第1型ドーパントの第2の領域との間に配置された第2型ドーパントの領域を備え、前記第2型ドーパントの前記領域および前記第1型ドーパントの前記第1および第2の領域がそれぞれ第2の寸法よりも大きい第1の寸法を有し、前記第1の寸法が第1の方向で測定され、前記第2の寸法が前記第1の方向と直交する第2の方向で測定される、スーパージャンクション構造体と、
ゲート要素を備え、前記第2型ドーパントの前記領域が前記第1の方向で前記ゲート要素と前記基板との間に位置する、電界効果トランジスタと、
前記第1の方向および前記第2の方向の両方と直交する第3の方向で前記第2型ドーパントの前記領域に電気的に短絡されるソース金属の層と、
を備える半導体デバイス。 - 前記第2型ドーパントの前記領域は、第1の絶縁層によって前記第1型ドーパントの前記第1の領域から分離されるとともに、第2の絶縁層によって前記第1型ドーパントの前記第2の領域から分離される請求項15に記載の半導体デバイス。
- 前記ゲート要素を前記第2型ドーパントの前記領域から分離する酸化物層を更に備える請求項15に記載の半導体デバイス。
- 前記ゲート要素と隣接するゲート要素との間に形成されたトレンチを更に備え、前記ソース金属が前記トレンチを満たす請求項15に記載の半導体デバイス。
- 前記ゲート要素と前記トレンチとの間に配置された前記第2型ドーパントのボディ領域および前記第1型ドーパントのソース領域を更に備える請求項18に記載の半導体デバイス。
- 前記第1型ドーパントの前記第1の領域が前記第1の方向で前記トレンチと前記基板との間に位置する請求項18に記載の半導体デバイス。
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WO2011031563A3 (en) | 2011-06-23 |
EP2471101A2 (en) | 2012-07-04 |
KR101407356B1 (ko) | 2014-06-13 |
EP2471101A4 (en) | 2014-03-05 |
US9425306B2 (en) | 2016-08-23 |
CN102549753A (zh) | 2012-07-04 |
JP5687700B2 (ja) | 2015-03-18 |
JP2015039010A (ja) | 2015-02-26 |
JP5987035B2 (ja) | 2016-09-06 |
CN102549753B (zh) | 2015-02-25 |
US20110049614A1 (en) | 2011-03-03 |
WO2011031563A2 (en) | 2011-03-17 |
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