JP2007299806A - Solid-state image pickup device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that image quality is deteriorated by an increase in the resistance of a pixel separation region, variations in a read voltage, and the generation of hot electrons when a positive charge is applied to an electrode provided on the pixel separation region in a solid-state image pickup device. <P>SOLUTION: At the upper portion of the p-type pixel separation region 306, a connection electrode 308 to which a positive charge is applied at driving and a connection electrode 309 to which no positive charges are applied at driving are formed via a gate insulation film 307. On the surface of a semiconductor substrate 301 at the lower portion of the connection electrode 308, p-type impurities are introduced selectively, thus forming a high-concentration p-type impurity region 310 having a p-type impurity concentration that is higher than that of the pixel separation region 306. Even if the connection electrode 308 is applied, the Hall concentration of the pixel separation region 306 is ensured by the high-concentration p-type impurity region 310. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device and a manufacturing method thereof, and more specifically to a CCD type solid-state imaging device and a manufacturing method thereof.

  In recent years, solid-state imaging devices have been widely used as image input devices such as digital cameras and mobile phones. For example, Patent Document 1 describes a CCD solid-state imaging device and a manufacturing method thereof.

  FIG. 10 is a cross-sectional view of a conventional solid-state imaging device described in Patent Document 1. In FIG.

The conventional solid-state imaging device shown in FIG. 10 mainly includes an N-type semiconductor substrate 901 on which a plurality of N ⁺ -type photoelectric conversion regions 903 are formed, and an oxide film 908 on the surface of the N-type semiconductor substrate 901. Polysilicon electrodes 909 and 910 formed in two layers are provided.

A P-type well region 902 is formed in the N-type semiconductor substrate 901, and is positioned inside the P-type well region 902 between the N ⁺ -type photoelectric conversion region 903 and a pair of adjacent N ⁺ -type photoelectric conversion regions 903. N-type impurity regions 904 are formed.

A P ⁺ type impurity region 905 is formed on the surface of the N ⁺ type photoelectric conversion region 903. Further, by introducing a P-type impurity into the surface of the N-type impurity region 904, a P-type impurity concentration is obtained from the low-concentration P-type impurity region 913, the P-type pixel isolation region 906, and the P-type pixel isolation region 906. A high concentration P-type impurity region 907 is formed.

  Polysilicon electrodes 909 and 910 are formed in two layers above the pixel isolation region 906 and the low concentration P-type impurity region 913. The first-layer polysilicon electrode 909 is formed on the oxide film 908, and the second-layer polysilicon electrode 910 is both of the pair of polysilicon electrodes 909 via an oxide film covering the surface of the polysilicon electrode 909. Is formed above. Further, a light shielding film 911 is formed above and to the side of the polysilicon electrodes 909 and 910 via an interlayer insulating film 912.

The conventional solid-state imaging device shown in FIG. 10 increases the hole concentration in the pixel isolation region 906 by the high-concentration P-type impurity region 907 formed on a part of the surface of the pixel isolation region 906, and the pixel at the time of driving. The resistance of the isolation region 906 can be reduced.
JP 2003-258237 A

  However, the above-described conventional solid-state imaging device has the following problems.

  First, when a positive voltage is applied to the first-layer polysilicon electrode 909, a portion of the pixel isolation region 906 located below the polysilicon electrode 909 and the low-concentration P-type impurity are applied by applying the positive voltage. Holes existing in a part of the region 913 are eliminated. As a result, there is a problem that the resistance of the pixel isolation region 906 and the low concentration P-type impurity region 913 increases.

  Second, when a high positive voltage is applied to the polysilicon electrode 909 to such an extent that the pixel isolation region 906 is depleted, the pixel region is in an electrically floating state, and there is a problem that the read voltage fluctuates.

  Third, when a positive voltage is applied to the first-layer polysilicon electrode 909, the potentials of the pixel isolation region 906 and the low-concentration P-type impurity region 913 whose impurity concentration is lower than that of the high-concentration P-type impurity region 907 are high. It varies greatly compared to the potential of the concentration P-type impurity region. Therefore, a strong electric field is generated between the high concentration P-type impurity region 907 and the pixel isolation region 906 and the low concentration P-type impurity region 913. This strong electric field generates hot electrons. Since hot electrons become a noise component in the solid-state imaging device, there is a problem that the quality of the output image is deteriorated.

In particular, when the first-layer polysilicon electrode 909 is formed not only on the pixel isolation region 906 but also above the N ⁺ type photoelectric conversion region 903, the potential fluctuation inside the substrate is further increased. As the potential fluctuation increases, more hot electrons are generated, which leads to further image quality degradation.

  Therefore, even when a positive voltage is applied to the polysilicon electrode, the present invention can suppress an increase in the resistance of the pixel isolation region, a fluctuation in the readout voltage, and a deterioration in image quality due to the generation of hot electrons. An object of the present invention is to provide a solid-state imaging device and a method for manufacturing the same.

  1st invention is a solid-state imaging device, Comprising: The 2nd conductivity type which isolate | separates each of the some 1st conductivity type photoelectric conversion area | region arranged in a row direction and a column direction on a semiconductor substrate, and a photoelectric conversion area | region Pixel separation regions, a plurality of first conductivity type charge transfer regions extending in the column direction between the columns of the photoelectric conversion regions, and a plurality of first and first charge electrodes alternately disposed above each of the charge transfer regions. Two transfer electrodes, a plurality of first connection electrodes that connect each of the first transfer electrodes, and extend in the row direction along each of the first connection electrodes. A plurality of second connection electrodes that connect each of the second transfer electrodes, and are formed on the surface of the pixel isolation region below at least a part of the first connection electrode, and have a second conductivity type from the pixel isolation region. A high-concentration impurity region having a high impurity concentration.

  A second invention is a method of manufacturing a solid-state imaging device, the step of preparing a semiconductor substrate on which a photoelectric conversion region, a pixel separation region, and a charge transfer region are formed, and a first connection electrode is formed. And a step of selectively introducing a second conductivity type impurity below the region to form a high concentration impurity region in which the concentration of the second conductivity type impurity is higher than that of the pixel isolation region.

  A third invention is a method for manufacturing a solid-state imaging device, the step of preparing a semiconductor substrate on which a photoelectric conversion region, a pixel separation region, and a charge transfer region are formed, and a second transfer on the semiconductor substrate. Forming the electrode and the second connection electrode, and using the second connection electrode as a part of the mask, on the surface of the pixel isolation region, below the region where the first connection electrode is formed, And a step of selectively introducing two conductivity type impurities to form a high concentration impurity region in which the concentration of the second conductivity type impurity is higher than that of the pixel isolation region.

  Since the solid-state imaging device according to the present invention has a high-concentration P-type impurity region in the pixel isolation region, even if a positive voltage is applied to the electrode disposed above the pixel isolation region, As a result, the increase in resistance under the electrode can be suppressed.

  In addition, since the solid-state imaging device according to the present invention can prevent the pixel isolation region from being depleted by the high-concentration P-type impurity region, it is possible to suppress fluctuations in the readout voltage.

  Furthermore, since the solid-state imaging device according to the present invention can suppress the potential fluctuation under the electrode to which a positive voltage is applied, the strong electric field generated by the potential fluctuation is alleviated, and hot electrons that are a cause of image quality degradation are reduced. Can be suppressed.

  Furthermore, according to the method for manufacturing a solid-state imaging device according to the present invention, it is possible to manufacture a solid-state imaging device that exhibits the above effects.

(First embodiment)
FIG. 1 is a diagram showing a schematic configuration of a solid-state imaging apparatus according to the first embodiment of the present invention.

  With reference to FIG. 1, a solid-state imaging device 1 according to the present embodiment is realized as a CCD solid-state imaging device. The solid-state imaging device 1 includes a pixel area (imaging area) 101 formed on a semiconductor substrate, a horizontal transfer register 102, and a charge-voltage conversion unit 103.

  The pixel region 101 includes photoelectric conversion elements such as photodiodes, and a plurality of sensor units (pixels) 104 arranged in a two-dimensional manner in the row direction and the column direction and between the columns of the sensor unit 104 in the column direction. A plurality of vertical transfer registers 105 extending.

  The vertical transfer register 105 outputs the signal charges accumulated in each of the sensor units 104 aligned in the column direction to the horizontal transfer register 102 while sequentially transferring in the vertical direction (the direction in which the horizontal transfer register extends).

  The horizontal transfer register 102 outputs the signal charges for one line transferred from each of the vertical transfer registers 105 to the charge voltage conversion unit 103 while sequentially transferring the signal charges in the horizontal direction (direction toward the charge voltage conversion unit).

  The charge-voltage converter 103 is, for example, a floating diffusion (FD) amplifier, converts the signal charge output from the horizontal transfer register 102 into a signal voltage, and outputs the converted signal voltage as a CCD output.

  Hereinafter, details of the structure of the solid-state imaging device 1 according to the present embodiment will be described.

  FIG. 2 is a structural plan view of the sensor unit shown in FIG. 1, specifically, a structural plan view showing a separation region between the sensor unit and the sensor unit. 3 is a cross-sectional view taken along line A-A ′ shown in FIG. 2, and FIG. 4 is a cross-sectional view taken along line B-B ′ shown in FIG. 2. In FIG. 2, a part of the configuration shown in FIGS. 3 and 4 is omitted for convenience of description.

  2 to 4, a plurality of photodiodes (PD) 201 (sensors shown in FIG. 1) that accumulate signal charges obtained by photoelectric conversion of incident light are formed on the surface of an N-type semiconductor substrate 301. And charge transfer regions 202 a and 202 b that extend along the columns of the photodiodes 201 and function as the vertical transfer register 105 on the surface of the N-type semiconductor substrate 301.

  Above the charge transfer regions 202a and 202b, a plurality of transfer electrodes 203 and 204 that are alternately arranged in the column direction are arranged via a gate insulating film 307. Further, above the pixel isolation region 306, a connection electrode 308 that extends in the row direction and is connected to the plurality of transfer electrodes 203 aligned in the row direction, extends in the row direction along the connection electrode 309, and is aligned in the row direction. A connection electrode 309 connected to the plurality of transfer electrodes 204 is formed through a gate insulating film 307. A positive voltage is applied to the transfer electrode 203 and the connection electrode 308 during driving, but no positive charge is applied to the transfer electrode 204 and the connection electrode 309 during driving. Note that the transfer electrodes 203 and 204 and the connection electrodes 308 and 309 constitute a gate electrode of the solid-state imaging device 1.

As shown in FIGS. 3 and 4, a P-type well region 302 is formed in the N-type semiconductor substrate 301. Inside the P-type well region 302, the N ⁺ -type impurity region 303 and the P ⁺ -type impurity region 304 constituting the PD 201, the charge transfer regions 202a and 202b, and a pair of adjacent pixels (sensor unit 104) are separated from each other. A P-type pixel isolation region 306 is formed.

  Further, a high-concentration P-type impurity region 310 having a P-type impurity concentration higher than that of the pixel isolation region 306 is formed on the surface of the N-type semiconductor substrate 301 below the connection electrode 308 by selectively introducing P-type impurities. Has been. 2 to 4, only a part of the high-concentration P-type impurity regions 310 are shown for convenience of description, but actually, a plurality of high-concentration P-type impurity regions 310 are associated with each PD 201. Is formed.

  An interlayer insulating film 311 is formed so as to cover the connection electrodes 308 and 309 and the gate insulating film 307, and a light shielding film 312 is formed on the surface of the interlayer insulating film 311 so as to cover the connection electrodes 308 and 309. Has been. The light shielding film 312 is provided to prevent incident light from entering the charge transfer regions 202a and 202b.

  As described above, the solid-state imaging device 1 according to the present embodiment is characterized in that the high-concentration P-type impurity region 310 is formed below at least a part of the connection electrode 308 to which a positive voltage is applied. Due to this feature, the solid-state imaging device according to the present embodiment has the following advantages over the conventional solid-state imaging device.

  First, generally, light incident on a PD is photoelectrically converted to generate an electron-hole pair. Electrons generated by photoelectric conversion are accumulated in the PD as signal charges. On the other hand, many of the generated holes pass through the P-type impurity region on the PD surface to the peripheral portion of the element (ground region). At this time, the horizontal transfer register cannot secure a path through which holes go to the ground area, so that the holes generated on the horizontal transfer register pass through to the opposite side of the horizontal transfer register.

  In addition, when a positive voltage is applied to the transfer electrode, holes under the transfer electrode are eliminated, so that the hole concentration decreases, and the resistance of the path through which holes generated in the PD pass to the periphery of the element increases. .

  In contrast, since the solid-state imaging device 1 according to the present embodiment includes the high-concentration P-type impurity region 310 immediately below the connection electrode 308, the resistance of the path through which holes generated in the PD 201 pass to the peripheral portion of the element is increased. It is possible to suppress the voltage drop caused by the hall current flowing through the path.

  By suppressing the voltage drop due to the hole current to be small, the potential difference generated in the vertical direction (vertical direction) of the pixel region 101 is reduced. Therefore, between the pixels appearing according to the pixel position in the vertical direction (vertical direction) of the pixel region 101 The non-uniformity of the signal saturation amount can be reduced.

  Even when a voltage high enough to deplete the pixel isolation region 306 is applied to the connection electrode 308 (depending on the concentration of the impurity introduced into the pixel isolation region 306, for example, about 15 V), the high concentration is obtained. The P-type impurity region 310 prevents the pixel isolation region 306 from being depleted. Therefore, the solid-state imaging device 1 according to the present embodiment can maintain a path through which holes generated in the PD pass to the peripheral portion of the element and can avoid the sensor unit 104 from being in a floating state, so that the readout voltage varies. It is possible to prevent the deterioration of characteristics.

Furthermore, in a general solid-state imaging device, when a positive voltage is applied to the connection electrode 308, the potential below the connection electrode 308 changes. In particular, as shown in FIG. 3, when the connection electrode 308 is formed over the N ⁺ type impurity region 303 and the pixel isolation region 306, the N ⁺ type is caused by the difference in impurity concentration. A large difference occurs between the potentials of the impurity region 303 and the pixel isolation region 306, and a strong electric field is generated. This strong electric field generates hot electrons. The generated hot electrons become a noise component of the CCD type solid-state image pickup device and cause deterioration in image quality.

  On the other hand, since the solid-state imaging device 1 according to the present embodiment includes the high-concentration P-type impurity region 310, potential fluctuations below the connection electrode 308 to which a positive voltage is applied can be suppressed. Therefore, according to the solid-state imaging device according to the present embodiment, the generation of hot electrons can be suppressed and the image quality deterioration of the CCD solid-state imaging device can be prevented.

  Hereinafter, a method for manufacturing the solid-state imaging device 1 according to the present embodiment will be described with reference to FIGS. 5A to 5C.

  5A to 5C are schematic process diagrams showing a method for manufacturing the solid-state imaging device shown in FIG. 5A to 5C, the left column shows a cross-sectional view taken along line AA ′ (pixel vertical separation portion) in FIG. 2, and the right column shows a cross-sectional view taken along line BB ′ in FIG. Yes.

<A: N ⁺ type impurity region forming step>
Referring to FIG. 5A (a), a semiconductor substrate 301 on which a P-type well region 302 is formed is prepared, and a gate insulating film 307 is formed on the surface of the semiconductor substrate 301 by a thermal oxidation method or the like. For example, the gate insulating film 307 is a silicon oxide film. The film thickness of the gate insulating film 307 is, for example, 20 nm.

After the gate insulating film 307 is formed, a photoresist is formed on the surface of the gate insulating film 307. Then, as shown by a two-dot chain line in FIG. 5A (a), a part of the photoresist is exposed so that a part of the surface of the gate insulating film 307 where the N ⁺ -type impurity region 303 of the PD is to be formed is exposed. Is selectively removed.

Next, an N-type impurity such as arsenic (As) is introduced into the semiconductor substrate 301 by ion implantation. As ion implantation conditions in this step, for example, the implantation energy is set to 500 keV, and the dose is set to 2 × 10 ¹² ions / cm ² . Thereby, an N ⁺ type impurity region 303 constituting the PD is formed.

<B: Pixel separation region forming step>
Next, after completely removing the photoresist used in the step of forming the N ⁺ -type impurity region 303, a photoresist is formed on the entire surface of the gate insulating film 307. Then, as indicated by a two-dot chain line in FIG. 5A (b), a part of the photoresist is selectively removed so that a portion where the pixel isolation region 306 is to be formed is exposed on the surface of the gate insulating film 307. To do.

Thereafter, using the photoresist as a mask, a P-type impurity such as boron (B) is introduced into the semiconductor substrate 301 by ion implantation. As implantation conditions in this step, for example, the implantation energy is set to 30 keV, the dose amount is set to 5 × 10 ¹² pieces / cm ² , the implantation energy is set to 200 keV, and the dose amount is set to 3 × 10 ¹² pieces / cm ² . By this step, a pixel separation region 306 that functions to separate adjacent PDs 201 from each other is formed.

<C: Charge transfer region forming step>
Next, after completely removing the photoresist used in the pixel isolation region forming step, a photoresist is formed on the entire surface of the gate insulating film 307. Then, as indicated by a two-dot chain line in FIG. 5A (c), a part of the photoresist is selectively selected so that portions where the charge transfer regions 202a and 202b are to be formed are exposed on the surface of the gate insulating film 307. To remove.

Thereafter, N-type impurities such as arsenic (As) are introduced into the semiconductor substrate 301 by ion implantation using the photoresist as a mask. As implantation conditions in this step, for example, the implantation energy is set to 200 keV, and the dose is set to 4 × 10 ¹² pieces / cm ² . By this step, charge transfer regions 202a and 202b for transferring charges to the horizontal transfer register are formed.

<D: High-concentration P-type impurity formation step>
Next, after completely removing the photoresist used in the charge transfer region forming step, a photoresist is formed on the entire surface of the gate insulating film 307. Then, as shown by a two-dot chain line in FIG. 5A (d), a part of the photoresist is selected so that a portion where the high-concentration P-type impurity region 310 is to be formed is exposed on the surface of the gate insulating film 307. To remove.

Thereafter, a P-type impurity such as boron (B) is introduced into the semiconductor substrate 301 by ion implantation. As implantation conditions in this step, for example, the implantation energy is set to 20 keV, and the dose is set to 2 × 10 ¹³ pieces / cm ² . By this step, a high concentration P-type impurity region 310 that suppresses an increase in resistance of the pixel isolation region 306 and potential fluctuation is formed.

<E: Electrode forming step 1>
Referring to FIG. 5B, after the photoresist used in the high concentration P-type impurity forming step is completely removed, polycrystalline silicon is deposited on gate insulating film 307 by a CVD method or the like. The film thickness of the polycrystalline silicon is, for example, 300 nm. Next, after forming a photoresist on the entire surface of the polycrystalline silicon film, except for a region where the transfer electrode 204 (FIG. 2) and the connection electrode 309 are to be formed, the photoresist is formed. Selectively remove some.

  Thereafter, using the formed photoresist as a mask, a part of the polycrystalline silicon film is removed by, for example, RIE (Reactive Ion Etching), and the connection electrode 309 shown in FIG. 5B (e) and the structure shown in FIG. A transfer electrode 204 is formed.

<F: Insulating film forming step>
Next, after completely removing the photoresist used in the electrode formation step 1, as shown in FIG. 5B (f), an insulating film 305 is formed on the surface of the connection electrode 309 by a thermal oxidation method or the like. The insulating film 305 is formed in order to electrically isolate the connection electrode 309 from other portions, and the film thickness thereof is, for example, 50 nm.

<G: Electrode forming step 2>
Next, polycrystalline silicon is deposited on the surface of the gate insulating film 307 by a CVD method or the like. The thickness of the polycrystalline silicon film is, for example, 300 nm. Next, after forming a photoresist on the entire surface of the polycrystalline silicon film, except for the region where the transfer electrode 203 (FIG. 2) and the connection electrode 308 are to be formed, Parts are selectively removed.

  Thereafter, using the formed photoresist as a mask, a part of the polycrystalline silicon is removed by, for example, RIE to form the connection electrode 308 shown in FIG. 5B (g) and the transfer electrode 203 shown in FIG. .

<H: P ⁺ impurity region forming step>
Next, after completely removing the photoresist used in the electrode forming step 2, a photoresist is formed on the gate insulating film 307. Next, a part of the photoresist is selectively removed so that a part of the surface of the gate insulating film 307 where the P ⁺ -type impurity region 304 constituting part of the PD is to be formed is exposed.

Thereafter, a P-type impurity such as boron (B) is introduced into the semiconductor substrate 301 by ion implantation. As ion implantation conditions in this step, the implantation energy is set to 10 keV, and the dose is set to 5 × 10 ¹⁴ ions / cm ² . By this step, as shown in FIG. 5B (h), a P ⁺ type impurity region 304 constituting a part of the PD is formed.

<I: Interlayer insulating film / light shielding film forming step>
Referring to FIG. 5C, after completely removing the photoresist used in the P ⁺ -type impurity region forming step, gate insulating film 307, transfer electrodes 203 and 204 (FIG. 2), connection electrode 308, insulating film An interlayer insulating film 311 is formed so as to cover 305. The interlayer insulating film 311 is, for example, a silicon oxide film.

  Next, for example, a tungsten film is formed on the surface of the interlayer insulating film 311. After the photoresist is formed on the tungsten film, a part of the photoresist is selectively removed except for the region where the light shielding film 312 is to be formed.

  Thereafter, using the formed photoresist as a mask, a part of the tungsten film is selectively removed by, for example, RIE, thereby forming a light shielding film 312 as shown in FIG. 5C (i).

  As described above, according to the manufacturing method according to the present embodiment, the high concentration P-type impurity region 310 is formed on the surface of the pixel isolation region 306 below the connection electrode 308 to which a positive voltage is applied. The solid-state imaging device 1 can be formed. As described above, the solid-state imaging device 1 suppresses an increase in the resistance of the P-type pixel isolation region 306 due to the elimination of holes below the connection electrode 308 even when a positive voltage is applied to the connection electrode 308. can do.

  Further, in the conventional solid-state imaging device, when a voltage high enough to deplete the P-type pixel isolation region 306 (which varies depending on the impurity concentration of the pixel isolation region 306, for example, 15 V) is applied to the connection electrode 308. Since the inside of the pixel is in a floating state, the readout voltage varies. On the other hand, since the solid-state imaging device according to the present embodiment includes the high-concentration P-type impurity region 310, depletion of the pixel isolation region 306 can be prevented, and as a result, fluctuations in readout voltage can be suppressed. It becomes.

  Furthermore, generally, when a positive voltage is applied to the connection electrode 308, the potential below the connection electrode 308 varies. The strong electric field caused by the potential fluctuation leads to generation of hot electrons. Hot electrons become a noise component of a CCD type solid-state imaging device and cause deterioration in image quality. On the other hand, the solid-state imaging device according to this embodiment can suppress the potential fluctuation below the connection electrode 308 by the high-concentration P-type impurity region 310, thereby suppressing the generation of hot electrons and causing the hot electrons. It is possible to prevent image quality deterioration.

  In the solid-state imaging device according to the present embodiment, the positive voltage applied to the connection electrode 308 is applied to the semiconductor substrate 301 so as to spread in a direction parallel to the surface of the semiconductor substrate 301. Therefore, it is more preferable that the high-concentration P-type impurity region 310 is formed to extend not only immediately below the connection electrode 308 but also below the adjacent connection electrode 309. When the high-concentration P-type impurity region 310 is also formed below the connection electrode 309, it is possible to further suppress the influence caused by applying a positive charge to the connection electrode 308.

(Second Embodiment)
FIG. 6 is a cross-sectional view of a solid-state imaging device according to the second embodiment of the present invention. 6 corresponds to a cross-sectional view taken along line BB ′ of FIG.

  Since the basic configuration of the solid-state imaging device 2 according to the present embodiment is the same as that according to the first embodiment, the following description focuses on the differences between the present embodiment and the first embodiment. Explained.

  Referring to FIG. 6, the width W1 of the high concentration P-type impurity region 310 in the row direction is set to be smaller than the interval W2 between the pair of charge transfer regions 202a and 202b adjacent in the same direction. Therefore, a gap is formed between the high concentration P-type impurity region 310 and the charge transfer region 202 in the row direction.

  The solid-state imaging device 2 having such a configuration can avoid the following problems. First, when the high-concentration P-type impurity region 310 is formed so that the charge transfer regions 202a and 202b overlap, the maximum amount of charge that can be accumulated in the charge transfer regions 202a and 202b decreases. Next, when the high-concentration P-type impurity region 310 is formed so as to be in contact with the charge transfer regions 202a and 202b, the high-concentration P-type impurity region 310 has a potential at the contact point with the charge transfer regions 202a and 202b. Change (specifically, the potential of the contact point decreases). As a result, the maximum amount of charge that can be transferred by the charge transfer regions 202a and 202b decreases, and the charge transfer efficiency deteriorates.

  On the other hand, according to the configuration shown in FIG. 6, the above-described problems can be avoided, so that the characteristics of the solid-state imaging device 1 according to the present embodiment can be further improved.

  FIG. 7 is a diagram illustrating one process of the method for manufacturing the solid-state imaging device according to the second embodiment of the present invention.

  The manufacturing method of the solid-state imaging device 2 according to this embodiment is the same as the manufacturing method according to the first embodiment, except for the step (high concentration P-type impurity region forming step) shown in FIG. 5A (d). . Therefore, in the following, only the high concentration P-type impurity forming step will be described in detail.

<D: High-concentration P-type impurity formation step>
After completely removing the photoresist used in the charge transfer region forming step (FIG. 5A (c)), a photoresist is formed on the entire surface of the gate insulating film 307. Then, as indicated by a two-dot chain line in FIG. 7, a part of the photoresist is selectively removed so that a portion where the high concentration P-type impurity region 310 is to be formed is exposed on the surface of the gate insulating film 307. To do. At this time, the width W3 of the opening Ap in the row direction is set to be smaller than the interval W2 between the adjacent charge transfer regions 202 in the same direction. Thereafter, using the formed photoresist as a mask, a P-type impurity such as boron (B) is introduced into the semiconductor substrate 301 by ion implantation to form a high concentration P-type impurity region 310.

  The interval c between the high-concentration P-type impurity region 310 and the charge transfer region 202 varies depending on the implantation conditions (implantation energy and dose) of the P-type impurity. The injection conditions are set so that c is 0.1 μm.

  As described above, the solid-state imaging device 2 according to the present embodiment can achieve the same effects as those according to the first embodiment. In addition, in the solid-state imaging device 2 according to the present embodiment, the high-concentration P-type impurity region 310 is formed with a gap between the high-density P-type impurity region 310 and the charge transfer region 202. Interference with the transfer region 202 (that is, potential fluctuation of the charge transfer region 202 caused by the high concentration P-type impurity region 310) can be suppressed. Therefore, according to the solid-state imaging device 2, it is possible to avoid a reduction in the charge transfer efficiency of the charge transfer region 202 by avoiding a decrease in the maximum charge amount that can be accumulated in the charge transfer region 202. .

(Third embodiment)
The configuration of the solid-state imaging device 3 according to this embodiment is the same as that according to the first embodiment, but the manufacturing method is different from that according to the first embodiment. Below, it demonstrates focusing on the manufacturing method of the solid-state imaging device concerning this embodiment.

  FIG. 8 is a schematic process diagram showing a method of manufacturing a solid-state imaging device according to the third embodiment of the present invention. 8 corresponds to a cross-sectional view taken along line A-A ′ shown in FIG. 2.

<A: N ⁺ type impurity region forming step>
First, as shown in FIG. 8 (a), the semiconductor substrate 301 having a P-type well region 302 to form a P ⁺ -type impurity regions 304. Since the process of forming the P ⁺ -type impurity region 304 is the same as the corresponding process of the first embodiment (FIG. 5A (a)), description thereof is omitted here.

<B: Pixel separation region forming step and transfer region forming step>
Next, as shown in FIG. 8B, a pixel isolation region 306 and a charge transfer region 202 (broken line) are formed. Since the pixel isolation region forming step and the charge transfer region forming step are the same as the corresponding steps of the first embodiment (FIGS. 5A (b) and 5A (c), respectively), description thereof is omitted here.

<C: Electrode forming step 1>
After completely removing the photoresist used in the transfer region forming step, polycrystalline silicon is deposited on the gate insulating film 307 by a CVD method or the like. The film thickness of polycrystalline silicon is, for example, 300 nm. Next, a photoresist is formed on the entire surface of the polycrystalline silicon film, and a portion of the photoresist is formed except for the region where the transfer electrode 204 (FIG. 2) and the connection electrode 309 are to be formed. Parts are selectively removed.

  Thereafter, using the formed photoresist as a mask, a part of the polycrystalline silicon film is removed by, for example, RIE to form the connection electrode 309 shown in FIG. 8C and the transfer electrode 204 shown in FIG. To do.

<D: High-concentration P-type impurity region forming step>
Next, after the photoresist used in the electrode forming step 1 is completely removed, a part of the photoresist is exposed so that the region where the high-concentration P-type impurity region 310 is to be formed is exposed on the surface of the gate insulating film 307. Are selectively removed, and a photoresist 714 is formed.

Thereafter, using the photoresist 714 and the connection electrode 309 as a mask, a P-type impurity such as boron (B) is introduced into the semiconductor substrate 301 by self-alignment by ion implantation. As implantation conditions in this step, for example, the implantation energy is set to 20 keV, and the dose is set to 2 × 10 ¹³ pieces / cm ² . By this step, a high concentration P-type impurity region 310 is formed. Further, the P-type impurity ions are implanted in a direction orthogonal to the surface of the semiconductor substrate 301 as indicated by an arrow in FIG.

<E: Insulating film forming step>
Next, after completely removing the photoresist 714, an insulating film 305 is formed as shown in FIG. Since this step is the same as the corresponding step (FIG. 5B (f)) of the first embodiment, a description thereof is omitted here.

<F: Electrode forming step 2>
Next, as shown in FIG. 8F, the connection electrode 308 is formed. Since this step is the same as the corresponding step (FIG. 5B (g)) of the first embodiment, description thereof is omitted here.

<G: P ⁺ type impurity region forming step>
Next, as shown in FIG. 8G, a P ⁺ -type impurity region 304 is formed. Since this step is the same as the corresponding step (FIG. 5B (h)) of the first embodiment, a description thereof is omitted here.

<H: Interlayer insulating film / light shielding film forming step>
Next, as shown in FIG. 8H, an interlayer insulating film 311 and a light shielding film 312 are formed. Since this step is the same as the corresponding step (FIG. 5C (i)) of the first embodiment, description thereof is omitted here.

  In the manufacturing method according to the present embodiment, as shown in FIG. 8D, the connection electrode 309 is used as a part of the mask and the high-concentration P-type impurity region 310 is formed by self-alignment. The high concentration P-type impurity region 706 can be formed with high accuracy. Note that the solid-state imaging device 3 manufactured by the manufacturing method according to the present embodiment can achieve the same effects as those according to the first embodiment.

(Fourth embodiment)
FIG. 9 is a diagram illustrating one process of the method for manufacturing the solid-state imaging device according to the fourth embodiment of the present invention.

  The manufacturing method according to this embodiment is the same as that according to the third embodiment except for the high concentration P-type impurity forming step. Therefore, hereinafter, the description will focus on the differences between the present embodiment and the third embodiment.

  Referring to FIG. 9, in the present embodiment, in the step of forming high-concentration P-type impurity region 310, an implantation angle is set in the implantation direction of P-type impurity ions. More specifically, the P-type impurity ions are implanted in a direction parallel to the plane Pin intersecting at a predetermined angle θ with respect to the plane Prf orthogonal to the surface of the semiconductor substrate 301 and substantially parallel to the row of sensor portions. Is done. In the present embodiment, for example, θ is set to 20 °.

  In the manufacturing method according to the present embodiment, the high-concentration P-type impurity region 310 can be formed with high alignment accuracy using the connection electrode 309 as a part of the mask, similar to the method according to the third embodiment. it can. In addition, according to the manufacturing method according to the present embodiment, it is possible to form the high-concentration P-type impurity region 310 that extends also below the connection electrode 309 by setting the ion implantation angle. Therefore, according to the manufacturing method according to the present embodiment, it is possible to realize the solid-state imaging device 4 that can further suppress the influence caused by application of positive charges to the connection electrode 308.

  In each of the above embodiments, an example of a solid-state imaging device having a single-layer electrode structure has been described. However, the present invention can be similarly applied to a solid-state imaging device having an electrode structure having two or more layers. Even when the present invention is applied to a solid-state imaging device having an electrode structure of two or more layers, the influence caused by applying a positive voltage to the transfer electrode can be suppressed as in the above embodiments.

  In the first embodiment, in the step of forming the high-concentration P-type impurity region, an implantation angle may be set at the time of implanting impurity ions as in the fourth embodiment.

  The present invention can realize a solid-state imaging device in which an increase in resistance of a pixel separation region, a fluctuation in readout voltage, a deterioration in image quality due to generation of hot electrons, and the like are suppressed. It can be used for a CCD type solid-state imaging device.

The figure which shows schematic structure of the solid-state imaging device which concerns on the 1st Embodiment of this invention. Structural plan view showing separation region between sensor part and sensor part Sectional view of the A-A 'line shown in FIG. Sectional view of the B-B 'line shown in FIG. Schematic process diagram showing manufacturing method of solid-state imaging device Schematic process diagram following FIG. 5A Schematic process diagram following FIG. 5B Sectional drawing of the solid-state imaging device which concerns on the 2nd Embodiment of this invention. The figure which shows 1 process of the manufacturing method of the solid-state imaging device which concerns on the 2nd Embodiment of this invention. Schematic process drawing which shows the manufacturing method of the solid-state imaging device which concerns on the 3rd Embodiment of this invention. The figure which shows 1 process of the manufacturing method of the solid-state imaging device which concerns on the 4th Embodiment of this invention. Sectional view of a conventional solid-state imaging device

Explanation of symbols

1-4 Solid-state imaging device 201 Photodiode (PD)
202 Charge transfer regions 203 and 204 Transfer electrode 301 N-type semiconductor substrate 302 P-type well region 303 N ⁺ -type impurity region 304 P ⁺ -type impurity region 306 Pixel isolation region 307 Gate insulating film 308 and 309 Connection electrode 310 High-concentration P-type impurity region

Claims (9)

A solid-state imaging device,
A plurality of first conductivity type photoelectric conversion regions arranged in a row direction and a column direction on a semiconductor substrate;
A second conductivity type pixel separation region for separating each of the photoelectric conversion regions;
A plurality of first conductivity type charge transfer regions extending in a column direction between the columns of the photoelectric conversion regions;
A plurality of first and second transfer electrodes alternately disposed above each of the charge transfer regions;
A plurality of first connection electrodes extending in a row direction above the pixel isolation region and connecting each of the first transfer electrodes;
A plurality of second connection electrodes extending in a row direction along each of the first connection electrodes and connecting each of the second transfer electrodes;
A solid-state imaging device comprising: a high-concentration impurity region formed on a surface of the pixel isolation region and having a higher concentration of the second conductivity type impurity than the pixel isolation region below at least a part of the first connection electrode.   The solid-state imaging device according to claim 1, wherein a positive voltage is applied to the first connection electrode. Further comprising an insulating film formed on the surface of the semiconductor substrate;
The solid-state imaging device according to claim 1, wherein the first and second transfer electrodes and the first and second connection electrodes are formed on the insulating film. .   4. The solid-state imaging device according to claim 1, wherein a width of the high-concentration impurity region in a column direction is smaller than an interval between a pair of adjacent charge transfer regions.   5. The solid-state imaging device according to claim 1, wherein the high-concentration impurity region is formed so as to extend below the second connection electrode. 6. A plurality of first conductivity type photoelectric conversion regions arranged in a row direction and a column direction on a semiconductor substrate;
A second conductivity type pixel separation region for separating each of the photoelectric conversion regions;
A plurality of first conductivity type charge transfer regions extending in a column direction between the columns of the photoelectric conversion regions;
A plurality of first and second transfer electrodes alternately disposed above each of the charge transfer regions;
A plurality of first connection electrodes extending in a row direction above the pixel isolation region and connecting each of the first transfer electrodes;
A method of manufacturing a solid-state imaging device comprising a plurality of second connection electrodes extending in a row direction along each of the first connection electrodes and connecting each of the second transfer electrodes,
Preparing a semiconductor substrate on which the photoelectric conversion region, the pixel separation region, and the charge transfer region are formed;
A step of selectively introducing a second conductivity type impurity below a region where the first connection electrode is formed to form a high concentration impurity region in which the concentration of the second conductivity type impurity is higher than that of the pixel isolation region; A method for manufacturing a solid-state imaging device. A plurality of first conductivity type photoelectric conversion regions arranged in a row direction and a column direction on a semiconductor substrate;
A second conductivity type pixel separation region for separating each of the photoelectric conversion regions;
A plurality of first conductivity type charge transfer regions extending in a column direction between the columns of the photoelectric conversion regions;
A plurality of first and second transfer electrodes alternately disposed above each of the charge transfer regions;
A plurality of first connection electrodes extending in a row direction above the pixel isolation region and connecting each of the first transfer electrodes;
A method of manufacturing a solid-state imaging device comprising a plurality of second connection electrodes extending in a row direction along each of the first connection electrodes and connecting each of the second transfer electrodes,
Preparing a semiconductor substrate on which the photoelectric conversion region, the pixel separation region, and the charge transfer region are formed;
Forming the second transfer electrode and the second connection electrode on the semiconductor substrate;
Using the second connection electrode as a part of a mask, a second conductivity type impurity is selectively introduced below a region of the pixel isolation region where the first connection electrode is formed, Forming a high-concentration impurity region having a second conductivity type impurity concentration higher than that of the pixel isolation region.   8. The second conductivity type impurity is introduced into a region whose width in the column direction is narrower than a distance between a pair of adjacent charge transfer regions in the step of forming the high concentration impurity region. The manufacturing method of the solid-state imaging device in any one of. In the step of forming the high-concentration impurity region, second ions are implanted by forming a predetermined angle with respect to a plane orthogonal to the semiconductor substrate and parallel to the row of the photoelectric conversion region. The method for manufacturing a solid-state imaging device according to claim 6, wherein a conductive impurity is introduced.

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