JP2004080455A - Reception circuit and wireless communication apparatus using same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reception circuit capable of performing automatic gain control at a high speed with high accuracy even when subjected to interference by a signal existing in an adjacent channel or a channel next to the adjacent channel and to provide a wireless communication apparatus using the same. <P>SOLUTION: The reception circuit adopting a configuration of using both an analog AGC loop and a digital AGC loop uses IIR filters 204i, 204q having a high speed and steep cut-off characteristic to form the digital AGC loop and applies feedforward control to the digital AGC loop to set each gain of digital variable gain amplifiers 202i, 202q at a high speed without being affected by FIR filters 201i, 201q having a large delay characteristic even when the reception circuit is subjected to interference due to a disturbing wave existing in the adjacent channel and a channel next to the adjacent channel. Thus, even when the reception circuit applies again digital AGC to a signal after applying the analog AGC, the setup time of the AGC is extended by a delay characteristic of the FIR filters used for a demodulation system. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a receiving circuit of a wireless communication system such as a wireless LAN and a mobile phone and a wireless communication device using the same, and is particularly suitable for use in a system requiring a high-speed AGC (Automatic Gain Control) circuit such as IEEE802.11a. The present invention relates to a receiving circuit and a wireless communication device using the same.
[0002]
[Prior art]
Reception methods in a wireless communication system are roughly divided into a superheterodyne method in which a received high-frequency signal is frequency-converted into an intermediate frequency signal and processed, and a direct conversion method in which a received high-frequency signal is directly frequency-converted into a baseband signal and processed. Separated. Among these receiving systems, the direct conversion receiver (hereinafter referred to as a direct conversion receiver) is different from the superheterodyne receiver in that external components are eliminated by an IF (intermediate frequency) stage, which is unnecessary. Therefore, it is suitable for multi-band, multi-mode receivers, etc. because of its low cost because of its small size and its relatively simple circuit configuration. For these reasons, direct conversion receivers have recently been used in many wireless communication systems.
[0003]
FIG. 3 shows a configuration of a direct conversion receiver according to a conventional example (first conventional example). In FIG. 1, a high-frequency signal received by an antenna 101 is supplied to mixer circuits 104i and 104q via a band-pass filter 102 and a low-noise amplifier 103 as one of inputs. The local signal output from the local oscillator 105 is supplied to the mixer circuit 104i as the other input, with the 90 ° phase shifter 106 shifting the phase by 90 °. The local signal output from the local oscillator 105 is directly supplied to the mixer circuit 104q as the other input. The frequency of the local signal is set to the same frequency as the high frequency signal.
[0004]
The mixer circuit 104i obtains an in-phase component I (hereinafter, referred to as an I signal) of a baseband (0 Hz) by mixing a local signal having a phase difference of 0 ° with the input high-frequency signal. The mixer circuit 104q obtains a baseband quadrature component Q (hereinafter, referred to as a Q signal) by mixing the input high-frequency signal with a local signal having a phase difference of 90 °. The I and Q signals are supplied to analog low-pass filters (hereinafter, analog LPFs) 107i and 107q.
[0005]
The analog LPFs 107i and 107q have a role of extracting only a signal of a desired band (desired channel) from the received signal. The signals in the desired band extracted by the analog LPFs 107i and 107q are adjusted in amplitude by analog variable gain amplifiers 108i and 108q and supplied directly to the AGC unit 109, and are further converted by A / D (analog / digital) converters 110i and 110q. The signal is converted into a digital signal and supplied to a digital unit 112 including a demodulation unit 111.
[0006]
The AGC unit 109 includes a detection circuit 121 that performs level detection on output signals of the analog variable gain amplifiers 108i and 108q, and a control circuit 122 that controls the gain values of the analog variable gain amplifiers 108i and 108q according to the detection levels. Automatic gain control (AGC) is performed on the analog variable gain amplifiers 108i and 108q in order to keep the input signals of the / D converters 110i and 110q at an optimum and stable level. The control circuit 122 may control the gain values of the low noise amplifier 103 and the mixer circuits 104i and 104q in some cases.
[0007]
By the way, in recent years, with the increase in signal transmission speed and the tightness of frequency resources, there is a tendency that the bandwidth of a signal is increased and the channel interval is narrowed. As described above, as the signal bandwidth increases, the analog LPFs 108i and 108q require a high cutoff frequency. Also, as the channel spacing becomes narrower, analog LPFs 107i and 107q need to have sharp and small characteristics of linear distortion (amplitude distortion and phase distortion). However, it is difficult to realize the analog LPFs 107i and 107q having a sharp cutoff characteristic and a small linear distortion in a wide band with low power consumption. It is also difficult to simultaneously obtain low noise and high linearity characteristics.
[0008]
As a measure for solving the problem of widening the bandwidth of the analog LPFs 107i and 107q, there is a conventional example (second conventional example) shown in FIG. 4, the same parts as those in FIG. 3 are denoted by the same reference numerals.
[0009]
In the direct conversion receiver according to the second conventional example, an FIR (Finite Impulse Response; finite impulse response) filters 201i and 201q and a digital signal are provided in the digital section 112 and after the A / D converters 110i and 110q. This configuration employs variable gain amplifiers 202i and 202q. The combination of the analog LPFs 107i and 107q and the FIR filters 201i and 201q obtains a cutoff characteristic required for channel selection.
[0010]
When there is a signal that interferes with a channel adjacent to the desired channel (hereinafter, referred to as an adjacent channel signal), the analog LPFs 107i and 107q have insufficient blocking characteristics, and thus the input of the A / D converters 110i and 110q. Adjacent channel signals remain in the signal. Therefore, the adjacent channel signal is reduced to a desired level by the FIR filters 201i and 201q. Then, in addition to the automatic gain control of the variable gain amplifiers 108i and 108q, the automatic gain control of the digital variable gain amplifiers 202i and 202q is performed so that the input signal level of the demodulation unit 111 becomes optimal and stable.
[0011]
Automatic gain control of the variable gain amplifiers 108i and 108q and the digital variable gain amplifiers 202i and 202q is performed by the AGC unit 109 '. The AGC unit 109 'includes an analog AGC loop for controlling the gain of the variable gain amplifiers 108i and 108q, and a digital AGC loop for controlling the gain of the digital variable gain amplifiers 202i and 202q.
[0012]
The analog AGC loop includes a detection circuit 211 that performs level detection on output signals of the analog variable gain amplifiers 108i and 108q, an A / D converter 212 that converts the detection level into a digital signal, and an output of the A / D converter 212. A control logic circuit 213 for setting an appropriate gain value based on the signal; a D / A (digital / analog) converter 214 for converting gain value data output from the control logic circuit 213 into an analog signal; The gain control circuit 215 controls the gain values of the analog variable gain amplifiers 108i and 108q in accordance with the output signal of the / A converter 214, and performs feedback control.
[0013]
The digital AGC loop includes a power detection circuit 216 that detects the output signals of the FIR filters 201i and 201q, that is, the signal strength of the input signals of the digital variable gain amplifiers 202i and 202q, and an appropriate value based on the detection value of the power detection circuit 216. It is formed of a control logic circuit 213 for setting a gain value, and a gain control circuit 217 for controlling the gain values of the digital variable gain amplifiers 202i and 202q according to the gain value data output from the control logic circuit 213. It is configured to perform control.
[0014]
As described above, in the direct conversion receiver according to the second conventional example, in order to solve the problem of widening the bandwidth of the analog LPFs 108i and 108q, the FIR filters 201i and 201q are provided after the A / D converters 110i and 110q. Digital variable gain amplifiers 202i and 202q are provided so that AGC is performed in the analog stage and then AGC is performed in the digital stage again.
[0015]
[Problems to be solved by the invention]
However, in order to obtain a steep cutoff characteristic with the FIR filters 201i and 201q, the number of stages of the FIR filters 201i and 201q must be set to be large, and as a result, the delay time of the FIR filters 201i and 201q is several μsec to several It becomes as large as about 10 μsec. If the delay time of the FIR filters 201i and 201q is large, the setup time of the AGC for obtaining an optimum gain value becomes long when an interference signal exists in an adjacent channel.
[0016]
An increase in the setup time of the AGC in this manner results in deterioration of reception quality in communication in a packet mode such as IEEE802.11a which is a wireless LAN specification. FIG. 5 shows a configuration of a training symbol of IEEE802.11a. The first 8 μsec period of the packet is called a short preamble, and it is necessary to set up the AGC during this period. If the AGC is not set up correctly during the short preamble period, a packet error may occur because the signal level cannot be set correctly.
[0017]
As is apparent from the above description, in the receiving circuit having the configuration including the digital AGC loop, especially when an interference signal exists in the adjacent channel of the desired channel or the next adjacent channel, the AGC is performed by the delay characteristics of the FIR filters 201i and 201q. For example, there is a problem that the reception quality is deteriorated in the packet mode communication because the setup time of the packet becomes long.
[0018]
The present invention has been made in view of the above problems, and a purpose thereof is to perform automatic gain control at high speed and with high accuracy even when interference is caused by a signal present in an adjacent channel or a next adjacent channel. It is an object of the present invention to provide a receiving circuit that can perform the operation and a wireless communication device using the same.
[0019]
[Means for Solving the Problems]
A receiving circuit according to the present invention comprises an analog filter for extracting a signal of a desired channel (desired band) from a signal obtained by frequency-converting a received signal, and an analog variable gain amplifying means for adjusting the amplitude of the signal extracted by the analog filter. A / D conversion means for converting an output signal of the analog variable gain amplifying means into a digital signal, an FIR filter for extracting a signal of a desired channel from the output signal of the A / D conversion means, and an FIR filter for extracting the signal of the desired channel. Digital variable gain amplifying means for adjusting the amplitude of the received signal, an IIR (Infinite Impulse Response) filter for extracting a signal of a desired channel from an output signal of the A / D conversion means, and an IIR filter extracted from the IIR filter. Digital variable gain amplifying means according to signal strength It has a configuration that includes a feed-forward control means for adjusting the gain value. This receiving circuit is used as a signal processing unit for processing a signal obtained by frequency conversion, that is, a baseband unit or a low IF unit, in a wireless communication device employing a direct conversion system or a low IF system.
[0020]
In the receiving circuit having the above configuration or a wireless communication apparatus using the same, the FIR filter is a digital filter having an impulse response that is nonzero only for a finite length, and is used to select a desired channel in combination with an analog filter. In addition to obtaining the necessary cut-off characteristics, the signal of the channel adjacent to the desired channel is reduced to a desired level. On the other hand, the IIR filter is a digital filter having an impulse response that lasts indefinitely, and although group delay distortion occurs as compared with the FIR filter, a steep cutoff characteristic can be obtained with a small number of stages and the delay time is short. Using the IIR filter, a signal of a desired channel is extracted, and gain control (feedforward control) of the digital variable gain amplifying means is performed in accordance with the signal strength, whereby interference is caused by a signal present in an adjacent channel or a next adjacent channel. Even if it is received, the gain value of the digital variable gain amplifying means can be set at high speed without being affected by the FIR filter having a large delay characteristic.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0022]
[First Embodiment]
FIG. 1 is a block diagram showing a configuration of a wireless communication device using a receiving circuit according to a first embodiment of the present invention, for example, a direct conversion type receiver.
[0023]
In FIG. 1, a high-frequency signal received by an antenna 11 is supplied as one input to each of mixer circuits 14i and 14q via a band-pass filter 12 and a low-noise amplifier 13. The local signal output from the local oscillator 15 is shifted by 90 ° by the 90 ° phase shifter 16 and supplied to the mixer circuit 14i as the other input. The local signal output from the local oscillator 15 is directly supplied to the mixer circuit 14q as the other input. In the local oscillator 15, the frequency of the local signal is set to the same frequency as the high frequency signal.
[0024]
The mixer circuit 14i obtains a baseband I (in-phase) signal by mixing the input high-frequency signal with a local signal having a phase difference of 0 °. The mixer circuit 14q obtains a baseband Q (quadrature) signal by mixing the input high-frequency signal with a local signal having a phase difference of 90 °. The I and Q signals are supplied to analog LPFs 17i and 17q.
[0025]
The analog LPFs 17i and 17q have a role of extracting only a signal of a desired band (desired channel) from the received signal. The signals in the desired band extracted by the analog LPFs 17i and 17q are adjusted in signal amplitude by analog variable gain amplifiers 18i and 18q, converted into digital signals by A / D converters 19i and 19q, and supplied to the digital unit 20. . The signals whose amplitudes have been adjusted by the analog variable gain amplifiers 18i and 18q are also supplied to the AGC unit 30.
[0026]
The digital section 20 includes FIR filters 201i and 201q for extracting a signal of a desired channel from the output signals of the A / D converters 19i and 19q, and a digital variable gain amplifier for adjusting the amplitude of the signals extracted by the FIR filters 201i and 201q. 202i, 202q; a demodulation unit 203 for demodulating I and Q signals output from the digital variable gain amplifiers 202i and 202q; and an IIR filter 204i for extracting a signal of a desired channel from output signals of the A / D converters 19i and 19q. , 204q. The FIR filters 201i and 201q and the IIR filters 204i and 204q are both low-pass filters.
[0027]
Here, the reason that the FIR filters 201i and 201q are used as the digital filters of the demodulation system is that even if the frequency of the input signal is different, the FIR filters 201i and 201q show the same delay characteristic for each frequency and have small group delay distortion. is there. The FIR filters 201i and 201q only need to have passband characteristics and delay characteristics sufficient for performing a demodulation operation.
[0028]
In the digital section 20, the FIR filters 201i and 201q are digital filters having an impulse response that is non-zero only for a finite length period. In combination with the analog LPFs 17i and 17q, the FIR filters 201i and 201q are cut off necessary to select a desired channel. In addition to obtaining the characteristic, it has the effect of lowering the signal (interference wave) of the channel adjacent / next to the desired channel to a desired level.
[0029]
On the other hand, the IIR filters 204i and 204q are digital filters having an impulse response that continues indefinitely, and although group delay distortion occurs as compared with the FIR filters 201i and 201q, a steep cutoff characteristic can be obtained with a small number of stages. Moreover, the delay time is small (high speed). As an example, while the FIR filters 201i and 201q have a large delay time of about several μsec to several tens of μsec, the delay time of the IIR filters 204i and 204q are as small as about several tens to several hundreds of nsec.
[0030]
Automatic gain control of the variable gain amplifiers 18i and 18q and the digital variable gain amplifiers 202i and 202q is performed by the AGC unit 30. That is, the AGC unit 30 includes an analog AGC loop for controlling the gain of the variable gain amplifiers 18i and 18q, and a digital AGC loop for controlling the gain of the digital variable gain amplifiers 202i and 202q.
[0031]
The analog AGC loop includes a detection circuit 301 that performs level detection on output signals of the analog variable gain amplifiers 18i and 18q, an A / D converter 302 that converts the detection level into a digital signal, and an output of the A / D converter 302. A control logic circuit 303 for setting a gain value based on a signal, a D / A converter 304 for converting gain value data output from the control logic circuit 303 into an analog signal, and an output of the D / A converter 304 A gain control circuit 305 for controlling the respective gain values of the analog variable gain amplifiers 18i and 18q according to the signal is provided to perform feedback control. Note that the gain control circuit 305 may control the gain values of the low noise amplifier 13 and the mixer circuits 14i and 14q in some cases.
[0032]
The digital AGC loop includes a power detection circuit 306 that detects the output signals of the FIR filters 201i and 201q, that is, the signal strength (signal level) of the input signals of the digital variable gain amplifiers 202i and 202q, and a detection value of the power detection circuit 306. And a gain control circuit 307 that controls each gain value of the digital variable gain amplifiers 202i and 202q in accordance with the gain value data output from the control logic circuit 303. , And feed-forward control.
[0033]
Next, the operation of the receiving circuit according to the first embodiment having the above configuration will be described. The high-frequency signal received by the antenna 11 passes through a band-pass filter 12 and a low-noise amplifier 13, and is then down-converted into baseband signals (I and Q signals) by mixer circuits 14i and 14q. From this baseband signal, interference waves outside the desired channel (desired band) are removed by the analog LPFs 17i and 17q, and only the signal component of the desired channel is extracted. Here, if the cutoff characteristics of the analog LPFs 17i and 17q are not sufficiently steep, an interference wave of an adjacent channel / next adjacent channel, that is, an interference signal remains.
[0034]
The signals extracted by the analog LPFs 17i and 17q are subjected to amplitude adjustment by analog variable gain amplifiers 18i and 18q, and then input to A / D converters 19i and 19q to be converted into digital signals. Output signals of the A / D converters 19i and 19q are input to FIR filters 201i and 201q and IIR filters 204i and 204q, respectively. In the FIR filters 201i and 201q, the signals of the adjacent channel and the next adjacent channel that have not been completely removed by the analog LPFs 17i and 17q are removed.
[0035]
The desired channel signals extracted by the FIR filters 201i and 201q are amplitude-adjusted by the digital variable gain amplifiers 202i and 202q, and then input to the demodulation unit 203 and demodulated. On the other hand, in the IIR filters 204i and 204q, interference waves (interference signals) existing in the adjacent / next adjacent channel to the desired channel are removed, and only the signal of the desired channel is extracted. The extracted signal is input to the power detection circuit 306, and the signal strength is detected. The detected signal strength is input to the control logic circuit 303.
[0036]
The signals immediately before being input to the A / D converters 19i and 19q are also input to the detection circuit 301, and the signal level is detected. The detected signal level is input to the control logic circuit 303. The control logic circuit 303 sets an appropriate gain value of the analog section based on the signal level given from the detection circuit 301, and sets an appropriate gain value of the digital section based on the signal strength given from the power detection circuit 307. I do.
[0037]
The analog gain value set by the control logic circuit 303 is converted into an analog signal by the D / A converter 304 and input to the gain control circuit 305. Under the control of the gain control circuit 305, the analog variable gain The gain values of the amplifiers 18i and 18q are adjusted. On the other hand, the digital gain value set by the control logic circuit 303 is input to the gain control circuit 307, and the gain values of the digital variable gain amplifiers 202i and 202q are adjusted under the control of the gain control circuit 307.
[0038]
As described above, the respective gain values of the analog variable gain amplifiers 18i and 18q are adjusted according to the detection level of the detection circuit 301 by the feedback control by the analog AGC loop, and the feedforward control by the digital AGC loop is performed. The respective gain values of the digital variable gain amplifiers 202i and 202q are adjusted according to the detection level of the power detection circuit 306.
[0039]
As described above, by employing a configuration in which the analog AGC loop and the digital AGC loop are used in combination, even if the cutoff frequency of the analog LPFs 17i and 17q increases with an increase in the signal bandwidth, the analog LPFs 17i and 17q increase. 17q and the FIR filters 201i and 201q can obtain the cutoff characteristics required for channel selection, so that the cutoff characteristics are sharp over a wide band and the linear distortion (amplitude distortion and phase distortion) is small. , Low power consumption, and low noise and high linearity characteristics can be simultaneously obtained.
[0040]
Moreover, in the receiving circuit of the direct conversion system according to the first embodiment, the IIR filters 204i and 204q having high-speed and steep cutoff characteristics are used for the digital AGC loop, and the digital AGC loop is set to the feedforward control. Is adopted, the digital variable gain amplifiers 202i and 202q are not affected by the FIR filters 201i and 201q having a large delay characteristic even when interference is caused by an interference wave existing in the adjacent channel / next adjacent channel. Can be set at high speed, so that the AGC setup can be speeded up.
[0041]
[Second embodiment]
FIG. 2 is a block diagram showing a configuration of a wireless communication device using a receiving circuit according to a second embodiment of the present invention, for example, a low-IF receiver.
[0042]
In FIG. 2, a high-frequency signal received by an antenna 51 is supplied to a mixer circuit 54 via a band-pass filter 52 and a low-noise amplifier 53 as one input. A local signal output from a local oscillator 55 is supplied to the mixer circuit 54 as the other input. In the local oscillator 55, the frequency of the local signal is set to a frequency higher than the frequency of the local signal in the superheterodyne system, in other words, a frequency close to the high-frequency signal.
[0043]
The mixer circuit 54 mixes the input high-frequency signal with the local signal from the local oscillator 55 to obtain an IF signal having a lower frequency than the IF signal used in the superheterodyne method, that is, a low IF signal. This low IF signal is supplied to an analog BPF (bandpass filter) 56. The analog BPF 56 has a role of extracting only a signal of a desired channel from a received signal. The signal in the desired band extracted by the analog BPF 56 is adjusted in signal amplitude by an analog variable gain amplifier 57, converted into a digital signal by an A / D converter 58, and supplied to a digital unit 60. The signal whose amplitude has been adjusted by the analog variable gain amplifier 57 is also supplied to the AGC unit 70.
[0044]
The digital section 60 includes an FIR filter 601 for extracting a signal of a desired channel from the output signal of the A / D converter 58, a digital variable gain amplifier 602 for adjusting the amplitude of the signal extracted by the FIR filter 601, and a digital variable gain amplifier 602. The demodulation unit 603 demodulates a low IF signal output from the gain amplifier 602, and an IIR filter 604 that extracts a signal of a desired channel from an output signal of the A / D converter 58. Here, the reason why the FIR filter 601 is used as the digital filter of the demodulation system is the same as that of the first embodiment. Note that both the FIR filter 601 and the IIR filter 604 are bandpass filters.
[0045]
In the digital section 60, the FIR filter 601 is a digital filter having an impulse response that is non-zero only for a finite length period. In combination with the analog BPF 56, the FIR filter 601 obtains a cutoff characteristic necessary for selecting a desired channel. , And serves to lower the signal (interference wave) of the channel adjacent / next to the desired channel to a desired level. On the other hand, the IIR filter 604 is a digital filter having an impulse response that lasts indefinitely. Although the IIR filter 604 has a group delay distortion as compared with the FIR filter 601, a sharp cutoff characteristic can be obtained with a small number of stages, and the delay time Small (fast).
[0046]
Automatic gain control of the variable gain amplifier 57 and the digital variable gain amplifier 602 is performed by the AGC unit 70. That is, the AGC unit 70 includes an analog AGC loop for controlling the gain of the variable gain amplifier 57 and a digital AGC loop for controlling the gain of the digital variable gain amplifier 602.
[0047]
The analog AGC loop includes a detection circuit 701 for level detection of an output signal of the analog variable gain amplifier 57, an A / D converter 702 for converting the detection level into a digital signal, and an output signal of the A / D converter 702. A control logic circuit 703 for setting a gain value based on the gain value, a D / A converter 704 for converting the gain value data output from the control logic circuit 703 into an analog signal, and an output signal of the D / A converter 704. And a gain control circuit 705 for controlling the gain value of the analog variable gain amplifier 57 in response to the feedback control. The gain control circuit 705 may control each gain value of the low noise amplifier 53 and the mixer circuit 54 in some cases.
[0048]
The digital AGC loop includes a power detection circuit 706 for detecting a signal strength (signal level) of an output signal of the FIR filter 601, that is, an input signal of the digital variable gain amplifier 602, and a gain value based on the detection value of the power detection circuit 706. And a gain control circuit 707 that controls the gain value of the digital variable gain amplifier 602 according to the gain value data output from the control logic circuit 703, and performs feedforward control. It has become.
[0049]
In the low-IF receiving circuit according to the second embodiment having the above-described configuration, the digital AGC loop is provided with a high-speed and steep cutoff characteristic as in the case of the direct-conversion receiving circuit according to the first embodiment. By using the IIR filter 604 and the digital AGC loop with feedforward control, the FIR having a large delay characteristic even when receiving interference due to an interfering wave existing in the adjacent channel / next adjacent channel. Since the gain value of the digital variable gain amplifier 602 can be set at high speed without being affected by the filter 601, the speed of AGC setup can be increased.
[0050]
【The invention's effect】
As described above, according to the present invention, a digital AGC loop is formed using an IIR filter having a high-speed and steep cutoff characteristic, and the digital AGC is subjected to feedforward control. Even when interference is caused by an interference wave existing in an adjacent channel, automatic gain control can be performed at high speed and with high accuracy without being affected by an FIR filter having a large delay characteristic. Can be speeded up.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a direct conversion type receiver using a receiving circuit according to a first embodiment of the present invention.
FIG. 2 is a block diagram showing a configuration of a low-IF receiver using a receiving circuit according to a second embodiment of the present invention.
FIG. 3 is a block diagram showing a configuration of a direct conversion receiver according to a first conventional example.
FIG. 4 is a block diagram showing a configuration of a direct conversion receiver according to a second conventional example.
FIG. 5 is a diagram illustrating a configuration of a training symbol of IEEE802.11a.
[Explanation of symbols]
14i, 14q, 54: Mixer circuit, 17i, 17q: Analog LPF (low-pass filter), 18i, 18q, 57: Analog variable gain amplifier, 20, 60: Digital section, 30, 70: AGC section, 56: Analog BPF ( Band-pass filters), 201i, 201q, 601: FIR filters, 202i, 202q, 602: digital variable gain amplifiers, 203, 603: demodulators, 204i, 204q, 604: IIR filters

Claims (8)

An analog filter for extracting a signal of a desired channel from a signal obtained by frequency-converting a received signal;
Analog variable gain amplifying means for adjusting the amplitude of the signal extracted by the analog filter,
A / D conversion means for converting an output signal of the analog variable gain amplification means into a digital signal;
An FIR filter for extracting a signal of a desired channel from an output signal of the A / D conversion means;
Digital variable gain amplifying means for adjusting the amplitude of the signal extracted by the FIR filter;
An IIR filter for extracting a signal of a desired channel from an output signal of the A / D conversion means;
A receiving circuit comprising: a feedforward control unit that adjusts a gain value of the digital variable gain amplifying unit according to the strength of a signal extracted by the IIR filter. The receiving circuit according to claim 1, further comprising:
A receiving circuit comprising feedback control means for adjusting a gain value of the analog variable gain amplifying means according to a signal level of a desired channel included in an output signal of the analog variable gain amplifying means. The receiving circuit according to claim 1, wherein the signal obtained by performing the frequency conversion is a baseband signal. 2. The receiving circuit according to claim 1, wherein the signal obtained by the frequency conversion is a low intermediate frequency signal. Frequency conversion means for performing frequency conversion of a high-frequency signal received by the antenna,
A signal processing unit that processes the signal whose frequency has been converted by the frequency conversion unit,
Demodulating means for demodulating the signal processed by the signal processing unit,
The signal processing unit,
An analog filter that extracts a signal of a desired channel from the signal whose frequency has been converted by the frequency conversion unit,
Analog variable gain amplifying means for adjusting the amplitude of the signal extracted by the analog filter,
A / D conversion means for converting an output signal of the analog variable gain amplification means into a digital signal;
An FIR filter for extracting a signal of a desired channel from an output signal of the A / D conversion means;
Digital variable gain amplifying means for adjusting the amplitude of the signal extracted by the FIR filter;
An IIR filter for extracting a signal of a desired channel from an output signal of the A / D conversion means;
A wireless communication apparatus comprising: a feedforward control unit configured to adjust a gain value of the digital variable gain amplifying unit in accordance with an intensity of a signal extracted by the IIR filter. The signal processing unit further includes:
6. The radio communication apparatus according to claim 5, further comprising feedback control means for adjusting a gain value of the analog variable gain amplifying means in accordance with a signal level of a desired channel included in an output signal of the analog variable gain amplifying means. . The wireless communication device according to claim 5, wherein the frequency conversion unit frequency-converts the high-frequency signal into a baseband signal. 6. The wireless communication apparatus according to claim 5, wherein the frequency conversion unit frequency-converts the high-frequency signal to a low intermediate frequency signal.

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