JP2002313859A - Nondestructive inspection method and device and semiconductor chip - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an inspection method by which resistance increasing defects including disconnection and leakage defects including short-circuits of a semiconductor device are efficiently detected. SOLUTION: Leakage defects 8 including short circuits and resistance increasing defects 28 including disconnection can be inspected in a nondestructive and noncontact way, by detecting a magnetic flux 11 inducted by an OBIC current 6 which is generated when a p-n junction 1 both ends of which are short-circuited by a conductor 600 is irradiated with a laser beam 2 by a fluxmeter 12. Inspection in process of the previous step can be performed by using a path inside a chip or a wafer substrate and a conductive film adhered to the top surface of the wafer substrate as a current path of the OBIC current 6. Inspection of a mounted chip can be performed by using the path inside the chip, the wiring on the equipped circuit board or the like.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for nondestructively inspecting a semiconductor chip such as a wafer state or a mounted state during a manufacturing process, and a structure to be inspected. The present invention relates to a method and an apparatus for detecting or inspecting a disconnected portion and a semiconductor chip having a structure to be inspected. Fields requiring such a method and apparatus and a structure to be inspected can be broadly classified into a field of failure analysis technology / failure analysis technology and a field of process monitor and inspection technology, and the present invention is applicable to both technical fields. It is.

[0002]

2. Description of the Related Art Conventionally, this kind of non-destructive inspection technology is described in, for example, "Electron Microscope Q &A" edited by Shigeo Horiuchi et al., Published by Agne Jyofusha (Dec. 15, 1996), p. All 48 pages, especially 10 from the bottom
As shown in the sixth to sixth rows and in FIG. 1, as a part of the failure analysis / failure analysis of the semiconductor chip, it is used for non-destructively detecting a defective portion of the pn junction.

FIG. 15 is a diagram for explaining the principle of a conventional nondestructive inspection method. When the pn junction 1 is irradiated with the laser beam 2, pairs of electrons 3 and holes 4 are generated. This pair flows in opposite directions by the electric field of the depletion layer of the pn junction 1 and the electric field by the external power supply 5, respectively, to induce a current. The current flowing in this way is OBIC (Optical Beam Induced).
Current, hereinafter simply referred to as OBIC), is referred to as OBIC current for short. This OBIC
The current 6 is detected as a current or a change in current by an ammeter 7 connected in series to the pn junction 1. FIG.
FIG. 1 is a diagram for explaining an example of a conventional technique for detecting a defect by an OBIC current. Pn with the same configuration as FIG.
The case where the joint 18 has a defect 18 that promotes recombination is shown. When the laser beam is applied to a portion having no defect like the laser beam 21, the OBIC current flows as in the case of FIG. On the other hand, defects 18 such as laser beam 22 where the laser beam promotes recombination
When irradiating is performed, even if an electron-hole pair is generated, the pair immediately disappears due to recombination, and no OBIC current flows. Thereby, the position of a defect that promotes recombination can be specified.

The OBIC phenomenon at the pn junction is not only used for detecting a defect of the pn junction, but also disclosed in Japanese Patent Laid-Open No. 10-135413, for example. It is also used to detect disconnection points. Hereinafter, this method will be described with reference to the side view of FIG. 17 and the plan view of FIG. pn junction 1
001, 1002, and 1003 are connected in series.
A wiring is formed in parallel with each of the pn junctions,
When the wiring is disconnected due to the disconnection defect 1028, only the pn junction 1002 connected in parallel with the disconnected wiring becomes
When the laser beam is applied, a different OBIC current flows from the other pn junctions, so that the disconnected wiring can be specified.

Another conventional technique is another technique. This is Beyer, J. etal., Applied
Physics Letter (Appl. Phys. Lett.) Vol.74,
No. 19, pp. 2863-2865 (1999), for the purpose of inspecting non-uniformity of the impurity concentration of a semiconductor substrate, etc. Wafer) is used for non-destructive inspection. FIG. 19 shows the basic configuration. When the raw wafer 200 is irradiated with the laser beam 2, pairs of electrons 3 and holes 4 are generated in the raw wafer. When the impurity concentration in the raw wafer 200 is uniform, the electron-hole pairs immediately recombine and disappear. However, when the impurity concentration is non-uniform, the OBIC current 6 flows. The magnetic flux 11 generated by the current is transferred to a superconducting quantum interference device (SQUID (Superc
onducting Quantum Interference Device) (hereinafter simply referred to as SQUID).

[0006]

The above-mentioned prior art has the following problems.

In the first prior art, first, in order to detect a change in current, an electrical connection is required between an inspection device and a semiconductor chip. There is a problem that inspection cannot be performed until after the completion of the bonding pad is completed.

After the bonding pad is completed,
That is, after the post-process is completed, inspection can be performed, but even in such a case, there are many combinations of electrical connections, and a large number of steps and costs are required for preparation for connection. In this prior art, since it is not effective unless the location where the defect exists and the ammeter are electrically connected in series, in order to ensure that the inspection is performed, all the bonding pads that are likely to allow the OBIC current to flow are required. It is necessary to connect an ammeter electrically to the. Usually Figure 1
As shown in FIG. 6, it is detected that the OBIC current flows between the two terminals. However, since the combination of the two terminals increases almost in proportion to the square of the number of the bonding pads, the number of combinations increases as the number of the bonding pads increases. Number. In order to prepare such a connection each time the type of the target chip changes, it is necessary to prepare a dedicated jig or change the connection, which requires a great deal of cost and man-hour.

Further, as described above, in addition to the increase in the number of connection combinations, the terminal is also electrically connected to other devices and components, so that the terminal is affected at the time of inspection, and the observation result is reduced. There is also a problem that the interpretation becomes complicated.
Furthermore, the possibility of deteriorating other devices and components during inspection also makes implementation after mounting extremely difficult.

A problem with the second prior art is that it is extremely difficult to apply it directly to a semiconductor chip because of its response speed. Beyer, J. et al., Applied Physics, cited in reference 2 as a second prior art.
Letter (Appl. Phys. Lett.), Vol.74, no.19, pp.2863-
According to 2865 (1999), the observation target is the OBIC current on a raw wafer, and the time constant is at most 50 microseconds (μs). I have.

On the other hand, an OBIC current transiently generated in a semiconductor chip is generated unless the current is taken out to the outside.
In many cases, the attenuation is extremely fast as compared with 50 μs.
The reason why the OBIC current generated in the semiconductor chip is often extremely rapidly attenuated is that the structure of the elements and wirings in the semiconductor chip is often designed to enable high-speed operation. Specifically, in many cases, the CR time constant determined by the values of the capacitance C and the resistance R is designed so as to provide the highest performance of the semiconductor chip. For this reason, the OBIC current generated in the semiconductor chip often attenuates by about the time constant. This time constant is, for example, a semiconductor chip operating at 1 GHz, in order to detect an OBIC current that decays faster than about 1 nanosecond (ns) and faster than about 1 ns, the response frequency of the SQUID magnetometer is also 1 GHz.
More than z is required. At present, SQUID magnetometers that are economically available cannot detect such fast decaying magnetic flux. For example, the upper limit of the response frequency of the most practical high-temperature superconducting DC-SQUID magnetometer at present is about 1 MHz.

The above is the problem of the technology on which the present invention is based. Problems from the needs side will be described below.

[0013] In the flow from the semiconductor device being manufactured in the wafer process to the market, with the conventional inspection method,
It is the wafer probing test after the formation of the bonding pads in the final stage of the wafer process that can determine the quality of each chip. However, it is difficult to make a plan for development and production if the yield is first determined at this stage. Therefore, various types of monitoring are performed during the wafer process to estimate the yield. In particular, in recent years, attention has been paid to the use of pattern defect inspection methods or
This is a method called a defect inspection method or the like (hereinafter, a pattern defect inspection method). In this method, the size, form, frequency, distribution, and the like of a foreign substance or a defect can be known by utilizing reflection / scattering at the time of laser beam irradiation and secondary / reflected electron emission at the time of electron beam irradiation. This is monitored for the state of the wafer process and used for process improvement and yield prediction. However, this pattern defect inspection method has drawbacks derived from its principle. That is, observations related to electrical characteristics of transistors, wirings, and the like that constitute devices are not performed. It is merely observing physical foreign matter and shape anomalies. For this reason,
Judgment of the quality of the completed device chip must be indirect.

SUMMARY OF THE INVENTION It is an object of the present invention to overcome the barriers of the conventional non-destructive inspection method and apparatus for semiconductor chips, such as the limitation of the scope of application and the restriction on performance, and a new inspection method and apparatus and the related inspection method. An object of the present invention is to provide a semiconductor chip having a structure, thereby contributing to improvement in productivity and reliability of the semiconductor chip.

Specifically, the range of application can be further expanded by combining two techniques conventionally performed using the OBIC phenomenon. More specifically, in order to observe the technology conventionally used for detecting a pn junction-related defect or a disconnection of a wiring in a semiconductor chip and to observe the non-uniformity of impurity concentration in a conventional raw wafer. Combining the non-contact technologies used for semiconductor chips, the technology that can inspect the contact of semiconductor chips is also provided. Inspection such as sorting can be performed electrically.

Also, in the inspection after the completion of the bonding pad, it is possible to perform an efficient inspection without selecting a pad. Further, it enables inspection and failure / failure analysis in a state of being mounted on a circuit board.

[0017]

According to the nondestructive inspection method of the present invention, a laser beam having a wavelength within a range of 300 nm or more and 1200 nm or less is generated, and a laser beam focused to a predetermined beam diameter is generated. The first step and the laser beam are applied to at least the pn junction of the semiconductor chip having the pn junction formed in the substrate including the wafer state and the mounting state during the manufacturing process to be inspected and the vicinity thereof. A second step in which a current path for passing an OBIC current generated by the OBIC phenomenon when a predetermined electric connection means is provided, and a third step of scanning a predetermined area of the semiconductor chip while irradiating the laser beam And the magnetic flux induced by the OBIC current generated by the laser beam at each irradiation point scanned in the third step. Means for detecting, and presence or absence of a leak defect including a disconnection defect or a short-circuit defect in the current path including the irradiation point of the semiconductor chip based on the magnetic flux detected in the fourth step. And a fifth step of determining

At this time, a CR delay circuit comprising a capacitor C and a resistor R may be included in the current path.

Further, the electrical connection means includes a pn
The conductive film may be a conductive film adhered to the entire upper surface side of the substrate of the semiconductor chip having at least one contact hole opened in the diffusion layer region forming the junction.

In the fifth step, when the magnetic flux detected in the fourth step is equal to or more than a predetermined standard value at the irradiation point where a current path for the OBIC current is not formed in a normal state, the irradiation point is included It is determined that there is a leak defect including a short-circuit defect in the current path, and the magnetic flux detected in the fourth step is less than a predetermined standard value at the irradiation point where a current path for the OBIC current is formed in a normal state. At this time, it can be determined that there is an increased resistance defect including a disconnection defect in the current path including the irradiation point.

Further, the laser beam may scan the semiconductor chip while keeping the relative positional relationship between the irradiation point where the laser beam is most focused and the magnetic flux detecting means for detecting the magnetic flux fixed. Good.

The first end of the conductive film adhered to the entire upper surface of the substrate on which the pn junction of the semiconductor chip is formed, and the second end provided on the lower surface facing the upper surface are formed by the above-mentioned method. As the OBIC current extracting portion, the first end portion and the second end portion can be connected by the predetermined connection means. At this time, the conductive film adhered to the entire upper surface side of the substrate of the wafer is preferably a film adhered during the manufacturing process. The second end is a region not including the first end, which is divided into two by a region dividing straight line passing through the center of the planar shape of the substrate and connecting the center and the first end. Can be provided.

Also, the semiconductor chip to be inspected is mounted on a circuit board together with other devices, and the current path of the OBIC current is either alone in the semiconductor chip or the semiconductor chip and the circuit board. It can also be configured to include the above. At this time, it is preferable that the current path is short-circuited at two points on the circuit board by a predetermined connecting means so that the generated magnetic flux does not cancel each other as much as possible. Further, in the current path on the circuit board, the position of the magnetic flux detecting means is fixed at a position where the generated magnetic flux does not cancel each other as much as possible, and the semiconductor chip to be inspected is scanned with the laser beam. You may make it.

Further, the semiconductor chip to be inspected may include all the region to be inspected and the current path in the semiconductor chip.

Further, the semiconductor chip to be inspected may include a bonding pad, and the current path may make a round of the semiconductor chip between the bonding pad and an edge of the semiconductor chip.

Preferably, the magnetic flux detecting means is constituted by a superconducting quantum interference device including a high-temperature superconducting type DC superconducting quantum interference device.

A seventh step of generating luminance information or color information corresponding to the magnetic flux of each irradiation point detected in the fourth step and storing the luminance information or color information in the storage means together with the coordinate information of each irradiation point; The method may further include an eighth step of displaying an image of a predetermined region of the semiconductor chip corresponding to each of the irradiation points based on the color information.

The wavelength of each of the first semiconductor chip and the second semiconductor chip including the wafer state and the chip state to be inspected is 300 nm or more and 1200 nm.
a first step of generating a laser beam within a range of not more than m and generating a laser beam condensed to a predetermined beam diameter, and forming the laser beam in a substrate of the semiconductor chip to be inspected. A second step of preparing a current path for passing an OBIC current generated by the OBIC phenomenon when the n-junction and its vicinity are irradiated by a predetermined connection means, and A third step of scanning a predetermined area, a fourth step of detecting magnetic flux induced by the OBIC current generated by the laser beam at each irradiation point scanned in the third step by magnetic flux detection means,
A fifth step of determining, based on the magnetic flux detected in the fourth step, the presence or absence of a leak defect including a resistance increase defect including a disconnection defect or a short-circuit defect in the current path including the irradiation point of the semiconductor chip; A seventh step of converting the information into luminance information or color information based on the magnetic flux of each irradiation point, generating the information, and storing the generated information in the storage unit together with the coordinate information of each irradiation point.
And the first image information of the first semiconductor chip and the second image of the second semiconductor chip, each including the luminance information or color information stored in the seventh step and the coordinate information of the irradiation point. A ninth step of generating and storing difference image information from the information and a tenth step of displaying the difference image information may be included.

At this time, at least one of the first semiconductor chip and the second semiconductor chip is a different semiconductor chip that is a non-defective product and has the same configuration, and furthermore, each of the predetermined semiconductors that scans while irradiating the laser beam. It is desirable that the regions have the same configuration. Alternatively, the first semiconductor chip and the second semiconductor chip are the same semiconductor chip, and the predetermined area scanned while irradiating the laser beam is also the same, and the electrical state of the predetermined area is one of: It may be in a normal state and the other may be in an inspected state.

Further, the nondestructive inspection apparatus of the present invention comprises a light source for generating laser light having a wavelength in a range of 300 nm or more and 1200 nm or less, a laser beam having a predetermined beam diameter by condensing the laser light. A laser beam generating unit for generating a laser beam, a laser beam scanning unit for scanning a predetermined area of a semiconductor chip including a wafer state and a mounting state to be inspected while irradiating the laser beam, and a substrate for the semiconductor chip. Pn formed in
And a magnetic flux detecting means for detecting a magnetic flux induced by an OBIC current generated by the OBIC phenomenon when the bonding and the vicinity thereof are irradiated.

Further, the first fixing means for fixing the relative positional relationship between the irradiation point where the laser beam is most narrowed and the magnetic flux detecting means for detecting the magnetic flux, or the position of the magnetic flux detecting means is determined by the circuit. The current path on the substrate may further include a second fixing means for fixing the generated magnetic flux to an optimum detection position where the generated magnetic flux does not cancel each other as much as possible.

Preferably, the magnetic flux detecting means is constituted by a superconducting quantum interference device including a high-temperature superconducting type DC superconducting quantum interference device.

[0033] Further, based on the magnetic flux of each irradiation point detected by the magnetic flux detection means, brightness information or color information corresponding to the magnetic flux is generated and stored together with the coordinate information of each irradiation point. An image display means for displaying an image of a predetermined area of the semiconductor chip corresponding to each of the irradiation points based on the luminance information or the color information may be further included.

Further, the storage means is image information including at least luminance information or color information corresponding to a magnetic flux of each irradiation point in a predetermined area of the semiconductor chip, and coordinate information of each irradiation point. The image processing apparatus may further include a difference image generation unit that has a plurality of pieces of the image information whose predetermined regions match each other, and generates difference image information between the plurality of pieces of image information.

Further, the semiconductor chip of the present invention is an OBIC
The test structure has a capacitance including a stray capacitance and a resistance including a parasitic resistance in a current path of the current.

Further, the structure to be inspected including the portion to be inspected and the current path of the OBIC current may be provided inside. At this time, C is present in the current path of the OBIC current.
An R delay circuit may be further provided.

[0037] Further, a chip having a bonding pad may be provided, and the current path of the OBIC current may go around the outside of all the bonding pads on the chip.

As described above, in the nondestructive inspection method or the nondestructive inspection apparatus of the present invention, the OBIC current generated by irradiating the pn junction with the laser beam is:
Utilizing the fact that a short-circuit point including a leak defect flows as a part of a current path and that the current induces magnetic flux. Further, in order to use the SQUID magnetometer, which is a highly sensitive magnetometer that is currently practically available, it is necessary to use a configuration in which the decay time of the OBIC current is about 1 μs or more or a steady current. This is an important requirement. For this purpose, the current path is closed or a CR delay circuit is inserted in the current path.

The basic configuration consists of a laser beam (2 in FIGS. 1 and 2), a current path (600 in FIG. 1) through which the generated OBIC current flows, and a SQUID as a means for detecting the induced magnetic flux. It has a magnetometer (12 in FIGS. 1 and 2). A resistor and a capacitor (670 and 660 in FIG. 2) for causing a CR delay may be included in the current path.

In the wafer embodiment, FIGS.
In some cases, a means for causing the generated OBIC current to flow through a current path as long as possible and generating a large amount of magnetic flux is formed in the wafer (201 and 202 in FIGS. 3 and 4). .

Further, in the embodiment on the mounting board (circuit board), another means for causing the generated OBIC current to flow through the longest possible current path may be required on the circuit board (see FIG. 1). 6, 402).

In an embodiment using a structure to be inspected exclusively for evaluation called a TEG (Test Element Group, hereinafter simply referred to as TEG), another OBIC current is generated so that the generated OBIC current flows through a current path as long as possible. The detection sensitivity can be improved by configuring the means in the semiconductor chip to be inspected (603 in FIG. 9).

In the present invention, the result of laser beam irradiation, p-
In addition to directly detecting the defect of the pn junction by the OBIC current generated at the n-junction, a short-circuit or a leak path is formed at a portion electrically connected in series with the pn junction. A leak point including a short circuit is detected by utilizing the current path formed by the OBIC current flowing. At this time, non-contact observation is enabled by detecting a magnetic flux induced by the OBIC current instead of directly detecting the current. In some cases, the detection of the magnetic flux generated by the OBIC current may be facilitated by inserting a CR delay circuit including a parasitic one in the current path.

Further, by utilizing the fact that the OBIC current decreases or stops flowing due to the occurrence of the resistance increase defect including the disconnection defect in the current path, the non-contact detection of the resistance increase defect including the disconnection defect is enabled. I have. For example, FIG.
4 is an example of a graph showing the dependence of the OBIC current value on the resistance value in the path through which the OBIC current flows, which has been confirmed by experiments by the inventor of the present invention. More specifically, an OBIC when a part of a pn junction in an LSI manufactured in a normal LSI manufacturing process is irradiated with a laser beam having a wavelength of 1064 nm from a surface side on which an element of an LSI chip is formed.
The current value is measured by changing the value of a resistor connected in series with the pn junction, and the measurement result is graphed with the horizontal axis representing the resistance value and the vertical axis representing the current value. The horizontal axis and the vertical axis are shown on a logarithmic scale. As can be seen from this figure, as the resistance in the current path through which the OBIC current flows increases, the value of the OBIC current decreases accordingly. For example, the OBIC current value when the resistance value in the path is 1 MΩ is reduced by three orders of magnitude or more than when the resistance value in the path is 100Ω. The value of the magnetic field induced by the current is proportional to the current value as shown by Biot-Savart's law. Therefore, it can be understood that a resistance increase defect including a disconnection defect in the OBIC current path connected in series with the pn junction can be easily detected as a change in magnetic flux. On the contrary, usually, O
Even when such a current path is formed due to a defect occurring where there is no BIC current path, the current path is not only about 100Ω suitable for being called a short circuit, but also 1MΩ which is more likely to be called a leak. Even in such a case, since the current value is weak (0.1 μA) that can be detected as a magnetic flux, it can be said that not only a short-circuit defect but also a leak defect can be detected.

By detecting the magnetic flux induced by the OBIC current, it is possible to detect a resistance increase defect including a disconnection defect and a leak defect including a short-circuit defect even before a bonding pad is formed. Further, even after the formation of the bonding pad, these defects can be detected without selecting a terminal. Further, even when mounted on a circuit board, it is possible to detect these defects on the semiconductor chip. Current path through which OBIC current flows or C
The means for forming the R delay circuit can be divided into several cases depending on the embodiment.

(1) In a process in which a conductive film is attached to the entire upper surface of the wafer, only the conductive film is used (FIG. 20).
(A) 210, FIG. 20 (b) 212) or one end of the conductive film on the upper surface of the wafer (201 in FIGS. 3 and 4)
And one end (2 in FIGS. 3 and 4) corresponding to the facing surface on the substrate side.
02), by setting the two potentials to the same potential, regardless of the source of the OBIC current, passing through the upper surface of the wafer, passing through a leak location including a short circuit, and a pn junction in which the OBIC current is generated, and The current path through (6 in FIGS. 3 and 4
Alternatively, the route indicated by 261 or 263 in FIG.

In the case of using a wafer on which pads have been formed, a similar form can be realized by shorting all pads with silver paste or gold foil, or shorting the front pad via a prober. In this case, As a result, the current path becomes complicated. Further, there are many cases where a current path cannot be formed, and the current path is not as efficient as described above.

When analyzing a chip that has been diced and further sealed in a package, basically the same form can be realized if the above-mentioned wafer is regarded as a chip. That is, the entire chip surface is covered with a conductive film such as a silver paste or a gold foil by exposing the upper surface of the chip or creating a gap between the chip and the package material. Further, the chip substrate side needs to be exposed at least at a place where electrical contact is required and at a place where laser irradiation is required. By adopting such a method, the cost and man-hour required for electrical connection can be significantly reduced as compared with the related art. Alternatively, all pins may be simply mounted on the short-circuited socket. However, in many cases, a current path is not formed after the pad is formed, and the inefficiency is the same as that performed after the pad is formed on the wafer. In the case where the package is already mounted, the chip to be irradiated with the laser needs to be exposed, but the chip on the SQUID side does not necessarily have to be exposed.

(2) In a mode in which a bare chip is mounted on a circuit board, depending on the position on the circuit where the defect has occurred,
There are several cases for a two-end choice. As an example,
By shorting the power supply wiring of the circuit board and the substrate potential of the chip at an appropriately selected position on the circuit board, the long circuit wiring (402 in FIG. 6) on the circuit board is included,
A current path can be made through leak locations including -n junctions and short circuits.

(3) When a TEG is formed on a chip for the purpose of monitoring the state of a process of manufacturing a semiconductor chip and selecting optimum values of design parameters and process parameters, a current path and a CR time constant are set. Can be set freely. For example, a path that goes around the scribe line along the outer periphery of the chip or a path that goes inside the scribe line and outside the bonding pad has a long path length, the path is fixed, and the magnetic flux is easily detected. This is the current path (603 in FIG. 9).

In the above cases (1) and (2), a current path is not necessarily formed by short-circuiting and a steady current is detected. As shown in FIG.
The transient current can also be detected by inserting a resistor and a capacitor in series in the current path to delay the transient current to match the response speed of the detector. In this case, if the parasitic capacitance, the parasitic resistance, or the stray capacitance is properly used, the special circuit may not be required in some cases.

As can be said in common to (1) and (2), even if no electrical connection is made to the pads and the substrate,
To some extent, a closed circuit and a CR delay circuit are formed only inside the chip, and the magnetic flux due to the OBIC current is detected (FIG. 22). In the case of a defect that can be detected in such a state, this method is most efficient.

[0053]

Next, an embodiment of the present invention will be described in detail with reference to the drawings.

First, the basic configuration of the nondestructive inspection method of the present invention will be described. FIGS. 1 and 2 are schematic diagrams for explaining the basic configuration of the nondestructive inspection method of the present invention. Each of the current paths constituting the path through which the OBIC current flows is constituted only by a conductor wiring such as a copper wire. This is an example of a case where the current path is performed and a case where the current path includes a CR delay circuit. FIGS. 1A and 2A show the case where the defect is a leak defect including a short-circuit defect (hereinafter simply referred to as a leak defect), and FIGS. 1B and 2B show that the defect is a defect. This is the case for a resistance increase defect including a disconnection defect (hereinafter simply referred to as a resistance increase defect).

First, FIGS. 1 (a) and 1 (b), FIGS.
The configuration common to all of (b) will be described. The laser beam 2, a pn junction 1 where an OBIC current is generated when the laser beam 2 is irradiated, and a conductor 600 such as a copper wire forming a current path through which the OBIC current 6 flows (FIG.
(A), (b)) or a capacitor 66 constituting a CR delay circuit
0 and a resistor 670 (FIGS. 2A and 2B).
Further, the magnetic flux 1 generated by the flow of the OBIC current 6
1 and a SQUID magnetometer 12 for detecting the same as main components. 1A and 2A, the defect 8 exists in the insulating film 9, and the electrode 10 on the insulating film and the pn
The case where one diffusion layer constituting the junction 1 is short-circuited or leaked is shown. 1 (b) and 2 (b),
The case where the resistance increase defect 28 exists in the internal wiring 15 is shown.

The nondestructive inspection method of the present invention comprises at least
A first step of generating a laser beam having a wavelength within a range of 300 nm or more and 1200 nm or less, and generating a laser beam focused to a predetermined beam diameter; and a wafer state and a mounting state where the laser beam is an inspection target. Junctions formed in a substrate of a semiconductor chip (hereinafter simply referred to as a chip) containing
A second step in which a current path for flowing an OBIC current generated by an IC phenomenon is formed by predetermined electric connection means, a third step of scanning a predetermined area of the chip while irradiating a laser beam, and the third step OBIC generated by laser beam at each irradiation point scanned by
The fourth method in which the magnetic flux induced by the current is detected by the magnetic flux detecting means
A step of determining whether there is a resistance increasing defect or a leak defect in a current path including the irradiation point of the chip based on the magnetic flux detected in the fourth step;
It is comprised including.

A non-destructive inspection apparatus 50 suitable for performing this inspection has a wavelength of 300 nm or more and 1200 nm as shown in the schematic block diagram of FIG.
Laser light source 51 that generates laser light within the following range
And an optical system 53 as a laser beam generating means for generating a laser beam 2 condensed to a predetermined beam diameter, and the laser beam 2 is formed on a chip substrate including a wafer state and a mounting state to be inspected. OBIC generated by OBIC phenomenon when irradiated to pn junction and its vicinity
SQ which is magnetic flux detecting means for detecting magnetic flux induced by current
UID magnetometer 12 and control device 5 for controlling the entire device
6, a storage device 57, a display device 58, and laser beam scanning means (not shown) for scanning a predetermined area of a chip including a wafer state and a mounting state to be inspected while irradiating the laser beam. It is configured.
The laser beam scanning means may move the wafer to be inspected or the wafer in which a plurality of chips are arranged in an aligned state mounted on an XY stage, or may move the optical system 53 on the contrary. Alternatively, a deflection mirror or the like may be provided in the optical system 53 to deflect the laser beam 2, and an appropriate means may be selected according to the purpose. In some cases, the SQUID magnetometer is scanned. As shown in FIG. 14, for example, a modulation device 52 for modulating the laser beam intensity by a modulation signal from a control device 56 and a lock-in amplifier 55 for synchronously amplifying a signal from the SQUID magnetometer 12 may be further provided. Good. Also, the first fixing means 60 for fixing the relative positional relationship between the irradiation point where the laser beam 2 is most narrowed and the SQUID magnetometer 12 for detecting the magnetic flux, or the position of the SQUID magnetometer 12 is mounted on the chip to be inspected. Although not shown, the second fixing means (not shown) for fixing to the optimum detection position on the circuit board is fixed to a housing that supports the optical system 53 or a sample table that holds the circuit board, respectively. The fine movement unit 61 may be mounted on the arm, and the SQUID magnetometer 12 may be mounted via the fine movement unit 61. SQUID using this fine movement unit 61
Can also be performed.

Next, a first embodiment of the present invention will be described in detail with reference to the drawings.

The first embodiment is an embodiment in which a resistance increase portion including a disconnection or a leak portion including a short circuit is detected during a manufacturing process in a wafer state in which a plurality of chips are arranged in an aligned state. In particular, a case where the inspection is performed in a process in which a conductive thin film for an electrode is formed on the entire surface in the uppermost layer during the manufacturing process. FIG. 3 is a cross-sectional view schematically showing a configuration of a main part including a defective portion, and FIG. 4 is a schematic perspective view showing the main configuration. FIG. 3A is a schematic cross-sectional view of the entire wafer to be inspected, and FIGS. 3B and 3C show defects and pn junctions in the case of a leak defect and the case of a resistance increase defect, respectively. It is sectional drawing which shows the detail of the part containing typically.

First, a description will be given with reference to FIG.
At this time, FIGS. 3B and 3C are referred to as needed.
The stage of performing inspection or observation is a stage in which a conductive thin film 101 for an electrode or the like adheres to the entire surface during the process of forming internal wiring on the wafer 100. FIG. 3 (a)
A narrowly focused laser beam 2 is irradiated from the back side of the wafer 100 to focus on the front side, and during the scanning, the p-type in the spot 103 where the defect and the pn junction exist in series with the defect is located. n junction (1 in FIG. 3B or FIG. 3C)
At the moment of irradiation. OB generated at this time
The path of the IC current 6 is also shown in the figure. Between B1 and B2, a conductor such as a copper wire (not shown in FIG.
0). Although the laser beam 2 is irradiated from the back side of the wafer 100 in the drawing, it may be irradiated from the front side in some cases.

Since the laser beams having wavelengths of 1064 nm and 1152 nm have little attenuation in silicon (Si), irradiation from the back surface side of the wafer to the vicinity of the chip surface can be performed. This has the advantage that the SQUID magnetometer 12 can be arranged on the wafer surface side, so that the path of the magnetometer and the OBIC current 6 are close to each other, and the detected magnetic flux is increased.

When it is easier to irradiate a laser beam from the front side, an Ar laser having a wavelength of 488 nm,
nm He-Ne laser or the like is used. The shorter the wavelength, the better the spatial resolution of the image obtained, which is advantageous.

When a laser having a wavelength of about 1200 nm or more is used, OBIC hardly occurs. For example, it is known that at a wavelength of 1300 nm, the generation of OBIC is suppressed, while there is a defect that generates a thermoelectromotive current when a defective portion is irradiated with a laser. This thermoelectromotive current value is usually about 1 nA or less,
OBIC current from 1μA to 100μ in some cases
A or more and 3 to 5 digits or more. The reason that the wavelength region of the laser is limited to 1200 nm or less in the present invention is based on the intention to actively use the OBIC current for such a reason.

In order to increase the magnetic flux generated by the OBIC current, the longer the current path, the better. The conductive thin film 101 at an arbitrary end of the wafer 100 on which the conductive thin film 101 attached to the uppermost layer is attached so that the current path is the longest.
Is a current take-out unit 201 as a first end, and the wafer 1
The lower surface side of the wafer substrate unit 102 is provided as a current extracting unit 202 which is a second end at a position symmetrical to the current extracting unit 201 with respect to the center point of 00, so as to be farthest away from the wafer. . This situation can be clearly understood from FIG. In FIG. 4, the current path is
1, 202 and the OBIC current generating portion (the portion 103 having a defect and a pn junction) are concentrated, and also spread between them. By short-circuiting between the current extracting portions 201 and 202, that is, between B1 and B2, with a conductor 600 such as a copper wire, a current path of the OBIC current is formed, a steady current flows, and the steady current generates a steady magnetic flux. Can be detected.

Further, as shown in FIG. 13C, B1-B2
By forming a current path by inserting a capacitor 660 and a resistor 670 in series between them, it is possible to delay the decay of the transient current and detect a magnetic flux due to the transient current even with a magnetic flux detector with a slow response. . The capacitance 660 and the resistance 670 are
Parasitic capacitance, stray capacitance or parasitic resistance may be used.
In addition, a conductor 60 is connected between the current extracting portions 201 and 202.
Needless to say, it is necessary to set the current path so as not to weaken the magnetic flux generated by the OBIC current 6 in the wafer substrate and the electrode material film when short-circuiting at 0. This can be achieved by, for example, extending a current path made of a conductor 600 such as a copper wire connected to the current extracting portions 201 and 202 sufficiently far from the wafer 100 and short-circuiting it at a sufficient distance from the wafer 100. There is nothing difficult about it.

As shown in FIG. 4, the path through which the OBIC current flows through the wafer substrate portion and the electrode material film is determined by the current extraction portions 201 and 202 and the OBIC current generation source (defect and p-type current source).
At the point 103) where the -n junction exists, the light is concentrated in a narrow range, but spreads midway. Since it is more efficient to detect the magnetic flux where the current path is narrow, it is more efficient to arrange the SQUID magnetometer 12 near the OBIC current generation source (in FIG. 4, the position of the SQUID magnetometer 12 is written away. There is one to make it easier to see).

Since the OBIC current generating source is always at the laser beam focal position which is the irradiation point, it is efficient to scan the wafer while keeping the relative position of the laser beam 2 and the SQUID magnetometer 12 fixed. You can see that.

Next, the operation of the first embodiment will be described with reference to the flowchart of FIG.
The description will be made with reference to 3, 14 as appropriate. Here, details of the items already described are omitted as appropriate so that the flow can be understood.

First, with the conductive thin film 101 adhered to the entire surface of the wafer 100, the conductor 6 is connected between the current extracting portions 201 and 202 of the wafer 100, ie, between B1 and B2.
Short-circuit at 00. Next, the distance between the wafer 100 and the SQUID magnetometer 12 is determined. In general, it is advantageous to approach as close as possible because the detected magnetic flux becomes large. Wafer 10
In the case where the space between 0 and the SQUID magnetometer 12 is vacuum, it can be made as close as possible without contact. 0.1mm
The degree can be easily approached.

Next, the laser beam generated by the predetermined laser light source 51 is condensed to obtain a laser beam 2 having a predetermined beam diameter.
To focus the laser beam 2 on the wafer at a position where the pn junction is located.

Next, the SQUID magnetometer 12 is
By moving the laser beam in a plane parallel to the plane of 0, the relative position between the focal position of the laser beam and the center of the SQUID magnetometer 12 is adjusted to the position where the detected magnetic flux intensity is expected to be maximum, and fixed by the first fixing means 60. I do. The position at which the detected magnetic flux intensity is expected to be maximum is usually such that the distance between the surface including the current path and perpendicular to the magnetic flux detection surface and the center of the SQUID magnetometer 12 is about the distance h between the wafer 100 and the SQUID magnetometer 12. It is far away. In the case of the present embodiment, the focus position of the laser beam where the width of the current path becomes narrow and the position of the SQUID magnetometer 12 are viewed in a perspective view (FIG. 4), and are perpendicular to the straight line connecting the current extraction units 201 and 202. Is set to be about this distance h.

Next, the wafer is moved and the laser beam 2
Starts scanning of the wafer. A magnetic flux is detected for each irradiation point, and luminance information or color information is generated in accordance with the detected magnetic flux. It is also displayed on the display device 58 based on the information or the color information. This is sequentially repeated. The signal-to-noise ratio (S
/ N) is not sufficient, the modulator 52 controls the controller 5
The S / N can be greatly improved by modulating the intensity of the laser beam 2 with the modulation signal from 6 and amplifying the signal with the lock-in amplifier 55 in synchronization with the modulation signal. The display position of the detected magnetic flux is the laser beam irradiation position on the wafer,
Therefore, it corresponds to the OBIC current generation position, and the obtained image (hereinafter, referred to as a scanning laser SQUID image) is
This indicates the BIC current generation position. Further, the specific OBIC current generation position on the wafer can be easily determined by detecting the reflected light of the laser beam with a photodiode and displaying it as an image, that is, a laser scanning image.

Whether the OBIC current generation position is normal
The location related to the defect depends on the type of the observation process. In the case where observation is performed in a process in which the electrode material film 111 is entirely adhered on the insulating film as in the case of FIG. 3B, there is a leak defect immediately above the OBIC current generation position. In the case where the observation is performed in a process in which the wiring thin film 151 for forming the internal wiring is entirely adhered as in the case of FIG.
When the OBIC current is not generated or the current value is greatly reduced at the position where the OBIC current is originally generated, the internal wiring 15 connected in series with the pn junction 1
As a result, a resistance increase defect 28 has occurred. In this case, in order to recognize the resistance increase position including the disconnection, a comparison is made with a non-defective scanning laser SQUID image acquired in advance. In order to facilitate comparison, a difference image may be generated by a difference image generation unit (not shown) as shown at the end of the flow of FIG. If the non-defective image has a large variation between non-defective samples, a standard value is set in advance based on the luminance distribution of each pixel of the non-defective sample, and The quality may be determined based on the standard value. Of course, in that case, the normal product is OB
OB exceeding the predetermined standard value at the point where IC current does not flow
When the IC current flows, it is determined that there is a leak defect. Conversely, at a point where the OBIC current flows in a normal product, if it is less than the standard value, it is determined that there is a resistance increase defect including a disconnection defect.
By obtaining the difference image by taking the difference for each pixel, an image relating only to the defect can be obtained. When observation is performed in a process where FIG. 3B and FIG. 3C are mixed, it is indispensable to generate a difference image of the scanning laser SQUID image with a non-defective product. still,
The difference image generation means can be easily realized by, for example, providing the control device 56 with a microcomputer (hereinafter, referred to as an MPU) and performing processing by the MPU using software.

A position where an OBIC current which should not be generated in a normal product, or a position where an OBIC current to be generated is not generated or reduced (hereinafter referred to as OBI collectively)
In order to make it easier to see the (C abnormal position), the scanning laser SQUID image according to the present invention or a difference image thereof and the laser scanning image may be superimposed and displayed. By recognizing the OBIC abnormal position on a chip-by-chip basis, a defective chip can be detected, and the yield can be predicted in advance. Further, by recognizing the detailed position inside the chip, a failure / failure analysis can be performed, and information leading to improvement in the manufacturing process and design can be obtained.

Incidentally, even in the same chip, a non-defective product may be in a defective state by changing the temperature at the time of observation. in this case,
If the words "good" and "defective" are read as "good" and "defective", the above description holds true.

Recognizing a defective chip before forming a bonding pad has been extremely difficult with the conventional method. Therefore, by using this method,
It is possible to accurately predict the yield, which is extremely difficult with the conventional method. Precise yield prediction enables accurate cost prediction and accurate delivery date prediction.

When it is necessary to recognize a detailed position inside a chip for the purpose of failure analysis or monitoring, it may be necessary to observe a leakage current path. In such a case,
The SQUID may be scanned while the relative position between the laser and the chip is fixed. In this case, it is difficult to obtain a high resolution like a scanning laser SQUID image, but it is possible to specify a certain amount of current path.

The spatial resolution of the scanning laser SQUID image and the laser scanning image according to the present invention is about the diameter of the laser beam. It is not technically difficult to increase the beam diameter of the laser beam to the limit of the diffraction limit determined by the wavelength of the laser beam and the numerical aperture of the objective lens used. For example,
When an Ar laser having a wavelength of 488 nm is used and the numerical aperture of the objective lens is 0.80, the diffraction limit is about 370 nm.
It is. An OBIC abnormal position can be specified with such an accuracy.

In the above description, as an example of a method of forming a current path in the second step, an example has been shown in which the current extracting portions B1 and B2 are connected by a conductor 600 such as a copper wire outside the wafer 100. The connection need not be made outside the wafer 100. For example, in the case of a wafer in the process of manufacturing a semiconductor chip, the step of depositing a wiring metal film of each wiring layer for forming an internal connection wiring may be the second step. FIGS. 20A and 20B are diagrams schematically showing a cross section near a pn junction in the middle of a semiconductor chip manufacturing process, wherein FIGS. FIG. 5 is a cross-sectional view at a stage where a wiring metal film is deposited. As the first-layer wiring metal film and the second-layer wiring metal film, for example, aluminum (Al) films are deposited to a predetermined thickness. As the contact portion metal film 221, a predetermined barrier metal film such as titanium silicide (TiSi) or cobalt silicide (CoSi), a plug metal such as tungsten (W), or the like can be used.
Any of them may be formed as needed, and the material is not limited to these. Referring to FIG. 20, the first layer Al wiring film 210 and the second layer Al wiring film 212
It can be seen that, at the stage where they are deposited, they serve as connection means for forming a current path for the OBIC current. For example,
When the connection means is the first layer Al wiring film 210, the current path of the OBIC current is formed for almost all pn junctions, but the path length may be slightly shorter. Specifically, for example, when the pn junction 716 formed by the n-type diffusion region 233 and the p-type substrate 230 is irradiated with the laser beam 2, the substrate contact portion 243, the first layer Al wiring film 210, n A current path is formed through the mold diffusion region contact portion 246, and an OBIC current 263 is generated. Also, n
When the laser beam 2 is irradiated on the pn junction 715 formed by the p-type diffusion region 241 and the p-type diffusion region 231, p
A current path is formed through the first layer Al wiring film 210 and the n-type diffusion region contact portion 244 via the type diffusion region contact portion 245, and an OBIC current 261 is generated.

The connection means is a second-layer wiring Al film 212.
In the case of, pn which can form the current path of the OBIC current
Although the bonding is limited, the path length is increased because the wiring passes through the first layer wiring, the first and second interlayer connection holes and the second layer wiring metal film as well as the contact hole, which is advantageous in terms of detection sensitivity and is also advantageous. Defects can also be detected. Specifically, for example, a p-type substrate formed of the n-type diffusion region 233 and the p-type substrate 230
The OBIC current does not flow in the −n junction 716 because a current path cannot be formed even when the laser beam 2 is irradiated. However, when the pn junction 715 formed by the n-type diffusion region 241 and the p-type diffusion region 231 is irradiated with the laser beam 2, the first layer A through the p-type diffusion region contact portion 245.
1 wiring 215, 1-2 interlayer connection hole filling metal 2235, second layer Al wiring film 212, 1-2 interlayer connection hole filling metal 22
34, the first layer Al wiring 214, and the n-type diffusion region contact portion 244, a current path is formed and an OBIC current 261 is formed.
Occurs. Although not shown again, even in the case where there are more wiring layers, the pn-observable pn
Although the restriction on the junction is increased, the metal film can serve as a connection means to form a current path of the OBIC current. Therefore, in each case, the OBIC current flows due to the irradiation of the laser beam without connecting with a conductor such as a copper wire outside the wafer, and the generated magnetic flux 11 is transmitted to the SQUID magnetometer 12.
, It is possible to detect the presence or absence of an increase in resistance or a leak defect in the path.

When a leak defect can be detected, for example,
The step before FIG. 20B, that is, the second Al of 212
It is simple and easy to understand when considering before the wiring film is deposited. FIG. 20 (c) shows a cross section of the same place as that of FIG.
I will show you. In the range illustrated in FIG. 20C, there is no structure that generates an OBIC current accompanying laser irradiation when no defect exists. n-type diffusion region contact portion 244
When the first layer Al wiring 214 connected to the first layer and the first layer Al wiring 213 connected to the substrate contact portion of 243 are bridged by the leak defect 86, the laser irradiation at the pn junction 717 causes A substrate contact portion 243,
OB passing through first layer Al wiring 213, leak defect 86, first layer Al wiring 214, and n-type diffusion region contact portion 244
A closed circuit through which the IC current flows is formed.

FIG. 24 shows an example in which a disconnection can be detected from the laser SQUID image. FIG. 24A shows the scanning laser S before disconnection.
FIG. 24 (b) is a scanning laser SQUI after disconnection.
FIG. 25 is a conceptual diagram showing a cross section of a chip at a related portion and a broken portion. The disconnection defect shown in this example is FIB (fo
It is made artificially using a used ion beam (focused ion beam). The structure shown in FIG. 25 is basically the same as the structure of the CMOS shown in FIG. 20, and shows only relevant portions in different cross sections. Description of the structure already described in FIG. 20 will be omitted as appropriate. In FIG. 25A, when the laser beam 2 is irradiated on the pn junction 717, the substrate contact portion 243 and the first layer Al wiring 21 are exposed.
6, 1-2 interlayer connection hole filling metal 2233, second layer Al wiring film 212, 1-2 interlayer connection hole filling metal 2234, first layer
An OBIC current flows through the layer Al wiring 215 and the n-type diffusion region contact portion 244, and as a result, a magnetic flux 11 is generated.
It is detected by the SQUID magnetometer 12. FIG. 24A shows an image obtained by such a process. The wavelength of the laser used at this time was 1064 nm, irradiation was performed from the back surface side of the chip, and the SQUID magnetometer was arranged at a position about 0.5 mm away from the top surface of the chip. The black contrast seen on the right side and lower right in FIG. 24 (a) is indicated by p of 717 in FIG. 25 (a).
This corresponds to contrast due to magnetic flux generated when a laser is irradiated to the -n junction. After acquiring this image, FIG.
A disconnection defect as shown by the resistance increase defect 284 in FIG.
Using FIB, they were built two places apart. After that, the scanning laser SQUID image obtained from this sample is shown in FIG. It can be seen that the black contrast disappears at two places indicated by white arrows. These two locations correspond to locations where the FIB has created a disconnection defect.
The presence of such a disconnection defect causes the laser beam 2
Experimentally clearly shows that when a closed circuit in which an OBIC current flows is not formed even when the pn junction 717 is irradiated with As can be seen from this experimental example, a high resistance defect of the substrate contact portion as shown by the resistance increase defect 285 in FIG. 25B and a high resistance of the metal portion filled with the interlayer connection hole as shown by the resistance increase defect 286 in FIG. Laser SQUID is also effective for detecting defects.

As a modification of the present embodiment, for example, when a wafer on which pads have been formed is used, the current path becomes complicated or the current path cannot be formed in many cases. By short-circuiting the pad with silver paste or gold foil, a short-circuited portion or a disconnected portion can be detected in a similar manner. In some cases, a current path is formed by short-circuiting all pads using a prober. Also, when analyzing a chip already sealed in a package, basically the same form can be realized if the chip is regarded as the above-mentioned wafer. That is, the entire chip surface is covered with a conductive film such as a silver paste or a gold foil by exposing the upper surface of the chip or creating a gap between the chip and the package material. Further, the substrate side may be exposed to such an extent that at least an electrical contact area and a laser irradiation area can be obtained. By adopting such a method, the cost and man-hour required for electrical connection can be significantly reduced as compared with the related art. However, in many cases, a current path is not formed after the pad is formed, and the inefficiency is the same as that performed after the pad is formed on the wafer.

A specific example will be described below, which shows that an effective test can be performed to some extent only by short-circuiting all the pins of the packaged chip at the pins of the package.
The sample used was a BiCMOS with a minimum dimension of 0.18 μm.
LS of 3-layer Al wiring designed and manufactured using the process
I. After the chip size is 3.1mm □ and packaged in 100-pin QFP (Quad Flat Package), all pins are subjected to ESD (Electrostatic Discharge) test. (Hereinafter referred to as a bad sample). For comparison, a sample determined to be normal in a normal electrical test (hereinafter referred to as a non-defective sample) was also observed. Before the observation by the scanning laser SQUID method, the plastic on the chip surface side was removed by an ordinary opening method using fuming nitric acid to expose the chip surface in both the non-defective sample and the defective sample. Scanning laser S
In the observation by the QUID, a laser beam having a wavelength of 1064 nm was irradiated from the front side of the chip, and the magnetic flux was detected by the SQUID arranged on the back side of the chip. FIG. 22 is a scanning laser SQUID image obtained with all pins released, FIG.
3 is a scanning laser SQUI obtained with all pins short-circuited
It is an ID image. (A) is an image of a bad sample, (b)
Is an image of a non-defective sample. The entire scanning range is a 3.5 mm square area including the entire chip. First, the difference that is immediately noticed when looking at FIG. 22 and FIG.
In the case of No. 3, the region where the black-and-white contrast is observed and the intensity are increased. The contrast between white and black is SQUID
It is displayed according to the strength of the upward component and the downward component of the magnetic flux detected by the magnetometer. The conditions for acquiring these four images are as follows:
All are the same except for the difference between the samples described above and the difference between short circuit and release. Therefore, as compared with FIG. 22 obtained under the condition where all the pins are released, FIG. 23 obtained under the condition where all the pins are short-circuited has an area where the black-and-white contrast is seen and the intensity is increased. By doing so, the number of current paths in which the pins of the package are part of the OBIC current path is increased, and as a result, the location and intensity of the magnetic flux are increased. Next, FIG. 22 and FIG.
(A), that is, the image of the defective sample is compared with (b), that is, the image of the non-defective sample. In FIG. 22, the difference between the two is not remarkable, but in FIG. 23, the difference between the two is remarkable. This means that the method of taking an image as shown in FIG. 23, that is, acquiring a scanning laser SQUID image with all pins short-circuited, enables the chip to be inspected without performing a conventional inspection using an LSI tester. The quality can be easily determined. This is a tester, test program,
There are few advantages when you have a jig or the like, but it is effective when you do not have a complete set of such devices for testing in advance. The biggest reason is that, unlike the inspection by the LSI tester, there is no need for any preparation depending on the type of chip, such as a test program and a measuring jig. The cost and time required for their preparation can be saved. In addition, inspection costs can be reduced because it is not necessary to use an extremely expensive LSI tester.

Next, a second embodiment of the present invention will be described in detail with reference to the drawings.

The second embodiment is directed to a case in which a chip mounted directly on a circuit board without a package detects defects on the chip in a mounted state. In particular, a case where a defect on a chip is inspected in a state where the chip is mounted in a flip-chip form is shown. FIG. 6 is a schematic diagram illustrating a main configuration of the present embodiment. FIG. 7 is a diagram for explaining an example of a defect occurrence location of the chip 301 to be analyzed in FIG.
(A), (b) is a typical sectional view in the case of a leak defect and the case of a resistance increase defect, respectively.

First, the overall configuration will be described with reference to FIG. A configuration example of a defective portion of the analysis target chip will be described on the way with reference to FIG. 7 as necessary. Chip 30
1 is mounted on a circuit board 401 in a flip-chip form as a bare chip, that is, with the chip surface side on which elements such as transistors are formed facing the circuit board 401. In this embodiment, the laser beam 2 is
1 from the back side. If there is a resin or the like on the back surface of the chip, it is necessary to expose the back surface of the chip only at that location. Further, if the back surface of the chip is polished to prevent scattering, the light collecting property of the laser is improved and the sensitivity and accuracy of analysis are increased. On the circuit board 401, there are many devices 501 not to be analyzed. Here, a part thereof is shown. In the present embodiment, such a circuit board 4
The feature is that the chip 301 to be analyzed can be analyzed irrespective of a large number of other devices and components existing on the device 01. The specific meaning of not being involved in the presence of others is that they are not affected by their electrical properties but also do not destroy or degrade them.

Only the wiring related to the description is shown.
Here, the relevant wiring is the power supply wiring 1012 and the wiring 1022 having the same potential as the chip substrate.
Between 03 and 204, that is, between C1 and C2, they are connected by a conductor such as a copper wire (not shown). This is an example and is not limited to such a pair of wires.
Any pair may be used as long as the pair forms a current path as described below and satisfies the requirement that a magnetic flux can be detected in a part of the current path.

Here, the details of such a pair will be described, and the defect occurrence location and the OBIC
In order to specifically explain the relationship between the pn junctions where current is generated, the configuration will be described as an example with reference to FIGS. 7A and 7B. FIG.
FIG. 6A shows a case in which a chip 301 to be analyzed shown in FIG.
1 schematically shows a cross section of the element structure of the inverter circuit constituted by. In addition, the illustration of the structure part which has nothing to do with description is omitted. Also, four short-circuit locations are shown.
It does not mean that they are happening at the same time,
This is for describing the four cases, and may occur in any one of them or in any combination of a plurality of them.

First, the elements constituting the inverter circuit will be described. As the chip substrate, a p-type substrate 302 is used. p-channel MOS transistor (hereinafter referred to as PMO
331 is formed in an n-well 303 formed of an n-type diffusion layer, and includes a p + diffusion region 304 serving as a source and a drain, a gate insulating film 91, and a gate electrode 3101. . The n-channel MOS transistor (hereinafter, referred to as NMOS) 332 includes an n + diffusion region 305 serving as a source and a drain, a gate insulating film 92, and a gate electrode 3102.

Next, connection for forming the inverter will be described. The input terminal 311 is connected to the gate electrodes of both the NMOS 332 and the PMOS 331. The output terminal 312 is connected to the drain electrodes of both transistors. The source of the PMOS 331 is connected to the power supply potential wiring 1012 in FIG. 6, and the source of the NMOS 332 is connected to the ground potential terminal 1032 (not shown). The p-type substrate 302 is connected from the substrate potential terminal 310 of FIG.
022. The four leak defects indicate four cases as described above. In each case, a description will be given as to which wire is selected as a pair on the circuit board 401 and the leak defect can be detected.

(Case 1): Leak defect 81 is PMOS3
This is a case where the gate electrode 3101 and the n-well 303 are short-circuited, that is, a case where the gate insulating film 91 is short-circuited. In this case, the pair is composed of the wiring (not shown in FIG. 6) to which the input terminal 311 is connected and the substrate potential terminal 3
10 is connected to the wiring 1022 in FIG. In this case, if a leak defect exists, the n-well 303
Pn junction 1001 between the substrate and p-type substrate 302 is OBIC
It is a source of current.

(Case 2): Leak defect 82 is PMOS3
In this case, the source electrode 31 and the n-well 303 are short-circuited. In this case, a pair is the power supply wiring 1012 in FIG. 6 to which the source electrode of the PMOS 331 is connected, and the wiring 1022 in FIG. 6 to which the substrate potential terminal 310 is connected. That is, this case corresponds to the case shown in FIG. Also in this case, if a leak defect exists, the n-well 30
Pn junction 1001 between P.3 and p-type substrate 302 is OBI
A source of C current.

(Case 3): Leak defect 83 is NMOS3
This is a case where the 32 gate electrode 3102 and the n + type diffusion region 305 are short-circuited. In this case, the pair consists of the wiring (not shown in FIG. 6) to which the input terminal 311 is connected,
The wiring 1022 of FIG. 6 to which the substrate potential terminal 310 is connected,
It is. In this case, if there is a leak defect,
The pn junction 1003 between the n + diffusion region 305 and the p-type substrate 302 is a source of the OBIC current.

(Case 4): The leak defect 84 occurs when the gate electrode 3102 and the p-type substrate 302 are short-circuited, that is,
This shows a case where the gate insulating film 92 is short-circuited. In this case, a pair is connected to the wiring having the same potential as the input terminal 311 (FIG. 6).
(Not shown) and a ground potential terminal 1032 (not shown). Also in this case, when a leak defect exists, the pn junction 1003 between the n + diffusion region 305 and the p-type substrate 302 becomes a source of the OBIC current.

In an actual CMOS device, not only such a basic circuit configuration but also more complicated connection such as connecting an n-type well to a power supply potential as in the following example is often used. For the sake of simplicity, the description will be limited to only the structures relevant to the description, but the laser SQ
The application of the UID is not limited only to the case mentioned here.

Next, the case of a resistance increase defect will be described. FIG. 7B shows a chip 301 to be analyzed shown in FIG.
FIG. 7 is a diagram for explaining an example in which a resistance increase defect is present in
1 schematically shows a cross section of the element structure of an inverter circuit formed of CMOS. The basic configuration is shown in FIG.
Therefore, the names of structures that are not relevant to the following description are omitted. FIG. 7A shows that the n-well 3
The only difference is that an n + diffusion region 307 is provided in the substrate 03. This n + diffusion region 307 is
Connected to Defects are resistance increasing defects 281, 28
2 is shown. This defect corresponds to any resistance increasing defect existing in the electric path from the electrode of the n + diffusion region 307 to the power supply wiring 1012. In this case, the pair
The power supply wiring 1012 in FIG. 6 and the wiring 1022 in FIG. 6 to which the substrate potential terminal 310 is connected. That is, this case corresponds to the case shown in FIG. In this case, when the resistance increasing defects 281 and 282 are present, the OBIC current flowing when the laser beam is applied to the pn junction 1001 between the n-type well 303 and the p-type substrate 302 does not have the defect. It is greatly reduced or no longer flows at all.

Also in this embodiment, as shown in FIG.
As in the embodiment, the two current extraction units 203 and 20 are provided.
4 is provided. The positions of the current extracting sections 203 and 204 are as follows.
Choose a location that meets the following requirements: This choice may need to be made by trial and error in some cases. The reason is that the pair differs depending on the location where the defect exists and the type of the defect as described above, and there is also a case where there is no accurate information on where the paired wiring passes on the circuit board 401. It depends. Whether you choose based on accurate information or by trial and error, you must meet the following requirements:

That is, the current extracting units 203 and 204
Between C1 and C2 with a conductor such as a copper wire
By creating a current path and by short-circuiting,
Generates a new magnetic flux that weakens the magnetic flux in the path to be observed
It is necessary not to let it live. This is the first implementation
Same as the form. The difference from the first embodiment is that the magnetic flux
Is the part where is detected. As in the first embodiment, in the chip
If the magnetic flux generated from the current path of
Or a long board on the circuit board 401 in the current path.
If wiring exists, detect the magnetic flux generated there
Is more advantageous in sensitivity because the detected magnetic flux becomes larger.
You. In FIG. 6, such a measurement target substrate wiring 402 and its
Magnetic flux 11 generated here, SQUID for detecting the magnetic flux
The magnetometer 12 is shown. If you make normal electrical observations in advance
The current / voltage measurement between the two terminals of the chip to be analyzed is
If possible, select pairs that exhibit pn junction characteristics.
It is clear from the above description that the OBIC current can be observed.
It will be clear. Also generated from the current path in the chip
If magnetic field can be detected, short the pins as much as possible.
It is also a method that can be expected to have immediate effect.

Next, the operation of the second embodiment will be described with reference to FIGS.
4 will be described. Here, details of the items already described are omitted as appropriate so that the flow can be understood.

First, the current extracting portions 203 and 204 on the circuit board 401 are short-circuited by a conductor (not shown) such as a copper wire. As described above, in some cases, it is most effective to short-circuit the wiring as much as possible instead of selecting the wiring to be short-circuited. Next, in the board wiring on the circuit board 401 included in the current path, select a place where the detector can be approached at a place where the linear portion wiring length is long and a lot of magnetic flux is likely to be generated, and fix the SQUID magnetometer 12. I do.
In some cases, the SQUID magnetometer 12 may be fixed near the chip 301. Next, the laser beam 2 is irradiated,
The laser beam 2 is focused on the surface of the chip 301. When the back side of the chip 301 is exposed as in this embodiment, the laser beam 2 is irradiated from the back side of the chip 301, and the focus is adjusted to the front side.

Next, the laser beam 2 is moved to
The scanning of 01 is started. SQUID near chip 301
When the magnetometer 12 is fixed, the entire circuit board is scanned. Of course, when this is effective, it goes without saying that the current path formed only inside the chip may work effectively. At the same time as scanning of the chip 301 by the laser beam, detection of magnetic flux and display of the detected magnetic flux are started. When a sufficient S / N cannot be obtained by the detected magnetic flux, the first point is that the S / N can be greatly improved by modulating the laser beam intensity with the modulator 52 and amplifying the signal with the lock-in amplifier 55. This is the same as in the embodiment.
The display position of the detected magnetic flux corresponds to the irradiation position of the laser beam on the chip 301, and the reflected light of the laser beam is detected by a photodiode, and the display position is displayed as an image (laser scan image). As described above, the position where the OBIC current is generated is known. As described above, in order to make it easy to see the OBIC current generation position, the image according to the present invention and the laser scanning image may be superimposed and displayed.

By recognizing the OBIC current generation position on a chip-by-chip basis, a defective chip can be detected, and information useful for chip replacement can be obtained. This may lead to a significant cost reduction compared to the case where the entire board is discarded. It is clearly effective from the viewpoint of effective utilization of resources. Further, by recognizing the detailed position inside the chip, failure / failure analysis can be performed, and information leading to improvement in the manufacturing process and design of the chip maker can be obtained. In some cases, problems with the mounting method are also found, leading to an improvement in the mounting process.

As described above, the spatial resolution of the image and the laser scanning image according to the present invention is about the same as the diameter of the laser beam. It has already been mentioned that it is not technically difficult to increase the beam diameter of the laser beam to the limit of the diffraction limit determined by the wavelength of the laser beam and the numerical aperture of the objective lens used. In this embodiment, the wavelength is different from that in the above-described case because observation is made from the back surface. For example, the wavelength 1064
When a numerical aperture of the objective lens is 0.80, the diffraction limit is about 810 nm when using a YAG laser of nm.
The OBIC current source can be specified with such an accuracy.

As described above, the relationship between the presence / absence of a defect and the presence / absence of OBIC current generation is not always simple. For this reason, as in the first embodiment, by comparing the scanning laser SQUID image of a non-defective product acquired in advance, the scanning laser SQUID image in a normal state, or a standard determined based on them, the defect The location can be identified. To facilitate comparison, a difference image may be generated as shown at the end of the flow.

Next, a third embodiment of the present invention will be described in detail with reference to the drawings.

The third embodiment is an embodiment in which a defect on a chip is detected using TEG. If the TEG is used, the configuration can be set freely, so that the present embodiment is quite diverse. Here, a typical example is shown.
It goes without saying that the invention is not limited to these examples only.

FIGS. 9A and 9B are diagrams schematically showing a main structure of a third embodiment of the present invention, wherein FIG. 9A is an overall plan view, and FIG. 9B is an enlarged plan view of a portion P in FIG. FIGS. 10 and 11 are diagrams for explaining an example of the configuration of the TEG block to be analyzed in FIG.

First, the overall configuration will be described with reference to FIG. A configuration example of the TEG block to be analyzed will be described with reference to FIGS. 10 and 11 as needed on the way.
The TEG blocks 6041 to 6045 to be analyzed are arranged on the chip 601 so as to surround the entire periphery of the plurality of bonding pads 602. The laser beam 2 can be incident from the front side or the back side of the chip. Arranging the SQUID magnetometer 12 on the front side with the light incident from the back side is advantageous in that the current path and the SQUID magnetometer 12 can be made closer and the detected magnetic flux increases, but in this case, the wavelength is longer. It is necessary to use a laser beam, which is disadvantageous in terms of spatial resolution.

In the present embodiment, the current extracting portion, which is required in some cases in the first and second embodiments, is unnecessary. That is, the built-in current path wiring 603 connecting both ends of the TEG block to be analyzed is formed in advance so as to make a circuit around the bonding pad. Instead of connecting both ends of the TEG block to be analyzed only by wiring, a circuit in which the capacitance and the resistance are connected in series with the TEG block to be analyzed may be formed. In the following description,
A case where a current path connecting between pn junctions is formed only by wiring will be described as an example, but the scope of the present invention is not limited thereto. This current path is the TEG to be analyzed.
Make each block. Although it passes so as to bypass the side of the other TEG block to be analyzed, the wiring does not take up space since the width of the wiring may be the minimum line width derived from the processing accuracy. This situation is shown in FIG. Both ends of the TEG block 6043 to be analyzed are formed and connected by a current path wiring 6033. Other built-in current path wirings 6031, 6032,
6034 and 6035 are TEG blocks 6043 to be analyzed
Is bypassing. Note that the built-in current path wiring 603 indicates the whole of the built-in current path wirings 6031 to 6035. The magnetic flux 11 generated from this current path is
Since it occurs everywhere around the chip, the SQUID magnetometer 12 may be placed anywhere near it.

Next, an example of the configuration of the TEG block to be analyzed will be described with reference to FIGS. 10A and 10B are diagrams for explaining the configuration of a TEG block provided for detecting a leak defect, where FIG. 10A is a plan view, and FIG. 10B is a cross-sectional view taken along line XX ′ of FIG. It is. FIG.
1 is a diagram for explaining the configuration of a TEG block provided for detecting a disconnection defect, (a) is a plan view,
(B) is a sectional view taken along line (A) YY '. still,
Structures not relevant to the description have been omitted.

First, in the case of a leak defect, FIG.
This will be described with reference to FIG. A field oxide film 350 and an n-type well 303 are formed on a p-type substrate 302, and a structure is formed in the n-type well 303 up to a gate electrode 3103 of a p-channel MOS transistor. The gate insulating film 93 is on the entire upper surface of the n-type well 303.
A gate electrode 3103 runs in the center, and is connected to one end of a built-in current path wiring 6031. p-type substrate 3
P + diffusion region 306 formed for the purpose of establishing electrical continuity with H.02
Is connected to the other end of the current path wiring 6031 by a p + diffusion region extraction electrode 3066. The current path wiring 6031 that connects the gate electrode 3103 and the p + diffusion region extraction electrode 3066 makes a circuit around the chip between the bonding pad 602 and the edge of the chip as can be seen from FIG. The leak defect 85 shown in FIG.
Is short-circuited, a current path is formed between the n-type well 303 and the p-type substrate 302 via the pn junction 1005. When the pn junction 1005 is irradiated with a laser beam, the OBIC current is reduced. Flows. As a result, the leak defect 85 can be detected.

Next, in the case of a resistance increase defect, FIG.
1 will be described. The inspection target internal wiring 701 of the TEG block 6042 provided for detecting the resistance increase defect includes a p + diffusion region extraction electrode 3066,
pn junction 1 with n + diffusion region extraction electrode 3077
283 is connected to both ends. As a result, the inspection target internal wiring 701 short-circuits both ends of the pn junction 1283. Also, the built-in current path wiring 6032 that goes around the periphery of the chip in parallel with the inspection target internal wiring 701 is p
It is connected to both ends of an -n junction 1283 (see also FIG. 9A). With such a configuration, when the resistance increasing defect 283 exists, the laser beam irradiation allows
The OBIC current generated at the pn junction 1283 flows along the built-in current path wiring 6032, and the magnetic flux generated thereby is detected by the SQUID magnetometer 12 (FIG. 9A). When the resistance increase defect 283 does not exist, such an OBIC current mainly flows through the inspection target internal wiring 701 having a low resistance, and the current flowing through the built-in current path wiring 6032 having a relatively high resistance is extremely small. is there. When the resistance increase defect 283 is present, the current flowing through the built-in current path wiring 6032 increases, so that the detected magnetic flux greatly differs depending on the presence or absence of the defect, and the presence or absence of the resistance increase defect can be specified.

Next, the operation of the third embodiment will be described with reference to FIGS.
This will be described with reference to FIG. Here, details of the items already described are omitted as appropriate so that the flow can be understood.

First, the SQUID magnetometer 12 is fixed on the built-in current path wiring 603 on the chip 601 by the second fixing means (not shown). As the position where the SQUID magnetometer 12 is fixed, a position where the detected magnetic flux is maximum is selected. This position is a position shifted in a direction perpendicular to the wiring 603 by a distance h between the chip surface and the magnetic flux detection surface of the SQUID magnetometer. The exact position may be determined by actual measurement using, for example, a sample in which a portion corresponding to the resistance increase defect 283 of the inspection target wiring 701 shown in FIG.

Next, a laser beam 2 is irradiated to focus the laser beam on the surface of the chip 601. When the laser beam 2 can be irradiated from the back side or the front side of the chip 601 as in the present embodiment, the detected magnetic flux is stronger when the laser beam 2 is irradiated from the back side of the chip 601 and the focus is set on the chip surface. It is advantageous in that it becomes. On the other hand, from the point of spatial resolution, irradiation from the surface where the wavelength of the laser beam 2 can be shortened is advantageous.

Next, the scanning by the laser beam 2 is started. The tip 601 may be moved, but in that case, the relative position between the SQUID magnetometer 12 and the tip 601 needs to be fixed, and in general, the laser beam 2
Is easier to implement. However, when the scanning range is wide, the movement of the laser beam 2 is not easy, and in some cases, it is easier to move the chip 601 side. The relative scanning of the chip 601 by the laser beam 2 is independent of whether the laser beam 2 is moved or the chip 601 is moved.
Since only the TEG block to be analyzed needs to be scanned,
It is more efficient than the first and second embodiments. At the same time as the scanning by the laser beam 2, the detection of the magnetic flux and the display of the detected magnetic flux are started. When a sufficient S / N cannot be obtained with the detected magnetic flux, the laser beam 2 is modulated by the modulator 52 and the signal is amplified by the lock-in amplifier 55 as shown in FIG. The first and second things that can be improved
This is the same as in the embodiment.

The display position of the detected magnetic flux corresponds to the irradiation position of the laser beam on the chip 601. The display position corresponds to the image displayed by detecting the reflected light of the laser beam with a photodiode (laser scan image). OBI
The fact that the C current generation position is known is the same as in the first and second embodiments.

In order to make it easy to see the OBIC current generation position, the first and second scanning laser SQUID images and the laser scanning image according to the present invention may be displayed in a superimposed manner.
This is the same as in the embodiment. If the failure mode and mechanism are limited for each TEG block, information on the failure mode and mechanism can be obtained without performing physical analysis by recognizing the OBIC current generation block in TEG block units. In addition, by statistically analyzing the results for each chip or wafer, effective information on the lot or wafer can be obtained without manufacturing up to the final process. The spatial resolution of the image and the laser scan image according to the present invention has been described in the first and second embodiments, and will not be described.

The scanning laser S of a good product obtained in advance
QUID image or scanning laser SQUID in normal state
The point that effective information can be obtained by comparing with an image is the same as the content described in the description of the first and second embodiments, and therefore, the details are omitted. However, in the case of this embodiment, the scanning laser SQUI in a normal state or a non-defective product
This is advantageous in that the TEG can be designed so that it hardly needs to be compared with the D image.

[0121]

As described above, according to the present invention,
Defects such as increased resistance including disconnection and leakage including short circuit
An electrically active defect causing a failure can be detected in a non-destructive and non-contact manner without waiting for the formation of a bonding pad.
An electrically active defect can be inspected in a completely non-contact and non-destructive manner, and an effect is obtained that an appropriate action can be taken with respect to product yield and reliability.

After the bonding pads are formed, electrical preparation is made by covering the chip with gold foil, applying silver paste, or mounting all pins in sockets short-circuited with solder or the like. Since defects can be detected in a non-destructive and non-contact manner without considering a combination of connections, an effect of enabling a more efficient inspection than in the conventional method can be obtained in the embodiment after the end of the previous process.

Further, it is possible to detect only the defect of the target chip in a non-destructive and non-contact manner without affecting or affecting other devices and components on the mounted circuit board. Also in the embodiment, the effect that the inspection can be performed more efficiently than the conventional method can be obtained.

[Brief description of the drawings]

FIGS. 1A and 1B are schematic diagrams for explaining a basic configuration of a nondestructive inspection method according to the present invention. FIG. 1A shows a case of detecting a leak defect of a gate oxide film, and FIG. FIG.

FIGS. 2A and 2B are schematic diagrams for explaining a basic configuration of a nondestructive inspection method according to the present invention, in which FIG. FIG.

FIGS. 3A and 3B are schematic diagrams for explaining the first embodiment of the present invention, in which FIG. 3A is the entire wafer, FIG. It is sectional drawing which shows the detail in the case of a resistance increase defect, respectively.

FIG. 4 is a schematic perspective view for explaining the first embodiment of the present invention.

FIG. 5 is a flowchart for explaining the operation of the first embodiment of the present invention.

FIG. 6 is a schematic diagram for explaining a second embodiment of the present invention.

FIG. 7 is a schematic diagram for explaining an example of a defect occurrence location of a chip to be analyzed according to the second embodiment of the present invention;
(A) is an example of a leak defect, and (b) is an example of a resistance increase defect.

FIG. 8 is a flowchart for explaining the operation of the second exemplary embodiment of the present invention.

FIGS. 9A and 9B are schematic views for explaining a third embodiment of the present invention, wherein FIG. 9A is an overall plan view, and FIG.
FIG. 4 is an enlarged plan view of a P portion of FIG.

FIGS. 10A and 10B are schematic diagrams for explaining an example of a TEG block to be analyzed, where FIG. 10A is a plan view and FIG.
It is sectional drawing which followed the -X 'line.

FIGS. 11A and 11B are schematic diagrams for explaining an example of a TEG block to be analyzed, where FIG. 11A is a plan view and FIG. 11B is Y in FIG.
It is sectional drawing which followed the -Y 'line.

FIG. 12 is a flowchart for explaining the operation of the third embodiment of the present invention.

FIG. 13 is a configuration block diagram of an example of the nondestructive inspection device of the present invention.

FIG. 14 is a configuration block diagram of an example of the nondestructive inspection device of the present invention.

FIG. 15 is a diagram illustrating a first related art.

FIG. 16 is a diagram for explaining the principle of detecting a defect of a pn junction in the first conventional technique.

FIG. 17 is a diagram for explaining a principle of detecting disconnection of a wiring according to the first conventional technique.

FIG. 18 is a diagram for explaining a principle of detecting disconnection of a wiring according to the first conventional technique.

FIG. 19 is a diagram for explaining a second related art.

FIGS. 20A and 20B are cross-sectional views schematically showing the vicinity of a pn junction in the middle of a semiconductor chip manufacturing process. FIGS. It is sectional drawing at the stage of depositing the layer wiring metal film, and at the stage of (c) patterning the first layer wiring metal film.

FIG. 21 is an example of a graph showing the dependence of the OBIC current value on the resistance value in the path through which the OBIC current flows.

FIGS. 22A and 22B are examples of a scanning laser SQUID image in a state where all pins are released, where FIG. 22A is an image of a defective product and FIG.

FIG. 23 is an example of a scanning laser SQUID image in a state where all pins are short-circuited, where (a) is an image of a defective product and (b) is an image of a good product.

24A and 24B are examples in which a disconnection can be detected in a state where the laser beam is removed from the middle of the process. FIG.
It is a UID image.

25 is a diagram schematically showing a cross section of a portion corresponding to the scanning laser SQUID image in FIG. 24, where (a) shows a state before disconnection,
(B) is a sectional view after disconnection.

[Explanation of symbols]

1,715,716,717 p-n junction 2,21,22 laser beam 3 electron 4 hole 5 power supply 6,261,263 OBIC current 7 ammeter 8,81,82,83,84,85,86 leak defect Reference Signs List 9 insulating film 10 electrode on insulating film 11 magnetic flux 12 SQUID magnetometer 15 wiring 18 defect promoting recombination 28, 281, 282, 283, 284, 285, 28
6 Resistance increase defect 50 Non-destructive inspection device 51 Laser light source 52 Modulator 53 Optical system 55 Lock-in amplifier 56 Control device 57 Storage device 58 Display device 61 Fine movement unit 91, 92, 93 Gate insulating film 100 Wafer 101 Adhesion to the entire uppermost layer Conductive thin film 102 Wafer substrate 103 Location where defect and pn junction exist 111 Electrode material film 151 Thin film for wiring 200 Raw wafer 201, 202, 203, 204 Current take-out unit 210 First layer Al wiring film 212 Second layer Al Wiring film 221 Contact part metal film 223 1-2 Interlayer connection hole filling metal 230,302 P-type substrate 231 P-type diffusion region 233,241 N-type diffusion region 243 Substrate contact portion 244,246 N-type diffusion region contact portion 245 p-type Diffusion area contact part 301,601 chip 03 n-type well 304, 306 p + diffusion region 305, 307 n + diffusion region 310 substrate potential terminal 311 input terminal 312 output terminal 331 PMOS 332 NMOS 350 field oxide film 401 circuit substrate 402 measurement substrate wiring 501 device not analyzed 600 conduction Body 602 Bonding pad 603, 6031 to 6035 Wiring for built-in current path 604, 6041 to 6045 TEG block to be analyzed 660 Capacity 670 Resistance 701 Internal wiring to be inspected 1001, 1003, 1005, 1283 pn junction 1012 Power supply wiring 1022 Chip substrate 1032 Ground potential terminal 3066 p + Diffusion region extraction electrode 3077 n + Diffusion region extraction electrode 3101, 3102, 3103 Gate electrode

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G01R 31/302 G01R 33/02 K 4M106 33/02 33/035 ZAA 33/035 ZAA 31/28 L F term (Ref.)

Claims (35)

[Claims] 1. A wavelength of 300 nm or more and 1200 n
The first step of generating a laser beam within a range of m or less and generating a laser beam condensed to a predetermined beam diameter, and at least in a substrate including a wafer state and a mounting state during a manufacturing process to be inspected. When the laser beam is applied to the pn junction and the vicinity thereof of the semiconductor chip on which the pn junction is formed, an OBIC (Optical Beam I)
a second step in which a current path for passing an OBIC current generated by a nduced current phenomenon is formed by predetermined electrical connection means; and a third step in which a predetermined area of the semiconductor chip is scanned while irradiating the laser beam. ,
A fourth step of detecting, by a magnetic flux detecting means, a magnetic flux induced by the OBIC current generated by the laser beam at each irradiation point scanned in the third step, and the semiconductor based on the magnetic flux detected in the fourth step. A fifth step of determining the presence or absence of a leak defect including a disconnection defect or a short-circuit defect in the current path including the irradiation point of the chip. Non-destructive inspection methods, including selection, failure analysis, and failure analysis. 2. The nondestructive inspection method according to claim 1, wherein the current path includes a CR delay circuit including a capacitance C including a parasitic capacitance or a stray capacitance and a resistor R including a parasitic resistance. 3. In the second step, the electrical connection means is formed in the semiconductor chip having at least one contact hole opened in a diffusion layer region forming a pn junction in the substrate. 2. The non-destructive inspection method according to claim 1, wherein the conductive path is a conductive film attached to the entire upper surface side of the substrate, including a parasitic one. 4. An OBI in a normal product or a normal state.
At the irradiation point where a current path for the C current is not configured,
4. The method according to claim 1, wherein when the magnetic flux detected in the fourth step is equal to or larger than a predetermined standard value, the fifth step determines that there is a leak defect including a short-circuit defect in the current path including the irradiation point. 2. The nondestructive inspection method according to claim 1. 5. The OBIC in a normal product or in a normal state.
At the irradiation point where the current path for the current is formed, when the magnetic flux detected in the fourth step is less than a predetermined standard value, a disconnection defect is present in the current path including the irradiation point in the fifth step. The non-destructive inspection method according to any one of claims 1 to 3, wherein it is determined that there is an increased resistance defect. 6. An irradiation point where the laser beam is most focused,
The nondestructive inspection method according to any one of claims 1 to 5, further comprising a step of scanning the semiconductor chip with the laser beam while keeping a relative positional relationship with the magnetic flux detection means for detecting the magnetic flux. . 7. The method according to claim 1, further comprising the step of scanning said magnetic flux detecting means relative to the semiconductor chip while keeping the laser beam and the semiconductor chip relatively fixed.
The nondestructive inspection method according to claim 1. 8. A first end portion provided on a conductive film adhered to the entire upper surface side of the substrate on which the pn junction of the semiconductor chip is formed, and a first end portion provided on the lower surface side facing the upper surface of the substrate. 2 ends as the OBIC current extraction portion,
The nondestructive inspection method according to any one of claims 1, 2, 4, and 5, wherein an end and the second end are connected by the predetermined connection means. 9. The first end, wherein the second end is bisected by a region dividing straight line that passes through a center point of the planar shape of the substrate and that is orthogonal to a straight line connecting the center point and the first end. The non-destructive inspection method according to claim 8, wherein the non-destructive inspection method is provided in a region not including a part. 10. The nondestructive inspection method according to claim 3, wherein the conductive film adhered to the entire upper surface side of the substrate of the semiconductor chip is a film adhered during a manufacturing process. 11. The semiconductor chip to be inspected is in a wafer state, and the current path of the OBIC current includes the inside of the semiconductor chip and a prober.
The nondestructive inspection method according to any one of 2, 4, and 5. 12. The semiconductor chip to be inspected has bonding pads or bumps connected to leads outside the chip, and at least one of a front surface side and a back surface side of the chip is exposed. 6. The non-destructive inspection method according to claim 1, wherein a path includes the semiconductor chip and a lead of a package. 13. The semiconductor chip to be inspected is mounted alone or together with another device on a circuit board, and the current path of the OBIC current is formed alone in the semiconductor chip, or The nondestructive inspection method according to claim 1, wherein the nondestructive inspection method includes a semiconductor chip and the circuit board. 14. The circuit according to claim 1, wherein the current path is provided on the circuit board.
14. The nondestructive inspection method according to claim 13, wherein the generated magnetic fluxes are prevented from canceling each other as much as possible by short-circuiting the portions with predetermined connecting means. 15. The semiconductor chip to be inspected is fixed by fixing the position of the magnetic flux detecting means at a position in the current path on the circuit board where magnetic fluxes generated do not cancel each other as much as possible. The nondestructive inspection method according to claim 13, wherein scanning is performed with a beam. 16. The nondestructive inspection method according to claim 1, wherein the semiconductor chip to be inspected includes all the region to be inspected and the current path in the semiconductor chip. 17. The semiconductor chip to be inspected has a bonding pad, and the current path goes around the semiconductor chip between the bonding pad and an edge of the semiconductor chip. Terms 1, 2,
The nondestructive inspection method according to any one of items 4 and 5. 18. The nondestructive inspection method according to claim 1, wherein said magnetic flux detecting means is constituted by a superconducting quantum interference device. 19. The nondestructive inspection method according to claim 18, wherein the superconducting quantum interference device is a high-temperature superconducting type DC superconducting quantum interference device. 20. A seventh step of generating luminance information or color information corresponding to the magnetic flux of each irradiation point detected in the fourth step and storing the luminance information or color information in the storage means together with the coordinate information of each irradiation point; 20. The non-destructive inspection method according to claim 1, further comprising an eighth step of displaying an image of a predetermined area of the semiconductor chip corresponding to each of the irradiation points based on color information. 21. For each of a first semiconductor chip and a second semiconductor chip including a wafer state and a mounting state to be inspected, a laser beam having a wavelength within a range of 300 nm or more and 1200 nm or less is generated. A first step of generating a laser beam focused to a beam diameter, and OBIC (Optical) when the laser beam is applied to a pn junction formed in a substrate of the semiconductor chip to be inspected and its vicinity. A second step of preparing a current path for flowing an OBIC current generated by a beam induced current phenomenon by a predetermined connection unit, and a third step of scanning a predetermined area of the semiconductor chip while irradiating the laser beam. The OBIC current generated by the laser beam is induced at each irradiation point scanned in the third step. A fourth step of detecting the bundle by the magnetic flux detection means; and a resistance increase defect or a short-circuit defect including a disconnection defect in the current path including the irradiation point of the semiconductor chip based on the magnetic flux detected in the fourth step. A fifth step of determining the presence or absence of a leak defect, and a seventh step of converting the information into luminance information or color information based on the magnetic flux of each of the irradiation points, generating the information, and storing the generated information together with the coordinate information of each of the irradiation points in a storage unit After performing the above, the first image information of the first semiconductor chip and the second image information of the second semiconductor chip including the luminance information or color information and the coordinate information of the irradiation point, respectively, stored in the seventh step. A non-destructive inspection method, comprising: a ninth step of generating and storing difference image information from the image data; and a tenth step of displaying the difference image information. 22. At least one of the first semiconductor chip and the second semiconductor chip is a different chip that is a non-defective product and has the same configuration. Further, each of the predetermined regions to be scanned while irradiating the laser beam is also provided. The nondestructive inspection method according to claim 21, which has the same configuration. 23. The first semiconductor chip and the second semiconductor chip are the same chip and have the same predetermined region that scans while irradiating the laser beam, and the electrical state of the predetermined region is 22. The nondestructive inspection method according to claim 21, wherein one is in a normal state and the other is in an inspected state. 24. The nondestructive inspection method according to claim 1, further comprising a sixth step of modulating the intensity of the laser beam with the modulation signal at least before the third step. 25. A wavelength of 300 nm or more and 1200
a light source for generating laser light in the range of
A laser beam generating means for condensing the laser beam to generate a laser beam having a predetermined beam diameter, and scanning a predetermined area of a semiconductor chip including a wafer state and a mounting state to be inspected while irradiating the laser beam A laser beam scanning unit, and a magnetic flux induced by an OBIC (Optical Beam Induced Current) phenomenon when the laser beam is applied to a pn junction formed in the substrate of the semiconductor chip and its vicinity. A non-destructive inspection device, comprising: 26. The apparatus further comprising first fixing means for fixing a relative positional relationship between an irradiation point where the laser beam is most narrowed and the magnetic flux detecting means for detecting magnetic flux, wherein the irradiation point and the magnetic flux detecting means are fixed. With the relative positional relationship with
26. The nondestructive inspection device according to claim 25, wherein the laser beam scans a predetermined area of the semiconductor chip. 27. The apparatus according to claim 27, further comprising a second fixing unit for fixing a position of the magnetic flux detecting unit to an optimum detecting position in the current path on the circuit board, where generated magnetic fluxes cancel each other as much as possible. 26. The nondestructive inspection apparatus according to claim 25, wherein a predetermined area of the semiconductor chip to be inspected is scanned with the laser beam while a position of the detection means is fixed at the optimum detection position on the circuit board. 28. The nondestructive inspection apparatus according to claim 25, wherein said magnetic flux detecting means is constituted by a superconducting quantum interference device. 29. The nondestructive inspection device according to claim 28, wherein the superconducting quantum interference device is a high-temperature superconducting type DC superconducting quantum interference device. 30. A storage unit that generates luminance information or color information corresponding to the magnetic flux based on the magnetic flux of each irradiation point detected by the magnetic flux detection unit, and stores the luminance information or the color information together with the coordinate information of each irradiation point. 30. The non-destructive inspection apparatus according to claim 25, further comprising: image display means for displaying an image of a predetermined area of the semiconductor chip in correspondence with each of the irradiation points based on luminance information or color information. 31. A storage means, comprising: luminance information or color information corresponding to a magnetic flux at each irradiation point in a predetermined region of a semiconductor chip;
Image information including at least the coordinate information of each of the irradiation points, the image information including at least a plurality of pieces of the image information in which the predetermined regions coincide with each other, and generating difference image information among the plurality of pieces of image information. 31. The non-destructive inspection device according to claim 30, further comprising means. 32. A semiconductor chip having a structure to be inspected having a capacitance including a stray capacitance and a resistance including a parasitic resistance in a current path of an OBIC current. 33. A semiconductor chip having a structure to be tested including a portion to be tested and a current path of an OBIC current therein. 34. The semiconductor chip according to claim 33, further comprising a CR delay circuit in the current path of the OBIC current. 35. A chip provided with bonding pads, wherein the current path of the OBIC current goes around all the bonding pads on the chip. Semiconductor chip.