JP2002299590A - Method of manufacturing semiconductor substrate and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor substrate comprising an insulator layer of a high breakdown voltage, in a method of manufacturing a semiconductor substrate wherein a SiGe layer is stacked at least on the insulator layer. SOLUTION: The method of manufacturing a semiconductor substrate comprises a first process of forming the SiGe layer 1 on a silicon substrate 3, and a second process of forming the insulator layer 2 on the silicon substrate 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to an insulating layer and SiGe
The present invention relates to a method for manufacturing a semiconductor substrate having a structure in which layers are stacked and a method for manufacturing a semiconductor device using the same.

[0002]

2. Description of the Related Art Silicon MOS field-effect transistors, which are at the core of current semiconductor devices, have simultaneously achieved high-density integration and increase in driving force by miniaturization of device dimensions, in particular, reduction of gate length. However, in the near future,
It has been pointed out that miniaturization of devices in accordance with the conventional trend encounters physical and economic barriers. Therefore, in the future, it is necessary to establish a technique for increasing the speed and reducing the power consumption by a method other than miniaturization.

In recent years, a field effect transistor using a semiconductor substrate having a relaxed SiGe formed on a silicon wafer substrate as a base and a thin strained silicon layer formed thereon has been proposed. This field effect transistor,
Since carriers exhibit high mobility characteristics in the strained silicon layer, high speed and low power consumption can be achieved by using this as a channel region.

On the other hand, increasing the concentration of channel impurities for suppressing the short channel effect of a field effect transistor requires the
This causes an increase in the parasitic capacitance of the drain diffusion layer. In order to reduce this parasitic capacitance, a silicon oxide film is provided on a silicon wafer and a semiconductor layer is provided on the silicon oxide film. For example, a silicon on insulator (SOI) is used.
It is known that it is effective to use a semiconductor substrate having an ator) structure.

A MOS field-effect transistor using a semiconductor substrate having both a semiconductor substrate structure on which the silicon wafer / silicon oxide film / semiconductor layer is formed and a strained silicon layer is described in Japanese Patent Application Laid-Open No. 9-321307. ing. A conventional method for manufacturing a semiconductor substrate having a silicon wafer / silicon oxide film / semiconductor layer formed thereon and a strained silicon layer will be described with reference to FIG. In this method, a so-called SIMOX (Separation) method is used in which an oxide film is formed in the semiconductor layer by annealing after implanting oxygen ions into the semiconductor layer.
The "by implanted oxygen" method is used.

As shown in FIG. 4, on a silicon substrate 3,
An inclined SiGe layer 6 is formed while being inclined so that the Ge concentration gradually increases. Next, the inclined SiGe layer 6
On top, the stress relaxation SiG is thick enough to sufficiently relax the stress.
An e-layer 1 is formed.

Thereafter, oxygen is ion-implanted into the stress-relaxed SiGe layer 1 and annealed at a high temperature (1350 ° C.) to form a buried oxide film 9 in the stress-relaxed SiGe layer 1.
At this time, most of the Ge atoms in the stress-relaxed SiGe layer 3 are excluded from the buried oxide film 4 and the buried oxide film 9 is removed.
Is a silicon oxide film.

Next, a thin silicon layer is epitaxially grown on the stress-relaxed SiGe layer 1 to form the strained silicon layer 10.
To form

Further, a field effect transistor having a strained silicon layer 10 as a channel region is formed on a semiconductor substrate having such a structure to obtain a semiconductor device. However, in the conventional semiconductor substrate shown in FIG.
e remains, and there is a problem that the dielectric breakdown voltage of the buried oxide film, which is considered to be caused by the residual Ge, deteriorates.

On the other hand, a SiGe layer is formed on a silicon wafer, and an SiGe layer having an oxide film in the SiGe layer.
In a semiconductor substrate having an on insulator structure, p may be used to improve the carrier mobility of another MOSFET. Such SiGe on Insul
at the time of manufacturing a semiconductor substrate having an ator structure.
The X method is used, in which oxygen ions are implanted into a SiGe layer formed on a silicon wafer, followed by annealing at a high temperature to form a buried oxide film in the SiGe layer.

However, also in this case, Ge remains in the buried oxide film, and the dielectric breakdown voltage of the buried oxide film, which is considered to be caused by the residual Ge, is degraded, and there is a problem that the breakdown voltage characteristics of the semiconductor element are affected. .

[0012]

As described above, in a semiconductor substrate in which a SiGe layer is formed on an insulator layer formed on a silicon substrate formed by a conventional method,
There is a problem that Ge remains in the buried oxide film and the dielectric strength voltage is deteriorated.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. In a method for manufacturing a semiconductor substrate having a SiGe layer laminated on at least an insulator layer, a semiconductor device having an insulator layer having a good withstand voltage is provided. An object of the present invention is to provide a method for manufacturing a substrate. Another object of the present invention is to provide a method for manufacturing a semiconductor device having excellent withstand voltage characteristics using the semiconductor substrate.

[0014]

The present invention comprises a step of forming a SiGe layer on a first silicon layer, and implanting oxygen ions below an interface between the SiGe layer and the first silicon layer. A method of manufacturing a semiconductor substrate, comprising a step of forming an insulator layer in the first silicon layer by annealing.

In the method of manufacturing a semiconductor substrate according to the present invention, when manufacturing a semiconductor substrate in which an insulator layer and a SiGe layer are laminated on a silicon layer, a first base serving as a base is manufactured.
First, a method of forming a SiGe layer on the silicon layer and then performing ion implantation and annealing to form an insulating layer is used. At this time, the SiGe layer and the first A step of implanting oxygen ions below the interface with the silicon layer is performed.

As a result, an insulator layer is formed below the SiGe layer.

[0017] Unlike the conventional method, ion implantation is performed using Si.
The ions are implanted not into the Ge layer but below the SiGe layer. Therefore, the phenomenon that Ge remains in the insulator layer is reduced, and deterioration of the dielectric strength of the insulator layer is reduced.

Further, according to the present invention, the SiGe
By further providing a step of forming a second silicon layer on the layer, the present invention can be applied to the manufacture of a semiconductor substrate having a silicon substrate / silicon oxide film / semiconductor layer and a strained silicon layer.

At this time, a step of reducing the Ge concentration of the SiGe layer formed on the first silicon layer and increasing the Ge concentration of the SiGe layer after forming the insulator layer is performed.
Thereafter, it is desirable to perform a step of forming a second silicon layer on the SiGe layer. This is due to the following reasons.

For example, the conventional method for manufacturing a semiconductor substrate in which a strained silicon layer is formed on a laminated structure of a silicon wafer / silicon oxide film / semiconductor layer shown in FIG. 4 has the following problems. That is, in order to achieve high carrier mobility, it is necessary to increase the strain of the strained silicon layer,
For this purpose, it is necessary to increase the Ge concentration of the underlying SiGe layer 1. For that purpose, graded SiG
The surface side of the e-layer 6 needs to have a high Ge concentration. However, when the Ge concentration is high on the surface side of the inclined SiGe layer 6, the defect 8 as shown in FIG.
And the transition 7 induced from the defect 8 is stress-relaxed SiGe.
The layer 1 reaches the strained Si layer 10. For this reason, in the conventional technique, the dislocation in the strained Si layer cannot be eliminated, and eventually the carrier mobility cannot be increased.

However, according to the above-described method of the present invention, if the Ge concentration of the SiGe layer at the time of formation is lowered and the Ge concentration is increased after the formation of the insulator layer, the SiGe layer formed at the time of formation can be obtained. Since the concentration of Ge in the layer is low, the defects generated in the SiGe layer are greatly reduced, so that the Ge concentration in the underlying SiGe layer can be increased eventually and the Ge concentration in the SiGe layer can be increased. Reduces the occurrence of defects. Therefore, the silicon layer formed on the SiGe layer has an effect that the occurrence of dislocation is small and a large strain can be given.

In addition, according to the above method, since there is no need for the inclined SiGe layer 6 or the like, the epitaxial film thickness of SiGe, and hence the amount of germanium gas used can be reduced, so that the manufacturing cost can be reduced. It also has the above advantages. According to the method for manufacturing a semiconductor device of the present invention,
In order to obtain a semiconductor device in which a field-effect transistor is formed using the semiconductor substrate obtained by the above-described method for manufacturing a semiconductor substrate, a semiconductor device with high speed, low power consumption, and excellent withstand voltage characteristics can be obtained. .

[0023]

Embodiments of the present invention will be described below. In this embodiment, a semiconductor substrate in which a silicon substrate / silicon oxide film / SiGe layer / strained silicon layer is sequentially laminated is manufactured. 1 and 2 are sectional views showing steps of a method for manufacturing a semiconductor substrate according to an embodiment of the present invention.

First, as shown in FIG. 1A, a SiGe layer 1 was formed on a silicon substrate 3 made of a silicon wafer (first silicon layer). The formation of the SiGe layer 1 was performed by epitaxial growth. In the present invention, the thickness of the SiGe layer to be formed is desirably, for example, 10 nm or more and 1 μm or less. In this embodiment, the thickness is set to 200 nm. In the present invention, the Ge concentration of the SiGe layer to be formed is desirably set to a low Ge concentration so as to prevent defects from occurring due to lattice mismatch, in order to prevent the occurrence of defects, and more specifically, from 1 atomic% to 15 atomic%. % Is desirable. In this embodiment, the Ge concentration is set to 10 atoms.
ic%.

Next, a step of forming the insulator layer 2 in the silicon substrate 3 was performed. In the present invention, the insulator layer is formed by implanting oxygen ions into a silicon substrate and then performing an annealing process to form a buried oxide film. The above method was also applied to this embodiment.

That is, as shown in FIG. 1 (2), first,
Oxygen ions 4 were implanted below the interface between the silicon substrate 3 and the SiGe layer 1. At that time, the projection range, which is the implantation depth of the oxygen ions 4, was made deeper than the thickness of the SiGe layer 1. Specifically, ions were implanted at a substrate temperature of 550 to 650 ° C. under the conditions of an implantation energy of 180 KeV and a dose of 3.0 to 4.5 × 10 ¹⁷ ions / cm ² . The depth of the silicon region 5 into which the oxygen ions have been implanted is set to be lower by 2 from the interface between the SiGe layer 1 and the silicon substrate.
The position was from 00 nm to 500 nm.

In the present invention, at the time of oxygen ion implantation, it is desirable that oxygen ions be implanted such that the peak of the oxygen ion concentration is located below the interface between the SiGe layer and the silicon substrate 3.

Further, when oxygen ions are implanted into the silicon substrate 3 by ion implantation, the Ge atoms of the SiGe layer 1 are removed from the silicon under the insulator layer before the insulator layer is formed by a subsequent annealing process. SiGe to prevent diffusion to the substrate
It is desirable to have a margin between the layer 1 and the silicon region 5 into which oxygen ions have been implanted. For this purpose, it is desirable that the silicon region 5 into which oxygen ions have been implanted be formed so as to have a depth of 100 nm to 1 μm below a position of 100 nm to 1 μm from the interface between the SiGe layer 1 and the silicon substrate 3.

Next, as shown in FIG. 1C, annealing was performed in a non-oxidizing atmosphere, for example, an atmosphere of an inert gas, nitrogen, or the like. In the present invention, the atmosphere during the annealing treatment after the ion implantation is desirably a non-oxidizing atmosphere as described above.
Allow ₂ gases to be added. Further, the heat treatment temperature during the annealing treatment is desirably 1000 ° C. or more and 1450 ° C. or less. In this embodiment, an annealing process at 1300 ° C. or higher was performed in an Ar atmosphere containing 1 wt% O ₂ gas. As a result, an insulator layer 2 composed of a silicon oxide film, specifically, a buried oxide film containing SiO ₂ or SiO as a main component was formed. At this time, Ge atoms in the SiGe layer 1 are slightly diffused by the annealing process.
The e atoms hardly enter the silicon oxide, but stay in the surface semiconductor layer on the insulator layer 2 to be formed.

In this embodiment, the insulator layer 2 having a thickness of 100 nm is used.
An SiGe layer 1 having a thickness of about 400 nm and a Ge concentration of 3 atomic to 8 atomic% was formed thereon.
In the present invention, after annealing treatment after ion implantation, S
Ge concentration in the iGe layer 1 is 1 atomic% or more and 12 a
Tomic% or less is desirable.

Further, in the present invention, Si
In order to introduce a large strain into the silicon layer (second silicon layer) formed on the Ge layer 1, it is desirable to perform a step of increasing the Ge concentration in the SiGe layer after forming the insulator layer 2. This step is preferably performed by subjecting the silicon substrate to a thermal oxidation treatment after the formation of the insulator layer 2 in order to suppress the occurrence of defects and dislocation. By this thermal oxidation treatment, Ge in the SiGe layer 1 is concentrated and thinned as shown in FIG. In addition, the silicon oxide film 11 is formed on the SiGe layer, and the thickness of the insulator layer 2 (silicon oxide film) below the SiGe layer 1 may be increased.

In the thermal oxidation treatment, it is desirable to carry out the treatment under a dilute oxidation condition in which the oxygen partial pressure is not 100%. Further, the treatment temperature in the thermal oxidation treatment is desirably lower than the melting point of SiGe, specifically, desirably 900 ° C. or more and 1400 ° C. or less. SiGe is G
Care must be taken in setting the temperature because the melting point decreases as the e concentration increases.

By subjecting the SiGe layer 1 to a thermal oxidation treatment, silicon atoms react with oxygen to form a silicon oxide film made of SiO ₂ or SiO.
e does not react with oxygen, is eliminated from the formed silicon oxide film, and is concentrated in the SiGe layer 1. SiG in later process
In order to introduce a large strain into the silicon layer formed on the e-layer 1, the Ge concentration in the SiGe layer 1 after the second step is set to 3
It is desirable that the content be at least atomic% and at most 60 atomic%.

In this embodiment, a thermal oxidation process for forming a silicon oxide film 11 of about 650 nm was performed. (Atmosphere 50% O ₂ , 50% inert gas, heat treatment temperature 1300
° C), and as a result, a SiGe film having a thickness of 100 nm and a Ge concentration of 5 atomic% or more and 30 atomic% or less.
Layer 1 was formed. Further, by increasing the amount of oxidation in the thermal oxidation treatment, it is possible to obtain a thin SiGe layer 1 with a higher Ge concentration. In the present invention, the thickness of the SiGe layer 1 after the thermal oxidation treatment is desirably 5 nm or more and 500 nm or less.

After the above-mentioned thermal oxidation treatment, it is desirable that the silicon oxide film 11 on the surface is removed by wet etching or the like.

Further, as shown in FIG. 2, a step of forming a silicon layer 10 (second silicon layer) on the SiGe layer 1 was performed. The silicon layer 10 was formed by epitaxial growth. Thus, a semiconductor substrate having a silicon / insulator layer / semiconductor layer structure in which the silicon layer 10 is a strained silicon layer was produced. It is desirable that the thickness of the second silicon layer formed in the present invention be 1 nm or more and 500 nm or less.

Next, a field-effect transistor was formed on the semiconductor substrate having the thus obtained strained silicon layer 10 on the surface.

A silicon oxide film serving as a gate insulating film was formed on the surface of the silicon layer 10 on the semiconductor substrate. In this embodiment, the silicon substrate was thermally oxidized at, for example, 800 ° C. in a dry atmosphere to form a silicon oxide film. Next, a gate electrode was formed on the gate oxide film. In this embodiment, a gate electrode is formed by depositing n-type polycrystalline Si on the gate oxide film to a thickness of 200 nm and patterning it. Next, a source region and a drain region were formed.
In this embodiment, the source region and the drain region are formed by implanting As ions into the SiGe layer 1 using the gate electrode as a mask. The channel region of this field-effect transistor exists in the strained silicon layer 10. Thus, a MOS field effect transistor was completed on the semiconductor substrate according to the example of the present invention.

In the method for manufacturing a semiconductor substrate according to the present invention,
The thermal oxidation treatment after the formation of the insulator layer and the peeling treatment of the silicon oxide film after the thermal oxidation treatment are not necessarily performed.
This step need not be performed when forming the SiGe layer having the e concentration. In the method of manufacturing a semiconductor substrate according to the present invention, the method is applied to the manufacture of a semiconductor substrate having a SiGe layer formed on an insulator layer without performing the step of forming the second silicon layer shown in the above embodiment. Is also good.

FIG. 3 shows that Si is formed on the insulator layer on the silicon substrate.
FIG. 2 shows a cross-sectional view of a semiconductor substrate on which a Ge layer is formed. An insulator layer 2 and a SiGe layer 1 are formed on a silicon substrate 3.

[0041]

According to the present invention, at least the SiG
In a method for manufacturing a semiconductor substrate having an e-layer laminated,
A semiconductor substrate having an insulator layer with good withstand voltage can be provided.

According to the method of manufacturing a semiconductor device of the present invention, a semiconductor device having a field-effect transistor formed using the semiconductor substrate obtained by the above-described method of manufacturing a semiconductor substrate can be obtained. A semiconductor device which consumes power and has excellent withstand voltage characteristics can be obtained.

[Brief description of the drawings]

FIG. 1 is a process sectional view of a method of manufacturing a semiconductor substrate according to an embodiment of the present invention.

FIG. 2 is a process sectional view of a method for manufacturing a semiconductor substrate according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view of a semiconductor substrate according to an embodiment of the present invention.

FIG. 4 is a cross-sectional view of a conventional semiconductor substrate.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... SiGe layer 2 ... Insulator layer 3 ... Silicon substrate 4 ... Oxygen ion 5 ... Silicon region into which oxygen ion was implanted 6 ... Sloped SiGe layer 7 ... Dislocation 8 ... Defect 9 ... Buried oxide film 10 ... Silicon layer 11 ... Silicon Oxide film

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F110 AA01 AA09 AA11 CC02 DD05 DD13 DD24 EE09 FF02 FF23 GG01 GG02 GG12 GG19 GG24 GG25 GG42 GG57 HJ01 HJ13

Claims (8)

[Claims] A step of forming a SiGe layer on the first silicon layer; implanting oxygen ions below an interface between the SiGe layer and the first silicon layer; annealing the first silicon layer; A method for manufacturing a semiconductor substrate, comprising a step of forming an insulator layer in a layer. 2. The semiconductor according to claim 1, wherein said step of forming said insulator layer comprises implanting oxygen ions such that a peak of oxygen ion concentration is located below an interface between said SiGe layer and said first silicon layer. Substrate manufacturing method. 3. The method according to claim 1, further comprising the step of forming a second silicon layer on said SiGe layer. 4. The method according to claim 3, wherein a step of increasing the Ge concentration of the SiGe layer is performed after the step of forming the insulator layer and before the step of forming the second silicon layer. A method for manufacturing a semiconductor substrate. 5. The method according to claim 4, wherein the step of increasing the Ge concentration of the SiGe layer is performed by heating the semiconductor substrate in an oxidizing atmosphere. 6. The method of manufacturing a semiconductor substrate according to claim 5, wherein a step of removing the oxide film formed on the SiGe layer by a step of heating the semiconductor substrate in an oxidizing atmosphere is performed. 7. The SiGe layer has a Ge concentration of 1 when formed.
2. The method for manufacturing a semiconductor substrate according to claim 1, wherein the content is at least atomic% and not more than 15 atomic%. 8. A step of forming a SiGe layer on the first silicon layer, implanting oxygen ions below an interface between the SiGe layer and the first silicon layer, annealing the first silicon layer, Forming an insulator layer in the layer; forming a second silicon layer on the SiGe layer; and forming a field-effect transistor using the second silicon layer as a channel region. A method for manufacturing a semiconductor device, comprising: