JP2001060676A - Computing method of interface state density - Google Patents

Abstract

PROBLEM TO BE SOLVED: To readily and in approximation compute interface state density on the interface of an SOI(silicon-on-insulator) thin-film and an insulating layer, in an SOI substrate, even when impurity concentration in the SOI thin-film cannot be obtained accurately. SOLUTION: The interface state density on the interface of an SOI thin-film 14 and an insulating layer 13 in an SOI substrate 10 is computed by means of a pseudo-MOSFET, on the basis of the formula Dit=(|Vth-V0|-A)×(Cox/q) (In the formula, Dit represents interface state density, Vth the gate voltage at strong inversion start, V0 the gate voltage when a depletion layer reached the surface of an SOI thin-film 14, Cox the capacitance per the unit area of the insulating layer 13, (q) element charges and A are a constant correction value computed by the ceiling value of impurity concentration in the SOI thin- film 14 and the film thickness of the SOI thin-film 14). Here, when P-type or N-type impurity concentration in the SOI thin-film 14 is 1×1014-1×1017 atoms/cm3 and the film thickness of the SOI thin-film 14 is at a value from 30 nm to 300 nm, it is desirable that the correction value (A) take a fixed value within a range of -0.1 to 0.8.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pseudo MO
The present invention relates to a method for calculating an interface state density at an interface between an SOI thin film of an SOI substrate and an insulating layer by using an SFET.

[0002]

2. Description of the Related Art In a device using SOI (Silicon-On-Insulator), particularly in a device called full depletion,
OI thin films are becoming thinner. Therefore, this kind of interface state density in the SOI substrate is an important parameter that affects the channel control of the SOI-MOSFET device together with the fixed charge in the insulating layer. That is, the interface state density has a great influence on the design of the threshold voltage of the device, and furthermore, the current drive capability of the device is deteriorated, the sub-threshold region characteristics are deteriorated, the breakdown voltage between the source and the drain is poor, and the leakage current is reduced. It is important as a parameter related to an increase, a decrease in switching speed, an increase in power consumption due to induction of a parasitic bipolar operation, and the like.

Conventionally, this type of interface state density has been
A calculation method using an FET has been proposed (K. Manh
eusden et.al., Proceedings IEEE International SOI
Conference (1997) pp.64). As shown in FIG. 1, this pseudo MOSFET differs from a normal MOSFET in that
The gate electrode 1 is provided on the bottom surface of the silicon substrate 11 of the OI substrate 10.
2 and the insulating layer 13 is used as a gate oxide film, and the drain probe 15 and the source probe 16 are respectively brought into contact with the surface of the SOI thin film 14 on the insulating layer. Then, a gate voltage Vg is applied to the gate electrode, a drain voltage Vd is applied to the drain probe 16, and the source probe 16 is grounded. Reference numeral 14a is a depletion layer. In the conventional method of calculating using this pseudo MOSFET, S
When the OI thin film 14 is p-type, the drain current (Id) and the gate voltage (Vg) shown in FIG.
Based on the Id-Vg characteristic diagram plotted as r), V _FB (gate voltage at which the potential in the substrate becomes flat in the depth direction) is used as an extrapolation value of the linear region on the accumulation side and the inversion side of the gate voltage. And V _th (gate voltage at the start of strong inversion). In FIG. 2, Vd is set to 0.4V. Then, the interface state density D _it is calculated by substituting these into the following equation (2).

[0004]

(Equation 2)

Where V _th is the gate voltage at the start of strong inversion,
V _FB is the gate voltage at which the potential in the substrate becomes flat in the depth direction, q is the elementary charge, N _A is the concentration of boron as an acceptor impurity, t _soi is the thickness [nm] of the SOI thin film, and C _ox is the insulating layer. Φ _F is a function of band gap and temperature (Φ _F = (kT / q) ln (N _A / n _i ), n _i : intrinsic carrier density). D _it (Φ _S = 2Φ _F ) means the interface state density where the surface potential Φ _S is 2Φ _F. When the SOI thin film 14 is an n-type, the above equation (2) is expressed by the following equation (3). Equation (3)
In, N _D is the donor impurity concentration. Φ _F is Φ
_F = − (kT / q) ln (N _D / n _i )

[0006]

(Equation 3)

[0007]

However, the value obtained by adding the first and second terms on the right side of the equation (2) is a function of the boron concentration N _A which is an impurity of the acceptor as shown in FIG. , N _A changes, this value changes greatly. Even if the N _A is obtained by another method, N _A is easily affected by the environment in the process of manufacturing the silicon substrate. That is, in a normal clean room in a silicon substrate manufacturing process, a HEPA filter (high efficiency particulat) is used.
Substrates are easily contaminated with traces of boron due to boron in the components of the e air filter). If the substrate is a normal bulk wafer, a small amount of boron contamination does not pose a problem since the gettering center exists in the wafer. But S
OI wafers (substrates) have an oxide film under the SOI thin film, so it is difficult to expect a gettering effect on the substrate, and even if there is a tendency for boron to segregate in the oxide film, compared to a bulk wafer. easily boron remains in the SOI thin film in SOI substrates, the N _a is likely to vary. For this reason, the conventional method cannot calculate the interface state density D _it unless the boron concentration N _A in the SOI thin film is accurately obtained. This holds true for the n-type equation (3) in the same way as for the p-type one.
Unless accurately determine the donor impurity concentration N _D of OI in the thin film, it was not possible to calculate the interface state density D _it.
An object of the present invention is to easily and approximately calculate an interface state density at an interface between an SOI thin film and an insulating layer of an SOI substrate even when an impurity concentration in the SOI thin film cannot be accurately obtained. It is to provide a method.

[0008]

The invention according to claim 1 is
As shown in FIG. 1, this is an improvement in a method of calculating an interface state density at an interface between an SOI thin film 14 of an SOI substrate 10 and an insulating layer 13 by using a pseudo MOSFET. The characteristic configuration is to calculate the interface state density (D _it ) based on the following equation (1).

[0009]

(Equation 4)

Where D _it is the interface state density, V _th is the gate voltage at the start of strong inversion, V ₀ is the gate voltage when the depletion layer reaches the surface of the SOI thin film, and _Cox is the unit area per unit area of the insulating layer. The capacitance, q is the elementary charge, and A is a constant correction value calculated from the upper limit of the impurity concentration in the SOI thin film and the thickness of the SOI thin film. Since the constant correction value A in the above equation (1) is relatively little affected by the impurity concentration in the SOI thin film, even when the impurity concentration in the SOI thin film cannot be accurately obtained, the constant correction value A can be obtained by using the SOI thin film and the insulating layer of the SOI substrate. Can easily and approximately calculate the interface state density D _it at the interface.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION An SOI substrate of the present invention is a SOI substrate, an insulating substrate, or a silicon thin film formed on a substrate having an insulating thin film on the surface by a method of bonding silicon substrates together via an insulating film. After implanting high-concentration oxygen ions into an SOI substrate or a silicon substrate formed by a method of depositing silicon, annealing is performed at a high temperature to form a buried oxide layer in a region at a predetermined depth from the surface of the silicon substrate. And an SOI substrate formed by a SIMOX method using the SOI thin film on the surface side as an active region.

Next, the basis for deriving the above equation (1) will be described. The inventor has assumed that the pseudo (P) shown in FIG.
By examining the model for the Id-Vg characteristic of the (seudo) MOSFET, in addition to the above V _FB (gate voltage at which the surface potential of the substrate becomes flat) and V _th (gate voltage at the start of strong inversion), an important gate The voltage value V ₀ is calculated as Id−Vg
Found in the properties. As shown in FIG.
The drain probe 15 and the source probe 16 are respectively brought into contact with the surface of the SOI thin film 14 of FIG.
, The depletion layer 14a starts to spread from the interface between the SOI thin film 14 and the insulating layer 13, and eventually reaches the surface of the SOI thin film 14. V ₀ is the gate voltage at this time, and is given by the following equation (4).

[0013]

(Equation 5)

Here, V ₀ is the gate voltage when the depletion layer reaches the surface of the SOI thin film, V _FB is the gate voltage at which the surface potential of the substrate becomes flat, q is the elementary charge, N _A is the boron concentration as an acceptor impurity, t _soi is the thickness of the SOI thin film [n
m], _Cox is the capacitance per unit area of the insulating layer ( _Cox = (ε ₀
ε _ox ) / t _BOX ), ε ₀ is the dielectric constant of vacuum, ε _Si is the relative dielectric constant of silicon, ε _ox is the relative dielectric constant of the insulating layer (silicon oxide film), and t _BOX is the thickness of the insulating layer [nm]. ]. This equation (4)
Then, when V _FB is erased from Expression (1) described above, Expression (5) is obtained.

[0015]

(Equation 6)

As shown in FIG. 4, when the boron concentration in the SOI thin film is as low as 1 × 10 ¹⁷ atoms / cm ³ or less, V ₀ is the lowest in the drain current of the Id-Vg characteristic. It is considered to correspond to the gate voltage value (arrow in FIG. 4). Here, the SOI substrate is a SIMOX wafer, and the raw material wafer has a resistivity of 8.5 to 11.5 Ωc.
m, the thickness of this SOI thin film is 200 nm, and the thickness of the insulating layer is 400 nm. Here, the value obtained by subtracting the second term from the first term on the right side of the equation (5) is expressed as a function of the boron concentration N _A as shown in FIG. However, even if the boron concentration N _A changes, this value has a narrower fluctuation range than that of FIG. For example, in FIG.
If _soi is 200 nm (△ mark in FIG. 6), boron concentration N _A is 1 × 10 ¹⁶ at from 1 × 10 ¹⁴ atoms / cm ³
When varying to oms / cm ³ , this value varies from 1 to 5. On the other hand, in FIG. 5, when the thickness t _{soi of the} SOI thin film is 200 nm (indicated by Δ in FIG. 5), the boron concentration N _A is 2 × 10 ¹⁴ atoms / cm ³ to 3 × 10
When varying to ¹⁶ atoms / cm ³ , this value varies only slightly in the range -0.2 to 0.5. Therefore, a value obtained by subtracting the second term from the first term on the right side of the above equation (5) is expressed as the following equation (6) as a constant correction value A, and this is substituted into the equation (5). Equation (1) described above is obtained.

[0017]

(Equation 7)

The thickness t _{soi of the} SOI thin film shown in FIG.
Table 1 shows the range of the correction value A when the boron concentration N _A changes for each.

[0019]

[Table 1]

In the above embodiment, boron of the p-type acceptor is shown as an impurity of the SOI thin film as an impurity of the SOI thin film. However, the impurity of the SOI thin film of the present invention is not limited to the p-type impurity, but may be an n-type impurity. Of phosphorus, antimony and arsenic. When the SOI thin film 14 is of an n-type, the above equations (4) to (6) are obtained by the following equation (7).
To (9). In these formulas, N _D is the donor impurity concentration.

[0021]

(Equation 8)

In consideration of the above, the upper limit of the p-type or n-type impurity concentration in the SOI thin film is 1 × 10 ¹⁷ atoms / c.
m ³ and the thickness t _{soi of the} SOI thin film is 30 nm or more and 3
When it is equal to or less than 00 nm, the correction value A is -1.0 to
It is a constant value in the range of 0.8. More specifically, SO
When the thickness t _{soi of the} I thin film is 30 nm or more and less than 50 nm, the correction value A is a constant value in the range of 0.4 to 0.8. When the thickness t _{soi of the} SOI thin film is not less than 50 nm and less than 80 nm, the correction value A is 0.3 to 0.5.
It is a constant value in the range of 7. The thickness t of the SOI thin film
_{When soi} is 80 nm or more and less than 100 nm, the correction value A is a constant value in the range of 0 to 0.7. Further S
When the thickness t _{soi of the} OI thin film is not less than 100 nm and less than 150 nm, the correction value A is a constant value in the range of −1.0 to 0.7.

The upper limit of the p-type or n-type impurity concentration in the SOI thin film is 1 × 10 ¹⁶ atoms / cm ³ ,
When the thickness t _{soi of the} SOI thin film is not less than 30 nm and not more than 300 nm, the correction value A is a constant value in the range of -1.0 to 0.75. More specifically, when the thickness t _{soi of the} SOI thin film is 30 nm or more and less than 50 nm, the correction value A is a constant value in the range of 0.4 to 0.75.
When the thickness t _{soi of the} SOI thin film is 50 nm or more and less than 80 nm, the correction value A is a constant value in the range of 0.4 to 0.7. Further, the thickness t _{soi of the} SOI thin film is 80
When it is not less than 100 nm and less than 100 nm, the correction value A is a constant value in the range of 0.4 to 0.7. When the thickness t _{soi of the} SOI thin film is 100 nm or more and less than 150 nm, the correction value A is a constant value in the range of 0.4 to 0.7. When the thickness t _{soi of the} SOI thin film is 150 nm or more and less than 200 nm, the correction value A is 0.3 to
It is a constant value in the range of 0.7. When the thickness t _{soi of the} SOI thin film is not less than 200 nm and less than 250 nm, the correction value A is a constant value in the range of 0.2 to 0.6. Further, the thickness t _{so of the} SOI thin film is 250 nm or more and 300
When it is less than nm, the correction value A is −0.1 to 0.6.
Is a constant value in the range of.

[0024]

As described above, in the conventional method for calculating the interface state density, the interface state density could not be calculated unless the impurity concentration in the SOI thin film was accurately known. According to the invention, if the approximate value of the impurity concentration, the thickness of the SOI thin film, and the thickness t _BOX of the insulating layer corresponding to the capacitance C _ox per unit area of the insulating layer are known, based on the equation (1), The interface state density can be obtained simply and approximately.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a structure of a pseudo (Pseudo) MOSFET.

FIG. 2 is an Id-Vg characteristic diagram in which a drain current and a gate voltage are respectively linearly plotted.

FIG. 3 is a configuration diagram of a pseudo MOSFET showing a state in which a depletion layer extends from an interface of an insulating layer.

FIG. 4 Pseudo MOSFET using SIMOX wafer
FIG.

FIG. 5 shows that when the boron concentration in the SOI thin film changes, S
The figure which shows the range where the correction value A of this invention fluctuates with the thickness of the OI thin film.

FIG. 6 shows that when the boron concentration in the SOI thin film changes, S
The figure which shows the range where the conventional correction value fluctuates with the thickness of the OI thin film.

[Explanation of symbols]

 REFERENCE SIGNS LIST 10 SOI substrate 11 silicon substrate 12 gate electrode 13 insulating layer 14 SOI thin film 14 a depletion layer 15 drain probe 16 source probe

Claims (14)

[Claims] An SOI substrate (10) using a pseudo MOSFET.
In the method for calculating the interface state density at the interface between the SOI thin film (14) and the insulating layer (13), the interface state density (D _it ) is calculated based on the following equation (1). To calculate the interface state density. (Equation 1) Here, D _it is the interface state density, V _th is the gate voltage at the start of strong inversion, V ₀ is the gate voltage when the depletion layer reaches the surface of the SOI thin film, _Cox is the capacitance per unit area of the insulating layer, q Is the elementary charge, and A is the upper limit of the impurity concentration in the SOI thin film and SOI.
This is a constant correction value calculated based on the thickness of the thin film. 2. The p-type or n-type impurity concentration in the SOI thin film is 1 × 10 ¹⁴ to 1 × 10 ¹⁷ atoms / cm ³ , and the thickness (t _soi ) of the SOI thin film is 30 nm or more and 300 nm or more.
2. The method for calculating an interface state density according to claim 1, wherein the correction value (A) is a constant value in a range of -1.0 to 0.8 when: 3. When the thickness (t _soi ) of the SOI thin film is 30 nm or more and less than 50 nm, the correction value (A) is 0.4 to 0.8.
3. The method for calculating the interface state density according to claim 2, wherein the constant is a constant value within a range of: 4. When the thickness (t _soi ) of the SOI thin film is 50 nm or more and less than 80 nm, the correction value (A) is 0.3 to 0.7.
3. The method for calculating the interface state density according to claim 2, wherein the constant is a constant value within a range of: 5. The interface state according to claim 2, wherein when the thickness (t _soi ) of the SOI thin film is 80 nm or more and less than 100 nm, the correction value (A) is a constant value in the range of 0 to 0.7. How to calculate density. 6. When the thickness (t _soi ) of the SOI thin film is 100 nm or more and less than 150 nm, the correction value (A) is −1.0 to
3. The method for calculating the interface state density according to claim 2, wherein the constant is a constant value in a range of 0.7. 7. The p-type or n-type impurity concentration in the SOI thin film is 1 × 10 ¹⁴ to 1 × 10 ¹⁶ atoms / cm ³ , and the thickness (t _soi ) of the SOI thin film is 30 nm or more and 300 nm or more.
2. The method for calculating an interface state density according to claim 1, wherein the correction value (A) is a constant value in a range of -1.0 to 0.75 when: 8. When the thickness (t _soi ) of the SOI thin film is 30 nm or more and less than 50 nm, the correction value (A) is 0.4 to 0.7.
The method for calculating an interface state density according to claim 7, wherein the interface state density is a constant value in a range of 5. 9. When the thickness (t _soi ) of the SOI thin film is 50 nm or more and less than 80 nm, the correction value (A) is 0.4 to 0.7.
8. The method for calculating the interface state density according to claim 7, wherein the constant is in a range of: 10. When the thickness (t _soi ) of the SOI thin film is 80 nm or more and less than 100 nm, the correction value (A) is 0.4 to
8. The method for calculating an interface state density according to claim 7, wherein the constant is in a range of 0.7. 11. The thickness (t _soi ) of the SOI thin film is 100 nm.
When it is less than 150 nm, the correction value (A) is 0.4 to
8. The method for calculating an interface state density according to claim 7, wherein the constant is in a range of 0.7. 12. The SOI thin film has a thickness (t _soi ) of 150 nm.
When less than 200 nm, the correction value (A) is 0.3 to
8. The method for calculating an interface state density according to claim 7, wherein the constant is in a range of 0.7. 13. The SOI thin film has a thickness (t _soi ) of 200 nm.
When it is less than 250 nm, the correction value (A) is 0.2 to
The method for calculating an interface state density according to claim 7, wherein the constant is a constant value in a range of 0.6. 14. The SOI thin film has a thickness (t _soi ) of 250 nm.
When it is less than 300 nm, the correction value (A) is -0.1
8. The method for calculating an interface state density according to claim 7, wherein the interface state density is a constant value in a range of 0.6 to 0.6.