GB1363588A - Mehtod of making a semiconductor device - Google Patents
Mehtod of making a semiconductor deviceInfo
- Publication number
- GB1363588A GB1363588A GB2882172A GB2882172A GB1363588A GB 1363588 A GB1363588 A GB 1363588A GB 2882172 A GB2882172 A GB 2882172A GB 2882172 A GB2882172 A GB 2882172A GB 1363588 A GB1363588 A GB 1363588A
- Authority
- GB
- United Kingdom
- Prior art keywords
- semi
- source
- regions
- conductor
- drain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 239000000463 material Substances 0.000 abstract 4
- 230000000873 masking effect Effects 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 1
- 239000002019 doping agent Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
1363588 Semi-conductor devices RCA CORPORATION 20 June 1972 [25 June 1971] 28821/72 Heading H1K Semi-conductor regions, such as the source and drain regions 16, 18 of an IGFET, are formed by diffusion into unmasked areas of the surface 14 of a semi-conductor body 12, parts of which areas are covered by material 32, 34 which is permeable to the diffusant and which is either conductive initially or is rendered conductive by the presence of the diffusant. Relatively shallow portions 60, 62 of the regions 16, 18 thus occur beneath the material 32, 34. The material 32, 34, which may also extend up on to the masking layer 26 as source and drain electrode layers 28, 30, preferably comprises Si, the gate electrode 24 then also being made of Si. The gate electrode 24 preferably initially covers only part of the masked area between the source and drain windows, self-alignment being obtained by taking away the edges of the masking layer thus exposed before diffusing in the dopant, which may be B or P. The material 32, 34 may alternatively be Ga.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15681371A | 1971-06-25 | 1971-06-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1363588A true GB1363588A (en) | 1974-08-14 |
Family
ID=22561196
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB2882172A Expired GB1363588A (en) | 1971-06-25 | 1972-06-20 | Mehtod of making a semiconductor device |
Country Status (7)
Country | Link |
---|---|
BE (1) | BE785397A (en) |
CA (1) | CA968468A (en) |
DE (1) | DE2230172B2 (en) |
FR (1) | FR2143418B1 (en) |
GB (1) | GB1363588A (en) |
IT (1) | IT956761B (en) |
SE (1) | SE383940B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2389233A1 (en) * | 1977-04-29 | 1978-11-24 | Ibm | METHOD OF MANUFACTURING A FIELD EFFECT TRANSISTOR WITH INSULATED DOOR USING TWO OR THREE MASKS |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4016587A (en) * | 1974-12-03 | 1977-04-05 | International Business Machines Corporation | Raised source and drain IGFET device and method |
FR2417853A1 (en) * | 1978-02-17 | 1979-09-14 | Thomson Csf | PROCESS FOR MAKING A MOS AND TRANSISTOR TYPE TRANSISTOR MADE ACCORDING TO THIS PROCEDURE |
-
1972
- 1972-05-23 CA CA142,806A patent/CA968468A/en not_active Expired
- 1972-06-20 GB GB2882172A patent/GB1363588A/en not_active Expired
- 1972-06-21 IT IT2601072A patent/IT956761B/en active
- 1972-06-21 SE SE821572A patent/SE383940B/en unknown
- 1972-06-21 DE DE19722230172 patent/DE2230172B2/en active Pending
- 1972-06-23 FR FR7222873A patent/FR2143418B1/fr not_active Expired
- 1972-06-23 BE BE785397A patent/BE785397A/en unknown
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2389233A1 (en) * | 1977-04-29 | 1978-11-24 | Ibm | METHOD OF MANUFACTURING A FIELD EFFECT TRANSISTOR WITH INSULATED DOOR USING TWO OR THREE MASKS |
Also Published As
Publication number | Publication date |
---|---|
FR2143418B1 (en) | 1978-03-03 |
BE785397A (en) | 1972-10-16 |
FR2143418A1 (en) | 1973-02-02 |
SE383940B (en) | 1976-04-05 |
CA968468A (en) | 1975-05-27 |
DE2230172B2 (en) | 1975-09-25 |
IT956761B (en) | 1973-10-10 |
DE2230172A1 (en) | 1972-12-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PLNP | Patent lapsed through nonpayment of renewal fees |