DE3436001A1 - Electrostatic glass-soldering of semiconductor components - Google Patents
Electrostatic glass-soldering of semiconductor componentsInfo
- Publication number
- DE3436001A1 DE3436001A1 DE19843436001 DE3436001A DE3436001A1 DE 3436001 A1 DE3436001 A1 DE 3436001A1 DE 19843436001 DE19843436001 DE 19843436001 DE 3436001 A DE3436001 A DE 3436001A DE 3436001 A1 DE3436001 A1 DE 3436001A1
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- glass
- soldering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01011—Sodium [Na]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01032—Germanium [Ge]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01058—Cerium [Ce]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Joining Of Glass To Other Materials (AREA)
Abstract
Description
Elektrostatisches Glaslöten von Haibleiterbauteilen.Electrostatic glass soldering of semiconductor components.
Die Erfindung betrifft ein Glaslötverfahren zum Verbinden von Bauelementen mit einer Trägerscheibe.The invention relates to a glass soldering method for connecting components with a carrier disk.
In Planartechnik auf Halbleiterwafern (zum Beispiel Silizium) hergestellte Bauteile (Dioden, Drucksensoren, Fotoelementarray usw.) werden vor der Montage in Gehäuse oder auf Schaltungen auf einer Trägerscheibe gleichen oder thermisch angepaßten Materials zum Zwecke der Stabilitätsverbesserung befestigt. Diese Verbindungstechnologie ist mit der Wahl der Trägerscheibe verknüpft und beides für die späteren Eigenschaften der Bauteile von entscheidender Bedeutung.Manufactured using planar technology on semiconductor wafers (e.g. silicon) Components (diodes, pressure sensors, photo element arrays, etc.) are in Housing or circuits on a carrier disk the same or thermally adapted Material attached for the purpose of stability improvement. This connection technology is linked to the choice of the carrier disk and both for the later properties the components are of crucial importance.
In den US-PS 3 918 019 sowie 3 397 278 wird ein Verfahren beschrieben, das eine starre Verbindung bei mindestens 2500C unter Anwendung einer Gleichspannung von 500 V auf Glasscheiben ermöglicht. Die Nachteile dieses sogenannten "Anodischen Verbindens liegen in der Tatsache, daß als Trägermaterial kein gleichartiges Halbleitermaterial und kein Quarzglas als Träger verwendet werden kann, sondern vorwiegend nur alkalihaltige Silikatglasscheiben und daß außerdem die miteinander zu verbindenden Oberflächen optisch plan poliert sein müssen.US Pat. No. 3,918,019 and US Pat. No. 3,397,278 describe a process a rigid connection at at least 2500C using a DC voltage of 500 V on glass panes. The disadvantages of this so-called "anodic The connection lies in the fact that no semiconductor material of the same type is used as the carrier material and no quartz glass can be used as a carrier, but predominantly only alkaline glass Silicate glass panes and that also the surfaces to be connected to one another must be optically polished flat.
Weitere bekannte Verbindungsverfahren stellen das Löten mit Metallen oder Gläsern dar, sowie das Legieren von Metallen (Gold oder Aluminium) über eutektische Verbindungen zwischen den zu verbindenden Oberflächen. Diese Nur-Temperatur-Verfahren nehmen die Diffusion störender oder vergiftender Materialien in das Halbleiterbauteil in Kauf.Other known connection methods are soldering with metals or glasses, as well as the alloying of metals (gold or aluminum) via eutectic Connections between the surfaces to be connected. This temperature-only method take the diffusion more disruptive or poisoning materials in the semiconductor component in purchase.
Der Erfindung liegt die Aufgabe zugrunde, die erwähnten Nachteile zu beseitigen. Die Lösung nach dem Kennzeichen des Anspruchs 1 ermöglicht die Verwendung aller gewünschten Materialien als Träger, indem auf deren Oberflächen eine dünne Schicht eines alkalihaltigen Glases aufgebracht wird. Dies kann wie bei der bekannten Glaslöttechnik im Siebdruckverfahren geschehen (übliche Schichtdicken 20 bis 100 um) oder aber durch Aufdampfen oder Aufstäuben (Sputtern) entsprechend beständiger alkalihaltiger Gläser. Dieses bevorzugte Verfahren ermöglicht die Aufbringung sehr gleichmäßiger Schichten in einem größeren Schichtdickenbereich frei von organischen Bindemitteln.The invention is based on the mentioned disadvantages to eliminate. The solution according to the characterizing part of claim 1 enables the use all desired materials as a carrier by placing a thin Layer of an alkaline glass is applied. This can be done as with the known Glass soldering is done in the screen printing process (usual layer thicknesses 20 to 100 um) or by vapor deposition or dusting (sputtering) correspondingly more resistant alkaline glasses. This preferred method is very easy to apply more uniform layers in a larger layer thickness range free of organic Binders.
So kann es sinnvoll sein, bei vorhandenen polierten Verbindungsoberflächen Schichten von wenigen um zu wählen (zum Beispiel 4 ... 10 um). Diese sehr dünnen Schichtdicken vermeiden besonders bei der Wahl thermisch falsch angepaßter Verbindungspartner die Ausbildung thermischer Spannungen. So wird erfindungsgemäß die Möglichkeit geschaffen, eine Verbindung zwischen zum Beispiel Siliziumwafern untereinander oder aber mit Quarzglasscheiben zu schaffen. Aber auch die dickeren Schichten des Siebdruckverfahrens können erfindungsgemäß zum Verbinden weniger ebener Oberflächenstrukturen genutzt werden, ohne aber die Nachteile des Temperaturglaslötens zu besitzen.So it can be useful with existing polished connection surfaces Layers of a few to choose from (for example 4 ... 10 µm). These very thin Avoid layer thicknesses, especially when choosing connection partners that are thermally incorrectly adapted the formation of thermal stresses. Thus, according to the invention, the possibility is created a connection between, for example, silicon wafers with one another or with To create quartz glass panes. But also the thicker layers of the screen printing process can be used according to the invention to connect less planar surface structures without having the disadvantages of temperature glass soldering.
Wenn nach der Lösung der Erfindung die Trägerscheibe des gewünschten Werkstoffs mit der dünnen Glasschicht auf der zu verbindenden Oberfläche versehen ist, wird die Waferscheibe mit den Halbleiterbauteilen mit ihrer Verbindungsseite auf die mehr oder weniger dünne Glasschicht der Trägerscheibe aufgelegt und sandwichartig zwischen zwei gegeneinander isolierte Metallscheiben gelegt. Beide Metallplatten, von denen die oben aufliegende gleichzeitig als Beschwerung dient, werden an eine Gleichspannungsquelle derart angeschlossen, daß die Bauelementen-Scheibe mit der Anode in Berührung ist, die glasbeschichtete Trägerscheibe mit der Katode. Dieser "Sandwichaufbau" wird nun in einem Ofen (sinnvollerweise in einem Vakuumofen) auf Temperaturen zwischen 2000 und max. 5000C aufgeheizt und bei Erreichen der jeweils gewünschten Temperatur die Gleichspannung für die Dauer weniger Minuten (zum Beispiel 4 ... 20 Min) eingeschaltet. Nach Ablauf dieser Zeit wird der Ofen ausgeschaltet. Die Spannung wird spätestens nach der Abkühlung und vor der Entnahme der nun fest miteinander verbundenen Bauteile-Trägerscheibe ebenfalls abgeschaltet.If, according to the solution of the invention, the carrier disk of the desired Material provided with the thin glass layer on the surface to be connected is, the wafer with the semiconductor components with its connection side placed on the more or less thin glass layer of the carrier disk and sandwiched placed between two mutually insulated metal disks. Both metal plates, of which the one on top also serves as a weight, are attached to a DC voltage source connected in such a way that the components disk is in contact with the anode, the glass-coated carrier disk with the cathode. This "sandwich structure" is now in an oven (meaningfully in a vacuum oven) heated to temperatures between 2000 and max. 5000C and when the respective desired temperature, the DC voltage for a period of a few minutes (for example 4 ... 20 min) switched on. After this time has elapsed, the furnace is switched off. The tension is fixed at the latest after the cooling and before the removal of the now Interconnected components carrier disk also switched off.
Weitere Einzelheiten der Erfindung sind Gegenstand der Unteransprüche.Further details of the invention are the subject of the subclaims.
Folgende Vorteile sind mit der Erfindung gegenüber den oben beschriebenen, bekannten Verfahren zu erreichen: 1. Es können nicht nur optisch plane Oberflächen (zum Beispiel die Oberflächenseite planar hergestellter Bauelemente) verbunden werden. Die unebene Strukturoberfläche wird durch die Glasschicht der Trägerscheibe ausgeglichen. Die angelegte Gleichspannung zieht die beweglichen Kationen (vorwiegend Natrium) aus der Glasschicht ab, wodurch eine Verarmung an Ladungsträgern in der Grenzschicht und damit ein elektrostatisches Potential mit hohen Anziehungskräften entsteht. Diese Kräfte sorgen für eine lötähnliche Verbindung mit dem viskosen, aber noch nicht flüssigen Glas, also bei einer wesentlich niedrigeren Temperatur als der sonst üblichen Löttemperatur.The following advantages are achieved with the invention over those described above, known methods to achieve: 1. It can not only optically plane surfaces (for example the surface side of components manufactured in a planar manner). The uneven structure surface is evened out by the glass layer on the carrier plate. The applied DC voltage pulls the mobile cations (mainly sodium) from the glass layer, causing a depletion of charge carriers in the boundary layer and thus an electrostatic potential with high attractive forces is created. These forces create a solder-like connection with the viscous, but still non-liquid glass, i.e. at a significantly lower temperature than usual usual soldering temperature.
2. Flüssiges Glas mit seinen beweglichen Natriumionen ist für Halbleiterbauteile sehr gefährlich. Bei einem "normalen Glaslötprozeß zerstören die diffundierfreudigen Natriumionen den Halbleiter. Das elektrostatische Glas- löten" verhindert jedoch die Natriumionendiffusion in Richtung Halbleiter aufgrund des angelegten Potentiales. Die Natriumionen werden vom Halbleiterbauteil weg zur Katode transportiert. Eine Zerstörung des Halbleiters durch Natriumionen wird vermieden.2. Liquid glass with its mobile sodium ions is used for semiconductor components very dangerous. In a "normal glass soldering process, the diffusing ones destroy Sodium ions the semiconductor. The electrostatic glass soldering "prevented however the sodium ion diffusion towards semiconductors due to the applied Potential. The sodium ions are transported away from the semiconductor component to the cathode. Destruction of the semiconductor by sodium ions is avoided.
3. Die Dicke der Glasschicht wird beim "elektrostatischen Glaslöten" stark reduziert, weil die Potentialkräfte die beiden zu verbindenden Scheiben zusammenpressen und das überschüssige Glas weggedrückt wird. Das ist besonders wichtig im Hinblick auf die thermischen Ausdehnungsspannungen bei nicht völligem Übereinstimmen des Ausdehnungsverhaltens von Glas und Halbleiter-bzw. Trägerscheibe.3. The thickness of the glass layer is determined by "electrostatic glass soldering" greatly reduced because the potential forces press the two disks to be connected together and the excess glass is pushed away. This is especially important in view on the thermal expansion stresses if the Expansion behavior of glass and semiconductors or. Carrier disk.
4. Das thermische Ausdehnungsverhalten des Glases wird durch die Reduzierung des Natriumanteiles durch das angelegte Spannungspotential verändert. Es tritt eine Erniedrigung des Koeffizienten ein, was sich ebenfalls in einer Verringerung vorhandener thermischer Spannung äußert.4. The thermal expansion behavior of the glass is due to the reduction the sodium content is changed by the applied voltage potential. There occurs a Decrease in the coefficient, which also results in a decrease in existing thermal stress.
5. Quarzglasscheiben und Halbleitermaterialscheiben niedriger Wärmeausdehnung können mit Glasloten nicht gelötet werden, da es für diese Ausdehnungsbereiche keine angepaßten Glaslote oder Gläser gibt. Von einem auf dem Markt erhältlichen Aufdampfglas können durch Verdampfen und Kondensation im Hochvakuum dünne Glasfilme auch auf Quarzglas- und Halbleiterscheiben er--zeugt und diese auf diese Weise für das elektrostatische Glaslöten verwendbar gemacht werden. Zwischen Träger- und Bauelementescheibe aus gleichem Werkstoff kann ohne diese Glastrennschicht kein elektrostatisches Potential erzeugt werden. Auf diese Weise sind bereits ab einer aufgedampften Glasschicht von 4 um mit einer Gleichspannung von 40 V bei max. 4000C feste Verbindungen zu erzielen. Für optisch nicht plane Oberflächen werden, je nach Oberflächengüte, dickere Aufdampfschichten benötigt.5. Quartz glass disks and semiconductor material disks with low thermal expansion cannot be soldered with glass solders as there are no adapted glass solders or glasses. From a vapor-deposition glass available on the market can also produce thin glass films through evaporation and condensation in a high vacuum Quartz glass and semiconductor wafers are produced in this way for the electrostatic Glass soldering can be made usable. Between the carrier and component washer The same material cannot have an electrostatic potential without this glass separating layer be generated. In this way, a vapor-deposited glass layer is already available of 4 µm with a direct voltage of 40 V at max. 4000C achieve. For visually not flat surfaces are, depending on the surface quality, thicker vapor deposition layers are required.
7 Patentansprüche7 claims
Claims (7)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19843436001 DE3436001A1 (en) | 1984-10-01 | 1984-10-01 | Electrostatic glass-soldering of semiconductor components |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19843436001 DE3436001A1 (en) | 1984-10-01 | 1984-10-01 | Electrostatic glass-soldering of semiconductor components |
Publications (1)
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DE3436001A1 true DE3436001A1 (en) | 1986-04-03 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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DE19843436001 Withdrawn DE3436001A1 (en) | 1984-10-01 | 1984-10-01 | Electrostatic glass-soldering of semiconductor components |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4108304A1 (en) * | 1991-03-14 | 1992-09-24 | Fraunhofer Ges Forschung | Fusing silicon water to glass backing plate - using high voltage and applied heat to secure silicon waters and ultra-thin membranes to glass backing plate |
EP0539741A1 (en) * | 1991-09-30 | 1993-05-05 | Canon Kabushiki Kaisha | Anodic bonding process with light irradiation |
DE4136075A1 (en) * | 1991-10-30 | 1993-05-06 | Siemens Ag, 8000 Muenchen, De | Anodic bonding of insulating and conductive discs to sandwich - involves using two hot plates for heating and applying pressure to minimise distortion and allow more than two discs to be bonded |
DE4243612A1 (en) * | 1991-12-25 | 1993-07-01 | Rohm Co Ltd | Anodic bonding of two substrates - comprises forming electroconductive film on one substrate and glass film on other substrate, joining and applying voltage |
DE4219132A1 (en) * | 1992-06-11 | 1993-12-16 | Suess Kg Karl | Bonded silicon@ wafer-glass or silicon@-silicon@ joint prodn. - comprises using laser light radiation to initially fix materials at spot(s) and/or lines and conventional high temp. bonding for pressure and acceleration sensors or micro-system elements |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1934217A1 (en) * | 1969-07-05 | 1971-06-09 | Leybold Heraeus Gmbh & Co Kg | Thin layer glass coating methods and comps |
DE1696110B1 (en) * | 1968-01-23 | 1971-07-01 | Jenaer Glaswerk Schott & Gen | PROCESS FOR THE PRODUCTION OF GLASSY COATINGS ON SUBSTATE MATERIALS BY VACUUM EVAPORATION USING ELECTRON BEAMS |
DE1771296A1 (en) * | 1967-05-03 | 1971-12-23 | Mallory & Co Inc P R | Isolator element |
DE2425993A1 (en) * | 1973-06-04 | 1974-12-19 | Gen Electric | BONDING PROCESS FOR DIELECTRIC INSULATION OF SINGLE CRYSTAL SEMICONDUCTORS |
US3918019A (en) * | 1974-03-11 | 1975-11-04 | Univ Leland Stanford Junior | Miniature absolute pressure transducer assembly and method |
DE2755935A1 (en) * | 1976-12-27 | 1978-07-06 | Philips Nv | DIELECTRIC COMPOSITION, SCREEN PRINTING PASTE WITH SUCH COMPOSITION AND PRODUCTS OBTAINED THROUGH THIS |
DE3110033A1 (en) * | 1980-03-17 | 1982-01-07 | Central Glass Co., Ltd., Ube, Yamaguchi | METHOD FOR PRODUCING CURVED AND PARTIAL COLORED GLASS PANELS |
-
1984
- 1984-10-01 DE DE19843436001 patent/DE3436001A1/en not_active Withdrawn
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1771296A1 (en) * | 1967-05-03 | 1971-12-23 | Mallory & Co Inc P R | Isolator element |
DE1696110B1 (en) * | 1968-01-23 | 1971-07-01 | Jenaer Glaswerk Schott & Gen | PROCESS FOR THE PRODUCTION OF GLASSY COATINGS ON SUBSTATE MATERIALS BY VACUUM EVAPORATION USING ELECTRON BEAMS |
DE1934217A1 (en) * | 1969-07-05 | 1971-06-09 | Leybold Heraeus Gmbh & Co Kg | Thin layer glass coating methods and comps |
DE2425993A1 (en) * | 1973-06-04 | 1974-12-19 | Gen Electric | BONDING PROCESS FOR DIELECTRIC INSULATION OF SINGLE CRYSTAL SEMICONDUCTORS |
US3918019A (en) * | 1974-03-11 | 1975-11-04 | Univ Leland Stanford Junior | Miniature absolute pressure transducer assembly and method |
DE2755935A1 (en) * | 1976-12-27 | 1978-07-06 | Philips Nv | DIELECTRIC COMPOSITION, SCREEN PRINTING PASTE WITH SUCH COMPOSITION AND PRODUCTS OBTAINED THROUGH THIS |
DE3110033A1 (en) * | 1980-03-17 | 1982-01-07 | Central Glass Co., Ltd., Ube, Yamaguchi | METHOD FOR PRODUCING CURVED AND PARTIAL COLORED GLASS PANELS |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4108304A1 (en) * | 1991-03-14 | 1992-09-24 | Fraunhofer Ges Forschung | Fusing silicon water to glass backing plate - using high voltage and applied heat to secure silicon waters and ultra-thin membranes to glass backing plate |
EP0539741A1 (en) * | 1991-09-30 | 1993-05-05 | Canon Kabushiki Kaisha | Anodic bonding process with light irradiation |
US5820648A (en) * | 1991-09-30 | 1998-10-13 | Canon Kabushiki Kaisha | Anodic bonding process |
DE4136075A1 (en) * | 1991-10-30 | 1993-05-06 | Siemens Ag, 8000 Muenchen, De | Anodic bonding of insulating and conductive discs to sandwich - involves using two hot plates for heating and applying pressure to minimise distortion and allow more than two discs to be bonded |
DE4136075C3 (en) * | 1991-10-30 | 1999-05-20 | Siemens Ag | Method for connecting a disk-shaped insulating body to a disk-shaped, conductive body |
DE4243612A1 (en) * | 1991-12-25 | 1993-07-01 | Rohm Co Ltd | Anodic bonding of two substrates - comprises forming electroconductive film on one substrate and glass film on other substrate, joining and applying voltage |
DE4219132A1 (en) * | 1992-06-11 | 1993-12-16 | Suess Kg Karl | Bonded silicon@ wafer-glass or silicon@-silicon@ joint prodn. - comprises using laser light radiation to initially fix materials at spot(s) and/or lines and conventional high temp. bonding for pressure and acceleration sensors or micro-system elements |
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