CN202306077U

CN202306077U - TFT-LCD (Thin film transistor-Liquid crystal display) array substrate

Info

Publication number: CN202306077U
Application number: CN201120391429XU
Authority: CN
Inventors: 马小龙; 陈虹瑞; 张骢泷
Original assignee: Shenzhen China Star Optoelectronics Technology Co Ltd
Current assignee: TCL China Star Optoelectronics Technology Co Ltd
Priority date: 2011-10-14
Filing date: 2011-10-14
Publication date: 2012-07-04
Anticipated expiration: 2021-10-14

Abstract

The utility model provides a TFT-LCD (Thin film transistor-Liquid crystal display) array substrate, comprising a gate line metal layer, a data line metal layer which is arranged with the gate line metal layer in an overlapping manner, and a plurality of layer bodies wrapped around the gate line metal layer and the data line metal layer, wherein the gate line metal layer is provided with a first gate line and a second gate line which are arranged in parallel and alternately; the data line metal layer is provided with a first data line and a second data line which are arranged in parallel and alternately; the first gate line is electrically connected with the second gate line; and the first data line is electrically connected with the second data line. By the implementation of the TFT-LCD array substrate provided by the utility model, a disconnection incidence of a TTF-LCD active matrix can be reduced, an aperture ratio of products is increased, and a product yield can be improved.

Description

The TFT-LCD array base palte

Technical field

The utility model relates to field of liquid crystal display, relates in particular to a kind of TFT-LCD array base palte.

Background technology

Because TFT (Thin Film Transistor, thin film transistor (TFT))-LCD has that volume is little, low-power consumption, advantage such as radiationless, obtains fast development in the last few years.

Liquid crystal panel is the vitals of LCD, and it comprises CF substrate and array base palte, both therebetween one deck liquid crystal.In the manufacture process of TFT-LCD array base palte, though the control of doing one's utmost, but inevitably can produce the defective of the broken string of gate line or data line, this defective not only is difficult to repair, but also can cause the huge waste on cost and the processing procedure.

As shown in Figure 1, for the structural representation that in the prior art TFT-LCD array base palte gate line and data line is broken and repair, in Fig. 1, one data line and public electrode wire are divided into two sections respectively originally, and Y, Z link together in the position respectively.When broken string takes place in the gate line of position X, can repair in the following manner, data line is interrupted with laser D1, D3, D5, the D7 position of ordering in the drawings, D2, D4, D6 point interrupt with laser in the drawings with public electrode again; And then, use high energy laser in C1, C2, C3, C4 four name a person for a particular job gate line, public electrode that belongs to the ground floor metal and data line (double layer of metal is an insulation course at interval) welding and the conducting that belongs to second layer metal.After accomplishing aforesaid operations; The direction of arrow during signal flow is as shown in Figure 1 is transmitted: gate line

-via the C1 point to data line-via the C2 point to public electrode-via the C3 point to data line-via the C4 point to gate line, realize the reparation that gate line X place is broken through above-mentioned embodiment.There is following shortcoming in above-mentioned restorative procedure:

1, repair procedure is loaded down with trivial details, repairs a place usually and opens circuit and need carry out 4-10 laser radiation, and remediation efficiency is low;

2, the influence of the double structure of public electrode design pairs of openings rate is bigger, and energy consumption increases;

3, owing to will form the purpose that bypass just can reach reparation, increased track lengths virtually, pressure drop increases on the cabling.

The utility model content

Cause repairing complicacy and the higher problem of rehabilitation cost for solving to break on the substrate in the prior art; Be necessary to provide a kind of TFT-LCD array base palte; This TFT-LCD array base palte comprises the gate line metal level, is arranged on a plurality of layers of body around this gate line metal level and this data line metal level with the overlap data line metal level that is provided with and the coating of this gate line metal level; This gate line metal level is provided with first grid polar curve and second grid line parallel and that alternately arrange, and this data line metal level is provided with first data line and second data line parallel and that alternately arrange; This first grid polar curve is electrically connected with this second grid line; This first data line is electrically connected with this second data line.

Further; These a plurality of layers of bodies comprise gate insulator, semiconductor layer, ohmic contact layer, passivation layer and transparency conducting layer composition, and this array base palte comprises gate line metal level, gate insulator, semiconductor layer, ohmic contact layer, data line metal level, passivation layer and transparency conducting layer successively;

Further, this first grid polar curve is communicated with through lead with this second grid line, and this first data line is communicated with through lead with this second data line.

Further; This gate line metal level comprises many first grid polar curves and many second grid lines; This data line metal level comprises many first data lines and many second data lines; Overlap each other with this many first data lines and these many second data lines by these many first grid polar curves and this many second grid lines and to define a plurality of pixel electrode area

Further; Be provided with thin film transistor (TFT) in this pixel electrode area; The grid of this thin film transistor (TFT) is connected with first grid polar curve or second grid line, and the source electrode of this thin film transistor (TFT) is connected with this first data line or second data line, and the drain electrode of this thin film transistor (TFT) is connected with this pixel electrode.

Further, this first grid polar curve of this transparency conducting layer and this gate line metal level and/or this second grid line formation MM CAP that partly overlaps.

Further, the lead that connects this first grid polar curve and this second grid line has many, and is arranged in parallel; The lead that connects this first data line and this second data line has many, and is arranged in parallel.

Further, this first data line of this first grid polar curve of this gate line metal level and this second grid line and this data line metal level forms many group stray capacitances with the zone that this second data line overlaps mutually.

Implement the TFT-LCD array base palte of the utility model embodiment; Because the first grid polar curve and the second grid line that have two parallel arranged on the gate line metal level; First data line and second data line that have two parallel arranged on the data line metal level, first grid polar curve and second grid line are electrically connected, and first data line and second data line are electrically connected; The gate line of gate line metal level and two conducting structures of data line metal level have been realized; When gate line or signal wire generation broken string, signal can be transmitted downwards by the bypass that adjacent traces is formed, and reaches the purpose of conducting.

Description of drawings

Fig. 1 is the structural representation that in the prior art TFT-LCD array base palte gate line and data line is broken and repair;

Fig. 2 is the structural representation of the preferred embodiment of the utility model TFT-LCD array base palte;

Fig. 3 is the partial sectional view of the utility model TFT-LCD array base palte shown in Figure 2 along the III-III line;

Fig. 4 is the electrical block diagram of stray capacitance shown in Figure 3;

Fig. 5 is the floor map of the utility model TFT-LCD array base palte signal transmission behind gate line and broken data wire.

Embodiment

To combine the accompanying drawing among the utility model embodiment below, the technical scheme among the utility model embodiment is carried out clear, intactly description, obviously, described embodiment only is the utility model part embodiment, rather than whole embodiment.Based on the embodiment in the utility model, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the utility model protection.

Referring to Fig. 2, Fig. 2 is the structural representation of the preferred embodiment of the utility model TFT-LCD array base palte.The TFT-LCD array base palte comprises that gate line metal level 1, data line metal level 2 and coating are arranged on gate line metal level 1 and data line metal level 2 a plurality of layers of body on every side.These a plurality of layers of bodies mainly are meant and are coated on gate line metal level 1 and data line metal level 2 gate insulator, semiconductor layer, ohmic contact layer, passivation layer and transparency conducting layer on every side.Array base palte comprises gate line metal level 1, gate insulator, semiconductor layer, ohmic contact layer, data line metal level 2, passivation layer and transparency conducting layer successively.

Have first grid polar curve 11 parallel and that alternately arrange and second grid line 12 on the gate line metal level 1, first grid polar curve 11 is electrically connected with second grid line 12.Have first data line 21 parallel and that alternately arrange and second data line, 22, the

first data lines

21 and 22 electrical connections of second data line on the data line metal level 2.

Wherein, On gate line metal level 1 as shown in Figure 2, have in the first grid polar curve 11 and second grid line 12 of two parallel arranged; First grid polar curve 11 is electrically connected by lead 41 with second grid line 12; On data line metal level 2, have in first data line 21 and second data line 22 of two parallel arranged, first data line 21 and second data line 22 are electrically connected through lead 42.

Certainly; First grid polar curve 11 and second grid line 12 and first data line 21 and second data line 22 are provided with position that lead 41,42 is connected and can adjust according to the size that corresponding gate line metal level 1 and data line metal level 2 overlap mutually the band of position of enclosing formation pixel electrode area 3, particularly:

Pixel electrode area 3 is a rectangle in the plane, and definition pixel electrode area 3 is broadside L1 with first grid polar curve 11 with second grid line 12 parallel limits, and definition pixel electrode area 3 is long limit L2 with first data line 21 with second data line, 22 parallel limits.The broadside L1 that connects the lead 41 vertical pixel electrode zones 3 of first grid polar curve 11 and second grid line 12.The long limit L2 that connects the lead 42 vertical pixel electrode zones 3 of first data line 21 and second data line 22.Further; Lead 41 can be arranged on the optional position between first grid polar curve 11 and the second grid line 12; Its effect is two conducting structures of realizing the gate line of gate line metal level 1, makes gate line metal level 1 conducting to be set through first grid polar curve 11 and/or second grid line 12, when the first grid polar curve 11 of gate line metal level 1 or second grid line 12 take place to break; Signal still can get into adjacent gate lines and continue and transmit downwards through lead 41, reaches the purpose of conducting.

Likewise; Lead 42 can be arranged on the optional position between first data line 21 and second data line 22; Effect is two conducting structures of realizing the data line of data line metal level 2, makes data line metal level 2 conducting to be set through first data line 21 and/or second data line 22, when first data line 21 of data line metal level 2 or second data line 22 take place to break; Signal still can get into adjacent data line and continue and transmit downwards through lead 42, reaches the purpose of conducting.

Be provided with thin film transistor (TFT) 30 in the pixel electrode area 3; The grid 31 of thin film transistor (TFT) 30 is connected with first grid polar curve 11; The source electrode 32 of thin film transistor (TFT) 30 is connected with first data line 21, a contact point 6 is set in order to be electrically connected the drain electrode 33 and the pixel electrode of thin film transistor (TFT) 30 in the pixel electrode area 3.Certainly, in other embodiments, the grid 31 of thin film transistor (TFT) 30 also can directly be connected with second grid line 12; The source electrode 32 of thin film transistor (TFT) also can directly be connected with second data line 22.

(the place layer is a transparency conducting layer to the included pixel electrode area 3 of the TFT-LCD array base palte of the utility model embodiment; Not shown) overlapping with the first grid polar curve 11 of gate line metal level 1 and/or second grid line 12 parts forms MM CAP (figure does not show), and MM CAP can stably be worked the liquid crystal molecule of liquid crystal layer.In the present embodiment; Because data line metal level 2 comprises parallel two data lines, first data line 21 and second data line 22 that is communicated with; And two gate lines of two data lines of data line metal level 2 and gate line metal level 1 are conducted; Therefore, the data voltage signal that first data line 21 is identical with the transmission of second data line 22, the cross-sectional area sum of first data line 21 and second data line 22 are twices of cross-sectional area of the single bus of prior art; Reduce electrical impedance, reduced the transmission voltage on first data line 21 and second data line 22.

As shown in Figure 2, two first data lines 21 and two second data lines 22 overlap mutually with two first grid polar curves 11 and two second grid lines 12 respectively and form four groups of totally ten six stray capacitances 7.As shown in Figure 3, Fig. 3 is the partial sectional view of the utility model TFT-LCD array base palte shown in Figure 2 along the III-III line.Gate line metal level 1 comprises the parallel two data lines first grid polar curves 11 and second grid line 12 that are communicated with, and data line metal level 2 comprises parallel two data lines, first data line 21 and second data line 22 that is communicated with.First data line 21 is D1 with the spacing of first grid polar curve 11, thereby forms stray capacitance.Second data line 22 is D2 with the spacing of second grid line 12, thereby forms stray capacitance.Electrostatic charge in above-mentioned gate line and the formation of data line overlapping region is more, owing to have a plurality of stray capacitances, electrostatic charge can be scattered in above-mentioned a plurality of stray capacitance, thereby can reduce the risk of electrostatic breakdown.As shown in Figure 4; Electrical block diagram for stray capacitance shown in Figure 3; Two gate lines and two data line overlapping regions form two parallelly connected stray capacitances 7, wherein, and first data line 21 and the space D 1 of first grid polar curve 11 and space D 2 equal and opposite in directions of second data line 22 and second grid line 12.The extraneous electrostatic potential V that forms is applied to above-mentioned two parallelly connected stray capacitances 7, shares electrostatic charge by this two parallelly connected stray capacitance 7.Because the area of two gate lines and two data line overlapping regions increases, the quantity of stray capacitance 7 increases, thereby the ability of stored charge increases, and has reduced the probability that electrostatic breakdown takes place.

The TFT-LCD array base palte of the utility model embodiment in the specific implementation; Can realize the automatic reparation of gate line or data line; Below illustrate above-mentioned automatic modify feature,, be the structural representation of the utility model embodiment TFT-LCD array base palte referring to Fig. 5; When the TFT-LCD array base palte broken string takes place when bad at the data line 22 of data line metal level 2 at the A point; Because two data lines, first data line 21 of data

line metal level

2 and 22 parallel connections of second data line, data-signal still can be realized the signal transmission by second data line 22 through (shown in the direction of arrow among the figure) on lead 42 conducting to the second data lines 22.And for example; When the TFT-LCD array base palte broken string takes place when bad at the gate line 12 of gate line metal level 1 at the B point; Because two data lines first grid polar curves 11 of gate line metal level 1 and 12 parallel connections of second grid line; Data-signal still can be realized the signal transmission by first grid polar curve 11 through lead 41 conductings to first grid polar curve 11.

In above-mentioned implementation process; Pixel electrode area 3 forms MM CAP with the first grid polar curve 11 and/or the second grid line 12 parts overlapping of gate line metal level 1; Data line metal level 2 increases with the area that pixel electrode area 3 overlaps mutually; Increase the cross-sectional area of first data line 21 and second data line 22, reduced electrical impedance, can further reduce the transmission voltage on first data line 21 and second data line 22.Again because two first data lines 21 and two second data lines 22 and two first grid polar curves 11 and two second grid lines 12 overlap mutually 4 groups of 16 stray capacitances 7 of common formation; Electrostatic charge can be scattered in above-mentioned a plurality of stray capacitance 7; Thereby, can reduce tft array substrate by the risk of electrostatic breakdown.

Present embodiment also discloses a kind of manufacturing approach of TFT-LCD array base palte, may further comprise the steps:

Step 1: parallel arranged first grid polar curve and second grid line on the gate line metal level;

Step 2: be electrically connected this first grid polar curve and this second grid line;

Step 3: parallel arranged first data line and second data line on the data line metal level;

Step 4: be electrically connected first data line and second data line;

Step 5: overlapping is provided with gate line metal level and data line metal level, and coats a plurality of layers of body and form the TFT-LCD array base palte on every side in gate line metal level and data line metal level.

Preferably, in above-mentioned steps two, first grid polar curve and second grid line are realized being electrically connected through lead, and in above-mentioned steps four, first data line and second data line are realized being electrically connected through lead;

Preferably, in above-mentioned steps five, coat a plurality of layers of body and comprise gate insulator, semiconductor layer, ohmic contact layer, passivation layer and transparency conducting layer.Above-mentioned a plurality of layers of body and gate line metal level, data line metal level form the TFT-LCD array base palte jointly.

Particularly; This gate line metal level comprises many first grid polar curves and many second grid lines; This data line metal level comprises many first data lines and many second data lines; Define a plurality of pixel electrode area by many first grid polar curves and many second grid lines and many first data lines and many second data lines, in pixel electrode area, be provided with thin film transistor (TFT), the grid of thin film transistor (TFT) directly is connected with first grid polar curve or second grid line; The source electrode of thin film transistor (TFT) directly is connected with first data line or second data line, and the drain electrode of thin film transistor (TFT) is connected with pixel electrode.

Particularly, part first grid polar curve and/or the second grid line formation MM CAP of transparency conducting layer and gate line metal level that overlaps; Overlapping gate polar curve metal level and data line metal level form many group stray capacitances.

The manufacturing approach of the TFT-LCD array base palte of present embodiment can reduce the broken string incidence of TFT – LCD active matrix, has increased the aperture opening ratio of product, and can improve the yield of product.

Implement the TFT-LCD array base palte of the utility model embodiment; Because the first grid polar curve and the second grid line that have two parallel arranged on the gate line metal level; First data line and second data line that have two parallel arranged on the data line metal level, first grid polar curve and second grid line are electrically connected, and first data line and second data line are electrically connected; The gate line of gate line metal level and two conducting structures of data line metal level have been realized; When gate line or signal wire generation broken string, signal can be transmitted downwards by the bypass that adjacent traces is formed, and reaches the purpose of conducting; And increased the cross-sectional area of first data line and second data line, reduced resistance, reduced the transmission voltage on first data line and second data line, simultaneously, electrostatic charge can be scattered in a plurality of stray capacitances, can reduce the risk of electrostatic breakdown.The manufacturing approach of the TFT-LCD array base palte of the utility model embodiment can reduce the broken string incidence of TFT – LCD active matrix, has increased the aperture opening ratio of product, and can improve the yield of product.

Above disclosedly be merely a kind of preferred embodiment of the utility model, can not limit the interest field of the utility model certainly with this, the equivalent variations of therefore being done according to the utility model claim still belongs to the scope that the utility model is contained.

Claims

1. TFT-LCD array base palte; It is characterized in that; Said TFT-LCD array base palte comprises the gate line metal level, is arranged on a plurality of layers of body around said gate line metal level and the said data line metal level with the overlap data line metal level that is provided with and the coating of said gate line metal level; Said gate line metal level is provided with first grid polar curve and second grid line parallel and that alternately arrange, and said data line metal level is provided with first data line and second data line parallel and that alternately arrange;

Said first grid polar curve and said second grid line are electrically connected;

Said first data line and said second data line are electrically connected.

2. TFT-LCD array base palte as claimed in claim 1; It is characterized in that; Said a plurality of layers of body comprise gate insulator, semiconductor layer, ohmic contact layer, passivation layer and transparency conducting layer composition, and this array base palte comprises gate line metal level, gate insulator, semiconductor layer, ohmic contact layer, data line metal level, passivation layer and transparency conducting layer successively;

Said first grid polar curve and said second grid line are communicated with through lead, and said first data line and said second data line are communicated with through lead.

3. according to claim 1 or claim 2 TFT-LCD array base palte; It is characterized in that; The said first grid polar curve of adjacent electrical connection and said second grid line overlap each other with adjacent said first data line that is electrically connected and said second data line and define a plurality of pixel electrode area; Be provided with thin film transistor (TFT) in the said pixel electrode area; The grid of said thin film transistor (TFT) is connected with first grid polar curve or second grid line line, and the source electrode of said thin film transistor (TFT) is connected with said first data line or the second data line line, and the drain electrode of said thin film transistor (TFT) is connected with said pixel electrode.

4. TFT-LCD array base palte as claimed in claim 2 is characterized in that, the said first grid polar curve of said transparency conducting layer and said gate line metal level and/or the said second grid line formation MM CAP that partly overlaps.

5. TFT-LCD array base palte as claimed in claim 2 is characterized in that, the lead that connects said first grid polar curve and said second grid line has many, and is arranged in parallel; The lead that connects said first data line and said second data line has many, and is arranged in parallel.

6. TFT-LCD array base palte as claimed in claim 1; It is characterized in that the zone that the said first grid polar curve of said gate line metal level and said first data line of said second grid line and said data line metal level and said second data line overlap mutually forms many group stray capacitances.