CN1519808A - Device and method of driving plasma display panel - Google Patents
Device and method of driving plasma display panel Download PDFInfo
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- CN1519808A CN1519808A CNA2004100019610A CN200410001961A CN1519808A CN 1519808 A CN1519808 A CN 1519808A CN A2004100019610 A CNA2004100019610 A CN A2004100019610A CN 200410001961 A CN200410001961 A CN 200410001961A CN 1519808 A CN1519808 A CN 1519808A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
- G09G3/2965—Driving circuits for producing the waveforms applied to the driving electrodes using inductors for energy recovery
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/294—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of Gas Discharge Display Tubes (AREA)
Abstract
Disclosed is a PDP driving circuit and a driving method thereof. A first switch is coupled between a Y electrode of a panel capacitor and a positive polarity terminal of a voltage source supplying a voltage Vs/2, a second switch is coupled between the positive polarity terminal of the voltage source and ground, a third switch is coupled between the Y electrode and a negative polarity of the voltage source, and a fourth switch is coupled between the negative polarity of the voltage source and ground. The voltage -Vs/2 is applied to an X electrode of the panel capacitor while the voltage Vs/2 is applied to the Y electrode thereof, and the voltage Vs/2 is applied to the X electrode while the voltage -Vs/2 is applied to the Y electrode.
Description
Related application
The application requires right of priority, benefits from the Korean Patent Application No. 2003-5993 that submitted in Korea S Department of Intellectual Property on January 29th, 2003, and the full content of this patent one is listed in this as a reference.
Technical field
The present invention relates to the equipment and the method for a kind of driving Plasmia indicating panel (PDP).
Background technology
PDP is a kind of plasma character display of gas discharge generation or flat-panel screens of image utilized.According to its size, PDP comprises that number arrives millions of with the matrix model arranged picture tens.PDP can be divided into direct current (DC) type or alternating current (AC) type according to its discharge cell structure and the waveform that is applied to the driving voltage on it.
According to time sequencing, the waveform that drives AC type PDP comprises reset cycle, addressing cycle, the cycle of keeping and removing cycle.
Reset cycle is used for the state of each unit is carried out first making so that the addressing operation.The addressing cycle be used to select the on/off unit and with addressing voltage be applied to connection unit (cell) (promptly selected cell) thus accumulation wall electric charge.The cycle of keeping is used to apply keeps pulse and impels discharge, thus on selected cell displayed image.The removing cycle is used to reduce the wall electric charge of unit and keeps so that stop.
In the PDP of AC type, the scanning that is used to keep and keep electrode as capacitive load is therefore in scanning with keep and have electric capacity between electrode.This electric capacity is called as that panel capacitance causes and can be equivalently represented by panel capacitor.For example, people such as Kishi propose a kind of driving circuit, are used for being applied to panel capacitor (Japanese Patent No. 3201603) with keeping pulse.
The driving circuit that proposes by people such as Kishi utilize capacitor and voltage source alternately with voltage Vs/2 and-Vs/2 is applied to the Y electrode of panel capacitor, a half voltage Vs/2 who keeps required voltage Vs is provided.More particularly, this driving circuit is applied to the Y electrode of panel capacitor by voltage source with the voltage of Vs/2, and is charged to voltage Vs/2 in this capacitor.Then, capacitor is connected between the Y electrode of earth terminal and panel capacitor and voltage-Vs/2 is applied on the Y electrode of panel capacitor.
Utilize this mode, positive voltage+Vs/2 and negative voltage-Vs/2 alternately are applied to the Y electrode.Equally, positive voltage+Vs/2 and negative voltage-Vs/2 also can alternately be applied to the X electrode.Phase place is opposite each other to be applied to each voltage ± Vs/2 on X and the Y electrode, therefore, keeps two terminals that required voltage Vs/2 is applied to panel capacitor.
This driving circuit only can be used for using the PDP that pulse is waved between-Vs/2 and Vs/2, and because characteristics of transistor, transistorizedly withstand voltagely can not maintain Vs/2.And this driving circuit has that jumbo capacitor is stored the voltage that is used for negative voltage and can be because this capacitor produces a large amount of inrush currents (in-rush current) when beginning to charge.
Summary of the invention
In the exemplary embodiments of the present invention, the PDP driving circuit uses has low withstand voltage switch.
In another exemplary embodiments of the present invention, remove jumbo capacitor, reduced inrush current.
In this exemplary embodiments, the floating voltage source connects between the node with the switch that is connected in series.
In an exemplary embodiments of the present invention, a kind of PDP driver is provided, be used for driving voltage is applied between first and second electrodes and form and have a panel capacitor of first and second ends.This PDP driver comprises: first voltage source, have positive terminal and negative pole end, and be used to provide first voltage; Second voltage source is used to provide second voltage; First switch is connected between the positive terminal of first end of panel capacitor and first voltage source; Second switch is connected between the positive terminal and second voltage source of first voltage source; The 3rd switch is connected between the negative pole end of first end of panel capacitor and first voltage source; And the 4th switch, be connected between the negative pole end and second voltage source of first voltage source.
When the first and the 4th switch connection, tertiary voltage is applied to first end of panel capacitor, and described tertiary voltage is the voltage difference between first and second voltages.When the second and the 3rd switch connection, the 4th voltage is applied to first end of panel capacitor, negative value that described the 4th voltage is first voltage and the voltage difference between second voltage.The described first and the 4th switch and the second and the 3rd switch are alternately connected, thereby described third and fourth voltage alternately are applied to first end of panel capacitor respectively.
Voltage difference between third and fourth voltage is the voltage of keeping of PDP.When tertiary voltage was applied to first end of panel capacitor, the 4th voltage was applied to second end of panel capacitor, and when the 4th voltage was applied to first end of panel capacitor, tertiary voltage was applied to first end of panel capacitor.
In another exemplary embodiments of the present invention, a kind of PDP driver is provided, be used for driving voltage is applied between first and second electrodes and form and have a panel capacitor of first and second ends.This PDP comprises: first voltage source, have positive terminal and negative pole end, and be used to provide first voltage; Second voltage source is used to provide second voltage; First switch is connected between the positive terminal of first end of panel capacitor and first voltage source; And second switch, be connected between the negative pole end of first end of panel capacitor and first voltage source.
When first switch connection, between first voltage source and the negative pole end and second voltage source, form first circuit, thereby tertiary voltage is applied to first end of panel capacitor, described tertiary voltage is the difference between first and second voltages.When second switch is connected, between the positive terminal of first voltage source and second voltage source, form second circuit, thereby the 4th voltage is applied to first end of panel capacitor, negative value that described the 4th voltage is first voltage and the difference between second voltage.Described first and second switches are all alternately connected.
When tertiary voltage was applied to first end of panel capacitor, the 4th voltage was applied to second end of panel capacitor, and when the 4th voltage was applied to first end of panel capacitor, tertiary voltage was applied to second end of panel capacitor.Voltage difference between the described first and the 4th voltage is as the voltage of keeping of PDP.First voltage is to keep half of voltage, and second voltage is ground voltage.
Described PDP driver comprises the power back-off part of first end that is connected to panel capacitor, and this power back-off partly comprises inductor, and is applicable to and utilizes the resonance that produces between inductor and the panel capacitor to change voltage on panel capacitor first end.
Described power back-off partly utilizes voltage difference between first and second voltage sources with the electric current input inductor, and produces resonance when electric current flows into inductor.
In another exemplary embodiments of the present invention, provide a kind of and be used for by alternately first and second voltages being applied to the method that drives PDP on the panel capacitor that forms between first and second electrodes.This method comprises: will provide the positive terminal in the floating voltage source of tertiary voltage to be connected to first end of panel capacitor; The negative pole end in floating voltage source is connected to first voltage source, so that the 4th voltage to be provided; The negative pole end in floating voltage source is connected to first end of panel capacitor; And the positive terminal in floating voltage source is connected to first voltage source.Voltage difference between third and fourth voltage is corresponding to first voltage, and the voltage difference between the negative value of tertiary voltage and the 4th voltage is corresponding to second voltage.
Description of drawings
Next with reference to the accompanying drawings and detail specifications exemplary embodiments of the present invention is described, and explanation principle of the present invention is described by it.
Fig. 1 shows the schematic plan view of PDP according to an exemplary embodiment of the present invention;
Fig. 2 shows the simple schematic circuit diagram according to the PDP drive circuit of first exemplary embodiments of the present invention;
Fig. 3 shows the time sequential routine figure of the drive circuit of Fig. 2;
Fig. 4 A and 4B show the schematic circuit diagram of the circuit of each pattern in the PDP drive circuit of presentation graphs 2;
Fig. 5 shows the simple schematic circuit diagram according to the PDP drive circuit of second exemplary embodiments of the present invention;
Fig. 6 shows the time sequential routine figure of the PDP drive circuit of Fig. 5;
Fig. 7 A shows the schematic circuit diagram of the current path of each pattern in the PDP drive circuit of presentation graphs 5 to 7H.
Embodiment
In the following detailed description, exemplary embodiments more of the present invention just by way of example method illustrated and described.As everyone knows, under situation without departing from the spirit and scope of the present invention, can carry out various multi-form modifications to described exemplary embodiments.Correspondingly, accompanying drawing and describe all should regard as its essence is described, rather than limit.
Hereinafter, describe in detail according to an exemplary embodiment of the present invention with reference to the accompanying drawings, be used to drive equipment and the method for PDP.
At first, with reference to Fig. 1 an exemplary embodiments of the present invention is described.
Fig. 1 shows the schematic block diagram of PDP according to an exemplary embodiment of the present invention.
The PDP of Fig. 1 comprises Plasmia indicating panel 100, address driver 200, scans/keep driver 300 and controller 400.
Described Plasmia indicating panel 100 comprise a plurality of address electrode A1 that line up row to Am and a plurality of scan electrode of alternately aligning (hereinafter being called the Y electrode) Y1 to Yn with keep voltage (hereinafter being called the X electrode) X1 to Xn.Described address driver 200 receives the address drive control signal of controller 400, and display data signal is applied to each address electrode A1 to Am, thereby selects discharge cell to show.Described scanning/keep driver 300 receives the control signal of controllers 400, the alternating voltage that will be used to keep be applied to Y electrode Y1 to Yn and X electrode X1 to Xn, impel selected discharge cell to keep.Controller 400 receives picture intelligence (being vision signal) from the outside, and calculated address drive signal and keep signal, then they is applied to address driver 200 respectively and scans/keep driver 300.
Hereinafter, describe scanning according to first exemplary embodiments of the present invention/the keep drive circuit of driver 300 with reference to Fig. 2 in detail to 4B.
Fig. 2 is the simple schematic circuit diagram according to the PDP drive circuit of first exemplary embodiments of the present invention.Fig. 3 is the time sequential routine figure of the drive circuit of Fig. 2, and Fig. 4 A and 4B show the schematic circuit diagram of the current path of each pattern in the drive circuit of presentation graphs 2.
The PDP driving circuit of Fig. 2 comprises Y electrode driver 310 and X electrode driver 320.Described Y electrode driver 310 is connected to the Y electrode of panel capacitor Cp, comprises four switch Ys, Yg, Yl and Yh, and (floating) voltage source V 1 of floating, and its voltage is Vs/2.Voltage Vs/2 keeps the required half value of keeping voltage Vs of panel.X electrode driver 320 is connected to the X electrode of panel capacitor Cp, and comprises four switch Xs, Xg, Xl and Xh and floating voltage source V2, and its voltage is Vs/2.
Switch Ys and Yl are connected between the Y electrode and earth terminal 0 of panel capacitor Cp with series system, and switch Yg and Yh are connected between the Y electrode and earth terminal 0 of panel capacitor Cp with series system.Floating voltage source V1 is connected between the node and a node between switch Yg and Yh between switch Ys and Yl.High potential one side of floating voltage source V1 is connected to the node between switch Ys and the Yl.
Switch Xs and Xl are connected with series system between the X electrode and earth terminal 0 of panel capacitor Cp, and switch Xg and Xh are connected between the X electrode and earth terminal 0 of panel capacitor Cp with series system.Floating voltage source V2 is connected between the node and a node between switch Xg and the Xh between switch Xs and the Xl.High potential one side of floating voltage source V2 is connected to the node between switch Xs and the Xl.
In Fig. 2, switch Ys, Yh, Yl, Yg, Xs, Xh, Xl and Xg are illustrated as MOSFET.Yet these switches are not limited to MOSFET.For example, other switch that is fit to that has similar characteristics and/or can carry out identical or similar functions can replace.The switch that any replacement MOSFET uses all should have body diode (body diode).
To get off and describe the driving method of the PDP driving circuit of Fig. 2 with reference to Fig. 3,4A and 4B.
At first, in pattern shown in Figure 31 (M1), when switch Xs, Xh, Yg and Yl were disconnected, switch Ys, Yh, Xg and Xl were switched on.
Shown in Fig. 4 A, voltage Vs/2 and-Vs/2 is applied to Y and the X electrode of panel capacitor Cp according to illustrated path P 1 ', it is in proper order: earth terminal 0, switch Yh, floating voltage source V1, switch Ys, panel capacitor Cp, switch Xg, floating voltage source V2, switch Xl and earth terminal 0.Therefore, panel capacitor Cp go up Y and X electrode voltage Vy and Vx be respectively Vs/2 and-Vs/2, and keep voltage Vs and be applied to panel capacitor Cp.
In this example, because floating voltage source V1 is connected on the switch Yl and Yg of disconnection, so the voltage on switch Yl and the Yg is clamped at Vs/2 respectively.And owing to floating voltage source V2 is connected on the switch Xs and Xh of disconnection, so the voltage on switch Xs and the Xh is clamped at Vs/2 respectively.
In pattern 2 (M2), institute is shown in Figure 3, and switch Ys, Yh, Xg and Xl are disconnected, and switch Xs, Xh, Yg and Yl are switched on.
Shown in Fig. 4 B, voltage-Vs/2 and Vs/2 are applied to Y and the X electrode of panel capacitor Cp according to illustrated path P 2 ', and it is in proper order: earth terminal 0, switch Xh, floating voltage source V2, switch Xs, panel capacitor Cp, switch Yg, power supply V1, switch Yl and earth terminal 0.Therefore, panel capacitor Cp goes up Y and X electrode voltage Yy and Vx and is respectively-Vs/2 and Vs/2, and keeps voltage Vs and be applied to panel capacitor Cp.
In this example, identical with pattern 1 (M1) mode, because floating voltage source V1 is connected on the switch Ys and Yh of disconnection, so the voltage on switch Ys and the Yh is clamped at Vs/2 respectively.And owing to floating voltage source V2 is connected on the switch Xl and Xg of disconnection, so the voltage on switch Xl and the Xg is clamped at Vs/2 respectively.
According to first exemplary embodiments of the present invention, be applied to panel capacitor Cp when going up when keeping voltage Vs, the voltage of switch Ys, Yh, Xl and Xg and switch Yl, Yg, Xs and Xh can be clamped at Vs/2 by floating voltage source V1 and V2.Therefore, withstand voltage lower switch can be used as Ys, Yh, Yl, Yg, Xs, Xh, Xl and Xg.In addition,, therefore make to melt in the beginning process, big inrush current can not occur just owing to do not need to use capacitor that negative voltage-Vs/2 is applied to Y and the X electrode of panel capacitor Cp.
For the waveform that will be used to keep is applied to panel capacitor Cp, because the capacitive component of panel capacitor Cp, so both needed reactive power also to need the power that is used to discharge.Next, will by Fig. 5,6 and 7A to 7H, describe in detail and except that the PDP drive circuit of Fig. 2, to have the exemplary embodiments of power compensating circuit.
Fig. 5 is the simple schematic circuit diagram according to the PDP drive circuit of second exemplary embodiments of the present invention.Fig. 6 is the time sequential routine figure of the PDP drive circuit of Fig. 5.Fig. 7 A is the schematic circuit diagram of the circuit of each pattern in the PDP drive circuit of presentation graphs 5 to 7H.
The PDP drive circuit of Fig. 5 also comprises Y and X power back-off part 330 and 340 except the PDP drive circuit that comprises Fig. 2.In other words, the PDP drive circuit of Fig. 5 comprises: Y electrode driver 311, and it comprises Y electrode driver 310 and the Y power back-off part 330 of Fig. 2; X electrode driver 321, it comprises X electrode driver 320 and the X power back-off part 340 of Fig. 2.
Described Y electrode power compensated part 330 comprises inductor L1 and switch Yr and Yf.Inductor L1 is connected to a node between switch Ys and the Yg, that is, and and on the Y electrode of panel capacitor Cp.Described switch Yr and Yf are connected between inductor L1 and the earth terminal 0 concurrently.Described Y electrode power compensated part 330 also comprises diode D1 and the D2 that is coupled to respectively between described Yr and Yf and the inductor L1.Described diode D1 and D2 are used to interrupt may be by the formed current path of the body diode of switch Yr and Yf.
Described X electrode power compensated part 340 comprises inductor L2 and switch Xr and Xf, also comprises diode D3 and D4.The structure of X electrode power compensated part 340 structure with Y electrode power compensated part 330 basically is identical, is not described further.Switch Yr, Yf, Xr and the Xf of Y and X electrode power compensated part 330 and 340 is the MOSFET with body diode.In other embodiments, can use other suitable switch to replace MOSFET.
Next with reference to Fig. 6 and Fig. 7 A to 7H, the sequential operation according to second exemplary embodiments of the present invention is described.Here, operation is carried out to M8 with eight kinds of pattern M1 successively, and can revise by the operation of switch.The phenomenon of " the LC resonance " mentioned here is not continuous resonance, but switch Xr, Yf, Xf and Yr when being operated voltage that combination caused or the electric current of inductor L1 and L2 and panel capacitor Cp change.
In the second embodiment of the present invention, if all be switched at pattern 1 (M1) beginning preceding switch Ys, Yh, Xg and Xl, so the Y of panel capacitance Cp and X electrode voltage Vy and Vx be maintained respectively Vs/2 and-Vs/2.The induction coefficient of inductor L1 and L2 is all represented with L.
In pattern 1 (M1), shown in Fig. 6 and 7A, by connecting switch Ys and Yh and switch Xl and Xg respectively, the Y of panel capacitor Cp and X electrode voltage Vy and Vx be maintained Vs/2 and-Vs/2.Identical with the mode described in the pattern 1 (M1) of first exemplary embodiments, by floating voltage source V1 and V2 switch Yl, Yg, Xs and Xh are clamped to Vs/2 respectively.Shown in Fig. 7 A, when switch Yf and Xr connect, formed current path P1a, order comprises earth terminal 0, switch Yh, floating voltage source V1, switch Ys, inductor L1, switch Yf and earth terminal 0; And current path P1b, order comprises earth terminal 0, switch Xr, inductor L2, switch Xg, floating voltage source V2, switch Xl and earth terminal 0.The voltage difference of two kinds of current path generations causes injection current among inductor L1 and the L2, therefore flows into the linear ratio of slope of electric current I L1 and IL2 and the Vs/2L of inductor L1 and L2 respectively.
In pattern 2 (M2), shown in Fig. 7 B, switch Ys, Yh, Xg and Xl are disconnected, and produce current path P2, it comprises switch Xr, inductor L2, panel capacitor Cp, inductor L1 and switch Yf in proper order, and causes the LC resonance current by inductor L1 and L2 and panel capacitor Cp.Because resonance current, the Y electrode voltage Vy of panel capacitor Cp reduces, and X electrode voltage Vx rises.Because the body diode of switch Yl and Yg and Xs and Xh, these voltage Vy and Vx are no more than respectively-Vs/2 and Vs/2.
In pattern 2 (M2), when electric current flows to inductor L1 and L2, LC resonance takes place, thereby respectively Y and X electrode voltage Vy and Vx are changed over-Vs/2 and Vs/2, even because the parasitic component in the circuit has increased conversion ratio.
In mode 3 (M3), as shown in Figure 7, switch Xs, Xh, Yg and Yl are switched on, so the Y of panel capacitor Cp and X electrode voltage Vy and Vx are maintained respectively-Vs/2 and Vs/2.Electric current I L1 flows into inductor L1 and by path P3a compensation, this path P3a comprises the body diode of switch Yl, body diode, inductor L1 and the switch Yf of floating voltage source V1, switch Yg in proper order.Electric current I L2 flows into inductor L2 and by path P3b compensation, this path P3b comprises the body diode of body diode, floating voltage source V2 and the switch Xh of switch Xr, inductor L2, switch Xs in proper order.
In pattern 4 (M4), as the electric current I L1 that flows into inductor L1 and L2 and IL2 during to 0A, switch Yf and Xr are switched on.Shown in Fig. 7 D, because switch Yl, the Yg, Xs and the Xh that connect, the Y of panel capacitor Cp and X electrode voltage Vy and Vx maintain respectively-Vs/2 and Vs/2.
In pattern 5 (M5), when the Y of panel capacitor Cp and X electrode voltage Vy and Vx maintain respectively-when Vs/2 and Vs/2, electric current flows into inductor L1 and L2.More particularly, shown in Fig. 7 E, switch Yr and Xf are switched on, and form path P5a, and this path P5a comprises earth terminal 0, switch Yr, inductor L1, switch Yg, floating voltage source V1, switch Yl and earth terminal 0 in proper order; And path P5b, this path P5b comprises earth terminal 0, switch Xh, floating voltage source V2, switch Xs, inductor L2, switch Xf and earth terminal 0 in proper order.Because the voltage difference that these two paths form, electric current I L1 and IL2 flow into inductance L 1 and L2 respectively, and with the linear ratio of the slope of Vs/2L.
In mode 3,4 and 5 (M3, M4 and M5), when the Y of panel capacitor Cp and X electrode voltage Vy and Vx maintain respectively-when Vs/2 and Vs/2, switch Ys, Yh, Xl and Xg are disconnected.Therefore, as described in the pattern 2 of first exemplary embodiments, the voltage of switch Ys, Yh, Xl and Xg all is clamped at Vs/2 by floating voltage source V1 and V2.
In pattern 5 (M5), after electric current injected inductor L1 and L2, switch Xs, Xh, Yl and Yg were switched in pattern 6 (M6).Then, shown in Fig. 7 F, by current path P6, LC resonance takes place between inductor L1 and L2 and panel capacitor Cp.Because described resonance current, the Y electrode voltage Vy of panel capacitor Cp rise and X electrode voltage Vx descends.Because the body diode of switch Ys and Yh and Xl and Xg, these voltage Vy and Vx be no more than respectively Vs/2 and-Vs/2.As in the pattern 2 (M2), resonance when flowing into inductor L1 and L2, electric current takes place in pattern 6 (M6).
In mode 7 (M7), switch Ys, Yh, Xl and Xg are switched on, the therefore path by Fig. 7 G, the Y of panel capacitor Cp and X electrode voltage Vy and Vx be clamped at respectively Vs/2 and-Vs/2.The electric current I L1 that flows into inductor L1 is by path P7a compensation, and this path P7a comprises the body diode of switch Yr, inductor L1, switch Ys, the body diode of floating voltage source V1, switch Yh in proper order.The electric current I L2 that flows into inductor L2 is by path P7b compensation, and this path P7b comprises body diode, the body diode of floating voltage source V2, switch Xg, inductor L2, the switch Xf of switch Xl in proper order.
In pattern 8 (M8), when electric current I L1 that flows into inductor L1 and L2 and IL2 arrival 0A, switch Yr and Xf are switched on.Shown in Fig. 7 H because switch Ys, the Yh, Xl and the Xg that connect, the Y of panel capacitor Cp and X electrode voltage Vy and Vx maintain respectively Vs/2 and-Vs/2.In mode 7 and 8 (M7 and M8), identical with the described mode of reference pattern 1 (M1), the voltage of switch Yl, Yg, Xs and Xh is clamped at Vs/2 by voltage source V 1 and V2 respectively.
Thereafter, the cycle of pattern 1 to 8 is repeated and generates Y and X electrode voltage Vy and Vx, and its value is swung between-V2/2 at Vs/2, so X and the interelectrode electric potential difference of Y can be used as and keep voltage Vs.
In the second embodiment of the present invention, behind the process inflow inductor L1 and L2 of electric current, produce resonance by pattern 1 and 5 (M1 and M5).Yet, do not have the process of pattern 1 and 5 (M1 and M5) resonance can take place yet.In addition, another kind of power compensating circuit can replace above-mentioned power compensating circuit.
In Fig. 2, earth terminal 0 provides 0 volt voltage, and voltage source V 3 is used to provide the voltage of (Vs-2Vh)/2, and can replace earth terminal 0.Correspondingly, shown in Fig. 4 A, according to the voltage difference between voltage source V 1 and V3, voltage Vh offers the X electrode of panel capacitor Cp, and according to the voltage difference of 3 of the voltage source V 2 of reverse connection and voltage source V, voltage (Vh-Vs) offers the Y electrode.With the same way as shown in Fig. 4 B, voltage (Vh-Vs) is provided for the X electrode of panel capacitor Cp, and voltage Vh is provided for its Y electrode, keeps thereby keep the voltage difference Vs of panel capacitor Cp and produce.Especially, when the voltage that provides when voltage source V 3 was set to Vs/2, the Y of panel capacitor Cp and X electrode voltage Vy and Vx swung between Vs at 0V.
According to an exemplary embodiment of the present invention, each switch withstand voltage can be to keep half of required voltage Vs, therefore, can use low withstand voltage switch to reduce production costs.This has also prevented to produce inrush current when the terminal voltage of panel capacitor changes by stored voltage in the external capacitor.And drive circuit described in the exemplary embodiments of the present invention can change by the power supply that change offers drive circuit, and need not consider to keep the waveform of potential pulse.
Although the present invention is described in conjunction with certain exemplary embodiments, should be understood that the present invention is not limited to disclosed exemplary embodiments, on the contrary, covered various modifications and/or equivalent in the spirit and scope that are included in claims.
Claims (20)
1. a Plasmia indicating panel (PDP) driver is used for driving voltage is applied to and forms between first and second electrodes and have the panel capacitor of first and second ends, and described PDP driver comprises:
First voltage source has positive terminal and negative pole end, is used to provide first voltage;
Second voltage source is used to provide second voltage;
First switch is connected between the described positive terminal of first end of described panel capacitor and described first voltage source;
Second switch is connected between the described positive terminal and described second voltage source of described first voltage source;
The 3rd switch is connected between the negative pole end of described first end of described panel capacitor and described first voltage source; And
The 4th switch is connected between the described negative pole end and described second voltage source of described first voltage source, wherein,
When described first switch and described the 4th switch connection, tertiary voltage is applied to described first end of described panel capacitor, and described tertiary voltage is the voltage difference between described first and second voltages,
When described second switch and described the 3rd switch connection, the 4th voltage is applied to described first end of described panel capacitor, the voltage difference between negative value that described the 4th voltage is described first voltage and described second voltage, and
Wherein, the described first and the 4th switch and the described second and the 3rd switch are alternately connected, and alternately respectively described third and fourth voltage are applied to described first end of described panel capacitor.
2. PDP driver as claimed in claim 1, the voltage difference between wherein said third and fourth voltage are the voltage of keeping of PDP.
3. PDP driver as claimed in claim 1 also comprises the inductor of first end that is connected to described panel capacitor, wherein
Because the resonance of described inductor and described panel capacitor, the voltage of first end of described panel capacitor changes between described third and fourth voltage.
4. PDP driver as claimed in claim 3 also comprises first and second resonant switchs, their parallel being connected between described inductor and described second voltage source.
5. PDP driver as claimed in claim 4 also comprises being connected first diode between described first resonant switch and the described inductor and being connected second diode between described second resonant switch and the described inductor.
6. PDP driver as claimed in claim 1, each in the wherein said first, second, third and the 4th switch all has body diode.
7. PDP driver as claimed in claim 1, wherein when described tertiary voltage was applied to described first end of described panel capacitor, described the 4th voltage was applied to described second end of described panel capacitor, and
When described the 4th voltage was applied to described first end of described panel capacitor, described tertiary voltage was applied to described second end of described panel capacitor.
8. PDP driver as claimed in claim 7 also comprises:
The tertiary voltage source has positive terminal and negative pole end, is used to provide the 5th voltage, and the 5th voltage is identical with described first voltage basically;
The 5th switch is connected between the described positive terminal in described second end of described panel capacitor and described tertiary voltage source;
The 6th switch is connected between the positive terminal and described second voltage source in described tertiary voltage source;
Minion is closed, and is connected between the described negative pole end in described second end of described panel capacitor and described tertiary voltage source; And
Octavo is closed, and is connected between the negative pole end and described second voltage source in described tertiary voltage source.
9. a Plasmia indicating panel (PDP) driver is used for driving voltage is applied to and forms between first and second electrodes and have the panel capacitor of first and second ends, and this PDP driver comprises:
First voltage source has positive terminal and negative pole end, is used to provide first voltage;
Second voltage source is used to provide second voltage;
First switch is connected between the described positive terminal of first end of described panel capacitor and described first voltage source; And
Second switch is connected between the described negative pole end of first end of described panel capacitor and described first voltage source;
Wherein, when described first switch connection, form first circuit between the described negative pole end of described first voltage source and described second voltage source, thereby tertiary voltage is applied to described first end of described panel capacitor, described tertiary voltage is the difference between described first and second voltages;
Wherein, when described second switch is connected, between the described positive terminal of described first voltage source and described second voltage source, form second circuit, thereby the 4th voltage is applied to described first end of described panel capacitor, the difference between negative value that described the 4th voltage is described first voltage and described second voltage; And
Wherein, described first and second switches are alternately connected.
10. PDP driver as claimed in claim 9 also comprises:
The 3rd switch is connected between the described negative pole end and described second voltage source of described first voltage source, thereby forms first circuit; And
The 4th switch is connected between the described positive terminal and described second voltage source of described first voltage source, thereby forms second circuit.
11. PDP driver as claimed in claim 9, wherein when described tertiary voltage was applied to first end of described panel capacitor, described the 4th voltage was applied to described second end of described panel capacitor, and
When described the 4th voltage was applied to first end of described panel capacitor, described tertiary voltage was applied to described second end of described panel capacitor.
12. PDP driver as claimed in claim 11, the voltage difference between wherein said third and fourth voltage are the voltage of keeping of PDP.
13. PDP driver as claimed in claim 12, wherein said first voltage are described half of voltage kept, described second voltage is ground voltage.
14. PDP driver as claimed in claim 11 also comprises:
The tertiary voltage source has positive terminal and negative pole end, is used to provide the 5th voltage, and it is identical with described first voltage basically;
The 3rd switch is connected between the described positive terminal in described second end of described panel capacitor and described tertiary voltage source; And
The 4th switch is connected between the described negative pole end in described second end of described panel capacitor and described tertiary voltage source,
Wherein, when described the 3rd switch connection, between the described positive terminal in described tertiary voltage source and described second voltage source, form tertiary circuit, thereby tertiary voltage is applied to described second end of described panel capacitor;
Wherein, when described the 4th switch connection, between the described negative pole end in described tertiary voltage source and described second voltage source, form the 4th circuit, thereby the 4th voltage is applied to described second end, and
Wherein, described third and fourth switch is alternately connected.
15. PDP driver as claimed in claim 9, also comprise a power back-off part, it is connected to described first end of described panel capacitor, this power back-off partly comprises inductor, and is applicable to the voltage on described first end that utilizes the resonance that produces between described inductor and the described panel capacitor to change described panel capacitor.
16. PDP driver as claimed in claim 15, wherein power back-off partly utilizes the voltage difference between described first and second voltage sources that electric current is imported described inductor, and produces described resonance when described electric current flows into described inductor.
17. one kind is used for by alternately first and second voltages being applied to the method that drives Plasmia indicating panel (PDP) on the panel capacitor that forms between first and second electrodes, this method comprises:
The positive terminal that the floating voltage source of tertiary voltage is provided is connected to first end of described panel capacitor;
The negative pole end in described floating voltage source is connected to first voltage source, so that the 4th voltage to be provided;
The described negative pole end in described floating voltage source is connected to described first end of described panel capacitor; And
The described positive terminal in described floating voltage source is connected to described first voltage source,
Wherein, the voltage difference between described third and fourth voltage is corresponding to described first voltage, and the voltage difference between the negative value of described tertiary voltage and described the 4th voltage is corresponding to described second voltage.
18. method as claimed in claim 17, the step that wherein connects positive terminal also comprises described second end that described second voltage is applied to described panel capacitor, and
The step that connects negative pole end also comprises described second end that described first voltage is applied to described panel capacitor.
19. method as claimed in claim 18, the voltage difference between wherein said first and second voltages are the voltage of keeping of PDP.
20. method as claimed in claim 17 also is included in described second voltage is applied to before described first end of described panel capacitor, utilizes the resonance of the inductor of described first end that is connected to described panel capacitor to change the voltage of described first end.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR0005993/2003 | 2003-01-29 | ||
| KR0005993/03 | 2003-01-29 | ||
| KR10-2003-0005993A KR100515330B1 (en) | 2003-01-29 | 2003-01-29 | Plasma display panel and driving apparatus and method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1519808A true CN1519808A (en) | 2004-08-11 |
| CN100487766C CN100487766C (en) | 2009-05-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100019610A Expired - Fee Related CN100487766C (en) | 2003-01-29 | 2004-01-16 | Device for driving plasma display panel |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7176854B2 (en) |
| JP (1) | JP4267985B2 (en) |
| KR (1) | KR100515330B1 (en) |
| CN (1) | CN100487766C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100437696C (en) * | 2004-10-25 | 2008-11-26 | 三星Sdi株式会社 | Plasma display device and driving method thereof |
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| KR100560481B1 (en) * | 2004-04-29 | 2006-03-13 | 삼성에스디아이 주식회사 | Driving method of plasma display panel and plasma display device |
| KR20060010295A (en) * | 2004-07-27 | 2006-02-02 | 엘지전자 주식회사 | Device and method for driving plasma display panel |
| US20060050067A1 (en) * | 2004-09-07 | 2006-03-09 | Jong Woon Kwak | Plasma display apparatus and driving method thereof |
| KR100623452B1 (en) * | 2005-02-23 | 2006-09-14 | 엘지전자 주식회사 | Apparatus for driving plasma display panel |
| KR100707445B1 (en) * | 2005-03-16 | 2007-04-13 | 엘지전자 주식회사 | The plasma display panel operating equipment and the methode of the same |
| US7352344B2 (en) * | 2005-04-20 | 2008-04-01 | Chunghwa Picture Tubes, Ltd. | Driver circuit for plasma display panels |
| TWI345755B (en) * | 2005-06-21 | 2011-07-21 | Chunghwa Picture Tubes Ltd | Method of switching a high-side switch of a pdp scan circuit in a zero-voltage-switching mode |
| TWI349916B (en) * | 2005-06-22 | 2011-10-01 | Chunghwa Picture Tubes Ltd | Driving circuit of plasma display panel |
| TWI349917B (en) * | 2005-06-22 | 2011-10-01 | Chunghwa Picture Tubes Ltd | Multi-mode switch for plasma display panel |
| US7385569B2 (en) * | 2005-06-22 | 2008-06-10 | Chunghwa Picture Tubes, Ltd. | Driving circuit of plasma display panel |
| CN100430979C (en) * | 2005-06-22 | 2008-11-05 | 中华映管股份有限公司 | Plasma display panel driving circuit |
| TWI340949B (en) * | 2005-06-22 | 2011-04-21 | Chunghwa Picture Tubes Ltd | Driving circuit of plasma display panel |
| US7397446B2 (en) * | 2005-06-22 | 2008-07-08 | Chunghwa Picture Tubes, Ltd. | Plasma display panel driving circuit |
| TWI344130B (en) * | 2005-06-22 | 2011-06-21 | Chunghwa Picture Tubes Ltd | Driving circuit of plasma display panel |
| US20070046584A1 (en) * | 2005-08-25 | 2007-03-01 | Jung Hai Y | Apparatus and method for driving plasma display panel |
| KR100740089B1 (en) * | 2005-10-18 | 2007-07-16 | 삼성에스디아이 주식회사 | Plasma display device and driving method thereof |
| TWI299153B (en) * | 2005-10-24 | 2008-07-21 | Chunghwa Picture Tubes Ltd | Circuit and method for resetting plasma display panel |
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| KR100913180B1 (en) * | 2007-11-26 | 2009-08-19 | 삼성에스디아이 주식회사 | Plasma display device and power supply thereof |
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| JP2891280B2 (en) * | 1993-12-10 | 1999-05-17 | 富士通株式会社 | Driving device and driving method for flat display device |
| JP3666607B2 (en) | 1995-05-24 | 2005-06-29 | 富士通株式会社 | Plasma panel driving method, driving apparatus, and plasma panel |
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| JPH1115426A (en) | 1997-06-24 | 1999-01-22 | Victor Co Of Japan Ltd | Capacitive load drive circuit |
| KR100295455B1 (en) * | 1999-06-15 | 2001-07-12 | 구자홍 | Apparatus And Method For Detach Voltage of PDP |
| JP3201603B1 (en) | 1999-06-30 | 2001-08-27 | 富士通株式会社 | Driving device, driving method, and driving circuit for plasma display panel |
| TW482991B (en) * | 2000-09-13 | 2002-04-11 | Acer Display Tech Inc | Power-saving driving circuit for plasma display panel |
| KR20030003564A (en) * | 2001-07-03 | 2003-01-10 | 주식회사 유피디 | Energy recovery circuit of sustain driver in AC-type plasma display panel |
| US6680581B2 (en) * | 2001-10-16 | 2004-01-20 | Samsung Sdi Co., Ltd. | Apparatus and method for driving plasma display panel |
| KR100477985B1 (en) * | 2001-10-29 | 2005-03-23 | 삼성에스디아이 주식회사 | A plasma display panel, a driving apparatus and a method of the plasma display panel |
| KR100463187B1 (en) * | 2002-04-15 | 2004-12-23 | 삼성에스디아이 주식회사 | Plasm display panel and driving apparatus and driving method thereof |
| KR100467448B1 (en) * | 2002-04-15 | 2005-01-24 | 삼성에스디아이 주식회사 | Plasma display panel and driving apparatus and method thereof |
| KR100458571B1 (en) * | 2002-07-02 | 2004-12-03 | 삼성에스디아이 주식회사 | Driving apparatus and method of plasm display panel |
| KR100458572B1 (en) * | 2002-07-09 | 2004-12-03 | 삼성에스디아이 주식회사 | Plasm display panel and driving method thereof |
| KR100497230B1 (en) * | 2002-07-23 | 2005-06-23 | 삼성에스디아이 주식회사 | Apparatus and method for driving a plasma display panel |
| JP2004133406A (en) * | 2002-10-11 | 2004-04-30 | Samsung Sdi Co Ltd | Apparatus and method for driving plasma display panel |
| KR100467458B1 (en) * | 2002-10-22 | 2005-01-24 | 삼성에스디아이 주식회사 | Apparatus and method for driving plasm display panel |
-
2003
- 2003-01-29 KR KR10-2003-0005993A patent/KR100515330B1/en not_active IP Right Cessation
- 2003-09-02 JP JP2003310696A patent/JP4267985B2/en not_active Expired - Fee Related
-
2004
- 2004-01-16 CN CNB2004100019610A patent/CN100487766C/en not_active Expired - Fee Related
- 2004-01-21 US US10/762,041 patent/US7176854B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100437696C (en) * | 2004-10-25 | 2008-11-26 | 三星Sdi株式会社 | Plasma display device and driving method thereof |
| US7580050B2 (en) | 2004-10-25 | 2009-08-25 | Samsung Sdi Co., Ltd. | Plasma display device and driving method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JP4267985B2 (en) | 2009-05-27 |
| JP2004233963A (en) | 2004-08-19 |
| KR20040069558A (en) | 2004-08-06 |
| US20040150587A1 (en) | 2004-08-05 |
| KR100515330B1 (en) | 2005-09-15 |
| US7176854B2 (en) | 2007-02-13 |
| CN100487766C (en) | 2009-05-13 |
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