CN118678122A - Synchronous solution method for SFN gateway signal optimization and exciter self-adaption - Google Patents
Synchronous solution method for SFN gateway signal optimization and exciter self-adaption Download PDFInfo
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Abstract
The invention relates to the technical field of SFN delay adjustment, in particular to a synchronous solution method for SFN gateway signal optimization and exciter self-adaption, which comprises the following steps: receiving and adjusting TS stream code rate; extracting an SIP packet in the TS stream, calculating network transmission delay, recovering an insertion time sequence according to the transmission delay of the SIP packet, de-multiplexing the recovered TS stream, and extracting a baseband signal frame; and calculating the total time delay of the signal frame processed by the transmission network and gateway hardware, inputting the total time delay result into an automatic time delay compensation module for compensation and optimization, and independently setting the transmission time delay of each exciter according to the optimized time delay result to realize the accurate synchronization of transmission in the SFN network.
Description
Technical Field
The invention relates to the technical field of SFN delay adjustment, in particular to a synchronous solution method for SFN gateway signal optimization and exciter self-adaption.
Background
In digital television Single Frequency Network (SFN) systems, the transmission and emission links have strict requirements on bit synchronization. In the transmission link, the input code stream of the exciter must all conform to the TS format, the TS stream packet number per second should be consistent with the integral multiple value of 188 bytes corresponding to the channel mode, and the delay variation per second should be lower than +/-50 ns. The error in the number of bits corresponding to the channel pattern must not be greater than + -1 bit for 99.9% of the time (1000 counts per second, 1ms each). In the transmitting link, the synchronous start of the output time of the exciter baseband signal forming module should be in the same bit of the same signal frame number in the same super frame (125 ms).
However, in practical transmission links, not every device has 1pps burst access and time alignment functions, and the hardware processing time differences of the different devices make it difficult to maintain accurate synchronization. In addition, bits in a non-TS format may be inserted into the code stream, which causes the bit rate output by the SFN adapter to change during transmission, thereby affecting the timing and second interval position of the SIP packet, and presenting a time delay change at the input end of the exciter. When the traditional SFN gateway recognizes and extracts the SIP packet, the error influence caused by the time delay change cannot be effectively eliminated, and the standard of the independent time delay setting value of the exciter is destroyed. In addition, in the exciter (including SFN gateway), the hardware processing time is typically tens of milliseconds from the digital baseband signal input to the baseband signal forming module output, and the hardware processing time between different exciters can be up to several milliseconds. This difference in hardware processing time further increases the difficulty of achieving accurate synchronization. Based on this, we have devised a synchronous solution of SFN gateway signal optimization and exciter adaptation to the above-mentioned problems.
Disclosure of Invention
The invention aims to provide a synchronous solving method for optimizing SFN gateway signals and self-adapting an exciter, which is characterized in that from receiving a transmission code stream to finally outputting an optimized signal, each step is advanced layer by layer, the integrity and the time sequence consistency of TS streams are ensured, and through accurately identifying and filtering non-TS stream bits, dynamically adjusting code rate and self-adapting time delay compensation, the problems of time delay change, hardware processing time difference and the like in the traditional technology are solved, the synchronism among different exciters is effectively ensured, the performance and the reliability of a single-frequency network are improved, the high-precision transmission and emission synchronization is realized, and the coverage and service quality of the SFN network are remarkably improved.
The embodiment of the invention is realized by the following technical scheme:
a synchronous solution of SFN gateway signal optimization and exciter adaptation, the steps of the method comprising:
Receiving and adjusting TS stream code rate;
extracting an SIP packet in the TS stream, calculating network transmission delay, recovering an insertion time sequence according to the transmission delay of the SIP packet, de-multiplexing the recovered TS stream, and extracting a baseband signal frame;
And calculating the total time delay of the signal frame processed by the transmission network and gateway hardware, inputting the total time delay result into an automatic time delay compensation module for compensation and optimization, and independently setting the transmission time delay of each exciter according to the optimized time delay result to realize the accurate synchronization of transmission in the SFN network.
Optionally, the receiving and adjusting the TS stream code rate specifically includes:
Receiving a transmission code stream;
identifying the format of the code stream and filtering out non-TS stream bits;
comparing the current code rate with the target code rate, and dynamically adjusting the code rate of the TS stream according to the channel mode;
and recovering the adjusted TS stream code rate and identifying empty bit null packets.
Optionally, the extracting the S IP packet in the TS stream calculates a network transmission delay, which specifically includes:
extracting an S IP packet in the TS stream;
Acquiring each S IP request and response, and finding out a corresponding time stamp;
calculating the time difference between the request and the response, wherein the time difference is the network transmission delay;
Repeating the steps until the network transmission delay of all the request-response pairs is solved.
Optionally, the recovering the inserting time sequence according to the transmission time delay of the S IP packet specifically includes:
acquiring network transmission delays of all request-response pairs;
Selecting a time stamp inserted into the original SiP by the corresponding network transmission delay so as to recover the time sequence information;
Repeating the steps until the S IP is completely processed.
Optionally, after extracting the baseband signal frame, the method further includes the following steps:
comparing and judging whether the initial time of the baseband signal frame is consistent with the initial time of the SFN gateway generation module;
If yes, calculating the total time delay of the signal frame processed by the hardware of the transmission network and the gateway;
if not, correcting the signal frame to ensure that the starting time of the signal frame is consistent with the starting time of the SFN gateway generating module.
Optionally, before the calculating the total time delay of the signal frame processed by the transmission network and the gateway hardware, the calculating further includes calculating a sequence number of the corrected signal frame to ensure continuity of the signal frame.
Optionally, the total delay of the signal frame processed by the transmission network and the gateway hardware is calculated, which specifically includes:
carrying out network transmission on the signal frames, and simultaneously recording transmission time delay;
Receiving a signal frame at a gateway hardware processing node, and recording hardware processing time delay;
the total delay of the signal frame processed by the transmission network and the gateway hardware is calculated.
An electronic device, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the synchronization solution of SFN gateway signal optimization and exciter adaptation when executing the computer program.
The technical scheme of the embodiment of the invention has at least the following advantages and beneficial effects:
the embodiment of the invention advances each step from receiving the transmission code stream to finally outputting the optimized signal, ensures the integrity of TS stream and the consistency of time sequence, and solves the problems of time delay change, hardware processing time difference and the like in the traditional technology by accurately identifying and filtering non-TS stream bits, dynamically adjusting code rate and self-adaptive time delay compensation, effectively ensures the synchronism among different exciters, improves the performance and reliability of a single frequency network, realizes high-precision transmission and emission synchronization, and remarkably improves the coverage and service quality of an SFN network.
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Fig. 1 is a schematic flow chart of a synchronization solution of SFN gateway signal optimization and exciter adaptation provided in an embodiment of the present invention;
Fig. 2 is a schematic diagram of a link transmission topology according to an embodiment of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
As shown in fig. 1, the present invention provides one of the embodiments: a synchronous solution of SFN gateway signal optimization and exciter adaptation, the steps of the method comprising:
Receiving and adjusting TS stream code rate;
extracting an SIP packet in the TS stream, calculating network transmission delay, recovering an insertion time sequence according to the transmission delay of the SIP packet, de-multiplexing the recovered TS stream, and extracting a baseband signal frame;
And calculating the total time delay of the signal frame processed by the transmission network and gateway hardware, inputting the total time delay result into an automatic time delay compensation module for compensation and optimization, and independently setting the transmission time delay of each exciter according to the optimized time delay result to realize the accurate synchronization of transmission in the SFN network.
In this embodiment, format recognition and filtering are performed on the received transport stream first, so as to ensure that the data processed later are valid TS stream data. And then, dynamically adjusting the code rate of the TS stream according to the actual channel condition, and accurately identifying the effective data. And (3) recovering the time sequence relation of the TS stream by extracting the S IP packet and calculating the network transmission delay, so as to ensure the time synchronization of the data in the transmission process. On the basis, the embodiment further ensures that the starting time of the signal frame is consistent with that of the gateway generation module through time correction, delay adjustment and sequence number calculation, and maintains the continuity and the correctness of the signal frame. And finally, calculating the total time delay of the signals processed by the transmission network and the SFN gateway hardware, dynamically optimizing the signals through an automatic time delay compensation module, independently setting the transmission time delay of each exciter, and finally realizing accurate transmission and transmission synchronization. .
In a specific application of this embodiment, a code stream (including transmission delay and delay variation) is first input, sync byte 0x47 is detected, and non-TS stream format bits are filtered. If 2 or more synchronization bytes are lost continuously, an interrupt alarm is indicated; if 5 or more sync bytes are detected, the code stream sync is indicated and the alarm is cleared. Code rate comparison is carried out according to the local channel mode setting, and if the input code rate is greater than the code rate corresponding to the channel mode, the system indicates overflow alarm and discards redundant bits; if the input code rate is smaller than the corresponding code rate of the channel mode, the system adds null bit 0xFF to ensure that the length of the data packet reaches integer times of 188 bytes and complements the corresponding null packet 0x1 FFF. The code rate is restored to be substantially the same as the SFN adapter output code rate. To distinguish between two classes of null bits and null packet identifications inserted by the code multiplexing and SFN adapter, the latter are specified to be 0xFE and 0x1 FFE, respectively. . Before extracting the S IP packet, the insertion time sequence of the S IP packet of the SFN adapter quasi-point second is recovered, namely, the empty bits and the empty packets inserted by the SFN adapter are removed, so that the code rate is consistent with the code rate during S IP insertion. And judging 0x15 per second, extracting the position information of the S IP packet, and calculating the time delay, wherein the time delay is shown as the sum of the transmission time delay (including time delay change) and the processing time of the SFN gateway hardware. After the S IP packet is extracted, the null bits and null packets in the code stream are replaced with 0xFF and 0x1 FFF. If there is no S IP packet for 5 seconds, SFN alarm is indicated. And after merging the code streams, stacking corresponding null bits and null packets, so that the code rate is consistent with the code rate corresponding to the channel mode (code rate correction).
In the implementation, in order to solve the problem of self-adaption of processing time of hardware of different exciters (including SFN gateway) in the SFN, a signal frame is taken out from an exciter baseband signal forming module and sent to an adapting module and a comparing module, if the starting time of the signal frame is inconsistent with that of a signal frame generating module, deltaT is not equal to 0, deltaT is characterized and compared, whether the starting time of the baseband signal frame is consistent with that of the SFN gateway generating module is judged, and correction and delay are carried out. The corrected signal frames are compared and the signal frame sequence number is calculated, and the independent delay setting of the exciter is only based on the transmitter delay value calculated by the coverage interference.
Specifically, the receiving and adjusting the TS stream code rate specifically includes:
Receiving a transmission code stream;
identifying the format of the code stream and filtering out non-TS stream bits;
comparing the current code rate with the target code rate, and dynamically adjusting the code rate of the TS stream according to the channel mode;
and recovering the adjusted TS stream code rate and identifying empty bit null packets.
In the implementation, the transmission code stream is received, the format is identified, and the non-TS stream bits are filtered, so that the data which are processed later are all effective TS stream data, and the processing efficiency and accuracy are improved. And comparing the current code rate with the target code rate, and adjusting and matching according to the channel mode. The code rate of TS stream is dynamically adjusted according to the bandwidth and quality of the actual transmission channel so as to adapt to the channel condition and ensure the transmission quality. And recovering the adjusted code rate, identifying the empty bit and empty packet, and distinguishing the effective data. Code rate adjustment may introduce null bits or null packets that require accurate identification and differentiation of valid data in preparation for subsequent extraction of SIP packets.
Further, the extracting the SIP packet in the TS stream calculates the network transmission delay, which specifically includes:
Extracting SIP packets in TS stream;
Acquiring each S IP request and response, and finding out a corresponding time stamp;
calculating the time difference between the request and the response, wherein the time difference is the network transmission delay;
Repeating the steps until the network transmission delay of all the request-response pairs is solved.
The S IP packet contains key information about transmission time and synchronization, extracts the S IP packet and calculates network transmission delay, and provides basis for subsequent time sequence recovery and synchronization.
Further, the recovering the inserting time sequence according to the transmission time delay of the S IP packet specifically includes:
acquiring network transmission delays of all request-response pairs;
Selecting a time stamp inserted into the original SiP by the corresponding network transmission delay so as to recover the time sequence information;
Repeating the steps until the S IP is completely processed.
And (3) recovering the time stamp and the time sequence relation of the TS stream through the time sequence information of the S IP packet, and ensuring the time synchronization of the data in the transmission process.
Specifically, after the baseband signal frame is extracted, the method further includes the following steps:
comparing and judging whether the initial time of the baseband signal frame is consistent with the initial time of the SFN gateway generation module;
If yes, calculating the total time delay of the signal frame processed by the hardware of the transmission network and the gateway;
if not, correcting the signal frame to ensure that the starting time of the signal frame is consistent with the starting time of the SFN gateway generating module.
In the embodiment, by comparing the starting time of the signal frame with the starting time of the gateway generation module, whether the time deviation exists is judged, and the starting time of the signal frame is consistent with the starting time of the gateway generation module through time correction and delay adjustment, so that the synchronism of signals is ensured.
More specifically, before the total delay of the signal frames processed by the transmission network and the gateway hardware is calculated, sequence number calculation is performed on the corrected signal frames so as to ensure continuity of the signal frames.
Specifically, the total delay of the signal frame processed by the transmission network and the gateway hardware is calculated, which specifically includes:
carrying out network transmission on the signal frames, and simultaneously recording transmission time delay;
Receiving a signal frame at a gateway hardware processing node, and recording hardware processing time delay;
the total delay of the signal frame processed by the transmission network and the gateway hardware is calculated.
In the implementation, the corrected and numbered signal frames are transmitted to the next processing node through the network, the time delay introduced in the transmission process is recorded, the transmitted signal frames are received, the time delay introduced in the gateway hardware processing is recorded, and the reference is provided for the subsequent self-adaptive optimization by calculating the total time delay introduced in the transmission network and the gateway hardware processing process of the signals.
As shown in fig. 2, this embodiment provides an example of one of the simulation algorithms: if a1, a2, a3, a4, a5 are transmitting stations in the SFN. Wherein a1 is a first station, a dotted line indicates that a plurality of stations are included, and a numeral in the figure indicates a fixed time delay in transmission. The numerals in brackets represent the change value of the delay within a certain 1 second, the following table is calculated, the items 1-4 in the table are randomly set values within a certain 1 second, the transmission code stream comprises T1 and T2, the positive and negative values in T2 represent the reference of '0' of 1 second, TW represents the hardware processing time from the receiving code stream to the calculation of the network delay, TJ represents the hardware processing time from the calculation of the network delay to the output of the exciter, and T5 and T6 represent the superframe and the signal frame time. If Δt=0, the signal frame is no longer included in the calculation. The sequence numbers 7-12 are calculated values, wherein T4 is the signal frame transmission delay time, T7 is the difference between the reference super frame time and the signal frame delay time, T8 is the time to be compensated, and T9 (taking negative value) is the delay compensation time which is the same as the absolute value of T8. Calculations indicate that there is always t10=0 per second, indicating that the gateway has an automatic delay compensation function.
The embodiment also provides an electronic device, including:
a memory for storing a computer program;
a processor for implementing the steps of the synchronization solution of SFN gateway signal optimization and exciter adaptation when executing the computer program.
The above is only a preferred embodiment of the present invention, and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (8)
- A synchronous solution for sfn gateway signal optimization and exciter adaptation, characterized in that the method comprises the steps of:Receiving and adjusting TS stream code rate;extracting an SIP packet in the TS stream, calculating network transmission delay, recovering an insertion time sequence according to the transmission delay of the SIP packet, de-multiplexing the recovered TS stream, and extracting a baseband signal frame;And calculating the total time delay of the signal frame processed by the transmission network and gateway hardware, inputting the total time delay result into an automatic time delay compensation module for compensation and optimization, and independently setting the transmission time delay of each exciter according to the optimized time delay result to realize the accurate synchronization of transmission in the SFN network.
- 2. The SFN gateway signal optimization and exciter adaptation synchronization solution according to claim 1, characterized in that the receiving and adjusting TS stream code rate is specifically:Receiving a transmission code stream;identifying the format of the code stream and filtering out non-TS stream bits;comparing the current code rate with the target code rate, and dynamically adjusting the code rate of the TS stream according to the channel mode;and recovering the adjusted TS stream code rate and identifying empty bit null packets.
- 3. The synchronous solving method of SFN gateway signal optimization and exciter adaptation according to claim 2, wherein the extracting SIP packets in TS stream calculates network transmission delay, which specifically is:Extracting SIP packets in TS stream;Acquiring each SIP request and response pair, and finding out a corresponding time stamp;calculating the time difference between the request and the response, wherein the time difference is the network transmission delay;Repeating the steps until the network transmission delay of all the request-response pairs is solved.
- 4. The SFN gateway signal optimization and exciter adaptation synchronization solution according to claim 3, wherein the recovering the insertion timing according to the transmission delay of the SIP packet is specifically:acquiring network transmission delays of all request-response pairs;selecting a time stamp inserted into the original SIP by the corresponding network transmission delay so as to recover the time sequence information;repeating the steps until the SIP is completely processed.
- 5. The SFN gateway signal optimization and exciter adaptation synchronization solution of claim 4, further comprising the steps of, after extracting the baseband signal frame:comparing and judging whether the initial time of the baseband signal frame is consistent with the initial time of the SFN gateway generation module;If yes, calculating the total time delay of the signal frame processed by the hardware of the transmission network and the gateway;if not, correcting the signal frame to ensure that the starting time of the signal frame is consistent with the starting time of the SFN gateway generating module.
- 6. The SFN gateway signal optimization and exciter adaptation synchronization solution of claim 5, wherein calculating the total delay of signal frames through the transmission network and gateway hardware processing further comprises calculating a sequence number of corrected signal frames to ensure continuity of signal frames.
- 7. The SFN gateway signal optimization and exciter adaptation synchronization solution according to claim 6, wherein the total delay of the signal frame processed by the transmission network and the gateway hardware is calculated by:carrying out network transmission on the signal frames, and simultaneously recording transmission time delay;Receiving a signal frame at a gateway hardware processing node, and recording hardware processing time delay;the total delay of the signal frame processed by the transmission network and the gateway hardware is calculated.
- 8. An electronic device, comprising:a memory for storing a computer program;processor for implementing the steps of the synchronization solution of SFN gateway signal optimization and exciter adaptation according to any of claims 1-7 when executing said computer program.
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