CN116053339A - Photodiode based on insulating column and manufacturing method thereof - Google Patents
Photodiode based on insulating column and manufacturing method thereof Download PDFInfo
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
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- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
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Abstract
The present application relates to a photodiode based on an insulating column and a method of manufacturing the same, the photodiode comprising: a semiconductor layer, a first electrode, and a second electrode; an insulating column perpendicular to the semiconductor layer is arranged in the semiconductor layer, and the semiconductor layer comprises a first type semiconductor region and a second type semiconductor region surrounding the insulating column; the upper surface of the semiconductor layer is covered with an insulating layer, the first electrode penetrates through the insulating layer to be in contact with the first type semiconductor region, and the second electrode penetrates through the insulating layer to be in contact with the second type semiconductor region; the side wall of the insulating column is covered with a first type pinning layer in a surrounding mode, and the second type semiconductor region is isolated from the insulating column by the first type pinning layer; the top of the first type pinning layer extends outwards to form a first type extension layer, and the top of the second type semiconductor region extends outwards to form a second type extension region. The photodiode provided by the invention solves the problem that the absorption position of photons in the semiconductor layer is far away from the junction region position when the existing photodiode faces long-wave photons.
Description
Technical Field
The present disclosure relates to the field of semiconductor devices, and more particularly, to a photodiode based on an insulating column and a method of manufacturing the same.
Background
In the conventional photodiode detector based on the planar junction process, a first type semiconductor layer is generally formed on an upper surface of a second type semiconductor layer (including at least an epitaxial layer), and a PN junction is formed near the upper surface of the epitaxial layer. The absorption depth of photons in the epitaxial layer (the distance between the absorption position and the light incidence plane) is dependent on the wavelength of light, and the longer the light wave, the greater the absorption depth and the shorter the light wave, the lesser the absorption depth. Further, for a front-side incident (incident from the upper surface side of the epitaxial layer) photodiode, the absorption position of the long-wave photon in the epitaxial layer is far from the PN junction; for back-side incident (incident from the lower surface side of the epitaxial layer) photodiodes, the absorption location of the short-wave photons in the epitaxial layer is away from the PN junction.
Further, for the case where the physical distance between the photon absorption position and the junction region position is large, the photo-generated carriers generated at a long distance require a long transit time to enter the charge depletion region and be collected. On one hand, in the process of diffusing along with the concentration gradient, the part of photogenerated carriers are easily captured by defects in crystal lattices, so that the quantum efficiency is reduced; on the other hand, an increase in the photo-generated carrier transit time also causes a decrease in the photodiode response speed.
In summary, when the absorption position of the photon in the epitaxial layer is far away from the junction region, a series of problems such as reduced spectral responsivity, slower response speed, and missing transient response charge of the photodiode are caused.
Aiming at the problem that the absorption position of photons in an epitaxial layer is far away from the junction region position in a partial use scene of the existing photodiode, no effective solution is proposed at present.
Disclosure of Invention
The invention provides a photodiode based on an insulating column and a manufacturing method thereof, which are used for solving the problem that the absorption position of photons in an epitaxial layer is far away from the position of a junction region in a partial use scene of the existing photodiode.
In a first aspect, there is provided in the present invention an insulating pillar based photodiode comprising: a semiconductor layer, a first electrode, and a second electrode;
an insulating column perpendicular to the semiconductor layer is arranged in the semiconductor layer, and the semiconductor layer comprises a first type semiconductor region and a second type semiconductor region surrounding the insulating column;
the upper surface of the semiconductor layer is covered with an insulating layer, the first electrode penetrates through the insulating layer to be in contact with the first type semiconductor region, and the second electrode penetrates through the insulating layer to be in contact with the second type semiconductor region.
In some of these embodiments, the sidewalls of the insulating pillars are circumferentially covered with a first-type pinning layer that isolates the second-type semiconductor region from the insulating pillars;
the doping concentration of the first type pinning layer is higher than the doping concentration of the second type semiconductor region.
In some embodiments, the top of the first type pinning layer extends outwards to form a first type extension layer, and the top of the second type semiconductor region extends outwards to form a second type extension region;
the first type extension layer isolates the second type extension region from the insulating layer;
and a contact window is reserved in the first type extension layer, and the second electrode is contacted with the second type extension region through the contact window.
In some embodiments, the semiconductor layer includes an epitaxial layer grown on a substrate, the insulating column is disposed in the epitaxial layer, and the epitaxial layer includes the first type semiconductor region and the second type semiconductor region;
the insulating column penetrates through the epitaxial layer;
or a preset distance is reserved between the bottom surface of the insulating column and the lower surface of the epitaxial layer.
In some of these embodiments, the insulating column has a length to diameter ratio in the range of 3-10.
In a second aspect, there is provided in the present invention a method of manufacturing a photodiode, the method comprising:
etching a through hole perpendicular to the first type semiconductor layer in the first type semiconductor layer;
implanting second type doping ions into the side wall of the through hole, and forming a second type semiconductor region surrounding the through hole in the first type semiconductor layer; wherein the non-second type semiconductor region in the first type semiconductor layer constitutes a first type semiconductor region;
depositing an insulating material in the through hole to form an insulating column;
forming an insulating layer on the upper surface of the first type semiconductor layer;
and preparing a first electrode and a second electrode penetrating through the insulating layer, wherein the first electrode is in contact with the first type semiconductor region, and the second electrode is in contact with the second type semiconductor region.
In some of these embodiments, the manufacturing method further includes, after forming the second type semiconductor region:
implanting first type doping ions into the side wall of the through hole, and forming a first type pinning layer surrounding the through hole on the inner side of the second type semiconductor region;
the first type pinning layer is used for isolating the second type semiconductor region from the insulating column, and the doping concentration of the first type pinning layer is higher than that of the second type semiconductor region.
In some of these embodiments, the manufacturing method further includes, after forming the second type semiconductor region:
implanting second type doping ions into the upper surface of the first type semiconductor layer to form a second type extension region extending outwards from the top of the second type semiconductor region;
implanting first type doping ions to the upper surface of the first type semiconductor layer to form a first type extension layer with the top of the first type pinning layer extending outwards, wherein a contact window is reserved in the first type extension layer;
the first type extension layer is used for isolating the second type extension region from the insulating layer, and the contact window is used for providing a contact space between the second electrode and the second type extension region.
In some embodiments, the first-type semiconductor layer includes a first-type epitaxial layer grown on a first-type substrate;
the through hole is formed in the first type epitaxial layer, the second type semiconductor region is formed in the first type epitaxial layer, and a non-second type semiconductor region in the first type epitaxial layer forms the first type semiconductor region;
the through hole penetrates through the first epitaxial layer;
or a preset distance is reserved between the bottom wall of the through hole and the lower surface of the first type epitaxial layer.
In some of these embodiments, the ratio of the length to the diameter of the through hole ranges from 3 to 10.
In a third aspect, the present invention also provides a diode manufacturing system for manufacturing the insulating pillar based photodiode provided in the first aspect described above.
In a fourth aspect, the present invention also provides a diode manufacturing system for performing the method of manufacturing a photodiode provided in the second aspect described above.
Compared with the diode of the existing planar junction technology, the photodiode provided by the invention has the advantages that the junction region is formed inside the semiconductor layer, when the absorption position of the long-wave photon is deeper in the semiconductor layer, the photo-generated carrier generated at the absorption position can be absorbed by the junction region at the deeper position, and the photo-generated carrier does not need to transit to the surface position of the semiconductor layer. Thus, the problem that the absorption position of photons in the semiconductor layer is far away from the junction region position when the existing photodiode faces long-wave photons is solved.
The details of one or more embodiments of the application are set forth in the accompanying drawings and the description below to provide a more thorough understanding of the other features, objects, and advantages of the application.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute an undue limitation to the application. In the drawings:
FIG. 1 is a schematic diagram of a photodiode in one embodiment of the present invention;
FIG. 2 is a schematic diagram of a photodiode in one embodiment of the present invention;
FIG. 3 is a schematic diagram of a photodiode in one embodiment of the present invention;
fig. 4 is a flow chart of a method of manufacturing a photodiode in an embodiment of the present invention.
Detailed Description
For a clearer understanding of the objects, technical solutions and advantages of the present application, the present application is described and illustrated below with reference to the accompanying drawings and examples.
Unless defined otherwise, technical or scientific terms used herein shall have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terms "a," "an," "the," "these," and the like in this application are not intended to be limiting in number, but rather are singular or plural. The terms "comprising," "including," "having," and any variations thereof, as used in the present application, are intended to cover a non-exclusive inclusion; for example, a process, method, and system, article, or apparatus that comprises a list of steps or modules (units) is not limited to the list of steps or modules (units), but may include other steps or modules (units) not listed or inherent to such process, method, article, or apparatus. The terms "connected," "coupled," and the like in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Reference to "a plurality" in this application means two or more. "and/or" describes an association relationship of an association object, meaning that there may be three relationships, e.g., "a and/or B" may mean: a exists alone, A and B exist together, and B exists alone. Typically, the character "/" indicates that the associated object is an "or" relationship. The terms "first," "second," "third," and the like, as referred to in this application, merely distinguish similar objects and do not represent a particular ordering of objects.
In the present invention, there is provided an insulation column-based photodiode, referring to fig. 1 to 3, the photodiode comprising: a semiconductor layer, a first electrode 110, and a second electrode 120; an insulating column 300 perpendicular to the semiconductor layer is provided in the semiconductor layer, the semiconductor layer including a first type semiconductor region 210 and a second type semiconductor region 220 surrounding the insulating column 300; the upper surface of the semiconductor layer is covered with an insulating layer 500, the first electrode 110 is in contact with the first type semiconductor region 210 through the insulating layer 500, and the second electrode 120 is in contact with the second type semiconductor region 220 through the insulating layer 500.
Specifically, the first type semiconductor and the second type semiconductor in the photodiode refer to two types of complementary semiconductors, that is, P-type semiconductor and N-type semiconductor are represented respectively. The body of the photodiode is a semiconductor layer composed of a first type semiconductor region 210 and a second type semiconductor region 220, and two electrodes are respectively connected to the first type semiconductor region 210 and the second type semiconductor region 220. Junction regions are formed at contact surfaces of the first type semiconductor region 210 and the second type semiconductor region 220. Since the insulating column 300 is vertically inside the semiconductor layer, the second type semiconductor region 220 surrounds the outside of the insulating column 300. Thus, a junction region is formed inside the semiconductor layer. In the diode of the conventional planar junction process, a second type semiconductor layer is generally formed on the upper surface of the first type semiconductor layer, and thus a junction region is formed on the upper surface of the first type semiconductor layer. And the absorption position of the long-wave photon is deeper in the first semiconductor layer, and the absorption position is farther from the junction region. Compared with the diode of the existing planar junction technology, the photodiode provided by the invention has the advantages that the junction region is formed inside the semiconductor layer, when the absorption position of the long-wave photon is deeper in the semiconductor layer, the photo-generated carrier generated at the absorption position can be absorbed by the junction region at the deeper position, and the photo-generated carrier does not need to transit to the surface position of the semiconductor layer. Thus, the problem that the absorption position of photons in the semiconductor layer is far away from the junction region position when the existing photodiode faces long-wave photons is solved.
Further, the length of the insulating column 300 and the distribution depth of the second semiconductor region 220 in the semiconductor layer can be adjusted according to the actual design requirement, so as to adjust the graduation depth of the junction region in the semiconductor layer. Specifically, the insulating column 300 is made of an insulating material, such as silicon dioxide. The insulating column 300 has a columnar structure as a whole, and may be a solid column or a hollow column. Preferably, the ratio of the length to the diameter of the insulating column 300 ranges from 3 to 10. For example, the ratio may be 5 or 7 or 7.5, etc. The above range is only a preferable range, and the ratio of the length to the diameter of the insulating column 300 may be 2 or 11, as a matter of course.
In the manufacturing process, it is necessary to etch a via hole perpendicular to the first type semiconductor layer in the first type semiconductor layer, then implant second type dopant ions into the sidewall of the via hole, form a second type semiconductor region 220 surrounding the via hole in the first type semiconductor layer, and a non-second type semiconductor region in the first type semiconductor layer constitutes the first type semiconductor region 210. Therefore, in the photodiode of the present invention, the upper ends of the second type semiconductor region 220 and the insulating column 300 are generally located at the upper surface position of the semiconductor layer, and the lower end positions of both can be adjusted according to design requirements.
According to the existing diode manufacturing process, an epitaxial layer is generally grown on the upper surface of the substrate 600, and then related process treatment is performed in the epitaxial layer, so as to finally form a diode finished product. Therefore, the semiconductor layer of the photodiode in the present invention is generally referred to as an epitaxial layer. Further, it is also necessary to form an insulating layer 500 on the upper surface of the semiconductor layer, and two electrodes are prepared on the upper surface of the semiconductor layer. And whether the insulating layer 500 is formed on the lower surface of the semiconductor layer is related to whether the substrate 600 is removed. Further, whether to remove the substrate 600 may be selected according to the type of photodiode, which may be classified into Front Side Incidence (FSI) and Back Side Incidence (BSI).
Thus, in one embodiment, the photodiode is front-side incident, the photodiode further comprises a substrate 600, and the semiconductor layer is an epitaxial layer grown over the substrate 600; the insulating layer 500 covers the upper surface of the epitaxial layer, and the surface of the insulating layer 500 is covered with an anti-reflection film. In this embodiment, since the front-side incident photodiode, that is, the upper surface of the epitaxial layer is illuminated, the substrate 600 can be maintained, and the surface of the insulating layer 500 over the epitaxial layer is covered with an anti-reflection film, thereby enhancing the photon penetration efficiency.
In another embodiment, the photodiode is back-side incident, the photodiode requires removal of the substrate 600, and the semiconductor layer is an epitaxial layer of the substrate 600. An insulating layer is formed on both upper and lower surfaces of the epitaxial layer, and an anti-reflection film is coated on the lower surface insulating layer 700. In this embodiment, since the back-side incident photodiode is the photodiode that receives light through the lower surface of the epitaxial layer, the substrate 600 needs to be removed, and the lower surface insulating layer 700 of the epitaxial layer is covered with an anti-reflection film, so that the photon penetration efficiency is enhanced, and the device photosensitive region is formed on the lower surface of the epitaxial layer.
Further, in some of these embodiments, the insulating pillars 300 penetrate through the epitaxial layer, and in the diode where the substrate 600 is not removed, the bottom ends of the insulating pillars 300 penetrate deep into the substrate 600. In other embodiments, the insulating pillars 300 do not penetrate the epitaxial layer, and have a space between the bottom and the lower surface of the epitaxial layer. The structure of the insulating column 300 through the epitaxial layer is typically selected when a deep junction area is desired.
In some of these embodiments, the sidewalls of the insulating pillars 300 are circumferentially covered with a first-type pinning layer 400, the first-type pinning layer 400 isolating the second-type semiconductor regions 220 from the insulating pillars 300; the doping concentration of the first type pinning layer 400 is higher than the doping concentration of the second type semiconductor region 220.
Specifically, in order to avoid the possible leakage problem of the outer sidewall of the insulating pillar 300, the first type pinning layer 400 is further covered around the outer sidewall of the insulating pillar 300, and the doping concentration of the first type pinning layer 400 is also higher than that of the second type semiconductor region 220. The second type semiconductor region 220 may be completely isolated from the insulating column 300 by the first type pinning layer 400 such that the second type semiconductor region 220 is not in contact with the insulating column 300. Accordingly, the first type pinning layer 400 is distributed to a greater depth in the semiconductor layer than the second type semiconductor region 220. Further, in an embodiment in which the insulating pillars 300 do not penetrate the semiconductor layer, the first type pinning layer 400 may cover the bottoms of the insulating pillars 300.
Further, in some embodiments, the top of the first type pinning layer 400 extends outward to form a first type extension layer 410, and the top of the second type semiconductor region 220 extends outward to form a second type extension region 221; the first type extension layer 410 isolates the second type extension region 221 from the insulating layer 500; the first type extension layer 410 is reserved with a contact window, and the second electrode 120 is in contact with the second type extension region 221 through the contact window.
Specifically, in the present embodiment, the top of the second type semiconductor region 220 is extended to the outside to form the second type extension region 221. Accordingly, the second type semiconductor region 220 entirely exhibits an "L" type structure as viewed in a vertical cross section of the diode device. Wherein the second type extension region 221 is disposed at the upper surface position of the semiconductor layer, thus
The junction region formed by the second type extension region 221 and the first type semiconductor region 210 is close to the upper surface 5 of the semiconductor layer, and the absorption position of the short-wave photon in the semiconductor layer is closer to the junction region. Thus in the present
In an embodiment, the absorption position of photons in the semiconductor layer is relatively close to the junction region position, whether the photodiode faces long-wave light or short-wave light. Further, in order to avoid the possible leakage problem on the upper surface of the semiconductor layer, the top of the first type pinning layer 400 is extended to the outside to form a first type extension layer 410, which is extended to the first type
A contact window is also reserved so that the inner end of the second electrode 120 may be in contact with the second type extension region 221 through the contact window. Meanwhile, the first electrode 110 is not in contact with the first type extension region, it is outside the first type extension region, and its inner end is in direct contact with the first type semiconductor region 210.
The partial region on the upper surface of the semiconductor layer constitutes a device light-sensing region, and the second type extension region 221 in this embodiment 5 is formed in the device light-sensing region.
In some of these embodiments, the inner end of the first electrode 110 is in contact with the first type semiconductor region 210 through the first type contact layer 111, the inner end of the second electrode 120 is in contact with the second type semiconductor region through the second type contact layer 121, and both contact layers are heavily doped for ohmic contact.
Specifically, the first type contact layer 111 and the second type contact layer 121 are both disposed to form ohmic 0 contact, so that the contact between the first electrode 110 and the first type semiconductor region 210 is more stable, and the contact between the second electrode 120 and the second type semiconductor region 220 is more stable.
The invention also provides a manufacturing method of the photodiode, which is used for manufacturing the photodiode based on the insulating column. Referring to fig. 4, the manufacturing method includes the steps of:
in step S110, a via hole perpendicular to the first type semiconductor layer is etched in the first type semiconductor layer.
5 in the present step, the first type semiconductor layer is generally referred to as a first type grown on a first type substrate
And (5) an epitaxial layer. First, the through holes are etched from the upper surface of the first type semiconductor layer, and the etching depth and width of the through holes can be determined according to actual design requirements. More preferably, the ratio of the length to the diameter of the through hole is in the range of 3 to 10. For example, the ratio may be 5 or 7 or 7.5, etc. The above range is only a preferable range, and the ratio of the length to the diameter of the through hole may be 2 or 11.
Step S120, implanting second type doping ions into the side wall of the through hole, and forming a second type semiconductor region surrounding the through hole in the first type semiconductor layer; wherein the non-second type semiconductor region in the first type semiconductor layer constitutes the first type semiconductor region.
In this step, the second type doping ions are implanted from the upper opening of the via hole to the sidewall of the via hole by an ion implantation process, thereby forming the second type semiconductor region. Wherein, the dip angle or Halo injection mode can be adopted. The implantation tilt angle determines the depth of the second semiconductor region due to the effect of blocking the ion beam at the edge of the upper opening of the via. In general, the implantation tilt angle refers to an angle between the ion beam direction and the normal line of the implantation surface, and the larger the implantation tilt angle is, the smaller the distribution depth of the second type semiconductor region is, and the smaller the implantation tilt angle is, the larger the distribution depth of the second type semiconductor region is. After the second type semiconductor region is formed, the other portions of the first type semiconductor layer constitute the first type semiconductor region.
In step S130, an insulating material is deposited in the via hole to form an insulating column.
Specifically, after the second type semiconductor region is formed, an insulating material is deposited in the through hole to form an insulating column. The through hole can be completely filled to form a solid insulating column, or insulating material can be only deposited on the inner wall of the through hole, so that a hollow insulating column is formed.
In step S140, an insulating layer is formed on the upper surface of the first type semiconductor layer.
In step S150, a first electrode and a second electrode penetrating through the insulating layer are prepared, the first electrode being in contact with the first type semiconductor region, and the second electrode being in contact with the second type semiconductor region.
Specifically, in the above two steps, after the insulating column is formed, an insulating layer may be prepared on the upper surface of the first-type semiconductor layer, and the first electrode and the second electrode may be prepared on the insulating layer. The inner end of the first electrode is in contact with the first type semiconductor region, and the inner end of the second electrode is in contact with the second type semiconductor region.
Through the above steps, the insulating pillar-based photodiode proposed in the present invention can be manufactured, the photodiode including: a semiconductor layer, a first electrode, and a second electrode; an insulating column perpendicular to the semiconductor layer is arranged in the semiconductor layer, and the semiconductor layer comprises a first type semiconductor region and a second type semiconductor region surrounding the insulating column; the upper surface of the semiconductor layer is covered with an insulating layer, the first electrode penetrates through the insulating layer to be in contact with the first type semiconductor region, and the second electrode penetrates through the insulating layer to be in contact with the second type semiconductor region. The principle of use of this photodiode can be referred to in the foregoing. Thus, by the diode manufacturing method proposed in the present invention. The problem that the absorption position of photons in a semiconductor layer is far away from the junction region position when the existing photodiode faces long-wave photons is solved. The second type semiconductor regions with different distribution depths can be formed by etching through holes with different depths and adopting different ion implantation angles.
According to the existing diode manufacturing process, an epitaxial layer is usually grown on the upper surface of a substrate, and then related process treatment is performed in the epitaxial layer, so that a diode finished product is finally formed. Therefore, the semiconductor layer of the photodiode in the present invention is generally referred to as an epitaxial layer.
Thus, in an embodiment for preparing a front-side incident photodiode, first, a first type epitaxial layer is formed on an upper surface of a first type substrate, the first type epitaxial layer constituting a first type semiconductor layer; etching a through hole perpendicular to the epitaxial layer in the first type epitaxial layer; further, the second semiconductor region is formed in the first type epitaxial layer, and the non-second type semiconductor region in the first type epitaxial layer constitutes the first type semiconductor region; finally, an insulating layer is formed on the upper surface of the first type epitaxial layer, and a first electrode and a second electrode are prepared. Since the front-side incident photodiode is manufactured, it is not necessary to remove the first type substrate and cover the upper surface insulating layer with an antireflection film.
Accordingly, in an embodiment for fabricating a backside incident photodiode, first, a first type epitaxial layer is formed on an upper surface of a first type substrate, the first type epitaxial layer constituting a first type semiconductor layer; etching a through hole perpendicular to the epitaxial layer in the first type epitaxial layer; further, the second semiconductor region is formed in the first type epitaxial layer, and the non-second type semiconductor region in the first type epitaxial layer constitutes the first type semiconductor region; forming an insulating layer on the upper surface of the first type epitaxial layer, and preparing a first electrode and a second electrode; and finally, removing the first type substrate, and forming an insulating layer on the lower surface of the first type epitaxial layer. Since the back-side incident photodiode is manufactured, an antireflection film is further coated on the lower surface insulating layer.
Further, in some of these embodiments, the via may extend through the first type epitaxial layer, and in a diode where the substrate is not removed, the bottom end of the via may extend deep into the substrate. In other embodiments, the through hole does not penetrate the first epitaxial layer, and a space is formed between the bottom of the through hole and the lower surface of the first epitaxial layer. Typically, when junction regions are desired to be deep, a via is selectively etched through the first type epitaxial layer.
In some of these embodiments, the method of manufacturing further comprises, after forming the second-type semiconductor region:
implanting first type doping ions into the side wall of the through hole, and forming a first type pinning layer surrounding the through hole on the inner side of the second type semiconductor region; the first type pinning layer is used for isolating the second type semiconductor region from the insulating column, and the doping concentration of the first type pinning layer is higher than that of the second type semiconductor region.
Specifically, in order to avoid the possible leakage problem of the outer side wall of the insulating column, after the second type semiconductor region is formed, the first type doped ions are also implanted into the side wall of the through hole by adopting an ion implantation process, so that a first type pinning layer is formed on the inner side of the second type semiconductor region, and the doping concentration of the first type pinning layer is higher than that of the second type semiconductor region. The first type pinning layer is used for completely isolating the second type semiconductor region from the subsequent insulating column. Therefore, it is necessary to control the implantation angle of the first type dopant ions so that the first type pinning layer is larger in the distribution depth than the second type semiconductor region. Further, in the embodiment in which the insulating column does not penetrate the first type semiconductor layer, the first type doping ions may be implanted on the entire inner wall of the via hole.
Further, in some embodiments, the method of manufacturing further includes, after forming the second type semiconductor region:
implanting second type doping ions into the upper surface of the first type semiconductor layer to form a second type extension region, wherein the top of the second type semiconductor region extends outwards; implanting first type doping ions into the upper surface of the first type semiconductor layer to form a first type extension layer with the top of the first type pinning layer extending outwards, wherein a contact window is reserved in the first type extension layer; the first type extension layer is used for isolating the second type extension region from the insulating layer, and the contact window is used for providing a contact space between the second electrode and the second type extension region.
Specifically, by this manufacturing step, the top portion of the second-type semiconductor region is formed on the upper surface of the first-type semiconductor layer, and the second-type extension region is formed to extend outward. Thus, the second-type semiconductor region as a whole exhibits an "L" type structure as viewed in a vertical cross section of the diode device. Further, in order to avoid the possible leakage problem on the upper surface of the semiconductor layer, a first type extension layer is formed by extending the top of the first type pinning layer outwards on the upper surface of the first type semiconductor layer, and the first type extension layer isolates the second type extension region from the insulating layer. Therefore, the extension width of the first type extension layer is larger than that of the second type semiconductor region. Further, a contact window is reserved in the first type extension layer, so that the inner end of the second electrode can be in contact with the second type extension region through the contact window. Meanwhile, the first electrode is not in contact with the first type extension region, is positioned outside the first type extension region, and the inner end of the first electrode is in direct contact with the first type semiconductor region.
The second type extension region in the present embodiment is formed in the device photosensitive region, which is formed in a partial region of the upper surface of the semiconductor layer.
In some of these embodiments, the method of manufacturing further comprises, after forming the second-type semiconductor region:
and implanting first type doping ions into the upper surface of the first type semiconductor region to form a first type contact layer in contact with the first type semiconductor region, and implanting second type doping ions into the upper surface of the second type semiconductor region to form a second type contact layer in contact with the second type semiconductor region. The first type contact layer is used for contacting the first electrode, and the second type contact layer is used for contacting the second electrode.
Specifically, the first type contact layer and the second type contact layer are both arranged to form ohmic contact, so that contact between the first electrode and the first type semiconductor region is more stable, and contact between the second electrode and the second type semiconductor region is more stable.
The following describes the technical solution of the present invention through some specific and complete embodiments.
In one embodiment, the photodiode in this embodiment is based on a p-type substrate with a p-type epitaxial layer thickness of 5um, using an n-on-p diode structure. The center of the diode device is a through hole manufactured by a dry etching process, the through hole penetrates through the whole epitaxial layer, and the bottom of the through hole enters the p-type substrate. The aspect ratio of the via is 5:1, i.e., it has a diameter of about 1um and a depth of about 5um. And an inclination angle or Halo injection mode is adopted, and an n-type ion injection region of the upper surface of the photosensitive region of the device and the local side wall of the through hole is realized by utilizing the self-blocking effect of the upper edge of the through hole at a specific injection angle, so that a pn junction is formed. The non-n-type ion implantation region in the epitaxial layer forms a first-type semiconductor region, and the n-type ion implantation region forms a second-type semiconductor region.
In this embodiment, the specific implantation tilt angle is selected to be arctan (1 um/4 um), i.e., the depth of the n-type ion implantation region along the via hole is controlled to be about 4um. Similarly, the above dip angle implantation method is also adopted, and a p+ type pinning region is formed on the upper surface of the device photosensitive region and the local side wall of the through hole by using the self-blocking effect of the upper edge of the through hole, and the implantation angle is selected as arctan (1 um/4.5 um). The coverage area of the p+ type pinning region exceeds the n type ion implantation region, so that the depletion region is prevented from contacting the etching damage region of the side wall of the through hole and the surface area of the device, and the influence of interface defects on the performance of the device is reduced. Wherein the p+ type pinning region constitutes a first type pinning layer.
The p+ type pinning area is reserved with 1-2 window areas in the device photosensitive area for leading out the cathode (n type) electrode. N++ type and p++ type ion implantation are respectively carried out in the cathode contact window and the anode contact region connected with the p type epitaxial layer for forming ohmic contact. After the ion implantation step, the ion electrical property is required to be activated and the distribution profile is required to be adjusted by a corresponding annealing treatment process. The vias being filled with insulating material, e.g. SiO 2 And the like, and performing corresponding passivation on the surface of the insulating layer on the surface of the device. After the surface is flattened, contact through holes of the cathode and the anode of the diode and the metal electrode are respectively prepared. The present embodiment is a front-side-incident (FBI) photodiode, i.e., photons are incident from the electrode-side surface of the device, so that the p-type substrate is eventually preserved from being removed.
In another embodiment, the photodiode in this embodiment is based on an n-type substrate with an n-type epitaxial layer thickness of 8.5-10 um, using a p-on-n back-incident (BSI) photodiode structure. The center of the device is a through hole manufactured by a dry etching process, penetrates through the whole epitaxial layer, and the bottom of the through hole enters the substrate. The aspect ratio of the via is 5:1, i.e., it has a diameter of about 1.6um and a depth of about 8um. And the p-type ion implantation areas on the lower surface of the photosensitive area of the device and the local side wall of the through hole are realized by adopting an inclination angle or Halo implantation mode and utilizing the self-blocking effect of the upper edge of the through hole at a specific implantation angle, so that a pn junction is formed. The non-p-type ion implantation region in the epitaxial layer forms a first-type semiconductor region, and the p-type ion implantation region forms a second-type semiconductor region.
In this embodiment, the specific implantation tilt angle is selected to be arctan (1.6 um/7.5 um), i.e., the p-type ion implantation region depth along the sidewall of the via is controlled to be about 7.5um. Similarly, the above dip angle implantation method is also adopted, and an n+ type pinning region is formed on the surface of the photosensitive region of the device and the entire side wall of the through hole by using the self-blocking effect of the upper edge of the through hole, and the implantation dip angle is selected as arctan (1.6 um/8 um). The coverage area of the n+ type pinning region exceeds the p type ion implantation region, so that the depletion region is prevented from contacting the surface area of the device, and the influence of interface defects on the performance of the device is reduced. Wherein the n+ type pinning region constitutes a first type pinning layer.
The n+ type pinning area is reserved with 1-2 window areas in the device photosensitive area for leading out anode (p type) electrodes. P++ type and n++ type ion implantation are respectively carried out in the anode contact window and the cathode contact region connected with the n type epitaxial layer for forming ohmic contact. After the ion implantation step, the ion electrical property is required to be activated and the distribution profile is required to be adjusted by a corresponding annealing treatment process. The through holes are filled with insulating materials such as SiO2 and the like. And the upper surface of the device is subjected to corresponding passivation of the surface of the insulating layer. After the surface is flattened, contact through holes of the anode and the cathode of the diode and a metal electrode are respectively prepared. Because this embodiment is a back-side-incident (BSI) photodiode, i.e., photons are incident from the lower surface of the device, the substrate needs to be removed leaving only about 8um of epitaxial layer. Then preparing a passivation film and an antireflection film on the lower surface.
In another embodiment, the photodiode in this embodiment is based on a p-type substrate with a p-type epitaxial layer thickness of 14um, employing an n-on-p back-incidence (BSI) photodiode structure. The center of the device is a through hole manufactured by a dry etching process, and the distance between the bottom of the through hole and the boundary between the epitaxial layer and the substrate is 1-3 um. The aspect ratio of the via is 6:1, i.e., it has a diameter of about 2um and a depth of about 12um. And an inclination angle or Halo injection mode is adopted, and an n-type ion injection region of the lower surface of the photosensitive region of the device and the local side wall of the through hole is realized by utilizing the self-blocking effect of the upper edge of the through hole at a specific injection inclination angle, so that a pn junction is formed. The non-n-type ion implantation region in the epitaxial layer forms a first-type semiconductor region, and the n-type ion implantation region forms a second-type semiconductor region.
In this embodiment, the specific implantation tilt angle is selected to be arctan (2 um/11 um), i.e., the depth of the n-type ion implantation region along the sidewall of the via is controlled to be about 11um. Similarly, the above dip angle injection mode is also adopted, and a p+ type pinning region is formed on the lower surface of the device photosensitive region and the whole inner wall of the through hole by utilizing the self-blocking effect of the upper edge of the through hole, and the injection dip angle is selected as arctan (1 um/12 um). The p+ type pinning region has a coverage area exceeding that of the n type implant region to prevent the depletion region from contacting the surface area of the device, thereby reducing the impact of interface defects on device performance. Wherein the p+ type pinning region constitutes a first type pinning layer.
The p+ type pinning area is reserved with 1-2 window areas in the device photosensitive area for leading out the cathode (n type) electrode. N++ type and p++ type ion implantation are respectively carried out in the cathode contact window and the anode contact region connected with the p type epitaxial layer for forming ohmic contact. After the ion implantation step, the ion electrical property is required to be activated and the distribution profile is required to be adjusted by a corresponding annealing treatment process. The through holes are filled with insulating materials such as SiO2 and the like. And the upper surface of the device is subjected to corresponding passivation of the surface of the insulating layer. After the surface is flattened, contact through holes of the cathode and the anode of the diode and a metal electrode are respectively prepared. Because this embodiment is a back-side-incident (BSI) photodiode, i.e., photons are incident from the lower surface of the device, the substrate needs to be removed leaving only about 14um of epitaxial layer. Then preparing a passivation film and an antireflection film on the lower surface.
As can be seen from the above embodiments, the photodiode according to the present invention has the following characteristics:
1. a through hole (central hole) is etched in the center of the photosensitive region of the photodiode by using a through hole or etching process, then ion implantation or diffusion is adopted to carry out doping around the central hole, and an annular hole type doped region complementary with the epitaxial conductivity type is formed, so that an annular hole type pn junction which takes the central hole as the center and is transversely distributed is formed.
The transverse diode formed by the annular hole structure has the advantages that the collecting structure of the photo-generated carriers is deep into the epitaxial layer, the diffusion distance from the interior of the epitaxial layer to the junction region is reduced, the transit time of the carriers is shortened, the in-vivo recombination probability is reduced, and the quantum efficiency and the photoelectric response speed are finally improved.
2. In order to inhibit the etching process of the central hole and the side wall and surface leakage introduced by the surface state of the device, local heavy doping is carried out on the inner wall of the central hole and the surface of the photosensitive region of the diode, the doping type is complementary with that of the annular hole type doping region, and the purpose is to form a local pinning diode structure on the surface, so that the width of a depletion region in a pn junction epitaxial layer is pinned, and dark current is controlled; and the depletion region boundary in the local heavily doped (pinning) region is far away from the surface (passivation interface) of the device, so that the influence of the surface state (interface state) on the performance of the device is reduced.
3. When the ion is injected into the pinning area on the surface of the device, a contact window of a ring hole type doping area is reserved for leading out the electrode of the photodiode; the local heavily doped region itself does not prepare an external electrode; the electrode at the other end of the photodiode is led out from a corresponding contact window prepared in an epitaxial region at the periphery of the annular ring type doped region.
4. Dielectric materials such as SiO2 and the like are filled in the central holes to carry out surface passivation; the surface of the device is passivated by adopting a conventional CMOS surface passivation process.
By adopting the device structure, the photo-generated carriers generated by photo-excitation in the epitaxial layer can be collected without diffusing a junction region with a longer distance reaching the near surface, and the photo-generated carriers can be quickly collected by transversely diffusing the photo-generated carriers to the annular hole type pn junction region.
It is evident that the drawings are only examples or embodiments of the present application, from which the present application can also be adapted to other similar situations by a person skilled in the art without the inventive effort. In addition, it should be appreciated that while the development effort might be complex and lengthy, it would nevertheless be a routine undertaking of design, fabrication, or manufacture for those of ordinary skill having the benefit of this disclosure, and thus should not be construed as an admission of insufficient detail.
The term "embodiment" in this application means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive. It will be clear or implicitly understood by those of ordinary skill in the art that the embodiments described in this application can be combined with other embodiments without conflict.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the patent. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application shall be subject to the appended claims.
Claims (10)
1. A photodiode based on an insulating pillar, the photodiode comprising: a semiconductor layer, a first electrode (110) and a second electrode (120);
an insulating column (300) perpendicular to the semiconductor layer is arranged in the semiconductor layer, and the semiconductor layer comprises a first type semiconductor region (210) and a second type semiconductor region (220) surrounding the insulating column (300);
the upper surface of the semiconductor layer is covered with an insulating layer (500), the first electrode (110) penetrates through the insulating layer (500) to be in contact with the first type semiconductor region (210), and the second electrode (120) penetrates through the insulating layer (500) to be in contact with the second type semiconductor region (220).
2. The insulating pillar based photodiode of claim 1, wherein a sidewall of the insulating pillar (300) is circumferentially covered with a first type pinning layer (400), the first type pinning layer (400) isolating the second type semiconductor region (220) from the insulating pillar (300);
the first type pinning layer (400) has a doping concentration that is higher than a doping concentration of the second type semiconductor region (220).
3. The insulating pillar based photodiode of claim 2, wherein a top portion of the first type pinning layer (400) extends outward to form a first type extension layer (410), and a top portion of the second type semiconductor region (220) extends outward to form a second type extension region (221);
-the first type extension layer (410) isolates the second type extension region (221) from the insulating layer (500);
a contact window is reserved in the first type extension layer (410), and the second electrode (120) is in contact with the second type extension region (221) through the contact window.
4. The insulating-column-based photodiode of claim 1, wherein the semiconductor layer comprises an epitaxial layer grown on a substrate (600), the insulating column (300) being disposed in the epitaxial layer, the epitaxial layer comprising the first-type semiconductor region (210) and the second-type semiconductor region (220);
the insulating column (300) penetrates the epitaxial layer;
or, a preset distance is reserved between the bottom surface of the insulating column (300) and the lower surface of the epitaxial layer.
5. The insulating column based photodiode according to claim 1, characterized in that the ratio of the length of the insulating column (300) to the diameter ranges from 3 to 10.
6. A method of manufacturing a photodiode, the method comprising:
etching a through hole perpendicular to the first type semiconductor layer in the first type semiconductor layer;
implanting second type doping ions into the side wall of the through hole, and forming a second type semiconductor region surrounding the through hole in the first type semiconductor layer; wherein the non-second type semiconductor region in the first type semiconductor layer constitutes a first type semiconductor region;
depositing an insulating material in the through hole to form an insulating column;
forming an insulating layer on the upper surface of the first type semiconductor layer;
and preparing a first electrode and a second electrode penetrating through the insulating layer, wherein the first electrode is in contact with the first type semiconductor region, and the second electrode is in contact with the second type semiconductor region.
7. The method of manufacturing a photodiode according to claim 6, further comprising, after forming the second type semiconductor region:
implanting first type doping ions into the side wall of the through hole, and forming a first type pinning layer surrounding the through hole on the inner side of the second type semiconductor region;
the first type pinning layer is used for isolating the second type semiconductor region from the insulating column, and the doping concentration of the first type pinning layer is higher than that of the second type semiconductor region.
8. The method of manufacturing a photodiode according to claim 7, further comprising, after forming the second type semiconductor region:
implanting second type doping ions into the upper surface of the first type semiconductor layer to form a second type extension region extending outwards from the top of the second type semiconductor region;
implanting first type doping ions to the upper surface of the first type semiconductor layer to form a first type extension layer with the top of the first type pinning layer extending outwards, wherein a contact window is reserved in the first type extension layer;
the first type extension layer is used for isolating the second type extension region from the insulating layer, and the contact window is used for providing a contact space between the second electrode and the second type extension region.
9. The method of manufacturing a photodiode of claim 6, wherein the first type semiconductor layer comprises a first type epitaxial layer grown on a first type substrate;
the through hole is formed in the first type epitaxial layer, the second type semiconductor region is formed in the first type epitaxial layer, and a non-second type semiconductor region in the first type epitaxial layer forms the first type semiconductor region;
the through hole penetrates through the first epitaxial layer;
or a preset distance is reserved between the bottom wall of the through hole and the lower surface of the first type epitaxial layer.
10. The method of manufacturing a photodiode of claim 6, wherein the ratio of the length of the via hole to the diameter is in the range of 3-10.
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