CN112928106B - Detector device and array panel - Google Patents
Detector device and array panel Download PDFInfo
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- CN112928106B CN112928106B CN201911237661.5A CN201911237661A CN112928106B CN 112928106 B CN112928106 B CN 112928106B CN 201911237661 A CN201911237661 A CN 201911237661A CN 112928106 B CN112928106 B CN 112928106B
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- 239000004065 semiconductor Substances 0.000 claims abstract description 247
- 229910052751 metal Inorganic materials 0.000 claims description 28
- 239000002184 metal Substances 0.000 claims description 28
- 239000004020 conductor Substances 0.000 claims description 24
- 230000005855 radiation Effects 0.000 claims description 22
- 239000000523 sample Substances 0.000 claims description 12
- 238000001514 detection method Methods 0.000 claims description 11
- 238000005538 encapsulation Methods 0.000 claims description 7
- 239000003292 glue Substances 0.000 claims description 6
- 230000002093 peripheral effect Effects 0.000 claims description 5
- 238000012545 processing Methods 0.000 claims description 5
- 238000012546 transfer Methods 0.000 claims description 4
- 239000000853 adhesive Substances 0.000 claims description 3
- 230000001070 adhesive effect Effects 0.000 claims description 3
- 239000011159 matrix material Substances 0.000 claims description 3
- 238000004806 packaging method and process Methods 0.000 abstract description 5
- 238000003475 lamination Methods 0.000 abstract 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 9
- 229910052802 copper Inorganic materials 0.000 description 9
- 239000010949 copper Substances 0.000 description 9
- 230000017525 heat dissipation Effects 0.000 description 7
- 238000003384 imaging method Methods 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- MARUHZGHZWCEQU-UHFFFAOYSA-N 5-phenyl-2h-tetrazole Chemical compound C1=CC=CC=C1C1=NNN=N1 MARUHZGHZWCEQU-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- QDOSJNSYIUHXQG-UHFFFAOYSA-N [Mn].[Cd] Chemical compound [Mn].[Cd] QDOSJNSYIUHXQG-UHFFFAOYSA-N 0.000 description 2
- QWUZMTJBRUASOW-UHFFFAOYSA-N cadmium tellanylidenezinc Chemical compound [Zn].[Cd].[Te] QWUZMTJBRUASOW-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- XMBWDFGMSWQBCA-UHFFFAOYSA-N hydrogen iodide Chemical compound I XMBWDFGMSWQBCA-UHFFFAOYSA-N 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- QKEOZZYXWAIQFO-UHFFFAOYSA-M mercury(1+);iodide Chemical compound [Hg]I QKEOZZYXWAIQFO-UHFFFAOYSA-M 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- PGAPATLGJSQQBU-UHFFFAOYSA-M thallium(i) bromide Chemical compound [Tl]Br PGAPATLGJSQQBU-UHFFFAOYSA-M 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 229910004613 CdTe Inorganic materials 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000001808 coupling effect Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01V—GEOPHYSICS; GRAVITATIONAL MEASUREMENTS; DETECTING MASSES OR OBJECTS; TAGS
- G01V5/00—Prospecting or detecting by the use of ionising radiation, e.g. of natural or induced radioactivity
- G01V5/20—Detecting prohibited goods, e.g. weapons, explosives, hazardous substances, contraband or smuggled objects
- G01V5/22—Active interrogation, i.e. by irradiating objects or goods using external radiation sources, e.g. using gamma rays or cosmic rays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Life Sciences & Earth Sciences (AREA)
- General Life Sciences & Earth Sciences (AREA)
- Geophysics (AREA)
- Measurement Of Radiation (AREA)
Abstract
Embodiments of the present disclosure provide a detector device and an array panel. A detector arrangement comprising: the semiconductor detector, the semiconductor chip and the packaging support form a lamination, the semiconductor detector is arranged on one side of the semiconductor chip, and the packaging support is arranged on one side of the semiconductor chip away from the semiconductor detector. The electrical signals of the semiconductor chip are led from the side of the semiconductor chip or from the bottom side of the semiconductor detector to the side of the package support or from the bottom side of the semiconductor chip by means of electrical connections.
Description
Technical Field
The invention relates to the field of security inspection, in particular to a detector device and an array panel.
Background
Semiconductor detectors have received wide attention for their higher detection efficiency and higher energy resolution, and are used in various applications of radiation detection, such as nuclide identifiers, metrology alarms, etc. in ambient radiation detection; article detection in national security such as article machine, industrial CT; CT, dental imaging, PET, SPECT, etc. in medical applications.
There is a need for a semiconductor type detector device with improved performance.
Disclosure of Invention
Embodiments of the present disclosure provide a detector device, comprising: a semiconductor detector for receiving radiation and converting a radiation signal into an electrical signal; a semiconductor chip for receiving and processing the electrical signal of the semiconductor detector; the packaging bracket is used for receiving the electric signal of the semiconductor chip and providing an output switching port; wherein the semiconductor detector, the semiconductor chip and the package support form a stack such that the semiconductor detector is arranged on a side of the semiconductor chip and the package support is arranged on a side of the semiconductor chip remote from the semiconductor detector. The electrical signals of the semiconductor chip are led from the side of the semiconductor chip or from the bottom side of the semiconductor detector to the side of the package support or from the bottom side of the semiconductor chip by means of electrical connections.
In one embodiment, the semiconductor chip further includes a chip readout port formed on a surface of the semiconductor chip for directing an output electrical signal of the semiconductor chip to a side of the semiconductor chip or away from a bottom side of the semiconductor detector.
In one embodiment, the package support includes a package read-in port formed in a side of the package support or a bottom side remote from the semiconductor chip.
In one embodiment, the detector device includes a binding wire electrically connecting the chip readout port and the package readout port, or
The detector device is configured such that the chip readout port and the package readout port are aligned respectively so that the chip readout port and the package readout port can be lapped respectively in one-to-one correspondence to realize electrical connection by using conductive adhesive.
In one embodiment, the orthographic projection of the semiconductor chip and package support onto the semiconductor detector is located within the semiconductor detector.
In one embodiment, a central region of the package support is removed such that the package support abuts a peripheral region of the semiconductor chip.
In one embodiment, the detector device further comprises a package heat conductive metal attached to a bottom side of the semiconductor chip remote from the semiconductor detector by a package heat conductive glue.
In one embodiment, the package thermally conductive metal is surrounded by the package support.
In one embodiment, a central region of the package support is partially removed such that the thickness of the central region of the package support is reduced, with a recess on a side of the package support remote from the semiconductor chip.
In one embodiment, the probe device further comprises a package heat conducting metal located in the recess of the package support, the package heat conducting metal being attached to a side of the package support remote from the semiconductor chip by a package heat conducting glue.
In one embodiment, the probe device further comprises a heat sink attached to a side surface of the package thermally conductive metal remote from the semiconductor chip.
In one embodiment, the semiconductor detector includes a plurality of pixel electrodes formed on a surface of a side of the semiconductor detector facing the semiconductor chip, and the plurality of pixel electrodes of the semiconductor detector are electrically connected to the surface of the semiconductor chip through a column-shaped conductive paste.
In one embodiment, the semiconductor chip includes a bottom side thermally conductive material on a side remote from the semiconductor probe such that heat generated by semiconductor devices and circuitry on a side of the semiconductor chip facing the semiconductor probe is conducted to the bottom side thermally conductive material.
In one embodiment, the semiconductor chip comprises a plurality of through holes in which a through hole heat conducting material is arranged for conducting heat generated by the semiconductor devices and circuits of the side of the semiconductor chip facing the semiconductor detector to said bottom side heat conducting material.
The present disclosure also provides an array panel comprising a plurality of the above-described detector devices; the detector devices are arranged in an array or matrix and are spliced, so that the semiconductor detectors of the plurality of detector devices are spliced to form a detection surface for receiving radiation.
Drawings
FIG. 1 is a schematic cross-sectional view of a detector device according to one embodiment of the present disclosure;
FIG. 2 is a schematic side view of a portion of a detector device according to one embodiment of the present disclosure;
FIG. 3 is a schematic cross-sectional view of a detector device according to one embodiment of the present disclosure;
FIG. 4 is a schematic cross-sectional view of a splice of two detector devices according to one embodiment of the present disclosure;
FIG. 5 is a schematic plan view of an array substrate according to one embodiment of the present disclosure, including four detector devices spliced;
FIG. 6 is a schematic side view of a portion of a detector device according to one embodiment of the present disclosure;
FIG. 7 is a schematic cross-sectional view of a detector device according to one embodiment of the present disclosure, with the package support shown in isolation at the right of the drawing;
FIG. 8 is a schematic cross-sectional view of a detector device according to one embodiment of the present disclosure, with the package support shown in isolation at the right of the drawing;
FIG. 9 is a schematic cross-sectional view of a detector device according to one embodiment of the present disclosure;
fig. 10 is a schematic cross-sectional view of a detector device according to one embodiment of the present disclosure.
Detailed Description
Embodiments of the present disclosure provide a detector device 10 comprising: the semiconductor probe 1, the semiconductor chip 3 and the package support 5 form a stack, wherein the semiconductor probe 1 is arranged on a side of the semiconductor chip 3 and the package support 5 is arranged on a side of the semiconductor chip 3 remote from the semiconductor probe 1. The semiconductor detector 1 is used for receiving radiation and converting radiation signals into electrical signals. One surface of the semiconductor detector 1 is for receiving radiation, such as X-rays, gamma rays, etc.; the semiconductor detector 1 may convert radiation into an optical or electrical signal. In this embodiment, the semiconductor detector 1 includes, for example, a cadmium zinc telluride detector (CZT, cadmium Zinc Telluride), a cadmium telluride detector (CdTe, cadmium Telluride), a Germanium detector (Ge, germanium), a gallium arsenide detector (GaAs, gallium Arsenide), a lead iodide detector (PbI 2, lead Iodide), a thallium bromide detector (tlibr, thallium Bromide), a mercury iodide detector (HgI 2, mercury iodide), a cadmium manganese telluride detector (CdMnTe, cadmium Manganese Telluride).
In one embodiment of the present disclosure, the detector device may be a photon-counting detector, wherein the semiconductor chip may be a photon-counting readout chip. Photon counting detector theory of operation: the radiation acts on the semiconductor detector to generate an electrical signal; the photon counting type reading chip can amplify, filter and shape the electric signal in the detector, the chip also comprises a counting function, and when the energy of the rays exceeds a set threshold value, the counter is increased by one. The detector is divided into a two-dimensional array of pixels, each pixel corresponding to a path of the readout chip, which enables acquisition and counting of electrical signals of the corresponding detector pixel. The photon counting two-dimensional imaging function is realized through the collection and counting of rays of the whole pixel array. The area array photon counting type semiconductor radiation detector needs to be spliced into a large area in the application process to realize imaging of a large object. However, the size of the semiconductor detector with better performance is limited by the crystal growth process at present and is in the order of a few centimeters, so that the design of the detector module needs to be realized, and 4 sides can be spliced, and thus, large-area imaging detection is realized through the splicing of a plurality of modules.
The design of the photon counting type reading chip is very complex, and not only the amplification, filtering, forming and counting of basic single pixel signals are needed, but also the algorithm conforming function among a plurality of pixels is needed to be added; meanwhile, when a small-pixel photon counting type area array detector is applied, the smaller the pixel is, the better the imaging spatial resolution is, therefore, hundreds of signal reading paths are required to be integrated on the area of unit square centimeter, the larger the power consumption of a chip is caused, when a plurality of modules are spliced and applied, the heat dissipation of the whole system is increased in multiple, and the heat dissipation of the chip can seriously influence the performance of the detector. When the chip is in a working state, the generated heat is very high and can reach more than 60 ℃ generally, and the detection performance can be deteriorated along with the increase of the temperature. Meanwhile, the noise of the detector module is related to the length of the connecting wire between the pixel electrode of the detector and the reading chip, and the longer the connecting wire is, the larger the parasitic capacitance is, the larger the noise is. Therefore, in the design of the whole module, the line length between the semiconductor detector crystal and the reading chip is considered, so that the line length is shortened as much as possible, and the influence of parasitic capacitance on a system is reduced.
The semiconductor detector 1 may include a plurality of pixel electrodes formed on a side surface of the semiconductor detector 1 facing the semiconductor chip 3, and the plurality of pixel electrodes of the semiconductor detector 1 are electrically connected to the surface 3-1 of the semiconductor chip 3 through the columnar conductive paste 2. The semiconductor detector 1 comprises a plurality of small units or areas which are capable of sensing the intensity of radiation in a correspondingly small range, converting the radiation into electrical signals which are collected and processed by the readout chip 3, thus forming a distinguishable image.
The semiconductor chip 3 is used for receiving and processing the electric signals of the semiconductor detector 1 and the packaging support 5; the semiconductor chip 3 includes a semiconductor device and wiring. The semiconductor chip 3 may here be an unpackaged chip, which may have a semiconductor body (e.g. the semiconductor described above), for example, as shown in fig. 1 in the left-hand part, the semiconductor chip 3 having a certain thickness, which is a schematic representation that the semiconductor chip 3 is a semiconductor body having a certain thickness, on which semiconductor devices and connection lines are formed. The semiconductor device and the connection lines may be formed on a side of the semiconductor chip 3 facing the semiconductor detector 1, and in fig. 1, the semiconductor device may be formed on a top side or upper side of the semiconductor chip 3, for example, the top side surface 3-1.
The package support 5 is used for receiving the electrical signals of the semiconductor chip 3 and providing an output transfer port. In some embodiments, the package support 5 may be regarded as an interposer. The package support 5 may include an interface providing an output so as to output a signal received from the semiconductor chip 3 or an electrical signal input to the package support 5 by the semiconductor chip 3 to the outside.
In one embodiment of the present disclosure, the electrical signal of the semiconductor chip 3 is led from the edge of the side or bottom side 3-2 of the semiconductor chip 3 to the bottom side 5-2 or side of the package support 5 through electrical connections. In the existing similar probe device, the electrical signals of the semiconductor chip 3 are transferred to the package support 5 by the through holes traversing the semiconductor chip 3, which results in high requirements of the manufacturing process and difficulty in processing, while the electrical connection of the present embodiment allows to electrically connect the semiconductor chip 3 and the package support 5 in a simple manner.
Further, in one embodiment, as shown in the side view of the semiconductor chip 3 and the package support 5 given in fig. 2, the semiconductor chip 3 further includes a chip readout port 6-1 formed at a surface (which may be the top side surface 3-1 and the side surface) of the semiconductor chip 3 for guiding an output electrical signal of the semiconductor chip 3 to an edge of the side or bottom side surface 3-2 of the semiconductor chip 3. The package holder 5 includes a package read-in port 6-2, and a surface 5-2 formed on a side or bottom side of the package holder 5. The chip readout port 6-1 may be a metal wiring formed on the surface of the semiconductor chip 3. The package read-in port 6-2 may be a metal wiring formed on the surface of the package holder 5. The metal wiring may be formed by vapor deposition, sputtering, or the like. In one embodiment, the chip readout port 6-1 may be an electrode formed on the surface of the semiconductor chip 3, and the package readout port 6-2 may be an electrode formed on the surface of the package support 5; they may be formed on four sides of the semiconductor chip 3 and the package support 5, respectively, and may be plural in number, and the number may be determined as needed. In the embodiment shown in fig. 2, a binding wire 4 is provided in the detector device 10 to electrically connect the chip readout port 6-1 and the package read-in port 6-2 of the surface of the package support 5. In fig. 2, four chip reading ports 6-1 are arranged on the side surface of the semiconductor chip 3, four package reading ports 6-2 are arranged on the side surface of the package support 5, and two ends of the binding wire 4 are respectively welded or otherwise electrically connected with the chip reading ports 6-1 and the package reading ports 6-2, so that the two are electrically connected; it should be understood that the number of chip readout ports 6-1 on the side of the semiconductor chip 3 and the number of package readout ports 6-2 on the side of the package support 5 may be set according to actual needs.
Fig. 6 illustrates another embodiment of the present disclosure, and fig. 6 is a side view of a semiconductor chip 3 and a package support 5 in another embodiment. In the embodiment shown in fig. 6, four chip readout ports 6-1 on the side of the semiconductor chip 3 and four package readout ports 6-2 on the side of the package support 5 are aligned, and one chip readout port 6-1 and one corresponding package readout port 6-2 are electrically connected by the conductive paste 5-1. The conductive adhesive 5-1 is directly adhered/lapped on the interface of the chip reading port 6-1 and the package reading port 6-2, so as to realize the electric connection of the two. In this embodiment, the sides of the semiconductor chip 3 are substantially aligned with the sides of the package support 5, or substantially in one plane.
In the embodiment of fig. 6, the semiconductor chip 3 and the package support 5 are illustrated as two dimensions close to or even identical. In other embodiments, the dimensions of the semiconductor chip 3 and the package support 5 may be different, e.g. the semiconductor chip 3 may be larger than the package support 5, or the package support 5 may project onto the semiconductor chip 3 within the semiconductor chip 3.
The present disclosure presents a number of embodiments illustrating the size and arrangement of the three of the semiconductor probe 1, the semiconductor chip 3 and the package support 5. In the exemplary embodiment shown in fig. 1 and 3, the front projection of the semiconductor chip 3 and the package support 5 onto the semiconductor detector 1 is located within the semiconductor detector 1. According to the embodiment of the present disclosure, the size of the semiconductor chip 3 and the package support 5 is not limited, for example, the size of the semiconductor chip 3 is nearly the same as the size of the package support 5 in the embodiment shown in fig. 3, and the size of the semiconductor chip 3 is larger than the size of the package support 5 in the embodiment shown in fig. 1; however, in the detector device 10 of the present disclosure, the semiconductor detector 1 is sized such that the orthographic projection of the semiconductor chip 3 and the package support 5 on the semiconductor detector 1 is located within the semiconductor detector 1.
In the embodiments shown in fig. 1,4, 7, 8, the semiconductor chip 3 may be dimensioned close to the semiconductor detector 1. In the embodiment shown in the drawings, the chip readout port 6-1 of the semiconductor chip 3 is located at the edge of the bottom side surface 3-2 of the semiconductor chip 3, and the package readout port 6-2 is located at the bottom side surface 5-2 of the package holder 5; it should be noted that the chip readout port 6-1 of the semiconductor chip 3 may be located on the side of the semiconductor chip 3, and the package readout port 6-2 may be located on the side of the package support 5, as shown in fig. 3, 9, and 10. It should be appreciated that in one embodiment, the chip readout port 6-1 of the semiconductor chip 3 is located at the edge of the bottom side surface 3-2 of the semiconductor chip 3, while the package readout port 6-2 may be located at the side of the package support 5, in accordance with the teachings of the embodiments of the present disclosure; in another embodiment, the chip readout port 6-1 of the semiconductor chip 3 may also be located at a side of the semiconductor chip 3, and the package readout port 6-2 is located at the bottom surface 5-2 of the package support 5.
The arrangement of the embodiments of the present disclosure is advantageous in that in fig. 3 the extent of the lateral extension of the semiconductor detector 1 is shown by a dashed line, and in the lateral extent of fig. 3 neither the semiconductor chip 3 nor the package support 5 exceeds the dashed line, i.e. both to the left of the dashed line, so that when the detector device 10 and the further detector device 10 are brought into proximity, the semiconductor detectors 1 of the two detector devices 10 can abut each other, whereas the semiconductor chips 3 or the package supports 5 of the two detector devices 10 will be separated by a gap or space. In this gap or space, binding-wires 4 may be provided.
Fig. 4 schematically shows a schematic view of two detector devices 10 arranged side by side. In fig. 4, the binding-wire 4 electrically connects the bottom side of the semiconductor chip 3 and the side of the package holder 5. Since the package support 5 has a smaller size than the semiconductor detector 1, when the semiconductor detectors 1 of the two detector devices 10 are brought close together, a gap or space remains between the package supports 5 of the two detector devices 10, in which the binding-wire 4 of one or both of the two detector devices 10 may be located. In other words, the binding-wire 4 does not interfere with the arrangement of the two detector devices 10 as close as possible.
Fig. 5 shows a schematic view of an array substrate, in fig. 5 only four detector devices 10 of the array substrate are shown. In practice, the array substrate may have more detector devices 10. For example, the size of one detector device 10 may be 2cm×2cm, or 4cm×4cm, while one array substrate may be 100cm×100cm or more. The semiconductor detectors 1 of the detector arrangement 10 can be arranged as closely as possible with a positive effect, so that more radiation is detected by the semiconductor detectors 1 than leaks or is ignored from gaps between the semiconductor detectors 1.
The semiconductor detector 1 of the detector device 10 converts radiation into an electrical signal when irradiated by radiation, the semiconductor chip 3 receives the electrical signal and generates heat when subjected to processing operation, and the semiconductor detector 1 is sensitive to temperature, so that the semiconductor chip 3 needs to dissipate heat in time so as to avoid the temperature of the semiconductor chip 3 from increasing to affect the detection accuracy of the semiconductor detector 1.
In one embodiment of the present disclosure, the semiconductor chip 3 remote from the semiconductor detector 1 comprises a bottom side heat conducting material located at a side remote from the semiconductor detector 1, such that when the semiconductor devices and circuits of the side of the semiconductor chip 3 facing the semiconductor detector 1 heat up, heat is conducted to the bottom side heat conducting material. The bottom side thermally conductive material may be a film layer or a discrete island film layer formed of the thermally conductive material of the bottom side of the semiconductor chip 3, or a thermally conductive material embedded in the bottom of the base body of the semiconductor chip 3. For example, in the probe device 10 shown in fig. 1, since no device or wiring is arranged on the side of the semiconductor chip 3 away from the semiconductor probe 1, a copper layer or a discrete island-like copper layer may be provided on the bottom side of the semiconductor chip 3, and since the copper layer is a good conductor of heat, heat thereof can be rapidly dissipated to the external environment to lower the temperature, and thus a temperature difference is formed between the top side and the bottom side of the semiconductor chip 3, and heat of the semiconductor chip 3 can be transferred from the top side to the bottom side of the semiconductor chip 3. In another embodiment, to facilitate heat transfer from the top side to the bottom side of the semiconductor chip 3, the semiconductor chip 3 may comprise a plurality of discretely arranged through holes in which a through hole heat conducting material (e.g. metal or alloy) is provided, so that heat generated by the semiconductor devices and circuits of the side of the semiconductor chip 3 facing the semiconductor detector 1 may be conducted through the through hole heat conducting material (e.g. metal or alloy) in the through holes to the bottom side heat conducting material of the semiconductor chip 3. The heat conducting material of the through holes can also be copper, aluminum and other metals, and the number of the through holes can be multiple. In this embodiment, a plurality of through holes are formed on the semiconductor chip 3, and these through holes are filled with a through hole heat conducting material, such as copper or aluminum, which transfers heat from the semiconductor chip 3 to a bottom side heat conducting material of the semiconductor chip 3, such as copper or aluminum, which dissipates heat to the environment. The temperature of the top side of the semiconductor chip 3 is higher than the temperature of the bottom side of the semiconductor chip 3, so that heat can be transferred from the top side of the semiconductor chip 3 to the bottom side of the semiconductor chip 3.
In one embodiment, as shown in fig. 1, a central portion of the package support 5 is removed, the package support 5 abuts the peripheral region of the semiconductor chip 3, and a large portion of the bottom side of the semiconductor chip 3 may thus be exposed to air, thereby facilitating heat dissipation of the bottom side thermally conductive material of the bottom side of the semiconductor chip 3 into the environment, and the temperature of the bottom side thermally conductive material may thus not rise.
Fig. 7 illustrates one embodiment of the present disclosure, with the right-hand portion of fig. 7 illustrating a top view of the package support 5. In this embodiment, the package support 5 may be a plate, and a central portion is removed, thus being ring-shaped. The left part of fig. 7 shows a detector device 10 in which the package support 5 abuts against the peripheral region of the semiconductor chip 3. In the present embodiment, the central region of the package support 5 is removed, and the package support 5 abuts against the peripheral region of the bottom side of the semiconductor chip 3, while the portion of the central region of the bottom side of the semiconductor chip 3 does not contact the package support 5. In order to improve the heat dissipation effect, in the present embodiment, a package heat conductive metal 8 such as copper, aluminum, tin, or the like or an alloy of these hot good conductors is provided, and the package heat conductive metal 8 is attached to the central region of the bottom side of the semiconductor chip 3 by a package heat conductive paste 7. In fig. 7, the package heat conducting metal 8 is surrounded by the package support 5. In other embodiments, the package heat conducting metal 8 is not in contact with the package support 5, in other words, the projection of the package heat conducting metal 8 onto the semiconductor chip 3 is located within the projection of the package support 5 onto the semiconductor chip 3.
Fig. 8 illustrates one embodiment of the present disclosure, with the right-hand portion of fig. 8 illustrating a top view of the package support 5. In this embodiment, the package support 5 may be a plate, composed of an insulating material, and the center portion is partially removed such that the thickness of the center area of the package support 5 is reduced, one side of the package support 5 has a recess, and the other side is a plane. The left part of fig. 8 shows a detector device 10, wherein one side of the plane of the package support 5, i.e. the top side, abuts against the bottom side of the semiconductor chip 3, and a material such as a heat conducting glue may be added between the bottom side of the semiconductor chip 3 and one side of the plane of the package support 5, i.e. the top side. In the embodiment, the bottom side of the semiconductor chip 3 and the top side of the packaging bracket 5 have large contact areas, so that the coupling effect is improved, and the heat dissipation effect is good; the central area of the package support 5 is partly removed to form a recess, and in order to increase the heat dissipation effect, a package heat conducting metal 8, such as copper, aluminum, tin, etc. or an alloy of these heat good conductors is provided, the package heat conducting metal 8 being attached to the recess of the central area of the package support 5 by a package heat conducting glue 7. In fig. 8, the package heat conductive metal 8 is abutted against a side wall of the recess of the package holder 5. In other embodiments, the encapsulation heat conducting metal 8 may not abut against a side wall of the recess of the encapsulation holder 5, in other words, the projection of the encapsulation heat conducting metal 8 onto the encapsulation holder 5 is located within the projection of the recess of the encapsulation holder 5.
In the embodiment shown in fig. 7 and 8, the detector device 10 may further comprise a heat sink 9. The heat sink 9 is attached to a side surface of the package heat conductive metal 8 remote from the semiconductor chip 3. The heat dissipating device 9 may be a heat sink, a heat dissipating fan, peltier, a heat conducting copper tube, etc., which can effectively accelerate the heat dissipation of the packaged heat conducting metal 8.
The present disclosure also provides an array panel comprising a plurality of the detector devices 10 described above. In the present exemplary embodiment, the detector devices 10 are arranged in an array or matrix and are joined together, so that the semiconductor detectors 1 of a plurality of detector devices 10 are joined together to form a detection area for receiving radiation. The semiconductor detector 1 of the detector device 10 has a small area, and the detected area is small, for example, when the semiconductor detector 1 is used for detecting and imaging a human body, one semiconductor detector 1 is not used for providing a complete cross-sectional image of the human body, so that a plurality of detector devices 10 need to be spliced to form an array panel with an area close to the detected object. It is important that each detector device 10 is closely spaced, so that it is avoided that the gaps formed between the detector devices 10 are not capable of detecting radiation, which would result in missing information and radiation leakage. The detector device 10 of the present disclosure can allow a plurality of detector devices 10 to be brought close to each other and the semiconductor detectors 1 to abut against each other, thereby obtaining an array substrate having substantially no gap on the detection surface.
Those skilled in the art will appreciate that the embodiments described above are exemplary and that modifications may be made by those skilled in the art, and that the structures described in the various embodiments may be freely combined without conflict in terms of structure or principle.
Although the present invention has been described with reference to the accompanying drawings, the examples disclosed in the drawings are intended to illustrate embodiments of the invention and are not to be construed as limiting the invention.
In the present disclosure, the semiconductor detector 1, the semiconductor chip 3 and the package support 5 may be regarded as flat and have a certain physical thickness, the stack of the three being with respect to a flat first surface, top surface (or top side) or second surface, bottom surface (or bottom side), the sides or sides may be the sides between the opposite top and bottom surfaces; while one side may be a top (or top side) or bottom (or bottom side) surface of the semiconductor detector, semiconductor chip and package support.
It should be noted that the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality; "upper" and "lower" are used merely to indicate the orientation of the components in the illustrated structure and are not intended to limit the absolute orientation thereof; "first" and "second" are used to distinguish between different components and do not necessarily require a ordering or representation of importance or primary or secondary respectively. In addition, any element numbers of the claims should not be construed as limiting the scope of the disclosure.
Although a few embodiments of the present general inventive concept have been shown and described, it would be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the general inventive concept, the scope of which is defined in the claims and their equivalents.
Claims (13)
1. A detector arrangement comprising:
a semiconductor detector (1) for receiving radiation and converting the radiation signal into an electrical signal;
A semiconductor chip (3) for receiving and processing the electrical signals of the semiconductor detector; and
A package support (5) for receiving an electrical signal of the semiconductor chip and providing an output transfer port;
Wherein the semiconductor detector, the semiconductor chip and the package support form a stack such that the semiconductor detector is arranged on a first surface (3-1) of the semiconductor chip and the package support is arranged on a second surface (3-2) of the semiconductor chip remote from the semiconductor detector; and
The electrical signals of the semiconductor chip are led from the side between the first surface (3-1) and the second surface (3-2) of the semiconductor chip or the edge of the second surface (3-2) to the side of the package support or the edge of the bottom surface (5-2) remote from the semiconductor chip by means of electrical connections;
Wherein a central region of the package support (5) is removed such that the package support abuts against a peripheral region of the semiconductor chip (3), or a central region of the package support (5) is partially removed such that a thickness of the central region of the package support (5) is reduced, having a recess at a side of the package support remote from the semiconductor chip.
2. The detector device according to claim 1, wherein the semiconductor chip further comprises a chip readout port (6-1) formed at a surface of the semiconductor chip for guiding an output electrical signal of the semiconductor chip to a side of the semiconductor chip or to an edge of the second surface (3-2).
3. The probe device according to claim 2, wherein the package holder includes a package read-in port (6-2) formed at a side of the package holder or at a bottom edge away from the semiconductor chip.
4. A detector arrangement according to claim 3, wherein
The detector device includes a binding wire (4) electrically connecting the chip readout port (6-1) and the package readout port (6-2), or
The detector device is configured such that the chip readout port (6-1) and the package readout port (6-2) are respectively aligned so that the chip readout port (6-1) and the package readout port (6-2) can be respectively lapped in a one-to-one correspondence manner by using conductive adhesive to realize electrical connection.
5. Detector arrangement according to claim 1, wherein the front projection of the semiconductor chip (3) and the package support (5) onto the semiconductor detector (1) is located within the semiconductor detector (1).
6. The detector device according to claim 1, further comprising an encapsulation heat conducting metal (8) attached to the second surface (3-2) of the semiconductor chip by an encapsulation heat conducting glue (7).
7. The detector device of claim 6, wherein an encapsulating thermally conductive metal is surrounded by the encapsulating support.
8. The detector device according to claim 1, further comprising a package heat conducting metal (8) located in a recess of the package support, the package heat conducting metal being attached to a bottom surface of the package support remote from the semiconductor chip by a package heat conducting glue (7).
9. The detector device according to claim 6 or 8, further comprising a heat sink (9), the heat sink (9) being attached to a side surface of the package thermally conductive metal remote from the semiconductor chip.
10. The detector device according to claim 1, wherein the semiconductor detector includes a plurality of pixel electrodes formed on a side surface of the semiconductor detector facing the semiconductor chip, and the plurality of pixel electrodes of the semiconductor detector are electrically connected to the first surface of the semiconductor chip through the columnar conductive paste.
11. The detector arrangement of claim 1 wherein the semiconductor chip includes a bottom side thermally conductive material on a side remote from the semiconductor detector such that heat generated by semiconductor devices and circuitry on a side of the semiconductor chip facing the semiconductor detector is conducted to the bottom side thermally conductive material.
12. The detector device of claim 11, wherein the semiconductor chip comprises a plurality of through holes in which a through hole thermally conductive material is provided for conducting heat generated by semiconductor devices and circuits of a side of the semiconductor chip facing the semiconductor detector to the bottom side thermally conductive material.
13. An array panel comprising a plurality of detector arrangements as claimed in any one of claims 1 to 12; the detector devices are arranged in an array or matrix and are spliced, so that the semiconductor detectors of the plurality of detector devices are spliced to form a detection surface for receiving radiation.
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| CN101410983A (en) * | 2006-03-30 | 2009-04-15 | 皇家飞利浦电子股份有限公司 | Radiation detector array |
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| US7190759B2 (en) * | 2002-12-19 | 2007-03-13 | General Electric Company | Support structure for Z-extensible CT detectors and methods of making same |
| WO2005065333A2 (en) * | 2003-12-30 | 2005-07-21 | Dxray, Inc. | Pixelated cadmium zinc telluride based photon counting mode detector |
| DE102014222690B4 (en) * | 2014-11-06 | 2024-10-02 | Siemens Healthineers Ag | detector module for an X-ray detector |
| DE102016221481B4 (en) * | 2016-11-02 | 2021-09-16 | Siemens Healthcare Gmbh | Radiation detector with an intermediate layer |
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| CN101410983A (en) * | 2006-03-30 | 2009-04-15 | 皇家飞利浦电子股份有限公司 | Radiation detector array |
| CN103208536A (en) * | 2012-01-16 | 2013-07-17 | 江苏科融电子技术有限公司 | Semiconductor packaging structural member for pyroelectric infrared sensor, manufacturing method thereof and sensor |
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